mthca_main.c 31 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $
  34. */
  35. #include <linux/config.h>
  36. #include <linux/version.h>
  37. #include <linux/module.h>
  38. #include <linux/init.h>
  39. #include <linux/errno.h>
  40. #include <linux/pci.h>
  41. #include <linux/interrupt.h>
  42. #include "mthca_dev.h"
  43. #include "mthca_config_reg.h"
  44. #include "mthca_cmd.h"
  45. #include "mthca_profile.h"
  46. #include "mthca_memfree.h"
  47. MODULE_AUTHOR("Roland Dreier");
  48. MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver");
  49. MODULE_LICENSE("Dual BSD/GPL");
  50. MODULE_VERSION(DRV_VERSION);
  51. #ifdef CONFIG_PCI_MSI
  52. static int msi_x = 0;
  53. module_param(msi_x, int, 0444);
  54. MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
  55. static int msi = 0;
  56. module_param(msi, int, 0444);
  57. MODULE_PARM_DESC(msi, "attempt to use MSI if nonzero");
  58. #else /* CONFIG_PCI_MSI */
  59. #define msi_x (0)
  60. #define msi (0)
  61. #endif /* CONFIG_PCI_MSI */
  62. static const char mthca_version[] __devinitdata =
  63. DRV_NAME ": Mellanox InfiniBand HCA driver v"
  64. DRV_VERSION " (" DRV_RELDATE ")\n";
  65. static struct mthca_profile default_profile = {
  66. .num_qp = 1 << 16,
  67. .rdb_per_qp = 4,
  68. .num_cq = 1 << 16,
  69. .num_mcg = 1 << 13,
  70. .num_mpt = 1 << 17,
  71. .num_mtt = 1 << 20,
  72. .num_udav = 1 << 15, /* Tavor only */
  73. .fmr_reserved_mtts = 1 << 18, /* Tavor only */
  74. .uarc_size = 1 << 18, /* Arbel only */
  75. };
  76. static int __devinit mthca_tune_pci(struct mthca_dev *mdev)
  77. {
  78. int cap;
  79. u16 val;
  80. /* First try to max out Read Byte Count */
  81. cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX);
  82. if (cap) {
  83. if (pci_read_config_word(mdev->pdev, cap + PCI_X_CMD, &val)) {
  84. mthca_err(mdev, "Couldn't read PCI-X command register, "
  85. "aborting.\n");
  86. return -ENODEV;
  87. }
  88. val = (val & ~PCI_X_CMD_MAX_READ) | (3 << 2);
  89. if (pci_write_config_word(mdev->pdev, cap + PCI_X_CMD, val)) {
  90. mthca_err(mdev, "Couldn't write PCI-X command register, "
  91. "aborting.\n");
  92. return -ENODEV;
  93. }
  94. } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE))
  95. mthca_info(mdev, "No PCI-X capability, not setting RBC.\n");
  96. cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP);
  97. if (cap) {
  98. if (pci_read_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, &val)) {
  99. mthca_err(mdev, "Couldn't read PCI Express device control "
  100. "register, aborting.\n");
  101. return -ENODEV;
  102. }
  103. val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12);
  104. if (pci_write_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, val)) {
  105. mthca_err(mdev, "Couldn't write PCI Express device control "
  106. "register, aborting.\n");
  107. return -ENODEV;
  108. }
  109. } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE)
  110. mthca_info(mdev, "No PCI Express capability, "
  111. "not setting Max Read Request Size.\n");
  112. return 0;
  113. }
  114. static int __devinit mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim)
  115. {
  116. int err;
  117. u8 status;
  118. err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status);
  119. if (err) {
  120. mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
  121. return err;
  122. }
  123. if (status) {
  124. mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, "
  125. "aborting.\n", status);
  126. return -EINVAL;
  127. }
  128. if (dev_lim->min_page_sz > PAGE_SIZE) {
  129. mthca_err(mdev, "HCA minimum page size of %d bigger than "
  130. "kernel PAGE_SIZE of %ld, aborting.\n",
  131. dev_lim->min_page_sz, PAGE_SIZE);
  132. return -ENODEV;
  133. }
  134. if (dev_lim->num_ports > MTHCA_MAX_PORTS) {
  135. mthca_err(mdev, "HCA has %d ports, but we only support %d, "
  136. "aborting.\n",
  137. dev_lim->num_ports, MTHCA_MAX_PORTS);
  138. return -ENODEV;
  139. }
  140. mdev->limits.num_ports = dev_lim->num_ports;
  141. mdev->limits.vl_cap = dev_lim->max_vl;
  142. mdev->limits.mtu_cap = dev_lim->max_mtu;
  143. mdev->limits.gid_table_len = dev_lim->max_gids;
  144. mdev->limits.pkey_table_len = dev_lim->max_pkeys;
  145. mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay;
  146. mdev->limits.max_sg = dev_lim->max_sg;
  147. mdev->limits.reserved_qps = dev_lim->reserved_qps;
  148. mdev->limits.reserved_srqs = dev_lim->reserved_srqs;
  149. mdev->limits.reserved_eecs = dev_lim->reserved_eecs;
  150. mdev->limits.reserved_cqs = dev_lim->reserved_cqs;
  151. mdev->limits.reserved_eqs = dev_lim->reserved_eqs;
  152. mdev->limits.reserved_mtts = dev_lim->reserved_mtts;
  153. mdev->limits.reserved_mrws = dev_lim->reserved_mrws;
  154. mdev->limits.reserved_uars = dev_lim->reserved_uars;
  155. mdev->limits.reserved_pds = dev_lim->reserved_pds;
  156. /* IB_DEVICE_RESIZE_MAX_WR not supported by driver.
  157. May be doable since hardware supports it for SRQ.
  158. IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver.
  159. IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not
  160. supported by driver. */
  161. mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
  162. IB_DEVICE_PORT_ACTIVE_EVENT |
  163. IB_DEVICE_SYS_IMAGE_GUID |
  164. IB_DEVICE_RC_RNR_NAK_GEN;
  165. if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR)
  166. mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
  167. if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR)
  168. mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
  169. if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI)
  170. mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI;
  171. if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG)
  172. mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
  173. if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE)
  174. mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
  175. if (dev_lim->flags & DEV_LIM_FLAG_SRQ)
  176. mdev->mthca_flags |= MTHCA_FLAG_SRQ;
  177. return 0;
  178. }
  179. static int __devinit mthca_init_tavor(struct mthca_dev *mdev)
  180. {
  181. u8 status;
  182. int err;
  183. struct mthca_dev_lim dev_lim;
  184. struct mthca_profile profile;
  185. struct mthca_init_hca_param init_hca;
  186. struct mthca_adapter adapter;
  187. err = mthca_SYS_EN(mdev, &status);
  188. if (err) {
  189. mthca_err(mdev, "SYS_EN command failed, aborting.\n");
  190. return err;
  191. }
  192. if (status) {
  193. mthca_err(mdev, "SYS_EN returned status 0x%02x, "
  194. "aborting.\n", status);
  195. return -EINVAL;
  196. }
  197. err = mthca_QUERY_FW(mdev, &status);
  198. if (err) {
  199. mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
  200. goto err_disable;
  201. }
  202. if (status) {
  203. mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
  204. "aborting.\n", status);
  205. err = -EINVAL;
  206. goto err_disable;
  207. }
  208. err = mthca_QUERY_DDR(mdev, &status);
  209. if (err) {
  210. mthca_err(mdev, "QUERY_DDR command failed, aborting.\n");
  211. goto err_disable;
  212. }
  213. if (status) {
  214. mthca_err(mdev, "QUERY_DDR returned status 0x%02x, "
  215. "aborting.\n", status);
  216. err = -EINVAL;
  217. goto err_disable;
  218. }
  219. err = mthca_dev_lim(mdev, &dev_lim);
  220. profile = default_profile;
  221. profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
  222. profile.uarc_size = 0;
  223. err = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
  224. if (err < 0)
  225. goto err_disable;
  226. err = mthca_INIT_HCA(mdev, &init_hca, &status);
  227. if (err) {
  228. mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
  229. goto err_disable;
  230. }
  231. if (status) {
  232. mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
  233. "aborting.\n", status);
  234. err = -EINVAL;
  235. goto err_disable;
  236. }
  237. err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
  238. if (err) {
  239. mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
  240. goto err_close;
  241. }
  242. if (status) {
  243. mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
  244. "aborting.\n", status);
  245. err = -EINVAL;
  246. goto err_close;
  247. }
  248. mdev->eq_table.inta_pin = adapter.inta_pin;
  249. mdev->rev_id = adapter.revision_id;
  250. return 0;
  251. err_close:
  252. mthca_CLOSE_HCA(mdev, 0, &status);
  253. err_disable:
  254. mthca_SYS_DIS(mdev, &status);
  255. return err;
  256. }
  257. static int __devinit mthca_load_fw(struct mthca_dev *mdev)
  258. {
  259. u8 status;
  260. int err;
  261. /* FIXME: use HCA-attached memory for FW if present */
  262. mdev->fw.arbel.fw_icm =
  263. mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages,
  264. GFP_HIGHUSER | __GFP_NOWARN);
  265. if (!mdev->fw.arbel.fw_icm) {
  266. mthca_err(mdev, "Couldn't allocate FW area, aborting.\n");
  267. return -ENOMEM;
  268. }
  269. err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status);
  270. if (err) {
  271. mthca_err(mdev, "MAP_FA command failed, aborting.\n");
  272. goto err_free;
  273. }
  274. if (status) {
  275. mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status);
  276. err = -EINVAL;
  277. goto err_free;
  278. }
  279. err = mthca_RUN_FW(mdev, &status);
  280. if (err) {
  281. mthca_err(mdev, "RUN_FW command failed, aborting.\n");
  282. goto err_unmap_fa;
  283. }
  284. if (status) {
  285. mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status);
  286. err = -EINVAL;
  287. goto err_unmap_fa;
  288. }
  289. return 0;
  290. err_unmap_fa:
  291. mthca_UNMAP_FA(mdev, &status);
  292. err_free:
  293. mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
  294. return err;
  295. }
  296. static int __devinit mthca_init_icm(struct mthca_dev *mdev,
  297. struct mthca_dev_lim *dev_lim,
  298. struct mthca_init_hca_param *init_hca,
  299. u64 icm_size)
  300. {
  301. u64 aux_pages;
  302. u8 status;
  303. int err;
  304. err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status);
  305. if (err) {
  306. mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n");
  307. return err;
  308. }
  309. if (status) {
  310. mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, "
  311. "aborting.\n", status);
  312. return -EINVAL;
  313. }
  314. mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n",
  315. (unsigned long long) icm_size >> 10,
  316. (unsigned long long) aux_pages << 2);
  317. mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages,
  318. GFP_HIGHUSER | __GFP_NOWARN);
  319. if (!mdev->fw.arbel.aux_icm) {
  320. mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n");
  321. return -ENOMEM;
  322. }
  323. err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status);
  324. if (err) {
  325. mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n");
  326. goto err_free_aux;
  327. }
  328. if (status) {
  329. mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status);
  330. err = -EINVAL;
  331. goto err_free_aux;
  332. }
  333. err = mthca_map_eq_icm(mdev, init_hca->eqc_base);
  334. if (err) {
  335. mthca_err(mdev, "Failed to map EQ context memory, aborting.\n");
  336. goto err_unmap_aux;
  337. }
  338. mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base,
  339. MTHCA_MTT_SEG_SIZE,
  340. mdev->limits.num_mtt_segs,
  341. mdev->limits.reserved_mtts, 1);
  342. if (!mdev->mr_table.mtt_table) {
  343. mthca_err(mdev, "Failed to map MTT context memory, aborting.\n");
  344. err = -ENOMEM;
  345. goto err_unmap_eq;
  346. }
  347. mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base,
  348. dev_lim->mpt_entry_sz,
  349. mdev->limits.num_mpts,
  350. mdev->limits.reserved_mrws, 1);
  351. if (!mdev->mr_table.mpt_table) {
  352. mthca_err(mdev, "Failed to map MPT context memory, aborting.\n");
  353. err = -ENOMEM;
  354. goto err_unmap_mtt;
  355. }
  356. mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base,
  357. dev_lim->qpc_entry_sz,
  358. mdev->limits.num_qps,
  359. mdev->limits.reserved_qps, 0);
  360. if (!mdev->qp_table.qp_table) {
  361. mthca_err(mdev, "Failed to map QP context memory, aborting.\n");
  362. err = -ENOMEM;
  363. goto err_unmap_mpt;
  364. }
  365. mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base,
  366. dev_lim->eqpc_entry_sz,
  367. mdev->limits.num_qps,
  368. mdev->limits.reserved_qps, 0);
  369. if (!mdev->qp_table.eqp_table) {
  370. mthca_err(mdev, "Failed to map EQP context memory, aborting.\n");
  371. err = -ENOMEM;
  372. goto err_unmap_qp;
  373. }
  374. mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base,
  375. MTHCA_RDB_ENTRY_SIZE,
  376. mdev->limits.num_qps <<
  377. mdev->qp_table.rdb_shift,
  378. 0, 0);
  379. if (!mdev->qp_table.rdb_table) {
  380. mthca_err(mdev, "Failed to map RDB context memory, aborting\n");
  381. err = -ENOMEM;
  382. goto err_unmap_eqp;
  383. }
  384. mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base,
  385. dev_lim->cqc_entry_sz,
  386. mdev->limits.num_cqs,
  387. mdev->limits.reserved_cqs, 0);
  388. if (!mdev->cq_table.table) {
  389. mthca_err(mdev, "Failed to map CQ context memory, aborting.\n");
  390. err = -ENOMEM;
  391. goto err_unmap_rdb;
  392. }
  393. /*
  394. * It's not strictly required, but for simplicity just map the
  395. * whole multicast group table now. The table isn't very big
  396. * and it's a lot easier than trying to track ref counts.
  397. */
  398. mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base,
  399. MTHCA_MGM_ENTRY_SIZE,
  400. mdev->limits.num_mgms +
  401. mdev->limits.num_amgms,
  402. mdev->limits.num_mgms +
  403. mdev->limits.num_amgms,
  404. 0);
  405. if (!mdev->mcg_table.table) {
  406. mthca_err(mdev, "Failed to map MCG context memory, aborting.\n");
  407. err = -ENOMEM;
  408. goto err_unmap_cq;
  409. }
  410. return 0;
  411. err_unmap_cq:
  412. mthca_free_icm_table(mdev, mdev->cq_table.table);
  413. err_unmap_rdb:
  414. mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
  415. err_unmap_eqp:
  416. mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
  417. err_unmap_qp:
  418. mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
  419. err_unmap_mpt:
  420. mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
  421. err_unmap_mtt:
  422. mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
  423. err_unmap_eq:
  424. mthca_unmap_eq_icm(mdev);
  425. err_unmap_aux:
  426. mthca_UNMAP_ICM_AUX(mdev, &status);
  427. err_free_aux:
  428. mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
  429. return err;
  430. }
  431. static int __devinit mthca_init_arbel(struct mthca_dev *mdev)
  432. {
  433. struct mthca_dev_lim dev_lim;
  434. struct mthca_profile profile;
  435. struct mthca_init_hca_param init_hca;
  436. struct mthca_adapter adapter;
  437. u64 icm_size;
  438. u8 status;
  439. int err;
  440. err = mthca_QUERY_FW(mdev, &status);
  441. if (err) {
  442. mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
  443. return err;
  444. }
  445. if (status) {
  446. mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
  447. "aborting.\n", status);
  448. return -EINVAL;
  449. }
  450. err = mthca_ENABLE_LAM(mdev, &status);
  451. if (err) {
  452. mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n");
  453. return err;
  454. }
  455. if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) {
  456. mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n");
  457. mdev->mthca_flags |= MTHCA_FLAG_NO_LAM;
  458. } else if (status) {
  459. mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, "
  460. "aborting.\n", status);
  461. return -EINVAL;
  462. }
  463. err = mthca_load_fw(mdev);
  464. if (err) {
  465. mthca_err(mdev, "Failed to start FW, aborting.\n");
  466. goto err_disable;
  467. }
  468. err = mthca_dev_lim(mdev, &dev_lim);
  469. if (err) {
  470. mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
  471. goto err_stop_fw;
  472. }
  473. profile = default_profile;
  474. profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
  475. profile.num_udav = 0;
  476. icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
  477. if ((int) icm_size < 0) {
  478. err = icm_size;
  479. goto err_stop_fw;
  480. }
  481. err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size);
  482. if (err)
  483. goto err_stop_fw;
  484. err = mthca_INIT_HCA(mdev, &init_hca, &status);
  485. if (err) {
  486. mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
  487. goto err_free_icm;
  488. }
  489. if (status) {
  490. mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
  491. "aborting.\n", status);
  492. err = -EINVAL;
  493. goto err_free_icm;
  494. }
  495. err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
  496. if (err) {
  497. mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
  498. goto err_free_icm;
  499. }
  500. if (status) {
  501. mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
  502. "aborting.\n", status);
  503. err = -EINVAL;
  504. goto err_free_icm;
  505. }
  506. mdev->eq_table.inta_pin = adapter.inta_pin;
  507. mdev->rev_id = adapter.revision_id;
  508. return 0;
  509. err_free_icm:
  510. mthca_free_icm_table(mdev, mdev->cq_table.table);
  511. mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
  512. mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
  513. mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
  514. mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
  515. mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
  516. mthca_unmap_eq_icm(mdev);
  517. mthca_UNMAP_ICM_AUX(mdev, &status);
  518. mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
  519. err_stop_fw:
  520. mthca_UNMAP_FA(mdev, &status);
  521. mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
  522. err_disable:
  523. if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
  524. mthca_DISABLE_LAM(mdev, &status);
  525. return err;
  526. }
  527. static int __devinit mthca_init_hca(struct mthca_dev *mdev)
  528. {
  529. if (mthca_is_memfree(mdev))
  530. return mthca_init_arbel(mdev);
  531. else
  532. return mthca_init_tavor(mdev);
  533. }
  534. static int __devinit mthca_setup_hca(struct mthca_dev *dev)
  535. {
  536. int err;
  537. u8 status;
  538. MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock);
  539. err = mthca_init_uar_table(dev);
  540. if (err) {
  541. mthca_err(dev, "Failed to initialize "
  542. "user access region table, aborting.\n");
  543. return err;
  544. }
  545. err = mthca_uar_alloc(dev, &dev->driver_uar);
  546. if (err) {
  547. mthca_err(dev, "Failed to allocate driver access region, "
  548. "aborting.\n");
  549. goto err_uar_table_free;
  550. }
  551. dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
  552. if (!dev->kar) {
  553. mthca_err(dev, "Couldn't map kernel access region, "
  554. "aborting.\n");
  555. err = -ENOMEM;
  556. goto err_uar_free;
  557. }
  558. err = mthca_init_pd_table(dev);
  559. if (err) {
  560. mthca_err(dev, "Failed to initialize "
  561. "protection domain table, aborting.\n");
  562. goto err_kar_unmap;
  563. }
  564. err = mthca_init_mr_table(dev);
  565. if (err) {
  566. mthca_err(dev, "Failed to initialize "
  567. "memory region table, aborting.\n");
  568. goto err_pd_table_free;
  569. }
  570. err = mthca_pd_alloc(dev, &dev->driver_pd);
  571. if (err) {
  572. mthca_err(dev, "Failed to create driver PD, "
  573. "aborting.\n");
  574. goto err_mr_table_free;
  575. }
  576. err = mthca_init_eq_table(dev);
  577. if (err) {
  578. mthca_err(dev, "Failed to initialize "
  579. "event queue table, aborting.\n");
  580. goto err_pd_free;
  581. }
  582. err = mthca_cmd_use_events(dev);
  583. if (err) {
  584. mthca_err(dev, "Failed to switch to event-driven "
  585. "firmware commands, aborting.\n");
  586. goto err_eq_table_free;
  587. }
  588. err = mthca_NOP(dev, &status);
  589. if (err || status) {
  590. mthca_err(dev, "NOP command failed to generate interrupt (IRQ %d), aborting.\n",
  591. dev->mthca_flags & MTHCA_FLAG_MSI_X ?
  592. dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector :
  593. dev->pdev->irq);
  594. if (dev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X))
  595. mthca_err(dev, "Try again with MSI/MSI-X disabled.\n");
  596. else
  597. mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n");
  598. goto err_cmd_poll;
  599. }
  600. mthca_dbg(dev, "NOP command IRQ test passed\n");
  601. err = mthca_init_cq_table(dev);
  602. if (err) {
  603. mthca_err(dev, "Failed to initialize "
  604. "completion queue table, aborting.\n");
  605. goto err_cmd_poll;
  606. }
  607. err = mthca_init_qp_table(dev);
  608. if (err) {
  609. mthca_err(dev, "Failed to initialize "
  610. "queue pair table, aborting.\n");
  611. goto err_cq_table_free;
  612. }
  613. err = mthca_init_av_table(dev);
  614. if (err) {
  615. mthca_err(dev, "Failed to initialize "
  616. "address vector table, aborting.\n");
  617. goto err_qp_table_free;
  618. }
  619. err = mthca_init_mcg_table(dev);
  620. if (err) {
  621. mthca_err(dev, "Failed to initialize "
  622. "multicast group table, aborting.\n");
  623. goto err_av_table_free;
  624. }
  625. return 0;
  626. err_av_table_free:
  627. mthca_cleanup_av_table(dev);
  628. err_qp_table_free:
  629. mthca_cleanup_qp_table(dev);
  630. err_cq_table_free:
  631. mthca_cleanup_cq_table(dev);
  632. err_cmd_poll:
  633. mthca_cmd_use_polling(dev);
  634. err_eq_table_free:
  635. mthca_cleanup_eq_table(dev);
  636. err_pd_free:
  637. mthca_pd_free(dev, &dev->driver_pd);
  638. err_mr_table_free:
  639. mthca_cleanup_mr_table(dev);
  640. err_pd_table_free:
  641. mthca_cleanup_pd_table(dev);
  642. err_kar_unmap:
  643. iounmap(dev->kar);
  644. err_uar_free:
  645. mthca_uar_free(dev, &dev->driver_uar);
  646. err_uar_table_free:
  647. mthca_cleanup_uar_table(dev);
  648. return err;
  649. }
  650. static int __devinit mthca_request_regions(struct pci_dev *pdev,
  651. int ddr_hidden)
  652. {
  653. int err;
  654. /*
  655. * We can't just use pci_request_regions() because the MSI-X
  656. * table is right in the middle of the first BAR. If we did
  657. * pci_request_region and grab all of the first BAR, then
  658. * setting up MSI-X would fail, since the PCI core wants to do
  659. * request_mem_region on the MSI-X vector table.
  660. *
  661. * So just request what we need right now, and request any
  662. * other regions we need when setting up EQs.
  663. */
  664. if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
  665. MTHCA_HCR_SIZE, DRV_NAME))
  666. return -EBUSY;
  667. err = pci_request_region(pdev, 2, DRV_NAME);
  668. if (err)
  669. goto err_bar2_failed;
  670. if (!ddr_hidden) {
  671. err = pci_request_region(pdev, 4, DRV_NAME);
  672. if (err)
  673. goto err_bar4_failed;
  674. }
  675. return 0;
  676. err_bar4_failed:
  677. pci_release_region(pdev, 2);
  678. err_bar2_failed:
  679. release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
  680. MTHCA_HCR_SIZE);
  681. return err;
  682. }
  683. static void mthca_release_regions(struct pci_dev *pdev,
  684. int ddr_hidden)
  685. {
  686. if (!ddr_hidden)
  687. pci_release_region(pdev, 4);
  688. pci_release_region(pdev, 2);
  689. release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
  690. MTHCA_HCR_SIZE);
  691. }
  692. static int __devinit mthca_enable_msi_x(struct mthca_dev *mdev)
  693. {
  694. struct msix_entry entries[3];
  695. int err;
  696. entries[0].entry = 0;
  697. entries[1].entry = 1;
  698. entries[2].entry = 2;
  699. err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries));
  700. if (err) {
  701. if (err > 0)
  702. mthca_info(mdev, "Only %d MSI-X vectors available, "
  703. "not using MSI-X\n", err);
  704. return err;
  705. }
  706. mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector;
  707. mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector;
  708. mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector;
  709. return 0;
  710. }
  711. static void mthca_close_hca(struct mthca_dev *mdev)
  712. {
  713. u8 status;
  714. mthca_CLOSE_HCA(mdev, 0, &status);
  715. if (mthca_is_memfree(mdev)) {
  716. mthca_free_icm_table(mdev, mdev->cq_table.table);
  717. mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
  718. mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
  719. mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
  720. mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
  721. mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
  722. mthca_unmap_eq_icm(mdev);
  723. mthca_UNMAP_ICM_AUX(mdev, &status);
  724. mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
  725. mthca_UNMAP_FA(mdev, &status);
  726. mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
  727. if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
  728. mthca_DISABLE_LAM(mdev, &status);
  729. } else
  730. mthca_SYS_DIS(mdev, &status);
  731. }
  732. /* Types of supported HCA */
  733. enum {
  734. TAVOR, /* MT23108 */
  735. ARBEL_COMPAT, /* MT25208 in Tavor compat mode */
  736. ARBEL_NATIVE, /* MT25208 with extended features */
  737. SINAI /* MT25204 */
  738. };
  739. #define MTHCA_FW_VER(major, minor, subminor) \
  740. (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor))
  741. static struct {
  742. u64 latest_fw;
  743. int is_memfree;
  744. int is_pcie;
  745. } mthca_hca_table[] = {
  746. [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 3, 2), .is_memfree = 0, .is_pcie = 0 },
  747. [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 6, 2), .is_memfree = 0, .is_pcie = 1 },
  748. [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 0, 1), .is_memfree = 1, .is_pcie = 1 },
  749. [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 0, 1), .is_memfree = 1, .is_pcie = 1 }
  750. };
  751. static int __devinit mthca_init_one(struct pci_dev *pdev,
  752. const struct pci_device_id *id)
  753. {
  754. static int mthca_version_printed = 0;
  755. int ddr_hidden = 0;
  756. int err;
  757. struct mthca_dev *mdev;
  758. if (!mthca_version_printed) {
  759. printk(KERN_INFO "%s", mthca_version);
  760. ++mthca_version_printed;
  761. }
  762. printk(KERN_INFO PFX "Initializing %s (%s)\n",
  763. pci_pretty_name(pdev), pci_name(pdev));
  764. if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) {
  765. printk(KERN_ERR PFX "%s (%s) has invalid driver data %lx\n",
  766. pci_pretty_name(pdev), pci_name(pdev), id->driver_data);
  767. return -ENODEV;
  768. }
  769. err = pci_enable_device(pdev);
  770. if (err) {
  771. dev_err(&pdev->dev, "Cannot enable PCI device, "
  772. "aborting.\n");
  773. return err;
  774. }
  775. /*
  776. * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not
  777. * be present)
  778. */
  779. if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
  780. pci_resource_len(pdev, 0) != 1 << 20) {
  781. dev_err(&pdev->dev, "Missing DCS, aborting.\n");
  782. err = -ENODEV;
  783. goto err_disable_pdev;
  784. }
  785. if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM) ||
  786. pci_resource_len(pdev, 2) != 1 << 23) {
  787. dev_err(&pdev->dev, "Missing UAR, aborting.\n");
  788. err = -ENODEV;
  789. goto err_disable_pdev;
  790. }
  791. if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM))
  792. ddr_hidden = 1;
  793. err = mthca_request_regions(pdev, ddr_hidden);
  794. if (err) {
  795. dev_err(&pdev->dev, "Cannot obtain PCI resources, "
  796. "aborting.\n");
  797. goto err_disable_pdev;
  798. }
  799. pci_set_master(pdev);
  800. err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
  801. if (err) {
  802. dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
  803. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  804. if (err) {
  805. dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
  806. goto err_free_res;
  807. }
  808. }
  809. err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
  810. if (err) {
  811. dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
  812. "consistent PCI DMA mask.\n");
  813. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  814. if (err) {
  815. dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
  816. "aborting.\n");
  817. goto err_free_res;
  818. }
  819. }
  820. mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev);
  821. if (!mdev) {
  822. dev_err(&pdev->dev, "Device struct alloc failed, "
  823. "aborting.\n");
  824. err = -ENOMEM;
  825. goto err_free_res;
  826. }
  827. mdev->pdev = pdev;
  828. if (ddr_hidden)
  829. mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN;
  830. if (mthca_hca_table[id->driver_data].is_memfree)
  831. mdev->mthca_flags |= MTHCA_FLAG_MEMFREE;
  832. if (mthca_hca_table[id->driver_data].is_pcie)
  833. mdev->mthca_flags |= MTHCA_FLAG_PCIE;
  834. /*
  835. * Now reset the HCA before we touch the PCI capabilities or
  836. * attempt a firmware command, since a boot ROM may have left
  837. * the HCA in an undefined state.
  838. */
  839. err = mthca_reset(mdev);
  840. if (err) {
  841. mthca_err(mdev, "Failed to reset HCA, aborting.\n");
  842. goto err_free_dev;
  843. }
  844. if (msi_x && !mthca_enable_msi_x(mdev))
  845. mdev->mthca_flags |= MTHCA_FLAG_MSI_X;
  846. if (msi && !(mdev->mthca_flags & MTHCA_FLAG_MSI_X) &&
  847. !pci_enable_msi(pdev))
  848. mdev->mthca_flags |= MTHCA_FLAG_MSI;
  849. if (mthca_cmd_init(mdev)) {
  850. mthca_err(mdev, "Failed to init command interface, aborting.\n");
  851. goto err_free_dev;
  852. }
  853. err = mthca_tune_pci(mdev);
  854. if (err)
  855. goto err_cmd;
  856. err = mthca_init_hca(mdev);
  857. if (err)
  858. goto err_cmd;
  859. if (mdev->fw_ver < mthca_hca_table[id->driver_data].latest_fw) {
  860. mthca_warn(mdev, "HCA FW version %x.%x.%x is old (%x.%x.%x is current).\n",
  861. (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff,
  862. (int) (mdev->fw_ver & 0xffff),
  863. (int) (mthca_hca_table[id->driver_data].latest_fw >> 32),
  864. (int) (mthca_hca_table[id->driver_data].latest_fw >> 16) & 0xffff,
  865. (int) (mthca_hca_table[id->driver_data].latest_fw & 0xffff));
  866. mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n");
  867. }
  868. err = mthca_setup_hca(mdev);
  869. if (err)
  870. goto err_close;
  871. err = mthca_register_device(mdev);
  872. if (err)
  873. goto err_cleanup;
  874. err = mthca_create_agents(mdev);
  875. if (err)
  876. goto err_unregister;
  877. pci_set_drvdata(pdev, mdev);
  878. return 0;
  879. err_unregister:
  880. mthca_unregister_device(mdev);
  881. err_cleanup:
  882. mthca_cleanup_mcg_table(mdev);
  883. mthca_cleanup_av_table(mdev);
  884. mthca_cleanup_qp_table(mdev);
  885. mthca_cleanup_cq_table(mdev);
  886. mthca_cmd_use_polling(mdev);
  887. mthca_cleanup_eq_table(mdev);
  888. mthca_pd_free(mdev, &mdev->driver_pd);
  889. mthca_cleanup_mr_table(mdev);
  890. mthca_cleanup_pd_table(mdev);
  891. mthca_cleanup_uar_table(mdev);
  892. err_close:
  893. mthca_close_hca(mdev);
  894. err_cmd:
  895. mthca_cmd_cleanup(mdev);
  896. err_free_dev:
  897. if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
  898. pci_disable_msix(pdev);
  899. if (mdev->mthca_flags & MTHCA_FLAG_MSI)
  900. pci_disable_msi(pdev);
  901. ib_dealloc_device(&mdev->ib_dev);
  902. err_free_res:
  903. mthca_release_regions(pdev, ddr_hidden);
  904. err_disable_pdev:
  905. pci_disable_device(pdev);
  906. pci_set_drvdata(pdev, NULL);
  907. return err;
  908. }
  909. static void __devexit mthca_remove_one(struct pci_dev *pdev)
  910. {
  911. struct mthca_dev *mdev = pci_get_drvdata(pdev);
  912. u8 status;
  913. int p;
  914. if (mdev) {
  915. mthca_free_agents(mdev);
  916. mthca_unregister_device(mdev);
  917. for (p = 1; p <= mdev->limits.num_ports; ++p)
  918. mthca_CLOSE_IB(mdev, p, &status);
  919. mthca_cleanup_mcg_table(mdev);
  920. mthca_cleanup_av_table(mdev);
  921. mthca_cleanup_qp_table(mdev);
  922. mthca_cleanup_cq_table(mdev);
  923. mthca_cmd_use_polling(mdev);
  924. mthca_cleanup_eq_table(mdev);
  925. mthca_pd_free(mdev, &mdev->driver_pd);
  926. mthca_cleanup_mr_table(mdev);
  927. mthca_cleanup_pd_table(mdev);
  928. iounmap(mdev->kar);
  929. mthca_uar_free(mdev, &mdev->driver_uar);
  930. mthca_cleanup_uar_table(mdev);
  931. mthca_close_hca(mdev);
  932. mthca_cmd_cleanup(mdev);
  933. if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
  934. pci_disable_msix(pdev);
  935. if (mdev->mthca_flags & MTHCA_FLAG_MSI)
  936. pci_disable_msi(pdev);
  937. ib_dealloc_device(&mdev->ib_dev);
  938. mthca_release_regions(pdev, mdev->mthca_flags &
  939. MTHCA_FLAG_DDR_HIDDEN);
  940. pci_disable_device(pdev);
  941. pci_set_drvdata(pdev, NULL);
  942. }
  943. }
  944. static struct pci_device_id mthca_pci_table[] = {
  945. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR),
  946. .driver_data = TAVOR },
  947. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR),
  948. .driver_data = TAVOR },
  949. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
  950. .driver_data = ARBEL_COMPAT },
  951. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
  952. .driver_data = ARBEL_COMPAT },
  953. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL),
  954. .driver_data = ARBEL_NATIVE },
  955. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL),
  956. .driver_data = ARBEL_NATIVE },
  957. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI),
  958. .driver_data = SINAI },
  959. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI),
  960. .driver_data = SINAI },
  961. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
  962. .driver_data = SINAI },
  963. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
  964. .driver_data = SINAI },
  965. { 0, }
  966. };
  967. MODULE_DEVICE_TABLE(pci, mthca_pci_table);
  968. static struct pci_driver mthca_driver = {
  969. .name = DRV_NAME,
  970. .id_table = mthca_pci_table,
  971. .probe = mthca_init_one,
  972. .remove = __devexit_p(mthca_remove_one)
  973. };
  974. static int __init mthca_init(void)
  975. {
  976. int ret;
  977. ret = pci_register_driver(&mthca_driver);
  978. return ret < 0 ? ret : 0;
  979. }
  980. static void __exit mthca_cleanup(void)
  981. {
  982. pci_unregister_driver(&mthca_driver);
  983. }
  984. module_init(mthca_init);
  985. module_exit(mthca_cleanup);