cciss.c 83 KB

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  1. /*
  2. * Disk Array driver for HP SA 5xxx and 6xxx Controllers
  3. * Copyright 2000, 2005 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13. * NON INFRINGEMENT. See the GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. *
  19. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  20. *
  21. */
  22. #include <linux/config.h> /* CONFIG_PROC_FS */
  23. #include <linux/module.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/types.h>
  26. #include <linux/pci.h>
  27. #include <linux/kernel.h>
  28. #include <linux/slab.h>
  29. #include <linux/delay.h>
  30. #include <linux/major.h>
  31. #include <linux/fs.h>
  32. #include <linux/bio.h>
  33. #include <linux/blkpg.h>
  34. #include <linux/timer.h>
  35. #include <linux/proc_fs.h>
  36. #include <linux/init.h>
  37. #include <linux/hdreg.h>
  38. #include <linux/spinlock.h>
  39. #include <linux/compat.h>
  40. #include <asm/uaccess.h>
  41. #include <asm/io.h>
  42. #include <linux/dma-mapping.h>
  43. #include <linux/blkdev.h>
  44. #include <linux/genhd.h>
  45. #include <linux/completion.h>
  46. #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  47. #define DRIVER_NAME "HP CISS Driver (v 2.6.6)"
  48. #define DRIVER_VERSION CCISS_DRIVER_VERSION(2,6,6)
  49. /* Embedded module documentation macros - see modules.h */
  50. MODULE_AUTHOR("Hewlett-Packard Company");
  51. MODULE_DESCRIPTION("Driver for HP Controller SA5xxx SA6xxx version 2.6.6");
  52. MODULE_SUPPORTED_DEVICE("HP SA5i SA5i+ SA532 SA5300 SA5312 SA641 SA642 SA6400"
  53. " SA6i P600 P800 E400 E300");
  54. MODULE_LICENSE("GPL");
  55. #include "cciss_cmd.h"
  56. #include "cciss.h"
  57. #include <linux/cciss_ioctl.h>
  58. /* define the PCI info for the cards we can control */
  59. static const struct pci_device_id cciss_pci_device_id[] = {
  60. { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS,
  61. 0x0E11, 0x4070, 0, 0, 0},
  62. { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB,
  63. 0x0E11, 0x4080, 0, 0, 0},
  64. { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB,
  65. 0x0E11, 0x4082, 0, 0, 0},
  66. { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB,
  67. 0x0E11, 0x4083, 0, 0, 0},
  68. { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC,
  69. 0x0E11, 0x409A, 0, 0, 0},
  70. { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC,
  71. 0x0E11, 0x409B, 0, 0, 0},
  72. { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC,
  73. 0x0E11, 0x409C, 0, 0, 0},
  74. { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC,
  75. 0x0E11, 0x409D, 0, 0, 0},
  76. { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC,
  77. 0x0E11, 0x4091, 0, 0, 0},
  78. { PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA,
  79. 0x103C, 0x3225, 0, 0, 0},
  80. { PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSB,
  81. 0x103c, 0x3223, 0, 0, 0},
  82. { PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC,
  83. 0x103c, 0x3231, 0, 0, 0},
  84. { PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC,
  85. 0x103c, 0x3233, 0, 0, 0},
  86. {0,}
  87. };
  88. MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
  89. #define NR_PRODUCTS (sizeof(products)/sizeof(struct board_type))
  90. /* board_id = Subsystem Device ID & Vendor ID
  91. * product = Marketing Name for the board
  92. * access = Address of the struct of function pointers
  93. */
  94. static struct board_type products[] = {
  95. { 0x40700E11, "Smart Array 5300", &SA5_access },
  96. { 0x40800E11, "Smart Array 5i", &SA5B_access},
  97. { 0x40820E11, "Smart Array 532", &SA5B_access},
  98. { 0x40830E11, "Smart Array 5312", &SA5B_access},
  99. { 0x409A0E11, "Smart Array 641", &SA5_access},
  100. { 0x409B0E11, "Smart Array 642", &SA5_access},
  101. { 0x409C0E11, "Smart Array 6400", &SA5_access},
  102. { 0x409D0E11, "Smart Array 6400 EM", &SA5_access},
  103. { 0x40910E11, "Smart Array 6i", &SA5_access},
  104. { 0x3225103C, "Smart Array P600", &SA5_access},
  105. { 0x3223103C, "Smart Array P800", &SA5_access},
  106. { 0x3231103C, "Smart Array E400", &SA5_access},
  107. { 0x3233103C, "Smart Array E300", &SA5_access},
  108. };
  109. /* How long to wait (in millesconds) for board to go into simple mode */
  110. #define MAX_CONFIG_WAIT 30000
  111. #define MAX_IOCTL_CONFIG_WAIT 1000
  112. /*define how many times we will try a command because of bus resets */
  113. #define MAX_CMD_RETRIES 3
  114. #define READ_AHEAD 1024
  115. #define NR_CMDS 384 /* #commands that can be outstanding */
  116. #define MAX_CTLR 32
  117. /* Originally cciss driver only supports 8 major numbers */
  118. #define MAX_CTLR_ORIG 8
  119. static ctlr_info_t *hba[MAX_CTLR];
  120. static void do_cciss_request(request_queue_t *q);
  121. static int cciss_open(struct inode *inode, struct file *filep);
  122. static int cciss_release(struct inode *inode, struct file *filep);
  123. static int cciss_ioctl(struct inode *inode, struct file *filep,
  124. unsigned int cmd, unsigned long arg);
  125. static int revalidate_allvol(ctlr_info_t *host);
  126. static int cciss_revalidate(struct gendisk *disk);
  127. static int deregister_disk(struct gendisk *disk);
  128. static int register_new_disk(ctlr_info_t *h);
  129. static void cciss_getgeometry(int cntl_num);
  130. static void start_io( ctlr_info_t *h);
  131. static int sendcmd( __u8 cmd, int ctlr, void *buff, size_t size,
  132. unsigned int use_unit_num, unsigned int log_unit, __u8 page_code,
  133. unsigned char *scsi3addr, int cmd_type);
  134. #ifdef CONFIG_PROC_FS
  135. static int cciss_proc_get_info(char *buffer, char **start, off_t offset,
  136. int length, int *eof, void *data);
  137. static void cciss_procinit(int i);
  138. #else
  139. static void cciss_procinit(int i) {}
  140. #endif /* CONFIG_PROC_FS */
  141. #ifdef CONFIG_COMPAT
  142. static long cciss_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg);
  143. #endif
  144. static struct block_device_operations cciss_fops = {
  145. .owner = THIS_MODULE,
  146. .open = cciss_open,
  147. .release = cciss_release,
  148. .ioctl = cciss_ioctl,
  149. #ifdef CONFIG_COMPAT
  150. .compat_ioctl = cciss_compat_ioctl,
  151. #endif
  152. .revalidate_disk= cciss_revalidate,
  153. };
  154. /*
  155. * Enqueuing and dequeuing functions for cmdlists.
  156. */
  157. static inline void addQ(CommandList_struct **Qptr, CommandList_struct *c)
  158. {
  159. if (*Qptr == NULL) {
  160. *Qptr = c;
  161. c->next = c->prev = c;
  162. } else {
  163. c->prev = (*Qptr)->prev;
  164. c->next = (*Qptr);
  165. (*Qptr)->prev->next = c;
  166. (*Qptr)->prev = c;
  167. }
  168. }
  169. static inline CommandList_struct *removeQ(CommandList_struct **Qptr,
  170. CommandList_struct *c)
  171. {
  172. if (c && c->next != c) {
  173. if (*Qptr == c) *Qptr = c->next;
  174. c->prev->next = c->next;
  175. c->next->prev = c->prev;
  176. } else {
  177. *Qptr = NULL;
  178. }
  179. return c;
  180. }
  181. #include "cciss_scsi.c" /* For SCSI tape support */
  182. #ifdef CONFIG_PROC_FS
  183. /*
  184. * Report information about this controller.
  185. */
  186. #define ENG_GIG 1000000000
  187. #define ENG_GIG_FACTOR (ENG_GIG/512)
  188. #define RAID_UNKNOWN 6
  189. static const char *raid_label[] = {"0","4","1(1+0)","5","5+1","ADG",
  190. "UNKNOWN"};
  191. static struct proc_dir_entry *proc_cciss;
  192. static int cciss_proc_get_info(char *buffer, char **start, off_t offset,
  193. int length, int *eof, void *data)
  194. {
  195. off_t pos = 0;
  196. off_t len = 0;
  197. int size, i, ctlr;
  198. ctlr_info_t *h = (ctlr_info_t*)data;
  199. drive_info_struct *drv;
  200. unsigned long flags;
  201. sector_t vol_sz, vol_sz_frac;
  202. ctlr = h->ctlr;
  203. /* prevent displaying bogus info during configuration
  204. * or deconfiguration of a logical volume
  205. */
  206. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  207. if (h->busy_configuring) {
  208. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  209. return -EBUSY;
  210. }
  211. h->busy_configuring = 1;
  212. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  213. size = sprintf(buffer, "%s: HP %s Controller\n"
  214. "Board ID: 0x%08lx\n"
  215. "Firmware Version: %c%c%c%c\n"
  216. "IRQ: %d\n"
  217. "Logical drives: %d\n"
  218. "Current Q depth: %d\n"
  219. "Current # commands on controller: %d\n"
  220. "Max Q depth since init: %d\n"
  221. "Max # commands on controller since init: %d\n"
  222. "Max SG entries since init: %d\n\n",
  223. h->devname,
  224. h->product_name,
  225. (unsigned long)h->board_id,
  226. h->firm_ver[0], h->firm_ver[1], h->firm_ver[2], h->firm_ver[3],
  227. (unsigned int)h->intr,
  228. h->num_luns,
  229. h->Qdepth, h->commands_outstanding,
  230. h->maxQsinceinit, h->max_outstanding, h->maxSG);
  231. pos += size; len += size;
  232. cciss_proc_tape_report(ctlr, buffer, &pos, &len);
  233. for(i=0; i<=h->highest_lun; i++) {
  234. drv = &h->drv[i];
  235. if (drv->block_size == 0)
  236. continue;
  237. vol_sz = drv->nr_blocks;
  238. vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
  239. vol_sz_frac *= 100;
  240. sector_div(vol_sz_frac, ENG_GIG_FACTOR);
  241. if (drv->raid_level > 5)
  242. drv->raid_level = RAID_UNKNOWN;
  243. size = sprintf(buffer+len, "cciss/c%dd%d:"
  244. "\t%4u.%02uGB\tRAID %s\n",
  245. ctlr, i, (int)vol_sz, (int)vol_sz_frac,
  246. raid_label[drv->raid_level]);
  247. pos += size; len += size;
  248. }
  249. *eof = 1;
  250. *start = buffer+offset;
  251. len -= offset;
  252. if (len>length)
  253. len = length;
  254. h->busy_configuring = 0;
  255. return len;
  256. }
  257. static int
  258. cciss_proc_write(struct file *file, const char __user *buffer,
  259. unsigned long count, void *data)
  260. {
  261. unsigned char cmd[80];
  262. int len;
  263. #ifdef CONFIG_CISS_SCSI_TAPE
  264. ctlr_info_t *h = (ctlr_info_t *) data;
  265. int rc;
  266. #endif
  267. if (count > sizeof(cmd)-1) return -EINVAL;
  268. if (copy_from_user(cmd, buffer, count)) return -EFAULT;
  269. cmd[count] = '\0';
  270. len = strlen(cmd); // above 3 lines ensure safety
  271. if (len && cmd[len-1] == '\n')
  272. cmd[--len] = '\0';
  273. # ifdef CONFIG_CISS_SCSI_TAPE
  274. if (strcmp("engage scsi", cmd)==0) {
  275. rc = cciss_engage_scsi(h->ctlr);
  276. if (rc != 0) return -rc;
  277. return count;
  278. }
  279. /* might be nice to have "disengage" too, but it's not
  280. safely possible. (only 1 module use count, lock issues.) */
  281. # endif
  282. return -EINVAL;
  283. }
  284. /*
  285. * Get us a file in /proc/cciss that says something about each controller.
  286. * Create /proc/cciss if it doesn't exist yet.
  287. */
  288. static void __devinit cciss_procinit(int i)
  289. {
  290. struct proc_dir_entry *pde;
  291. if (proc_cciss == NULL) {
  292. proc_cciss = proc_mkdir("cciss", proc_root_driver);
  293. if (!proc_cciss)
  294. return;
  295. }
  296. pde = create_proc_read_entry(hba[i]->devname,
  297. S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH,
  298. proc_cciss, cciss_proc_get_info, hba[i]);
  299. pde->write_proc = cciss_proc_write;
  300. }
  301. #endif /* CONFIG_PROC_FS */
  302. /*
  303. * For operations that cannot sleep, a command block is allocated at init,
  304. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  305. * which ones are free or in use. For operations that can wait for kmalloc
  306. * to possible sleep, this routine can be called with get_from_pool set to 0.
  307. * cmd_free() MUST be called with a got_from_pool set to 0 if cmd_alloc was.
  308. */
  309. static CommandList_struct * cmd_alloc(ctlr_info_t *h, int get_from_pool)
  310. {
  311. CommandList_struct *c;
  312. int i;
  313. u64bit temp64;
  314. dma_addr_t cmd_dma_handle, err_dma_handle;
  315. if (!get_from_pool)
  316. {
  317. c = (CommandList_struct *) pci_alloc_consistent(
  318. h->pdev, sizeof(CommandList_struct), &cmd_dma_handle);
  319. if(c==NULL)
  320. return NULL;
  321. memset(c, 0, sizeof(CommandList_struct));
  322. c->err_info = (ErrorInfo_struct *)pci_alloc_consistent(
  323. h->pdev, sizeof(ErrorInfo_struct),
  324. &err_dma_handle);
  325. if (c->err_info == NULL)
  326. {
  327. pci_free_consistent(h->pdev,
  328. sizeof(CommandList_struct), c, cmd_dma_handle);
  329. return NULL;
  330. }
  331. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  332. } else /* get it out of the controllers pool */
  333. {
  334. do {
  335. i = find_first_zero_bit(h->cmd_pool_bits, NR_CMDS);
  336. if (i == NR_CMDS)
  337. return NULL;
  338. } while(test_and_set_bit(i & (BITS_PER_LONG - 1), h->cmd_pool_bits+(i/BITS_PER_LONG)) != 0);
  339. #ifdef CCISS_DEBUG
  340. printk(KERN_DEBUG "cciss: using command buffer %d\n", i);
  341. #endif
  342. c = h->cmd_pool + i;
  343. memset(c, 0, sizeof(CommandList_struct));
  344. cmd_dma_handle = h->cmd_pool_dhandle
  345. + i*sizeof(CommandList_struct);
  346. c->err_info = h->errinfo_pool + i;
  347. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  348. err_dma_handle = h->errinfo_pool_dhandle
  349. + i*sizeof(ErrorInfo_struct);
  350. h->nr_allocs++;
  351. }
  352. c->busaddr = (__u32) cmd_dma_handle;
  353. temp64.val = (__u64) err_dma_handle;
  354. c->ErrDesc.Addr.lower = temp64.val32.lower;
  355. c->ErrDesc.Addr.upper = temp64.val32.upper;
  356. c->ErrDesc.Len = sizeof(ErrorInfo_struct);
  357. c->ctlr = h->ctlr;
  358. return c;
  359. }
  360. /*
  361. * Frees a command block that was previously allocated with cmd_alloc().
  362. */
  363. static void cmd_free(ctlr_info_t *h, CommandList_struct *c, int got_from_pool)
  364. {
  365. int i;
  366. u64bit temp64;
  367. if( !got_from_pool)
  368. {
  369. temp64.val32.lower = c->ErrDesc.Addr.lower;
  370. temp64.val32.upper = c->ErrDesc.Addr.upper;
  371. pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
  372. c->err_info, (dma_addr_t) temp64.val);
  373. pci_free_consistent(h->pdev, sizeof(CommandList_struct),
  374. c, (dma_addr_t) c->busaddr);
  375. } else
  376. {
  377. i = c - h->cmd_pool;
  378. clear_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG));
  379. h->nr_frees++;
  380. }
  381. }
  382. static inline ctlr_info_t *get_host(struct gendisk *disk)
  383. {
  384. return disk->queue->queuedata;
  385. }
  386. static inline drive_info_struct *get_drv(struct gendisk *disk)
  387. {
  388. return disk->private_data;
  389. }
  390. /*
  391. * Open. Make sure the device is really there.
  392. */
  393. static int cciss_open(struct inode *inode, struct file *filep)
  394. {
  395. ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
  396. drive_info_struct *drv = get_drv(inode->i_bdev->bd_disk);
  397. #ifdef CCISS_DEBUG
  398. printk(KERN_DEBUG "cciss_open %s\n", inode->i_bdev->bd_disk->disk_name);
  399. #endif /* CCISS_DEBUG */
  400. /*
  401. * Root is allowed to open raw volume zero even if it's not configured
  402. * so array config can still work. Root is also allowed to open any
  403. * volume that has a LUN ID, so it can issue IOCTL to reread the
  404. * disk information. I don't think I really like this
  405. * but I'm already using way to many device nodes to claim another one
  406. * for "raw controller".
  407. */
  408. if (drv->nr_blocks == 0) {
  409. if (iminor(inode) != 0) { /* not node 0? */
  410. /* if not node 0 make sure it is a partition = 0 */
  411. if (iminor(inode) & 0x0f) {
  412. return -ENXIO;
  413. /* if it is, make sure we have a LUN ID */
  414. } else if (drv->LunID == 0) {
  415. return -ENXIO;
  416. }
  417. }
  418. if (!capable(CAP_SYS_ADMIN))
  419. return -EPERM;
  420. }
  421. drv->usage_count++;
  422. host->usage_count++;
  423. return 0;
  424. }
  425. /*
  426. * Close. Sync first.
  427. */
  428. static int cciss_release(struct inode *inode, struct file *filep)
  429. {
  430. ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
  431. drive_info_struct *drv = get_drv(inode->i_bdev->bd_disk);
  432. #ifdef CCISS_DEBUG
  433. printk(KERN_DEBUG "cciss_release %s\n", inode->i_bdev->bd_disk->disk_name);
  434. #endif /* CCISS_DEBUG */
  435. drv->usage_count--;
  436. host->usage_count--;
  437. return 0;
  438. }
  439. #ifdef CONFIG_COMPAT
  440. static int do_ioctl(struct file *f, unsigned cmd, unsigned long arg)
  441. {
  442. int ret;
  443. lock_kernel();
  444. ret = cciss_ioctl(f->f_dentry->d_inode, f, cmd, arg);
  445. unlock_kernel();
  446. return ret;
  447. }
  448. static int cciss_ioctl32_passthru(struct file *f, unsigned cmd, unsigned long arg);
  449. static int cciss_ioctl32_big_passthru(struct file *f, unsigned cmd, unsigned long arg);
  450. static long cciss_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg)
  451. {
  452. switch (cmd) {
  453. case CCISS_GETPCIINFO:
  454. case CCISS_GETINTINFO:
  455. case CCISS_SETINTINFO:
  456. case CCISS_GETNODENAME:
  457. case CCISS_SETNODENAME:
  458. case CCISS_GETHEARTBEAT:
  459. case CCISS_GETBUSTYPES:
  460. case CCISS_GETFIRMVER:
  461. case CCISS_GETDRIVVER:
  462. case CCISS_REVALIDVOLS:
  463. case CCISS_DEREGDISK:
  464. case CCISS_REGNEWDISK:
  465. case CCISS_REGNEWD:
  466. case CCISS_RESCANDISK:
  467. case CCISS_GETLUNINFO:
  468. return do_ioctl(f, cmd, arg);
  469. case CCISS_PASSTHRU32:
  470. return cciss_ioctl32_passthru(f, cmd, arg);
  471. case CCISS_BIG_PASSTHRU32:
  472. return cciss_ioctl32_big_passthru(f, cmd, arg);
  473. default:
  474. return -ENOIOCTLCMD;
  475. }
  476. }
  477. static int cciss_ioctl32_passthru(struct file *f, unsigned cmd, unsigned long arg)
  478. {
  479. IOCTL32_Command_struct __user *arg32 =
  480. (IOCTL32_Command_struct __user *) arg;
  481. IOCTL_Command_struct arg64;
  482. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  483. int err;
  484. u32 cp;
  485. err = 0;
  486. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, sizeof(arg64.LUN_info));
  487. err |= copy_from_user(&arg64.Request, &arg32->Request, sizeof(arg64.Request));
  488. err |= copy_from_user(&arg64.error_info, &arg32->error_info, sizeof(arg64.error_info));
  489. err |= get_user(arg64.buf_size, &arg32->buf_size);
  490. err |= get_user(cp, &arg32->buf);
  491. arg64.buf = compat_ptr(cp);
  492. err |= copy_to_user(p, &arg64, sizeof(arg64));
  493. if (err)
  494. return -EFAULT;
  495. err = do_ioctl(f, CCISS_PASSTHRU, (unsigned long) p);
  496. if (err)
  497. return err;
  498. err |= copy_in_user(&arg32->error_info, &p->error_info, sizeof(arg32->error_info));
  499. if (err)
  500. return -EFAULT;
  501. return err;
  502. }
  503. static int cciss_ioctl32_big_passthru(struct file *file, unsigned cmd, unsigned long arg)
  504. {
  505. BIG_IOCTL32_Command_struct __user *arg32 =
  506. (BIG_IOCTL32_Command_struct __user *) arg;
  507. BIG_IOCTL_Command_struct arg64;
  508. BIG_IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  509. int err;
  510. u32 cp;
  511. err = 0;
  512. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, sizeof(arg64.LUN_info));
  513. err |= copy_from_user(&arg64.Request, &arg32->Request, sizeof(arg64.Request));
  514. err |= copy_from_user(&arg64.error_info, &arg32->error_info, sizeof(arg64.error_info));
  515. err |= get_user(arg64.buf_size, &arg32->buf_size);
  516. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  517. err |= get_user(cp, &arg32->buf);
  518. arg64.buf = compat_ptr(cp);
  519. err |= copy_to_user(p, &arg64, sizeof(arg64));
  520. if (err)
  521. return -EFAULT;
  522. err = do_ioctl(file, CCISS_BIG_PASSTHRU, (unsigned long) p);
  523. if (err)
  524. return err;
  525. err |= copy_in_user(&arg32->error_info, &p->error_info, sizeof(arg32->error_info));
  526. if (err)
  527. return -EFAULT;
  528. return err;
  529. }
  530. #endif
  531. /*
  532. * ioctl
  533. */
  534. static int cciss_ioctl(struct inode *inode, struct file *filep,
  535. unsigned int cmd, unsigned long arg)
  536. {
  537. struct block_device *bdev = inode->i_bdev;
  538. struct gendisk *disk = bdev->bd_disk;
  539. ctlr_info_t *host = get_host(disk);
  540. drive_info_struct *drv = get_drv(disk);
  541. int ctlr = host->ctlr;
  542. void __user *argp = (void __user *)arg;
  543. #ifdef CCISS_DEBUG
  544. printk(KERN_DEBUG "cciss_ioctl: Called with cmd=%x %lx\n", cmd, arg);
  545. #endif /* CCISS_DEBUG */
  546. switch(cmd) {
  547. case HDIO_GETGEO:
  548. {
  549. struct hd_geometry driver_geo;
  550. if (drv->cylinders) {
  551. driver_geo.heads = drv->heads;
  552. driver_geo.sectors = drv->sectors;
  553. driver_geo.cylinders = drv->cylinders;
  554. } else
  555. return -ENXIO;
  556. driver_geo.start= get_start_sect(inode->i_bdev);
  557. if (copy_to_user(argp, &driver_geo, sizeof(struct hd_geometry)))
  558. return -EFAULT;
  559. return(0);
  560. }
  561. case CCISS_GETPCIINFO:
  562. {
  563. cciss_pci_info_struct pciinfo;
  564. if (!arg) return -EINVAL;
  565. pciinfo.domain = pci_domain_nr(host->pdev->bus);
  566. pciinfo.bus = host->pdev->bus->number;
  567. pciinfo.dev_fn = host->pdev->devfn;
  568. pciinfo.board_id = host->board_id;
  569. if (copy_to_user(argp, &pciinfo, sizeof( cciss_pci_info_struct )))
  570. return -EFAULT;
  571. return(0);
  572. }
  573. case CCISS_GETINTINFO:
  574. {
  575. cciss_coalint_struct intinfo;
  576. if (!arg) return -EINVAL;
  577. intinfo.delay = readl(&host->cfgtable->HostWrite.CoalIntDelay);
  578. intinfo.count = readl(&host->cfgtable->HostWrite.CoalIntCount);
  579. if (copy_to_user(argp, &intinfo, sizeof( cciss_coalint_struct )))
  580. return -EFAULT;
  581. return(0);
  582. }
  583. case CCISS_SETINTINFO:
  584. {
  585. cciss_coalint_struct intinfo;
  586. unsigned long flags;
  587. int i;
  588. if (!arg) return -EINVAL;
  589. if (!capable(CAP_SYS_ADMIN)) return -EPERM;
  590. if (copy_from_user(&intinfo, argp, sizeof( cciss_coalint_struct)))
  591. return -EFAULT;
  592. if ( (intinfo.delay == 0 ) && (intinfo.count == 0))
  593. {
  594. // printk("cciss_ioctl: delay and count cannot be 0\n");
  595. return( -EINVAL);
  596. }
  597. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  598. /* Update the field, and then ring the doorbell */
  599. writel( intinfo.delay,
  600. &(host->cfgtable->HostWrite.CoalIntDelay));
  601. writel( intinfo.count,
  602. &(host->cfgtable->HostWrite.CoalIntCount));
  603. writel( CFGTBL_ChangeReq, host->vaddr + SA5_DOORBELL);
  604. for(i=0;i<MAX_IOCTL_CONFIG_WAIT;i++) {
  605. if (!(readl(host->vaddr + SA5_DOORBELL)
  606. & CFGTBL_ChangeReq))
  607. break;
  608. /* delay and try again */
  609. udelay(1000);
  610. }
  611. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  612. if (i >= MAX_IOCTL_CONFIG_WAIT)
  613. return -EAGAIN;
  614. return(0);
  615. }
  616. case CCISS_GETNODENAME:
  617. {
  618. NodeName_type NodeName;
  619. int i;
  620. if (!arg) return -EINVAL;
  621. for(i=0;i<16;i++)
  622. NodeName[i] = readb(&host->cfgtable->ServerName[i]);
  623. if (copy_to_user(argp, NodeName, sizeof( NodeName_type)))
  624. return -EFAULT;
  625. return(0);
  626. }
  627. case CCISS_SETNODENAME:
  628. {
  629. NodeName_type NodeName;
  630. unsigned long flags;
  631. int i;
  632. if (!arg) return -EINVAL;
  633. if (!capable(CAP_SYS_ADMIN)) return -EPERM;
  634. if (copy_from_user(NodeName, argp, sizeof( NodeName_type)))
  635. return -EFAULT;
  636. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  637. /* Update the field, and then ring the doorbell */
  638. for(i=0;i<16;i++)
  639. writeb( NodeName[i], &host->cfgtable->ServerName[i]);
  640. writel( CFGTBL_ChangeReq, host->vaddr + SA5_DOORBELL);
  641. for(i=0;i<MAX_IOCTL_CONFIG_WAIT;i++) {
  642. if (!(readl(host->vaddr + SA5_DOORBELL)
  643. & CFGTBL_ChangeReq))
  644. break;
  645. /* delay and try again */
  646. udelay(1000);
  647. }
  648. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  649. if (i >= MAX_IOCTL_CONFIG_WAIT)
  650. return -EAGAIN;
  651. return(0);
  652. }
  653. case CCISS_GETHEARTBEAT:
  654. {
  655. Heartbeat_type heartbeat;
  656. if (!arg) return -EINVAL;
  657. heartbeat = readl(&host->cfgtable->HeartBeat);
  658. if (copy_to_user(argp, &heartbeat, sizeof( Heartbeat_type)))
  659. return -EFAULT;
  660. return(0);
  661. }
  662. case CCISS_GETBUSTYPES:
  663. {
  664. BusTypes_type BusTypes;
  665. if (!arg) return -EINVAL;
  666. BusTypes = readl(&host->cfgtable->BusTypes);
  667. if (copy_to_user(argp, &BusTypes, sizeof( BusTypes_type) ))
  668. return -EFAULT;
  669. return(0);
  670. }
  671. case CCISS_GETFIRMVER:
  672. {
  673. FirmwareVer_type firmware;
  674. if (!arg) return -EINVAL;
  675. memcpy(firmware, host->firm_ver, 4);
  676. if (copy_to_user(argp, firmware, sizeof( FirmwareVer_type)))
  677. return -EFAULT;
  678. return(0);
  679. }
  680. case CCISS_GETDRIVVER:
  681. {
  682. DriverVer_type DriverVer = DRIVER_VERSION;
  683. if (!arg) return -EINVAL;
  684. if (copy_to_user(argp, &DriverVer, sizeof( DriverVer_type) ))
  685. return -EFAULT;
  686. return(0);
  687. }
  688. case CCISS_REVALIDVOLS:
  689. if (bdev != bdev->bd_contains || drv != host->drv)
  690. return -ENXIO;
  691. return revalidate_allvol(host);
  692. case CCISS_GETLUNINFO: {
  693. LogvolInfo_struct luninfo;
  694. int i;
  695. luninfo.LunID = drv->LunID;
  696. luninfo.num_opens = drv->usage_count;
  697. luninfo.num_parts = 0;
  698. if (copy_to_user(argp, &luninfo,
  699. sizeof(LogvolInfo_struct)))
  700. return -EFAULT;
  701. return(0);
  702. }
  703. case CCISS_DEREGDISK:
  704. return deregister_disk(disk);
  705. case CCISS_REGNEWD:
  706. return register_new_disk(host);
  707. case CCISS_PASSTHRU:
  708. {
  709. IOCTL_Command_struct iocommand;
  710. CommandList_struct *c;
  711. char *buff = NULL;
  712. u64bit temp64;
  713. unsigned long flags;
  714. DECLARE_COMPLETION(wait);
  715. if (!arg) return -EINVAL;
  716. if (!capable(CAP_SYS_RAWIO)) return -EPERM;
  717. if (copy_from_user(&iocommand, argp, sizeof( IOCTL_Command_struct) ))
  718. return -EFAULT;
  719. if((iocommand.buf_size < 1) &&
  720. (iocommand.Request.Type.Direction != XFER_NONE))
  721. {
  722. return -EINVAL;
  723. }
  724. #if 0 /* 'buf_size' member is 16-bits, and always smaller than kmalloc limit */
  725. /* Check kmalloc limits */
  726. if(iocommand.buf_size > 128000)
  727. return -EINVAL;
  728. #endif
  729. if(iocommand.buf_size > 0)
  730. {
  731. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  732. if( buff == NULL)
  733. return -EFAULT;
  734. }
  735. if (iocommand.Request.Type.Direction == XFER_WRITE)
  736. {
  737. /* Copy the data into the buffer we created */
  738. if (copy_from_user(buff, iocommand.buf, iocommand.buf_size))
  739. {
  740. kfree(buff);
  741. return -EFAULT;
  742. }
  743. } else {
  744. memset(buff, 0, iocommand.buf_size);
  745. }
  746. if ((c = cmd_alloc(host , 0)) == NULL)
  747. {
  748. kfree(buff);
  749. return -ENOMEM;
  750. }
  751. // Fill in the command type
  752. c->cmd_type = CMD_IOCTL_PEND;
  753. // Fill in Command Header
  754. c->Header.ReplyQueue = 0; // unused in simple mode
  755. if( iocommand.buf_size > 0) // buffer to fill
  756. {
  757. c->Header.SGList = 1;
  758. c->Header.SGTotal= 1;
  759. } else // no buffers to fill
  760. {
  761. c->Header.SGList = 0;
  762. c->Header.SGTotal= 0;
  763. }
  764. c->Header.LUN = iocommand.LUN_info;
  765. c->Header.Tag.lower = c->busaddr; // use the kernel address the cmd block for tag
  766. // Fill in Request block
  767. c->Request = iocommand.Request;
  768. // Fill in the scatter gather information
  769. if (iocommand.buf_size > 0 )
  770. {
  771. temp64.val = pci_map_single( host->pdev, buff,
  772. iocommand.buf_size,
  773. PCI_DMA_BIDIRECTIONAL);
  774. c->SG[0].Addr.lower = temp64.val32.lower;
  775. c->SG[0].Addr.upper = temp64.val32.upper;
  776. c->SG[0].Len = iocommand.buf_size;
  777. c->SG[0].Ext = 0; // we are not chaining
  778. }
  779. c->waiting = &wait;
  780. /* Put the request on the tail of the request queue */
  781. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  782. addQ(&host->reqQ, c);
  783. host->Qdepth++;
  784. start_io(host);
  785. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  786. wait_for_completion(&wait);
  787. /* unlock the buffers from DMA */
  788. temp64.val32.lower = c->SG[0].Addr.lower;
  789. temp64.val32.upper = c->SG[0].Addr.upper;
  790. pci_unmap_single( host->pdev, (dma_addr_t) temp64.val,
  791. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  792. /* Copy the error information out */
  793. iocommand.error_info = *(c->err_info);
  794. if ( copy_to_user(argp, &iocommand, sizeof( IOCTL_Command_struct) ) )
  795. {
  796. kfree(buff);
  797. cmd_free(host, c, 0);
  798. return( -EFAULT);
  799. }
  800. if (iocommand.Request.Type.Direction == XFER_READ)
  801. {
  802. /* Copy the data out of the buffer we created */
  803. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size))
  804. {
  805. kfree(buff);
  806. cmd_free(host, c, 0);
  807. return -EFAULT;
  808. }
  809. }
  810. kfree(buff);
  811. cmd_free(host, c, 0);
  812. return(0);
  813. }
  814. case CCISS_BIG_PASSTHRU: {
  815. BIG_IOCTL_Command_struct *ioc;
  816. CommandList_struct *c;
  817. unsigned char **buff = NULL;
  818. int *buff_size = NULL;
  819. u64bit temp64;
  820. unsigned long flags;
  821. BYTE sg_used = 0;
  822. int status = 0;
  823. int i;
  824. DECLARE_COMPLETION(wait);
  825. __u32 left;
  826. __u32 sz;
  827. BYTE __user *data_ptr;
  828. if (!arg)
  829. return -EINVAL;
  830. if (!capable(CAP_SYS_RAWIO))
  831. return -EPERM;
  832. ioc = (BIG_IOCTL_Command_struct *)
  833. kmalloc(sizeof(*ioc), GFP_KERNEL);
  834. if (!ioc) {
  835. status = -ENOMEM;
  836. goto cleanup1;
  837. }
  838. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  839. status = -EFAULT;
  840. goto cleanup1;
  841. }
  842. if ((ioc->buf_size < 1) &&
  843. (ioc->Request.Type.Direction != XFER_NONE)) {
  844. status = -EINVAL;
  845. goto cleanup1;
  846. }
  847. /* Check kmalloc limits using all SGs */
  848. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  849. status = -EINVAL;
  850. goto cleanup1;
  851. }
  852. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  853. status = -EINVAL;
  854. goto cleanup1;
  855. }
  856. buff = (unsigned char **) kmalloc(MAXSGENTRIES *
  857. sizeof(char *), GFP_KERNEL);
  858. if (!buff) {
  859. status = -ENOMEM;
  860. goto cleanup1;
  861. }
  862. memset(buff, 0, MAXSGENTRIES);
  863. buff_size = (int *) kmalloc(MAXSGENTRIES * sizeof(int),
  864. GFP_KERNEL);
  865. if (!buff_size) {
  866. status = -ENOMEM;
  867. goto cleanup1;
  868. }
  869. left = ioc->buf_size;
  870. data_ptr = ioc->buf;
  871. while (left) {
  872. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  873. buff_size[sg_used] = sz;
  874. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  875. if (buff[sg_used] == NULL) {
  876. status = -ENOMEM;
  877. goto cleanup1;
  878. }
  879. if (ioc->Request.Type.Direction == XFER_WRITE &&
  880. copy_from_user(buff[sg_used], data_ptr, sz)) {
  881. status = -ENOMEM;
  882. goto cleanup1;
  883. } else {
  884. memset(buff[sg_used], 0, sz);
  885. }
  886. left -= sz;
  887. data_ptr += sz;
  888. sg_used++;
  889. }
  890. if ((c = cmd_alloc(host , 0)) == NULL) {
  891. status = -ENOMEM;
  892. goto cleanup1;
  893. }
  894. c->cmd_type = CMD_IOCTL_PEND;
  895. c->Header.ReplyQueue = 0;
  896. if( ioc->buf_size > 0) {
  897. c->Header.SGList = sg_used;
  898. c->Header.SGTotal= sg_used;
  899. } else {
  900. c->Header.SGList = 0;
  901. c->Header.SGTotal= 0;
  902. }
  903. c->Header.LUN = ioc->LUN_info;
  904. c->Header.Tag.lower = c->busaddr;
  905. c->Request = ioc->Request;
  906. if (ioc->buf_size > 0 ) {
  907. int i;
  908. for(i=0; i<sg_used; i++) {
  909. temp64.val = pci_map_single( host->pdev, buff[i],
  910. buff_size[i],
  911. PCI_DMA_BIDIRECTIONAL);
  912. c->SG[i].Addr.lower = temp64.val32.lower;
  913. c->SG[i].Addr.upper = temp64.val32.upper;
  914. c->SG[i].Len = buff_size[i];
  915. c->SG[i].Ext = 0; /* we are not chaining */
  916. }
  917. }
  918. c->waiting = &wait;
  919. /* Put the request on the tail of the request queue */
  920. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  921. addQ(&host->reqQ, c);
  922. host->Qdepth++;
  923. start_io(host);
  924. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  925. wait_for_completion(&wait);
  926. /* unlock the buffers from DMA */
  927. for(i=0; i<sg_used; i++) {
  928. temp64.val32.lower = c->SG[i].Addr.lower;
  929. temp64.val32.upper = c->SG[i].Addr.upper;
  930. pci_unmap_single( host->pdev, (dma_addr_t) temp64.val,
  931. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  932. }
  933. /* Copy the error information out */
  934. ioc->error_info = *(c->err_info);
  935. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  936. cmd_free(host, c, 0);
  937. status = -EFAULT;
  938. goto cleanup1;
  939. }
  940. if (ioc->Request.Type.Direction == XFER_READ) {
  941. /* Copy the data out of the buffer we created */
  942. BYTE __user *ptr = ioc->buf;
  943. for(i=0; i< sg_used; i++) {
  944. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  945. cmd_free(host, c, 0);
  946. status = -EFAULT;
  947. goto cleanup1;
  948. }
  949. ptr += buff_size[i];
  950. }
  951. }
  952. cmd_free(host, c, 0);
  953. status = 0;
  954. cleanup1:
  955. if (buff) {
  956. for(i=0; i<sg_used; i++)
  957. if(buff[i] != NULL)
  958. kfree(buff[i]);
  959. kfree(buff);
  960. }
  961. if (buff_size)
  962. kfree(buff_size);
  963. if (ioc)
  964. kfree(ioc);
  965. return(status);
  966. }
  967. default:
  968. return -ENOTTY;
  969. }
  970. }
  971. /*
  972. * revalidate_allvol is for online array config utilities. After a
  973. * utility reconfigures the drives in the array, it can use this function
  974. * (through an ioctl) to make the driver zap any previous disk structs for
  975. * that controller and get new ones.
  976. *
  977. * Right now I'm using the getgeometry() function to do this, but this
  978. * function should probably be finer grained and allow you to revalidate one
  979. * particualar logical volume (instead of all of them on a particular
  980. * controller).
  981. */
  982. static int revalidate_allvol(ctlr_info_t *host)
  983. {
  984. int ctlr = host->ctlr, i;
  985. unsigned long flags;
  986. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  987. if (host->usage_count > 1) {
  988. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  989. printk(KERN_WARNING "cciss: Device busy for volume"
  990. " revalidation (usage=%d)\n", host->usage_count);
  991. return -EBUSY;
  992. }
  993. host->usage_count++;
  994. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  995. for(i=0; i< NWD; i++) {
  996. struct gendisk *disk = host->gendisk[i];
  997. if (disk->flags & GENHD_FL_UP)
  998. del_gendisk(disk);
  999. }
  1000. /*
  1001. * Set the partition and block size structures for all volumes
  1002. * on this controller to zero. We will reread all of this data
  1003. */
  1004. memset(host->drv, 0, sizeof(drive_info_struct)
  1005. * CISS_MAX_LUN);
  1006. /*
  1007. * Tell the array controller not to give us any interrupts while
  1008. * we check the new geometry. Then turn interrupts back on when
  1009. * we're done.
  1010. */
  1011. host->access.set_intr_mask(host, CCISS_INTR_OFF);
  1012. cciss_getgeometry(ctlr);
  1013. host->access.set_intr_mask(host, CCISS_INTR_ON);
  1014. /* Loop through each real device */
  1015. for (i = 0; i < NWD; i++) {
  1016. struct gendisk *disk = host->gendisk[i];
  1017. drive_info_struct *drv = &(host->drv[i]);
  1018. /* we must register the controller even if no disks exist */
  1019. /* this is for the online array utilities */
  1020. if (!drv->heads && i)
  1021. continue;
  1022. blk_queue_hardsect_size(host->queue, drv->block_size);
  1023. set_capacity(disk, drv->nr_blocks);
  1024. add_disk(disk);
  1025. }
  1026. host->usage_count--;
  1027. return 0;
  1028. }
  1029. static int deregister_disk(struct gendisk *disk)
  1030. {
  1031. unsigned long flags;
  1032. ctlr_info_t *h = get_host(disk);
  1033. drive_info_struct *drv = get_drv(disk);
  1034. int ctlr = h->ctlr;
  1035. if (!capable(CAP_SYS_RAWIO))
  1036. return -EPERM;
  1037. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  1038. /* make sure logical volume is NOT is use */
  1039. if( drv->usage_count > 1) {
  1040. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  1041. return -EBUSY;
  1042. }
  1043. drv->usage_count++;
  1044. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  1045. /* invalidate the devices and deregister the disk */
  1046. if (disk->flags & GENHD_FL_UP)
  1047. del_gendisk(disk);
  1048. /* check to see if it was the last disk */
  1049. if (drv == h->drv + h->highest_lun) {
  1050. /* if so, find the new hightest lun */
  1051. int i, newhighest =-1;
  1052. for(i=0; i<h->highest_lun; i++) {
  1053. /* if the disk has size > 0, it is available */
  1054. if (h->drv[i].nr_blocks)
  1055. newhighest = i;
  1056. }
  1057. h->highest_lun = newhighest;
  1058. }
  1059. --h->num_luns;
  1060. /* zero out the disk size info */
  1061. drv->nr_blocks = 0;
  1062. drv->block_size = 0;
  1063. drv->cylinders = 0;
  1064. drv->LunID = 0;
  1065. return(0);
  1066. }
  1067. static int fill_cmd(CommandList_struct *c, __u8 cmd, int ctlr, void *buff,
  1068. size_t size,
  1069. unsigned int use_unit_num, /* 0: address the controller,
  1070. 1: address logical volume log_unit,
  1071. 2: periph device address is scsi3addr */
  1072. unsigned int log_unit, __u8 page_code, unsigned char *scsi3addr,
  1073. int cmd_type)
  1074. {
  1075. ctlr_info_t *h= hba[ctlr];
  1076. u64bit buff_dma_handle;
  1077. int status = IO_OK;
  1078. c->cmd_type = CMD_IOCTL_PEND;
  1079. c->Header.ReplyQueue = 0;
  1080. if( buff != NULL) {
  1081. c->Header.SGList = 1;
  1082. c->Header.SGTotal= 1;
  1083. } else {
  1084. c->Header.SGList = 0;
  1085. c->Header.SGTotal= 0;
  1086. }
  1087. c->Header.Tag.lower = c->busaddr;
  1088. c->Request.Type.Type = cmd_type;
  1089. if (cmd_type == TYPE_CMD) {
  1090. switch(cmd) {
  1091. case CISS_INQUIRY:
  1092. /* If the logical unit number is 0 then, this is going
  1093. to controller so It's a physical command
  1094. mode = 0 target = 0. So we have nothing to write.
  1095. otherwise, if use_unit_num == 1,
  1096. mode = 1(volume set addressing) target = LUNID
  1097. otherwise, if use_unit_num == 2,
  1098. mode = 0(periph dev addr) target = scsi3addr */
  1099. if (use_unit_num == 1) {
  1100. c->Header.LUN.LogDev.VolId=
  1101. h->drv[log_unit].LunID;
  1102. c->Header.LUN.LogDev.Mode = 1;
  1103. } else if (use_unit_num == 2) {
  1104. memcpy(c->Header.LUN.LunAddrBytes,scsi3addr,8);
  1105. c->Header.LUN.LogDev.Mode = 0;
  1106. }
  1107. /* are we trying to read a vital product page */
  1108. if(page_code != 0) {
  1109. c->Request.CDB[1] = 0x01;
  1110. c->Request.CDB[2] = page_code;
  1111. }
  1112. c->Request.CDBLen = 6;
  1113. c->Request.Type.Attribute = ATTR_SIMPLE;
  1114. c->Request.Type.Direction = XFER_READ;
  1115. c->Request.Timeout = 0;
  1116. c->Request.CDB[0] = CISS_INQUIRY;
  1117. c->Request.CDB[4] = size & 0xFF;
  1118. break;
  1119. case CISS_REPORT_LOG:
  1120. case CISS_REPORT_PHYS:
  1121. /* Talking to controller so It's a physical command
  1122. mode = 00 target = 0. Nothing to write.
  1123. */
  1124. c->Request.CDBLen = 12;
  1125. c->Request.Type.Attribute = ATTR_SIMPLE;
  1126. c->Request.Type.Direction = XFER_READ;
  1127. c->Request.Timeout = 0;
  1128. c->Request.CDB[0] = cmd;
  1129. c->Request.CDB[6] = (size >> 24) & 0xFF; //MSB
  1130. c->Request.CDB[7] = (size >> 16) & 0xFF;
  1131. c->Request.CDB[8] = (size >> 8) & 0xFF;
  1132. c->Request.CDB[9] = size & 0xFF;
  1133. break;
  1134. case CCISS_READ_CAPACITY:
  1135. c->Header.LUN.LogDev.VolId = h->drv[log_unit].LunID;
  1136. c->Header.LUN.LogDev.Mode = 1;
  1137. c->Request.CDBLen = 10;
  1138. c->Request.Type.Attribute = ATTR_SIMPLE;
  1139. c->Request.Type.Direction = XFER_READ;
  1140. c->Request.Timeout = 0;
  1141. c->Request.CDB[0] = cmd;
  1142. break;
  1143. case CCISS_CACHE_FLUSH:
  1144. c->Request.CDBLen = 12;
  1145. c->Request.Type.Attribute = ATTR_SIMPLE;
  1146. c->Request.Type.Direction = XFER_WRITE;
  1147. c->Request.Timeout = 0;
  1148. c->Request.CDB[0] = BMIC_WRITE;
  1149. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  1150. break;
  1151. default:
  1152. printk(KERN_WARNING
  1153. "cciss%d: Unknown Command 0x%c\n", ctlr, cmd);
  1154. return(IO_ERROR);
  1155. }
  1156. } else if (cmd_type == TYPE_MSG) {
  1157. switch (cmd) {
  1158. case 3: /* No-Op message */
  1159. c->Request.CDBLen = 1;
  1160. c->Request.Type.Attribute = ATTR_SIMPLE;
  1161. c->Request.Type.Direction = XFER_WRITE;
  1162. c->Request.Timeout = 0;
  1163. c->Request.CDB[0] = cmd;
  1164. break;
  1165. default:
  1166. printk(KERN_WARNING
  1167. "cciss%d: unknown message type %d\n",
  1168. ctlr, cmd);
  1169. return IO_ERROR;
  1170. }
  1171. } else {
  1172. printk(KERN_WARNING
  1173. "cciss%d: unknown command type %d\n", ctlr, cmd_type);
  1174. return IO_ERROR;
  1175. }
  1176. /* Fill in the scatter gather information */
  1177. if (size > 0) {
  1178. buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
  1179. buff, size, PCI_DMA_BIDIRECTIONAL);
  1180. c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
  1181. c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
  1182. c->SG[0].Len = size;
  1183. c->SG[0].Ext = 0; /* we are not chaining */
  1184. }
  1185. return status;
  1186. }
  1187. static int sendcmd_withirq(__u8 cmd,
  1188. int ctlr,
  1189. void *buff,
  1190. size_t size,
  1191. unsigned int use_unit_num,
  1192. unsigned int log_unit,
  1193. __u8 page_code,
  1194. int cmd_type)
  1195. {
  1196. ctlr_info_t *h = hba[ctlr];
  1197. CommandList_struct *c;
  1198. u64bit buff_dma_handle;
  1199. unsigned long flags;
  1200. int return_status;
  1201. DECLARE_COMPLETION(wait);
  1202. if ((c = cmd_alloc(h , 0)) == NULL)
  1203. return -ENOMEM;
  1204. return_status = fill_cmd(c, cmd, ctlr, buff, size, use_unit_num,
  1205. log_unit, page_code, NULL, cmd_type);
  1206. if (return_status != IO_OK) {
  1207. cmd_free(h, c, 0);
  1208. return return_status;
  1209. }
  1210. resend_cmd2:
  1211. c->waiting = &wait;
  1212. /* Put the request on the tail of the queue and send it */
  1213. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  1214. addQ(&h->reqQ, c);
  1215. h->Qdepth++;
  1216. start_io(h);
  1217. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  1218. wait_for_completion(&wait);
  1219. if(c->err_info->CommandStatus != 0)
  1220. { /* an error has occurred */
  1221. switch(c->err_info->CommandStatus)
  1222. {
  1223. case CMD_TARGET_STATUS:
  1224. printk(KERN_WARNING "cciss: cmd %p has "
  1225. " completed with errors\n", c);
  1226. if( c->err_info->ScsiStatus)
  1227. {
  1228. printk(KERN_WARNING "cciss: cmd %p "
  1229. "has SCSI Status = %x\n",
  1230. c,
  1231. c->err_info->ScsiStatus);
  1232. }
  1233. break;
  1234. case CMD_DATA_UNDERRUN:
  1235. case CMD_DATA_OVERRUN:
  1236. /* expected for inquire and report lun commands */
  1237. break;
  1238. case CMD_INVALID:
  1239. printk(KERN_WARNING "cciss: Cmd %p is "
  1240. "reported invalid\n", c);
  1241. return_status = IO_ERROR;
  1242. break;
  1243. case CMD_PROTOCOL_ERR:
  1244. printk(KERN_WARNING "cciss: cmd %p has "
  1245. "protocol error \n", c);
  1246. return_status = IO_ERROR;
  1247. break;
  1248. case CMD_HARDWARE_ERR:
  1249. printk(KERN_WARNING "cciss: cmd %p had "
  1250. " hardware error\n", c);
  1251. return_status = IO_ERROR;
  1252. break;
  1253. case CMD_CONNECTION_LOST:
  1254. printk(KERN_WARNING "cciss: cmd %p had "
  1255. "connection lost\n", c);
  1256. return_status = IO_ERROR;
  1257. break;
  1258. case CMD_ABORTED:
  1259. printk(KERN_WARNING "cciss: cmd %p was "
  1260. "aborted\n", c);
  1261. return_status = IO_ERROR;
  1262. break;
  1263. case CMD_ABORT_FAILED:
  1264. printk(KERN_WARNING "cciss: cmd %p reports "
  1265. "abort failed\n", c);
  1266. return_status = IO_ERROR;
  1267. break;
  1268. case CMD_UNSOLICITED_ABORT:
  1269. printk(KERN_WARNING
  1270. "cciss%d: unsolicited abort %p\n",
  1271. ctlr, c);
  1272. if (c->retry_count < MAX_CMD_RETRIES) {
  1273. printk(KERN_WARNING
  1274. "cciss%d: retrying %p\n",
  1275. ctlr, c);
  1276. c->retry_count++;
  1277. /* erase the old error information */
  1278. memset(c->err_info, 0,
  1279. sizeof(ErrorInfo_struct));
  1280. return_status = IO_OK;
  1281. INIT_COMPLETION(wait);
  1282. goto resend_cmd2;
  1283. }
  1284. return_status = IO_ERROR;
  1285. break;
  1286. default:
  1287. printk(KERN_WARNING "cciss: cmd %p returned "
  1288. "unknown status %x\n", c,
  1289. c->err_info->CommandStatus);
  1290. return_status = IO_ERROR;
  1291. }
  1292. }
  1293. /* unlock the buffers from DMA */
  1294. pci_unmap_single( h->pdev, (dma_addr_t) buff_dma_handle.val,
  1295. size, PCI_DMA_BIDIRECTIONAL);
  1296. cmd_free(h, c, 0);
  1297. return(return_status);
  1298. }
  1299. static void cciss_geometry_inquiry(int ctlr, int logvol,
  1300. int withirq, unsigned int total_size,
  1301. unsigned int block_size, InquiryData_struct *inq_buff,
  1302. drive_info_struct *drv)
  1303. {
  1304. int return_code;
  1305. memset(inq_buff, 0, sizeof(InquiryData_struct));
  1306. if (withirq)
  1307. return_code = sendcmd_withirq(CISS_INQUIRY, ctlr,
  1308. inq_buff, sizeof(*inq_buff), 1, logvol ,0xC1, TYPE_CMD);
  1309. else
  1310. return_code = sendcmd(CISS_INQUIRY, ctlr, inq_buff,
  1311. sizeof(*inq_buff), 1, logvol ,0xC1, NULL, TYPE_CMD);
  1312. if (return_code == IO_OK) {
  1313. if(inq_buff->data_byte[8] == 0xFF) {
  1314. printk(KERN_WARNING
  1315. "cciss: reading geometry failed, volume "
  1316. "does not support reading geometry\n");
  1317. drv->block_size = block_size;
  1318. drv->nr_blocks = total_size;
  1319. drv->heads = 255;
  1320. drv->sectors = 32; // Sectors per track
  1321. drv->cylinders = total_size / 255 / 32;
  1322. } else {
  1323. unsigned int t;
  1324. drv->block_size = block_size;
  1325. drv->nr_blocks = total_size;
  1326. drv->heads = inq_buff->data_byte[6];
  1327. drv->sectors = inq_buff->data_byte[7];
  1328. drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
  1329. drv->cylinders += inq_buff->data_byte[5];
  1330. drv->raid_level = inq_buff->data_byte[8];
  1331. t = drv->heads * drv->sectors;
  1332. if (t > 1) {
  1333. drv->cylinders = total_size/t;
  1334. }
  1335. }
  1336. } else { /* Get geometry failed */
  1337. printk(KERN_WARNING "cciss: reading geometry failed\n");
  1338. }
  1339. printk(KERN_INFO " heads= %d, sectors= %d, cylinders= %d\n\n",
  1340. drv->heads, drv->sectors, drv->cylinders);
  1341. }
  1342. static void
  1343. cciss_read_capacity(int ctlr, int logvol, ReadCapdata_struct *buf,
  1344. int withirq, unsigned int *total_size, unsigned int *block_size)
  1345. {
  1346. int return_code;
  1347. memset(buf, 0, sizeof(*buf));
  1348. if (withirq)
  1349. return_code = sendcmd_withirq(CCISS_READ_CAPACITY,
  1350. ctlr, buf, sizeof(*buf), 1, logvol, 0, TYPE_CMD);
  1351. else
  1352. return_code = sendcmd(CCISS_READ_CAPACITY,
  1353. ctlr, buf, sizeof(*buf), 1, logvol, 0, NULL, TYPE_CMD);
  1354. if (return_code == IO_OK) {
  1355. *total_size = be32_to_cpu(*((__be32 *) &buf->total_size[0]))+1;
  1356. *block_size = be32_to_cpu(*((__be32 *) &buf->block_size[0]));
  1357. } else { /* read capacity command failed */
  1358. printk(KERN_WARNING "cciss: read capacity failed\n");
  1359. *total_size = 0;
  1360. *block_size = BLOCK_SIZE;
  1361. }
  1362. printk(KERN_INFO " blocks= %u block_size= %d\n",
  1363. *total_size, *block_size);
  1364. return;
  1365. }
  1366. static int register_new_disk(ctlr_info_t *h)
  1367. {
  1368. struct gendisk *disk;
  1369. int ctlr = h->ctlr;
  1370. int i;
  1371. int num_luns;
  1372. int logvol;
  1373. int new_lun_found = 0;
  1374. int new_lun_index = 0;
  1375. int free_index_found = 0;
  1376. int free_index = 0;
  1377. ReportLunData_struct *ld_buff = NULL;
  1378. ReadCapdata_struct *size_buff = NULL;
  1379. InquiryData_struct *inq_buff = NULL;
  1380. int return_code;
  1381. int listlength = 0;
  1382. __u32 lunid = 0;
  1383. unsigned int block_size;
  1384. unsigned int total_size;
  1385. if (!capable(CAP_SYS_RAWIO))
  1386. return -EPERM;
  1387. /* if we have no space in our disk array left to add anything */
  1388. if( h->num_luns >= CISS_MAX_LUN)
  1389. return -EINVAL;
  1390. ld_buff = kmalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
  1391. if (ld_buff == NULL)
  1392. goto mem_msg;
  1393. memset(ld_buff, 0, sizeof(ReportLunData_struct));
  1394. size_buff = kmalloc(sizeof( ReadCapdata_struct), GFP_KERNEL);
  1395. if (size_buff == NULL)
  1396. goto mem_msg;
  1397. inq_buff = kmalloc(sizeof( InquiryData_struct), GFP_KERNEL);
  1398. if (inq_buff == NULL)
  1399. goto mem_msg;
  1400. return_code = sendcmd_withirq(CISS_REPORT_LOG, ctlr, ld_buff,
  1401. sizeof(ReportLunData_struct), 0, 0, 0, TYPE_CMD);
  1402. if( return_code == IO_OK)
  1403. {
  1404. // printk("LUN Data\n--------------------------\n");
  1405. listlength |= (0xff & (unsigned int)(ld_buff->LUNListLength[0])) << 24;
  1406. listlength |= (0xff & (unsigned int)(ld_buff->LUNListLength[1])) << 16;
  1407. listlength |= (0xff & (unsigned int)(ld_buff->LUNListLength[2])) << 8;
  1408. listlength |= 0xff & (unsigned int)(ld_buff->LUNListLength[3]);
  1409. } else /* reading number of logical volumes failed */
  1410. {
  1411. printk(KERN_WARNING "cciss: report logical volume"
  1412. " command failed\n");
  1413. listlength = 0;
  1414. goto free_err;
  1415. }
  1416. num_luns = listlength / 8; // 8 bytes pre entry
  1417. if (num_luns > CISS_MAX_LUN)
  1418. {
  1419. num_luns = CISS_MAX_LUN;
  1420. }
  1421. #ifdef CCISS_DEBUG
  1422. printk(KERN_DEBUG "Length = %x %x %x %x = %d\n", ld_buff->LUNListLength[0],
  1423. ld_buff->LUNListLength[1], ld_buff->LUNListLength[2],
  1424. ld_buff->LUNListLength[3], num_luns);
  1425. #endif
  1426. for(i=0; i< num_luns; i++)
  1427. {
  1428. int j;
  1429. int lunID_found = 0;
  1430. lunid = (0xff & (unsigned int)(ld_buff->LUN[i][3])) << 24;
  1431. lunid |= (0xff & (unsigned int)(ld_buff->LUN[i][2])) << 16;
  1432. lunid |= (0xff & (unsigned int)(ld_buff->LUN[i][1])) << 8;
  1433. lunid |= 0xff & (unsigned int)(ld_buff->LUN[i][0]);
  1434. /* check to see if this is a new lun */
  1435. for(j=0; j <= h->highest_lun; j++)
  1436. {
  1437. #ifdef CCISS_DEBUG
  1438. printk("Checking %d %x against %x\n", j,h->drv[j].LunID,
  1439. lunid);
  1440. #endif /* CCISS_DEBUG */
  1441. if (h->drv[j].LunID == lunid)
  1442. {
  1443. lunID_found = 1;
  1444. break;
  1445. }
  1446. }
  1447. if( lunID_found == 1)
  1448. continue;
  1449. else
  1450. { /* It is the new lun we have been looking for */
  1451. #ifdef CCISS_DEBUG
  1452. printk("new lun found at %d\n", i);
  1453. #endif /* CCISS_DEBUG */
  1454. new_lun_index = i;
  1455. new_lun_found = 1;
  1456. break;
  1457. }
  1458. }
  1459. if (!new_lun_found)
  1460. {
  1461. printk(KERN_WARNING "cciss: New Logical Volume not found\n");
  1462. goto free_err;
  1463. }
  1464. /* Now find the free index */
  1465. for(i=0; i <CISS_MAX_LUN; i++)
  1466. {
  1467. #ifdef CCISS_DEBUG
  1468. printk("Checking Index %d\n", i);
  1469. #endif /* CCISS_DEBUG */
  1470. if(h->drv[i].LunID == 0)
  1471. {
  1472. #ifdef CCISS_DEBUG
  1473. printk("free index found at %d\n", i);
  1474. #endif /* CCISS_DEBUG */
  1475. free_index_found = 1;
  1476. free_index = i;
  1477. break;
  1478. }
  1479. }
  1480. if (!free_index_found)
  1481. {
  1482. printk(KERN_WARNING "cciss: unable to find free slot for disk\n");
  1483. goto free_err;
  1484. }
  1485. logvol = free_index;
  1486. h->drv[logvol].LunID = lunid;
  1487. /* there could be gaps in lun numbers, track hightest */
  1488. if(h->highest_lun < lunid)
  1489. h->highest_lun = logvol;
  1490. cciss_read_capacity(ctlr, logvol, size_buff, 1,
  1491. &total_size, &block_size);
  1492. cciss_geometry_inquiry(ctlr, logvol, 1, total_size, block_size,
  1493. inq_buff, &h->drv[logvol]);
  1494. h->drv[logvol].usage_count = 0;
  1495. ++h->num_luns;
  1496. /* setup partitions per disk */
  1497. disk = h->gendisk[logvol];
  1498. set_capacity(disk, h->drv[logvol].nr_blocks);
  1499. /* if it's the controller it's already added */
  1500. if(logvol)
  1501. add_disk(disk);
  1502. freeret:
  1503. kfree(ld_buff);
  1504. kfree(size_buff);
  1505. kfree(inq_buff);
  1506. return (logvol);
  1507. mem_msg:
  1508. printk(KERN_ERR "cciss: out of memory\n");
  1509. free_err:
  1510. logvol = -1;
  1511. goto freeret;
  1512. }
  1513. static int cciss_revalidate(struct gendisk *disk)
  1514. {
  1515. ctlr_info_t *h = get_host(disk);
  1516. drive_info_struct *drv = get_drv(disk);
  1517. int logvol;
  1518. int FOUND=0;
  1519. unsigned int block_size;
  1520. unsigned int total_size;
  1521. ReadCapdata_struct *size_buff = NULL;
  1522. InquiryData_struct *inq_buff = NULL;
  1523. for(logvol=0; logvol < CISS_MAX_LUN; logvol++)
  1524. {
  1525. if(h->drv[logvol].LunID == drv->LunID) {
  1526. FOUND=1;
  1527. break;
  1528. }
  1529. }
  1530. if (!FOUND) return 1;
  1531. size_buff = kmalloc(sizeof( ReadCapdata_struct), GFP_KERNEL);
  1532. if (size_buff == NULL)
  1533. {
  1534. printk(KERN_WARNING "cciss: out of memory\n");
  1535. return 1;
  1536. }
  1537. inq_buff = kmalloc(sizeof( InquiryData_struct), GFP_KERNEL);
  1538. if (inq_buff == NULL)
  1539. {
  1540. printk(KERN_WARNING "cciss: out of memory\n");
  1541. kfree(size_buff);
  1542. return 1;
  1543. }
  1544. cciss_read_capacity(h->ctlr, logvol, size_buff, 1, &total_size, &block_size);
  1545. cciss_geometry_inquiry(h->ctlr, logvol, 1, total_size, block_size, inq_buff, drv);
  1546. blk_queue_hardsect_size(h->queue, drv->block_size);
  1547. set_capacity(disk, drv->nr_blocks);
  1548. kfree(size_buff);
  1549. kfree(inq_buff);
  1550. return 0;
  1551. }
  1552. /*
  1553. * Wait polling for a command to complete.
  1554. * The memory mapped FIFO is polled for the completion.
  1555. * Used only at init time, interrupts from the HBA are disabled.
  1556. */
  1557. static unsigned long pollcomplete(int ctlr)
  1558. {
  1559. unsigned long done;
  1560. int i;
  1561. /* Wait (up to 20 seconds) for a command to complete */
  1562. for (i = 20 * HZ; i > 0; i--) {
  1563. done = hba[ctlr]->access.command_completed(hba[ctlr]);
  1564. if (done == FIFO_EMPTY) {
  1565. set_current_state(TASK_UNINTERRUPTIBLE);
  1566. schedule_timeout(1);
  1567. } else
  1568. return (done);
  1569. }
  1570. /* Invalid address to tell caller we ran out of time */
  1571. return 1;
  1572. }
  1573. /*
  1574. * Send a command to the controller, and wait for it to complete.
  1575. * Only used at init time.
  1576. */
  1577. static int sendcmd(
  1578. __u8 cmd,
  1579. int ctlr,
  1580. void *buff,
  1581. size_t size,
  1582. unsigned int use_unit_num, /* 0: address the controller,
  1583. 1: address logical volume log_unit,
  1584. 2: periph device address is scsi3addr */
  1585. unsigned int log_unit,
  1586. __u8 page_code,
  1587. unsigned char *scsi3addr,
  1588. int cmd_type)
  1589. {
  1590. CommandList_struct *c;
  1591. int i;
  1592. unsigned long complete;
  1593. ctlr_info_t *info_p= hba[ctlr];
  1594. u64bit buff_dma_handle;
  1595. int status;
  1596. if ((c = cmd_alloc(info_p, 1)) == NULL) {
  1597. printk(KERN_WARNING "cciss: unable to get memory");
  1598. return(IO_ERROR);
  1599. }
  1600. status = fill_cmd(c, cmd, ctlr, buff, size, use_unit_num,
  1601. log_unit, page_code, scsi3addr, cmd_type);
  1602. if (status != IO_OK) {
  1603. cmd_free(info_p, c, 1);
  1604. return status;
  1605. }
  1606. resend_cmd1:
  1607. /*
  1608. * Disable interrupt
  1609. */
  1610. #ifdef CCISS_DEBUG
  1611. printk(KERN_DEBUG "cciss: turning intr off\n");
  1612. #endif /* CCISS_DEBUG */
  1613. info_p->access.set_intr_mask(info_p, CCISS_INTR_OFF);
  1614. /* Make sure there is room in the command FIFO */
  1615. /* Actually it should be completely empty at this time. */
  1616. for (i = 200000; i > 0; i--)
  1617. {
  1618. /* if fifo isn't full go */
  1619. if (!(info_p->access.fifo_full(info_p)))
  1620. {
  1621. break;
  1622. }
  1623. udelay(10);
  1624. printk(KERN_WARNING "cciss cciss%d: SendCmd FIFO full,"
  1625. " waiting!\n", ctlr);
  1626. }
  1627. /*
  1628. * Send the cmd
  1629. */
  1630. info_p->access.submit_command(info_p, c);
  1631. complete = pollcomplete(ctlr);
  1632. #ifdef CCISS_DEBUG
  1633. printk(KERN_DEBUG "cciss: command completed\n");
  1634. #endif /* CCISS_DEBUG */
  1635. if (complete != 1) {
  1636. if ( (complete & CISS_ERROR_BIT)
  1637. && (complete & ~CISS_ERROR_BIT) == c->busaddr)
  1638. {
  1639. /* if data overrun or underun on Report command
  1640. ignore it
  1641. */
  1642. if (((c->Request.CDB[0] == CISS_REPORT_LOG) ||
  1643. (c->Request.CDB[0] == CISS_REPORT_PHYS) ||
  1644. (c->Request.CDB[0] == CISS_INQUIRY)) &&
  1645. ((c->err_info->CommandStatus ==
  1646. CMD_DATA_OVERRUN) ||
  1647. (c->err_info->CommandStatus ==
  1648. CMD_DATA_UNDERRUN)
  1649. ))
  1650. {
  1651. complete = c->busaddr;
  1652. } else {
  1653. if (c->err_info->CommandStatus ==
  1654. CMD_UNSOLICITED_ABORT) {
  1655. printk(KERN_WARNING "cciss%d: "
  1656. "unsolicited abort %p\n",
  1657. ctlr, c);
  1658. if (c->retry_count < MAX_CMD_RETRIES) {
  1659. printk(KERN_WARNING
  1660. "cciss%d: retrying %p\n",
  1661. ctlr, c);
  1662. c->retry_count++;
  1663. /* erase the old error */
  1664. /* information */
  1665. memset(c->err_info, 0,
  1666. sizeof(ErrorInfo_struct));
  1667. goto resend_cmd1;
  1668. } else {
  1669. printk(KERN_WARNING
  1670. "cciss%d: retried %p too "
  1671. "many times\n", ctlr, c);
  1672. status = IO_ERROR;
  1673. goto cleanup1;
  1674. }
  1675. }
  1676. printk(KERN_WARNING "ciss ciss%d: sendcmd"
  1677. " Error %x \n", ctlr,
  1678. c->err_info->CommandStatus);
  1679. printk(KERN_WARNING "ciss ciss%d: sendcmd"
  1680. " offensive info\n"
  1681. " size %x\n num %x value %x\n", ctlr,
  1682. c->err_info->MoreErrInfo.Invalid_Cmd.offense_size,
  1683. c->err_info->MoreErrInfo.Invalid_Cmd.offense_num,
  1684. c->err_info->MoreErrInfo.Invalid_Cmd.offense_value);
  1685. status = IO_ERROR;
  1686. goto cleanup1;
  1687. }
  1688. }
  1689. if (complete != c->busaddr) {
  1690. printk( KERN_WARNING "cciss cciss%d: SendCmd "
  1691. "Invalid command list address returned! (%lx)\n",
  1692. ctlr, complete);
  1693. status = IO_ERROR;
  1694. goto cleanup1;
  1695. }
  1696. } else {
  1697. printk( KERN_WARNING
  1698. "cciss cciss%d: SendCmd Timeout out, "
  1699. "No command list address returned!\n",
  1700. ctlr);
  1701. status = IO_ERROR;
  1702. }
  1703. cleanup1:
  1704. /* unlock the data buffer from DMA */
  1705. pci_unmap_single(info_p->pdev, (dma_addr_t) buff_dma_handle.val,
  1706. size, PCI_DMA_BIDIRECTIONAL);
  1707. cmd_free(info_p, c, 1);
  1708. return (status);
  1709. }
  1710. /*
  1711. * Map (physical) PCI mem into (virtual) kernel space
  1712. */
  1713. static void __iomem *remap_pci_mem(ulong base, ulong size)
  1714. {
  1715. ulong page_base = ((ulong) base) & PAGE_MASK;
  1716. ulong page_offs = ((ulong) base) - page_base;
  1717. void __iomem *page_remapped = ioremap(page_base, page_offs+size);
  1718. return page_remapped ? (page_remapped + page_offs) : NULL;
  1719. }
  1720. /*
  1721. * Takes jobs of the Q and sends them to the hardware, then puts it on
  1722. * the Q to wait for completion.
  1723. */
  1724. static void start_io( ctlr_info_t *h)
  1725. {
  1726. CommandList_struct *c;
  1727. while(( c = h->reqQ) != NULL )
  1728. {
  1729. /* can't do anything if fifo is full */
  1730. if ((h->access.fifo_full(h))) {
  1731. printk(KERN_WARNING "cciss: fifo full\n");
  1732. break;
  1733. }
  1734. /* Get the frist entry from the Request Q */
  1735. removeQ(&(h->reqQ), c);
  1736. h->Qdepth--;
  1737. /* Tell the controller execute command */
  1738. h->access.submit_command(h, c);
  1739. /* Put job onto the completed Q */
  1740. addQ (&(h->cmpQ), c);
  1741. }
  1742. }
  1743. static inline void complete_buffers(struct bio *bio, int status)
  1744. {
  1745. while (bio) {
  1746. struct bio *xbh = bio->bi_next;
  1747. int nr_sectors = bio_sectors(bio);
  1748. bio->bi_next = NULL;
  1749. blk_finished_io(len);
  1750. bio_endio(bio, nr_sectors << 9, status ? 0 : -EIO);
  1751. bio = xbh;
  1752. }
  1753. }
  1754. /* Assumes that CCISS_LOCK(h->ctlr) is held. */
  1755. /* Zeros out the error record and then resends the command back */
  1756. /* to the controller */
  1757. static inline void resend_cciss_cmd( ctlr_info_t *h, CommandList_struct *c)
  1758. {
  1759. /* erase the old error information */
  1760. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  1761. /* add it to software queue and then send it to the controller */
  1762. addQ(&(h->reqQ),c);
  1763. h->Qdepth++;
  1764. if(h->Qdepth > h->maxQsinceinit)
  1765. h->maxQsinceinit = h->Qdepth;
  1766. start_io(h);
  1767. }
  1768. /* checks the status of the job and calls complete buffers to mark all
  1769. * buffers for the completed job.
  1770. */
  1771. static inline void complete_command( ctlr_info_t *h, CommandList_struct *cmd,
  1772. int timeout)
  1773. {
  1774. int status = 1;
  1775. int i;
  1776. int retry_cmd = 0;
  1777. u64bit temp64;
  1778. if (timeout)
  1779. status = 0;
  1780. if(cmd->err_info->CommandStatus != 0)
  1781. { /* an error has occurred */
  1782. switch(cmd->err_info->CommandStatus)
  1783. {
  1784. unsigned char sense_key;
  1785. case CMD_TARGET_STATUS:
  1786. status = 0;
  1787. if( cmd->err_info->ScsiStatus == 0x02)
  1788. {
  1789. printk(KERN_WARNING "cciss: cmd %p "
  1790. "has CHECK CONDITION "
  1791. " byte 2 = 0x%x\n", cmd,
  1792. cmd->err_info->SenseInfo[2]
  1793. );
  1794. /* check the sense key */
  1795. sense_key = 0xf &
  1796. cmd->err_info->SenseInfo[2];
  1797. /* no status or recovered error */
  1798. if((sense_key == 0x0) ||
  1799. (sense_key == 0x1))
  1800. {
  1801. status = 1;
  1802. }
  1803. } else
  1804. {
  1805. printk(KERN_WARNING "cciss: cmd %p "
  1806. "has SCSI Status 0x%x\n",
  1807. cmd, cmd->err_info->ScsiStatus);
  1808. }
  1809. break;
  1810. case CMD_DATA_UNDERRUN:
  1811. printk(KERN_WARNING "cciss: cmd %p has"
  1812. " completed with data underrun "
  1813. "reported\n", cmd);
  1814. break;
  1815. case CMD_DATA_OVERRUN:
  1816. printk(KERN_WARNING "cciss: cmd %p has"
  1817. " completed with data overrun "
  1818. "reported\n", cmd);
  1819. break;
  1820. case CMD_INVALID:
  1821. printk(KERN_WARNING "cciss: cmd %p is "
  1822. "reported invalid\n", cmd);
  1823. status = 0;
  1824. break;
  1825. case CMD_PROTOCOL_ERR:
  1826. printk(KERN_WARNING "cciss: cmd %p has "
  1827. "protocol error \n", cmd);
  1828. status = 0;
  1829. break;
  1830. case CMD_HARDWARE_ERR:
  1831. printk(KERN_WARNING "cciss: cmd %p had "
  1832. " hardware error\n", cmd);
  1833. status = 0;
  1834. break;
  1835. case CMD_CONNECTION_LOST:
  1836. printk(KERN_WARNING "cciss: cmd %p had "
  1837. "connection lost\n", cmd);
  1838. status=0;
  1839. break;
  1840. case CMD_ABORTED:
  1841. printk(KERN_WARNING "cciss: cmd %p was "
  1842. "aborted\n", cmd);
  1843. status=0;
  1844. break;
  1845. case CMD_ABORT_FAILED:
  1846. printk(KERN_WARNING "cciss: cmd %p reports "
  1847. "abort failed\n", cmd);
  1848. status=0;
  1849. break;
  1850. case CMD_UNSOLICITED_ABORT:
  1851. printk(KERN_WARNING "cciss%d: unsolicited "
  1852. "abort %p\n", h->ctlr, cmd);
  1853. if (cmd->retry_count < MAX_CMD_RETRIES) {
  1854. retry_cmd=1;
  1855. printk(KERN_WARNING
  1856. "cciss%d: retrying %p\n",
  1857. h->ctlr, cmd);
  1858. cmd->retry_count++;
  1859. } else
  1860. printk(KERN_WARNING
  1861. "cciss%d: %p retried too "
  1862. "many times\n", h->ctlr, cmd);
  1863. status=0;
  1864. break;
  1865. case CMD_TIMEOUT:
  1866. printk(KERN_WARNING "cciss: cmd %p timedout\n",
  1867. cmd);
  1868. status=0;
  1869. break;
  1870. default:
  1871. printk(KERN_WARNING "cciss: cmd %p returned "
  1872. "unknown status %x\n", cmd,
  1873. cmd->err_info->CommandStatus);
  1874. status=0;
  1875. }
  1876. }
  1877. /* We need to return this command */
  1878. if(retry_cmd) {
  1879. resend_cciss_cmd(h,cmd);
  1880. return;
  1881. }
  1882. /* command did not need to be retried */
  1883. /* unmap the DMA mapping for all the scatter gather elements */
  1884. for(i=0; i<cmd->Header.SGList; i++) {
  1885. temp64.val32.lower = cmd->SG[i].Addr.lower;
  1886. temp64.val32.upper = cmd->SG[i].Addr.upper;
  1887. pci_unmap_page(hba[cmd->ctlr]->pdev,
  1888. temp64.val, cmd->SG[i].Len,
  1889. (cmd->Request.Type.Direction == XFER_READ) ?
  1890. PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
  1891. }
  1892. complete_buffers(cmd->rq->bio, status);
  1893. #ifdef CCISS_DEBUG
  1894. printk("Done with %p\n", cmd->rq);
  1895. #endif /* CCISS_DEBUG */
  1896. end_that_request_last(cmd->rq);
  1897. cmd_free(h,cmd,1);
  1898. }
  1899. /*
  1900. * Get a request and submit it to the controller.
  1901. */
  1902. static void do_cciss_request(request_queue_t *q)
  1903. {
  1904. ctlr_info_t *h= q->queuedata;
  1905. CommandList_struct *c;
  1906. int start_blk, seg;
  1907. struct request *creq;
  1908. u64bit temp64;
  1909. struct scatterlist tmp_sg[MAXSGENTRIES];
  1910. drive_info_struct *drv;
  1911. int i, dir;
  1912. /* We call start_io here in case there is a command waiting on the
  1913. * queue that has not been sent.
  1914. */
  1915. if (blk_queue_plugged(q))
  1916. goto startio;
  1917. queue:
  1918. creq = elv_next_request(q);
  1919. if (!creq)
  1920. goto startio;
  1921. if (creq->nr_phys_segments > MAXSGENTRIES)
  1922. BUG();
  1923. if (( c = cmd_alloc(h, 1)) == NULL)
  1924. goto full;
  1925. blkdev_dequeue_request(creq);
  1926. spin_unlock_irq(q->queue_lock);
  1927. c->cmd_type = CMD_RWREQ;
  1928. c->rq = creq;
  1929. /* fill in the request */
  1930. drv = creq->rq_disk->private_data;
  1931. c->Header.ReplyQueue = 0; // unused in simple mode
  1932. c->Header.Tag.lower = c->busaddr; // use the physical address the cmd block for tag
  1933. c->Header.LUN.LogDev.VolId= drv->LunID;
  1934. c->Header.LUN.LogDev.Mode = 1;
  1935. c->Request.CDBLen = 10; // 12 byte commands not in FW yet;
  1936. c->Request.Type.Type = TYPE_CMD; // It is a command.
  1937. c->Request.Type.Attribute = ATTR_SIMPLE;
  1938. c->Request.Type.Direction =
  1939. (rq_data_dir(creq) == READ) ? XFER_READ: XFER_WRITE;
  1940. c->Request.Timeout = 0; // Don't time out
  1941. c->Request.CDB[0] = (rq_data_dir(creq) == READ) ? CCISS_READ : CCISS_WRITE;
  1942. start_blk = creq->sector;
  1943. #ifdef CCISS_DEBUG
  1944. printk(KERN_DEBUG "ciss: sector =%d nr_sectors=%d\n",(int) creq->sector,
  1945. (int) creq->nr_sectors);
  1946. #endif /* CCISS_DEBUG */
  1947. seg = blk_rq_map_sg(q, creq, tmp_sg);
  1948. /* get the DMA records for the setup */
  1949. if (c->Request.Type.Direction == XFER_READ)
  1950. dir = PCI_DMA_FROMDEVICE;
  1951. else
  1952. dir = PCI_DMA_TODEVICE;
  1953. for (i=0; i<seg; i++)
  1954. {
  1955. c->SG[i].Len = tmp_sg[i].length;
  1956. temp64.val = (__u64) pci_map_page(h->pdev, tmp_sg[i].page,
  1957. tmp_sg[i].offset, tmp_sg[i].length,
  1958. dir);
  1959. c->SG[i].Addr.lower = temp64.val32.lower;
  1960. c->SG[i].Addr.upper = temp64.val32.upper;
  1961. c->SG[i].Ext = 0; // we are not chaining
  1962. }
  1963. /* track how many SG entries we are using */
  1964. if( seg > h->maxSG)
  1965. h->maxSG = seg;
  1966. #ifdef CCISS_DEBUG
  1967. printk(KERN_DEBUG "cciss: Submitting %d sectors in %d segments\n", creq->nr_sectors, seg);
  1968. #endif /* CCISS_DEBUG */
  1969. c->Header.SGList = c->Header.SGTotal = seg;
  1970. c->Request.CDB[1]= 0;
  1971. c->Request.CDB[2]= (start_blk >> 24) & 0xff; //MSB
  1972. c->Request.CDB[3]= (start_blk >> 16) & 0xff;
  1973. c->Request.CDB[4]= (start_blk >> 8) & 0xff;
  1974. c->Request.CDB[5]= start_blk & 0xff;
  1975. c->Request.CDB[6]= 0; // (sect >> 24) & 0xff; MSB
  1976. c->Request.CDB[7]= (creq->nr_sectors >> 8) & 0xff;
  1977. c->Request.CDB[8]= creq->nr_sectors & 0xff;
  1978. c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
  1979. spin_lock_irq(q->queue_lock);
  1980. addQ(&(h->reqQ),c);
  1981. h->Qdepth++;
  1982. if(h->Qdepth > h->maxQsinceinit)
  1983. h->maxQsinceinit = h->Qdepth;
  1984. goto queue;
  1985. full:
  1986. blk_stop_queue(q);
  1987. startio:
  1988. /* We will already have the driver lock here so not need
  1989. * to lock it.
  1990. */
  1991. start_io(h);
  1992. }
  1993. static irqreturn_t do_cciss_intr(int irq, void *dev_id, struct pt_regs *regs)
  1994. {
  1995. ctlr_info_t *h = dev_id;
  1996. CommandList_struct *c;
  1997. unsigned long flags;
  1998. __u32 a, a1;
  1999. int j;
  2000. int start_queue = h->next_to_run;
  2001. /* Is this interrupt for us? */
  2002. if (( h->access.intr_pending(h) == 0) || (h->interrupts_enabled == 0))
  2003. return IRQ_NONE;
  2004. /*
  2005. * If there are completed commands in the completion queue,
  2006. * we had better do something about it.
  2007. */
  2008. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  2009. while( h->access.intr_pending(h))
  2010. {
  2011. while((a = h->access.command_completed(h)) != FIFO_EMPTY)
  2012. {
  2013. a1 = a;
  2014. a &= ~3;
  2015. if ((c = h->cmpQ) == NULL)
  2016. {
  2017. printk(KERN_WARNING "cciss: Completion of %08lx ignored\n", (unsigned long)a1);
  2018. continue;
  2019. }
  2020. while(c->busaddr != a) {
  2021. c = c->next;
  2022. if (c == h->cmpQ)
  2023. break;
  2024. }
  2025. /*
  2026. * If we've found the command, take it off the
  2027. * completion Q and free it
  2028. */
  2029. if (c->busaddr == a) {
  2030. removeQ(&h->cmpQ, c);
  2031. if (c->cmd_type == CMD_RWREQ) {
  2032. complete_command(h, c, 0);
  2033. } else if (c->cmd_type == CMD_IOCTL_PEND) {
  2034. complete(c->waiting);
  2035. }
  2036. # ifdef CONFIG_CISS_SCSI_TAPE
  2037. else if (c->cmd_type == CMD_SCSI)
  2038. complete_scsi_command(c, 0, a1);
  2039. # endif
  2040. continue;
  2041. }
  2042. }
  2043. }
  2044. /* check to see if we have maxed out the number of commands that can
  2045. * be placed on the queue. If so then exit. We do this check here
  2046. * in case the interrupt we serviced was from an ioctl and did not
  2047. * free any new commands.
  2048. */
  2049. if ((find_first_zero_bit(h->cmd_pool_bits, NR_CMDS)) == NR_CMDS)
  2050. goto cleanup;
  2051. /* We have room on the queue for more commands. Now we need to queue
  2052. * them up. We will also keep track of the next queue to run so
  2053. * that every queue gets a chance to be started first.
  2054. */
  2055. for (j=0; j < NWD; j++){
  2056. int curr_queue = (start_queue + j) % NWD;
  2057. /* make sure the disk has been added and the drive is real
  2058. * because this can be called from the middle of init_one.
  2059. */
  2060. if(!(h->gendisk[curr_queue]->queue) ||
  2061. !(h->drv[curr_queue].heads))
  2062. continue;
  2063. blk_start_queue(h->gendisk[curr_queue]->queue);
  2064. /* check to see if we have maxed out the number of commands
  2065. * that can be placed on the queue.
  2066. */
  2067. if ((find_first_zero_bit(h->cmd_pool_bits, NR_CMDS)) == NR_CMDS)
  2068. {
  2069. if (curr_queue == start_queue){
  2070. h->next_to_run = (start_queue + 1) % NWD;
  2071. goto cleanup;
  2072. } else {
  2073. h->next_to_run = curr_queue;
  2074. goto cleanup;
  2075. }
  2076. } else {
  2077. curr_queue = (curr_queue + 1) % NWD;
  2078. }
  2079. }
  2080. cleanup:
  2081. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  2082. return IRQ_HANDLED;
  2083. }
  2084. /*
  2085. * We cannot read the structure directly, for portablity we must use
  2086. * the io functions.
  2087. * This is for debug only.
  2088. */
  2089. #ifdef CCISS_DEBUG
  2090. static void print_cfg_table( CfgTable_struct *tb)
  2091. {
  2092. int i;
  2093. char temp_name[17];
  2094. printk("Controller Configuration information\n");
  2095. printk("------------------------------------\n");
  2096. for(i=0;i<4;i++)
  2097. temp_name[i] = readb(&(tb->Signature[i]));
  2098. temp_name[4]='\0';
  2099. printk(" Signature = %s\n", temp_name);
  2100. printk(" Spec Number = %d\n", readl(&(tb->SpecValence)));
  2101. printk(" Transport methods supported = 0x%x\n",
  2102. readl(&(tb-> TransportSupport)));
  2103. printk(" Transport methods active = 0x%x\n",
  2104. readl(&(tb->TransportActive)));
  2105. printk(" Requested transport Method = 0x%x\n",
  2106. readl(&(tb->HostWrite.TransportRequest)));
  2107. printk(" Coalese Interrupt Delay = 0x%x\n",
  2108. readl(&(tb->HostWrite.CoalIntDelay)));
  2109. printk(" Coalese Interrupt Count = 0x%x\n",
  2110. readl(&(tb->HostWrite.CoalIntCount)));
  2111. printk(" Max outstanding commands = 0x%d\n",
  2112. readl(&(tb->CmdsOutMax)));
  2113. printk(" Bus Types = 0x%x\n", readl(&(tb-> BusTypes)));
  2114. for(i=0;i<16;i++)
  2115. temp_name[i] = readb(&(tb->ServerName[i]));
  2116. temp_name[16] = '\0';
  2117. printk(" Server Name = %s\n", temp_name);
  2118. printk(" Heartbeat Counter = 0x%x\n\n\n",
  2119. readl(&(tb->HeartBeat)));
  2120. }
  2121. #endif /* CCISS_DEBUG */
  2122. static void release_io_mem(ctlr_info_t *c)
  2123. {
  2124. /* if IO mem was not protected do nothing */
  2125. if( c->io_mem_addr == 0)
  2126. return;
  2127. release_region(c->io_mem_addr, c->io_mem_length);
  2128. c->io_mem_addr = 0;
  2129. c->io_mem_length = 0;
  2130. }
  2131. static int find_PCI_BAR_index(struct pci_dev *pdev,
  2132. unsigned long pci_bar_addr)
  2133. {
  2134. int i, offset, mem_type, bar_type;
  2135. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  2136. return 0;
  2137. offset = 0;
  2138. for (i=0; i<DEVICE_COUNT_RESOURCE; i++) {
  2139. bar_type = pci_resource_flags(pdev, i) &
  2140. PCI_BASE_ADDRESS_SPACE;
  2141. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  2142. offset += 4;
  2143. else {
  2144. mem_type = pci_resource_flags(pdev, i) &
  2145. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  2146. switch (mem_type) {
  2147. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  2148. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  2149. offset += 4; /* 32 bit */
  2150. break;
  2151. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  2152. offset += 8;
  2153. break;
  2154. default: /* reserved in PCI 2.2 */
  2155. printk(KERN_WARNING "Base address is invalid\n");
  2156. return -1;
  2157. break;
  2158. }
  2159. }
  2160. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  2161. return i+1;
  2162. }
  2163. return -1;
  2164. }
  2165. static int cciss_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
  2166. {
  2167. ushort subsystem_vendor_id, subsystem_device_id, command;
  2168. __u32 board_id, scratchpad = 0;
  2169. __u64 cfg_offset;
  2170. __u32 cfg_base_addr;
  2171. __u64 cfg_base_addr_index;
  2172. int i;
  2173. /* check to see if controller has been disabled */
  2174. /* BEFORE trying to enable it */
  2175. (void) pci_read_config_word(pdev, PCI_COMMAND,&command);
  2176. if(!(command & 0x02))
  2177. {
  2178. printk(KERN_WARNING "cciss: controller appears to be disabled\n");
  2179. return(-1);
  2180. }
  2181. if (pci_enable_device(pdev))
  2182. {
  2183. printk(KERN_ERR "cciss: Unable to Enable PCI device\n");
  2184. return( -1);
  2185. }
  2186. subsystem_vendor_id = pdev->subsystem_vendor;
  2187. subsystem_device_id = pdev->subsystem_device;
  2188. board_id = (((__u32) (subsystem_device_id << 16) & 0xffff0000) |
  2189. subsystem_vendor_id);
  2190. /* search for our IO range so we can protect it */
  2191. for(i=0; i<DEVICE_COUNT_RESOURCE; i++)
  2192. {
  2193. /* is this an IO range */
  2194. if( pci_resource_flags(pdev, i) & 0x01 ) {
  2195. c->io_mem_addr = pci_resource_start(pdev, i);
  2196. c->io_mem_length = pci_resource_end(pdev, i) -
  2197. pci_resource_start(pdev, i) +1;
  2198. #ifdef CCISS_DEBUG
  2199. printk("IO value found base_addr[%d] %lx %lx\n", i,
  2200. c->io_mem_addr, c->io_mem_length);
  2201. #endif /* CCISS_DEBUG */
  2202. /* register the IO range */
  2203. if(!request_region( c->io_mem_addr,
  2204. c->io_mem_length, "cciss"))
  2205. {
  2206. printk(KERN_WARNING "cciss I/O memory range already in use addr=%lx length=%ld\n",
  2207. c->io_mem_addr, c->io_mem_length);
  2208. c->io_mem_addr= 0;
  2209. c->io_mem_length = 0;
  2210. }
  2211. break;
  2212. }
  2213. }
  2214. #ifdef CCISS_DEBUG
  2215. printk("command = %x\n", command);
  2216. printk("irq = %x\n", pdev->irq);
  2217. printk("board_id = %x\n", board_id);
  2218. #endif /* CCISS_DEBUG */
  2219. c->intr = pdev->irq;
  2220. /*
  2221. * Memory base addr is first addr , the second points to the config
  2222. * table
  2223. */
  2224. c->paddr = pci_resource_start(pdev, 0); /* addressing mode bits already removed */
  2225. #ifdef CCISS_DEBUG
  2226. printk("address 0 = %x\n", c->paddr);
  2227. #endif /* CCISS_DEBUG */
  2228. c->vaddr = remap_pci_mem(c->paddr, 200);
  2229. /* Wait for the board to become ready. (PCI hotplug needs this.)
  2230. * We poll for up to 120 secs, once per 100ms. */
  2231. for (i=0; i < 1200; i++) {
  2232. scratchpad = readl(c->vaddr + SA5_SCRATCHPAD_OFFSET);
  2233. if (scratchpad == CCISS_FIRMWARE_READY)
  2234. break;
  2235. set_current_state(TASK_INTERRUPTIBLE);
  2236. schedule_timeout(HZ / 10); /* wait 100ms */
  2237. }
  2238. if (scratchpad != CCISS_FIRMWARE_READY) {
  2239. printk(KERN_WARNING "cciss: Board not ready. Timed out.\n");
  2240. return -1;
  2241. }
  2242. /* get the address index number */
  2243. cfg_base_addr = readl(c->vaddr + SA5_CTCFG_OFFSET);
  2244. cfg_base_addr &= (__u32) 0x0000ffff;
  2245. #ifdef CCISS_DEBUG
  2246. printk("cfg base address = %x\n", cfg_base_addr);
  2247. #endif /* CCISS_DEBUG */
  2248. cfg_base_addr_index =
  2249. find_PCI_BAR_index(pdev, cfg_base_addr);
  2250. #ifdef CCISS_DEBUG
  2251. printk("cfg base address index = %x\n", cfg_base_addr_index);
  2252. #endif /* CCISS_DEBUG */
  2253. if (cfg_base_addr_index == -1) {
  2254. printk(KERN_WARNING "cciss: Cannot find cfg_base_addr_index\n");
  2255. release_io_mem(c);
  2256. return -1;
  2257. }
  2258. cfg_offset = readl(c->vaddr + SA5_CTMEM_OFFSET);
  2259. #ifdef CCISS_DEBUG
  2260. printk("cfg offset = %x\n", cfg_offset);
  2261. #endif /* CCISS_DEBUG */
  2262. c->cfgtable = remap_pci_mem(pci_resource_start(pdev,
  2263. cfg_base_addr_index) + cfg_offset,
  2264. sizeof(CfgTable_struct));
  2265. c->board_id = board_id;
  2266. #ifdef CCISS_DEBUG
  2267. print_cfg_table(c->cfgtable);
  2268. #endif /* CCISS_DEBUG */
  2269. for(i=0; i<NR_PRODUCTS; i++) {
  2270. if (board_id == products[i].board_id) {
  2271. c->product_name = products[i].product_name;
  2272. c->access = *(products[i].access);
  2273. break;
  2274. }
  2275. }
  2276. if (i == NR_PRODUCTS) {
  2277. printk(KERN_WARNING "cciss: Sorry, I don't know how"
  2278. " to access the Smart Array controller %08lx\n",
  2279. (unsigned long)board_id);
  2280. return -1;
  2281. }
  2282. if ( (readb(&c->cfgtable->Signature[0]) != 'C') ||
  2283. (readb(&c->cfgtable->Signature[1]) != 'I') ||
  2284. (readb(&c->cfgtable->Signature[2]) != 'S') ||
  2285. (readb(&c->cfgtable->Signature[3]) != 'S') )
  2286. {
  2287. printk("Does not appear to be a valid CISS config table\n");
  2288. return -1;
  2289. }
  2290. #ifdef CONFIG_X86
  2291. {
  2292. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  2293. __u32 prefetch;
  2294. prefetch = readl(&(c->cfgtable->SCSI_Prefetch));
  2295. prefetch |= 0x100;
  2296. writel(prefetch, &(c->cfgtable->SCSI_Prefetch));
  2297. }
  2298. #endif
  2299. #ifdef CCISS_DEBUG
  2300. printk("Trying to put board into Simple mode\n");
  2301. #endif /* CCISS_DEBUG */
  2302. c->max_commands = readl(&(c->cfgtable->CmdsOutMax));
  2303. /* Update the field, and then ring the doorbell */
  2304. writel( CFGTBL_Trans_Simple,
  2305. &(c->cfgtable->HostWrite.TransportRequest));
  2306. writel( CFGTBL_ChangeReq, c->vaddr + SA5_DOORBELL);
  2307. /* under certain very rare conditions, this can take awhile.
  2308. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  2309. * as we enter this code.) */
  2310. for(i=0;i<MAX_CONFIG_WAIT;i++) {
  2311. if (!(readl(c->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  2312. break;
  2313. /* delay and try again */
  2314. set_current_state(TASK_INTERRUPTIBLE);
  2315. schedule_timeout(10);
  2316. }
  2317. #ifdef CCISS_DEBUG
  2318. printk(KERN_DEBUG "I counter got to %d %x\n", i, readl(c->vaddr + SA5_DOORBELL));
  2319. #endif /* CCISS_DEBUG */
  2320. #ifdef CCISS_DEBUG
  2321. print_cfg_table(c->cfgtable);
  2322. #endif /* CCISS_DEBUG */
  2323. if (!(readl(&(c->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
  2324. {
  2325. printk(KERN_WARNING "cciss: unable to get board into"
  2326. " simple mode\n");
  2327. return -1;
  2328. }
  2329. return 0;
  2330. }
  2331. /*
  2332. * Gets information about the local volumes attached to the controller.
  2333. */
  2334. static void cciss_getgeometry(int cntl_num)
  2335. {
  2336. ReportLunData_struct *ld_buff;
  2337. ReadCapdata_struct *size_buff;
  2338. InquiryData_struct *inq_buff;
  2339. int return_code;
  2340. int i;
  2341. int listlength = 0;
  2342. __u32 lunid = 0;
  2343. int block_size;
  2344. int total_size;
  2345. ld_buff = kmalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
  2346. if (ld_buff == NULL)
  2347. {
  2348. printk(KERN_ERR "cciss: out of memory\n");
  2349. return;
  2350. }
  2351. memset(ld_buff, 0, sizeof(ReportLunData_struct));
  2352. size_buff = kmalloc(sizeof( ReadCapdata_struct), GFP_KERNEL);
  2353. if (size_buff == NULL)
  2354. {
  2355. printk(KERN_ERR "cciss: out of memory\n");
  2356. kfree(ld_buff);
  2357. return;
  2358. }
  2359. inq_buff = kmalloc(sizeof( InquiryData_struct), GFP_KERNEL);
  2360. if (inq_buff == NULL)
  2361. {
  2362. printk(KERN_ERR "cciss: out of memory\n");
  2363. kfree(ld_buff);
  2364. kfree(size_buff);
  2365. return;
  2366. }
  2367. /* Get the firmware version */
  2368. return_code = sendcmd(CISS_INQUIRY, cntl_num, inq_buff,
  2369. sizeof(InquiryData_struct), 0, 0 ,0, NULL, TYPE_CMD);
  2370. if (return_code == IO_OK)
  2371. {
  2372. hba[cntl_num]->firm_ver[0] = inq_buff->data_byte[32];
  2373. hba[cntl_num]->firm_ver[1] = inq_buff->data_byte[33];
  2374. hba[cntl_num]->firm_ver[2] = inq_buff->data_byte[34];
  2375. hba[cntl_num]->firm_ver[3] = inq_buff->data_byte[35];
  2376. } else /* send command failed */
  2377. {
  2378. printk(KERN_WARNING "cciss: unable to determine firmware"
  2379. " version of controller\n");
  2380. }
  2381. /* Get the number of logical volumes */
  2382. return_code = sendcmd(CISS_REPORT_LOG, cntl_num, ld_buff,
  2383. sizeof(ReportLunData_struct), 0, 0, 0, NULL, TYPE_CMD);
  2384. if( return_code == IO_OK)
  2385. {
  2386. #ifdef CCISS_DEBUG
  2387. printk("LUN Data\n--------------------------\n");
  2388. #endif /* CCISS_DEBUG */
  2389. listlength |= (0xff & (unsigned int)(ld_buff->LUNListLength[0])) << 24;
  2390. listlength |= (0xff & (unsigned int)(ld_buff->LUNListLength[1])) << 16;
  2391. listlength |= (0xff & (unsigned int)(ld_buff->LUNListLength[2])) << 8;
  2392. listlength |= 0xff & (unsigned int)(ld_buff->LUNListLength[3]);
  2393. } else /* reading number of logical volumes failed */
  2394. {
  2395. printk(KERN_WARNING "cciss: report logical volume"
  2396. " command failed\n");
  2397. listlength = 0;
  2398. }
  2399. hba[cntl_num]->num_luns = listlength / 8; // 8 bytes pre entry
  2400. if (hba[cntl_num]->num_luns > CISS_MAX_LUN)
  2401. {
  2402. printk(KERN_ERR "ciss: only %d number of logical volumes supported\n",
  2403. CISS_MAX_LUN);
  2404. hba[cntl_num]->num_luns = CISS_MAX_LUN;
  2405. }
  2406. #ifdef CCISS_DEBUG
  2407. printk(KERN_DEBUG "Length = %x %x %x %x = %d\n", ld_buff->LUNListLength[0],
  2408. ld_buff->LUNListLength[1], ld_buff->LUNListLength[2],
  2409. ld_buff->LUNListLength[3], hba[cntl_num]->num_luns);
  2410. #endif /* CCISS_DEBUG */
  2411. hba[cntl_num]->highest_lun = hba[cntl_num]->num_luns-1;
  2412. for(i=0; i< hba[cntl_num]->num_luns; i++)
  2413. {
  2414. lunid = (0xff & (unsigned int)(ld_buff->LUN[i][3])) << 24;
  2415. lunid |= (0xff & (unsigned int)(ld_buff->LUN[i][2])) << 16;
  2416. lunid |= (0xff & (unsigned int)(ld_buff->LUN[i][1])) << 8;
  2417. lunid |= 0xff & (unsigned int)(ld_buff->LUN[i][0]);
  2418. hba[cntl_num]->drv[i].LunID = lunid;
  2419. #ifdef CCISS_DEBUG
  2420. printk(KERN_DEBUG "LUN[%d]: %x %x %x %x = %x\n", i,
  2421. ld_buff->LUN[i][0], ld_buff->LUN[i][1],ld_buff->LUN[i][2],
  2422. ld_buff->LUN[i][3], hba[cntl_num]->drv[i].LunID);
  2423. #endif /* CCISS_DEBUG */
  2424. cciss_read_capacity(cntl_num, i, size_buff, 0,
  2425. &total_size, &block_size);
  2426. cciss_geometry_inquiry(cntl_num, i, 0, total_size, block_size,
  2427. inq_buff, &hba[cntl_num]->drv[i]);
  2428. }
  2429. kfree(ld_buff);
  2430. kfree(size_buff);
  2431. kfree(inq_buff);
  2432. }
  2433. /* Function to find the first free pointer into our hba[] array */
  2434. /* Returns -1 if no free entries are left. */
  2435. static int alloc_cciss_hba(void)
  2436. {
  2437. struct gendisk *disk[NWD];
  2438. int i, n;
  2439. for (n = 0; n < NWD; n++) {
  2440. disk[n] = alloc_disk(1 << NWD_SHIFT);
  2441. if (!disk[n])
  2442. goto out;
  2443. }
  2444. for(i=0; i< MAX_CTLR; i++) {
  2445. if (!hba[i]) {
  2446. ctlr_info_t *p;
  2447. p = kmalloc(sizeof(ctlr_info_t), GFP_KERNEL);
  2448. if (!p)
  2449. goto Enomem;
  2450. memset(p, 0, sizeof(ctlr_info_t));
  2451. for (n = 0; n < NWD; n++)
  2452. p->gendisk[n] = disk[n];
  2453. hba[i] = p;
  2454. return i;
  2455. }
  2456. }
  2457. printk(KERN_WARNING "cciss: This driver supports a maximum"
  2458. " of %d controllers.\n", MAX_CTLR);
  2459. goto out;
  2460. Enomem:
  2461. printk(KERN_ERR "cciss: out of memory.\n");
  2462. out:
  2463. while (n--)
  2464. put_disk(disk[n]);
  2465. return -1;
  2466. }
  2467. static void free_hba(int i)
  2468. {
  2469. ctlr_info_t *p = hba[i];
  2470. int n;
  2471. hba[i] = NULL;
  2472. for (n = 0; n < NWD; n++)
  2473. put_disk(p->gendisk[n]);
  2474. kfree(p);
  2475. }
  2476. /*
  2477. * This is it. Find all the controllers and register them. I really hate
  2478. * stealing all these major device numbers.
  2479. * returns the number of block devices registered.
  2480. */
  2481. static int __devinit cciss_init_one(struct pci_dev *pdev,
  2482. const struct pci_device_id *ent)
  2483. {
  2484. request_queue_t *q;
  2485. int i;
  2486. int j;
  2487. int rc;
  2488. printk(KERN_DEBUG "cciss: Device 0x%x has been found at"
  2489. " bus %d dev %d func %d\n",
  2490. pdev->device, pdev->bus->number, PCI_SLOT(pdev->devfn),
  2491. PCI_FUNC(pdev->devfn));
  2492. i = alloc_cciss_hba();
  2493. if(i < 0)
  2494. return (-1);
  2495. if (cciss_pci_init(hba[i], pdev) != 0)
  2496. goto clean1;
  2497. sprintf(hba[i]->devname, "cciss%d", i);
  2498. hba[i]->ctlr = i;
  2499. hba[i]->pdev = pdev;
  2500. /* configure PCI DMA stuff */
  2501. if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK))
  2502. printk("cciss: using DAC cycles\n");
  2503. else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
  2504. printk("cciss: not using DAC cycles\n");
  2505. else {
  2506. printk("cciss: no suitable DMA available\n");
  2507. goto clean1;
  2508. }
  2509. /*
  2510. * register with the major number, or get a dynamic major number
  2511. * by passing 0 as argument. This is done for greater than
  2512. * 8 controller support.
  2513. */
  2514. if (i < MAX_CTLR_ORIG)
  2515. hba[i]->major = MAJOR_NR + i;
  2516. rc = register_blkdev(hba[i]->major, hba[i]->devname);
  2517. if(rc == -EBUSY || rc == -EINVAL) {
  2518. printk(KERN_ERR
  2519. "cciss: Unable to get major number %d for %s "
  2520. "on hba %d\n", hba[i]->major, hba[i]->devname, i);
  2521. goto clean1;
  2522. }
  2523. else {
  2524. if (i >= MAX_CTLR_ORIG)
  2525. hba[i]->major = rc;
  2526. }
  2527. /* make sure the board interrupts are off */
  2528. hba[i]->access.set_intr_mask(hba[i], CCISS_INTR_OFF);
  2529. if( request_irq(hba[i]->intr, do_cciss_intr,
  2530. SA_INTERRUPT | SA_SHIRQ | SA_SAMPLE_RANDOM,
  2531. hba[i]->devname, hba[i])) {
  2532. printk(KERN_ERR "cciss: Unable to get irq %d for %s\n",
  2533. hba[i]->intr, hba[i]->devname);
  2534. goto clean2;
  2535. }
  2536. hba[i]->cmd_pool_bits = kmalloc(((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long), GFP_KERNEL);
  2537. hba[i]->cmd_pool = (CommandList_struct *)pci_alloc_consistent(
  2538. hba[i]->pdev, NR_CMDS * sizeof(CommandList_struct),
  2539. &(hba[i]->cmd_pool_dhandle));
  2540. hba[i]->errinfo_pool = (ErrorInfo_struct *)pci_alloc_consistent(
  2541. hba[i]->pdev, NR_CMDS * sizeof( ErrorInfo_struct),
  2542. &(hba[i]->errinfo_pool_dhandle));
  2543. if((hba[i]->cmd_pool_bits == NULL)
  2544. || (hba[i]->cmd_pool == NULL)
  2545. || (hba[i]->errinfo_pool == NULL)) {
  2546. printk( KERN_ERR "cciss: out of memory");
  2547. goto clean4;
  2548. }
  2549. spin_lock_init(&hba[i]->lock);
  2550. q = blk_init_queue(do_cciss_request, &hba[i]->lock);
  2551. if (!q)
  2552. goto clean4;
  2553. q->backing_dev_info.ra_pages = READ_AHEAD;
  2554. hba[i]->queue = q;
  2555. q->queuedata = hba[i];
  2556. /* Initialize the pdev driver private data.
  2557. have it point to hba[i]. */
  2558. pci_set_drvdata(pdev, hba[i]);
  2559. /* command and error info recs zeroed out before
  2560. they are used */
  2561. memset(hba[i]->cmd_pool_bits, 0, ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long));
  2562. #ifdef CCISS_DEBUG
  2563. printk(KERN_DEBUG "Scanning for drives on controller cciss%d\n",i);
  2564. #endif /* CCISS_DEBUG */
  2565. cciss_getgeometry(i);
  2566. cciss_scsi_setup(i);
  2567. /* Turn the interrupts on so we can service requests */
  2568. hba[i]->access.set_intr_mask(hba[i], CCISS_INTR_ON);
  2569. cciss_procinit(i);
  2570. blk_queue_bounce_limit(q, hba[i]->pdev->dma_mask);
  2571. /* This is a hardware imposed limit. */
  2572. blk_queue_max_hw_segments(q, MAXSGENTRIES);
  2573. /* This is a limit in the driver and could be eliminated. */
  2574. blk_queue_max_phys_segments(q, MAXSGENTRIES);
  2575. blk_queue_max_sectors(q, 512);
  2576. for(j=0; j<NWD; j++) {
  2577. drive_info_struct *drv = &(hba[i]->drv[j]);
  2578. struct gendisk *disk = hba[i]->gendisk[j];
  2579. sprintf(disk->disk_name, "cciss/c%dd%d", i, j);
  2580. sprintf(disk->devfs_name, "cciss/host%d/target%d", i, j);
  2581. disk->major = hba[i]->major;
  2582. disk->first_minor = j << NWD_SHIFT;
  2583. disk->fops = &cciss_fops;
  2584. disk->queue = hba[i]->queue;
  2585. disk->private_data = drv;
  2586. /* we must register the controller even if no disks exist */
  2587. /* this is for the online array utilities */
  2588. if(!drv->heads && j)
  2589. continue;
  2590. blk_queue_hardsect_size(hba[i]->queue, drv->block_size);
  2591. set_capacity(disk, drv->nr_blocks);
  2592. add_disk(disk);
  2593. }
  2594. return(1);
  2595. clean4:
  2596. if(hba[i]->cmd_pool_bits)
  2597. kfree(hba[i]->cmd_pool_bits);
  2598. if(hba[i]->cmd_pool)
  2599. pci_free_consistent(hba[i]->pdev,
  2600. NR_CMDS * sizeof(CommandList_struct),
  2601. hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
  2602. if(hba[i]->errinfo_pool)
  2603. pci_free_consistent(hba[i]->pdev,
  2604. NR_CMDS * sizeof( ErrorInfo_struct),
  2605. hba[i]->errinfo_pool,
  2606. hba[i]->errinfo_pool_dhandle);
  2607. free_irq(hba[i]->intr, hba[i]);
  2608. clean2:
  2609. unregister_blkdev(hba[i]->major, hba[i]->devname);
  2610. clean1:
  2611. release_io_mem(hba[i]);
  2612. free_hba(i);
  2613. return(-1);
  2614. }
  2615. static void __devexit cciss_remove_one (struct pci_dev *pdev)
  2616. {
  2617. ctlr_info_t *tmp_ptr;
  2618. int i, j;
  2619. char flush_buf[4];
  2620. int return_code;
  2621. if (pci_get_drvdata(pdev) == NULL)
  2622. {
  2623. printk( KERN_ERR "cciss: Unable to remove device \n");
  2624. return;
  2625. }
  2626. tmp_ptr = pci_get_drvdata(pdev);
  2627. i = tmp_ptr->ctlr;
  2628. if (hba[i] == NULL)
  2629. {
  2630. printk(KERN_ERR "cciss: device appears to "
  2631. "already be removed \n");
  2632. return;
  2633. }
  2634. /* Turn board interrupts off and send the flush cache command */
  2635. /* sendcmd will turn off interrupt, and send the flush...
  2636. * To write all data in the battery backed cache to disks */
  2637. memset(flush_buf, 0, 4);
  2638. return_code = sendcmd(CCISS_CACHE_FLUSH, i, flush_buf, 4, 0, 0, 0, NULL,
  2639. TYPE_CMD);
  2640. if(return_code != IO_OK)
  2641. {
  2642. printk(KERN_WARNING "Error Flushing cache on controller %d\n",
  2643. i);
  2644. }
  2645. free_irq(hba[i]->intr, hba[i]);
  2646. pci_set_drvdata(pdev, NULL);
  2647. iounmap(hba[i]->vaddr);
  2648. cciss_unregister_scsi(i); /* unhook from SCSI subsystem */
  2649. unregister_blkdev(hba[i]->major, hba[i]->devname);
  2650. remove_proc_entry(hba[i]->devname, proc_cciss);
  2651. /* remove it from the disk list */
  2652. for (j = 0; j < NWD; j++) {
  2653. struct gendisk *disk = hba[i]->gendisk[j];
  2654. if (disk->flags & GENHD_FL_UP)
  2655. del_gendisk(disk);
  2656. }
  2657. blk_cleanup_queue(hba[i]->queue);
  2658. pci_free_consistent(hba[i]->pdev, NR_CMDS * sizeof(CommandList_struct),
  2659. hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
  2660. pci_free_consistent(hba[i]->pdev, NR_CMDS * sizeof( ErrorInfo_struct),
  2661. hba[i]->errinfo_pool, hba[i]->errinfo_pool_dhandle);
  2662. kfree(hba[i]->cmd_pool_bits);
  2663. release_io_mem(hba[i]);
  2664. free_hba(i);
  2665. }
  2666. static struct pci_driver cciss_pci_driver = {
  2667. .name = "cciss",
  2668. .probe = cciss_init_one,
  2669. .remove = __devexit_p(cciss_remove_one),
  2670. .id_table = cciss_pci_device_id, /* id_table */
  2671. };
  2672. /*
  2673. * This is it. Register the PCI driver information for the cards we control
  2674. * the OS will call our registered routines when it finds one of our cards.
  2675. */
  2676. static int __init cciss_init(void)
  2677. {
  2678. printk(KERN_INFO DRIVER_NAME "\n");
  2679. /* Register for our PCI devices */
  2680. return pci_module_init(&cciss_pci_driver);
  2681. }
  2682. static void __exit cciss_cleanup(void)
  2683. {
  2684. int i;
  2685. pci_unregister_driver(&cciss_pci_driver);
  2686. /* double check that all controller entrys have been removed */
  2687. for (i=0; i< MAX_CTLR; i++)
  2688. {
  2689. if (hba[i] != NULL)
  2690. {
  2691. printk(KERN_WARNING "cciss: had to remove"
  2692. " controller %d\n", i);
  2693. cciss_remove_one(hba[i]->pdev);
  2694. }
  2695. }
  2696. remove_proc_entry("cciss", proc_root_driver);
  2697. }
  2698. module_init(cciss_init);
  2699. module_exit(cciss_cleanup);