sata_nv.c 16 KB

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  1. /*
  2. * sata_nv.c - NVIDIA nForce SATA
  3. *
  4. * Copyright 2004 NVIDIA Corp. All rights reserved.
  5. * Copyright 2004 Andrew Chew
  6. *
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2, or (at your option)
  11. * any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; see the file COPYING. If not, write to
  20. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. *
  23. * libata documentation is available via 'make {ps|pdf}docs',
  24. * as Documentation/DocBook/libata.*
  25. *
  26. * No hardware documentation available outside of NVIDIA.
  27. * This driver programs the NVIDIA SATA controller in a similar
  28. * fashion as with other PCI IDE BMDMA controllers, with a few
  29. * NV-specific details such as register offsets, SATA phy location,
  30. * hotplug info, etc.
  31. *
  32. *
  33. * 0.06
  34. * - Added generic SATA support by using a pci_device_id that filters on
  35. * the IDE storage class code.
  36. *
  37. * 0.03
  38. * - Fixed a bug where the hotplug handlers for non-CK804/MCP04 were using
  39. * mmio_base, which is only set for the CK804/MCP04 case.
  40. *
  41. * 0.02
  42. * - Added support for CK804 SATA controller.
  43. *
  44. * 0.01
  45. * - Initial revision.
  46. */
  47. #include <linux/config.h>
  48. #include <linux/kernel.h>
  49. #include <linux/module.h>
  50. #include <linux/pci.h>
  51. #include <linux/init.h>
  52. #include <linux/blkdev.h>
  53. #include <linux/delay.h>
  54. #include <linux/interrupt.h>
  55. #include "scsi.h"
  56. #include <scsi/scsi_host.h>
  57. #include <linux/libata.h>
  58. #define DRV_NAME "sata_nv"
  59. #define DRV_VERSION "0.6"
  60. #define NV_PORTS 2
  61. #define NV_PIO_MASK 0x1f
  62. #define NV_MWDMA_MASK 0x07
  63. #define NV_UDMA_MASK 0x7f
  64. #define NV_PORT0_SCR_REG_OFFSET 0x00
  65. #define NV_PORT1_SCR_REG_OFFSET 0x40
  66. #define NV_INT_STATUS 0x10
  67. #define NV_INT_STATUS_CK804 0x440
  68. #define NV_INT_STATUS_PDEV_INT 0x01
  69. #define NV_INT_STATUS_PDEV_PM 0x02
  70. #define NV_INT_STATUS_PDEV_ADDED 0x04
  71. #define NV_INT_STATUS_PDEV_REMOVED 0x08
  72. #define NV_INT_STATUS_SDEV_INT 0x10
  73. #define NV_INT_STATUS_SDEV_PM 0x20
  74. #define NV_INT_STATUS_SDEV_ADDED 0x40
  75. #define NV_INT_STATUS_SDEV_REMOVED 0x80
  76. #define NV_INT_STATUS_PDEV_HOTPLUG (NV_INT_STATUS_PDEV_ADDED | \
  77. NV_INT_STATUS_PDEV_REMOVED)
  78. #define NV_INT_STATUS_SDEV_HOTPLUG (NV_INT_STATUS_SDEV_ADDED | \
  79. NV_INT_STATUS_SDEV_REMOVED)
  80. #define NV_INT_STATUS_HOTPLUG (NV_INT_STATUS_PDEV_HOTPLUG | \
  81. NV_INT_STATUS_SDEV_HOTPLUG)
  82. #define NV_INT_ENABLE 0x11
  83. #define NV_INT_ENABLE_CK804 0x441
  84. #define NV_INT_ENABLE_PDEV_MASK 0x01
  85. #define NV_INT_ENABLE_PDEV_PM 0x02
  86. #define NV_INT_ENABLE_PDEV_ADDED 0x04
  87. #define NV_INT_ENABLE_PDEV_REMOVED 0x08
  88. #define NV_INT_ENABLE_SDEV_MASK 0x10
  89. #define NV_INT_ENABLE_SDEV_PM 0x20
  90. #define NV_INT_ENABLE_SDEV_ADDED 0x40
  91. #define NV_INT_ENABLE_SDEV_REMOVED 0x80
  92. #define NV_INT_ENABLE_PDEV_HOTPLUG (NV_INT_ENABLE_PDEV_ADDED | \
  93. NV_INT_ENABLE_PDEV_REMOVED)
  94. #define NV_INT_ENABLE_SDEV_HOTPLUG (NV_INT_ENABLE_SDEV_ADDED | \
  95. NV_INT_ENABLE_SDEV_REMOVED)
  96. #define NV_INT_ENABLE_HOTPLUG (NV_INT_ENABLE_PDEV_HOTPLUG | \
  97. NV_INT_ENABLE_SDEV_HOTPLUG)
  98. #define NV_INT_CONFIG 0x12
  99. #define NV_INT_CONFIG_METHD 0x01 // 0 = INT, 1 = SMI
  100. // For PCI config register 20
  101. #define NV_MCP_SATA_CFG_20 0x50
  102. #define NV_MCP_SATA_CFG_20_SATA_SPACE_EN 0x04
  103. static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
  104. static irqreturn_t nv_interrupt (int irq, void *dev_instance,
  105. struct pt_regs *regs);
  106. static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg);
  107. static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
  108. static void nv_host_stop (struct ata_host_set *host_set);
  109. static void nv_enable_hotplug(struct ata_probe_ent *probe_ent);
  110. static void nv_disable_hotplug(struct ata_host_set *host_set);
  111. static void nv_check_hotplug(struct ata_host_set *host_set);
  112. static void nv_enable_hotplug_ck804(struct ata_probe_ent *probe_ent);
  113. static void nv_disable_hotplug_ck804(struct ata_host_set *host_set);
  114. static void nv_check_hotplug_ck804(struct ata_host_set *host_set);
  115. enum nv_host_type
  116. {
  117. GENERIC,
  118. NFORCE2,
  119. NFORCE3,
  120. CK804
  121. };
  122. static struct pci_device_id nv_pci_tbl[] = {
  123. { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA,
  124. PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE2 },
  125. { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA,
  126. PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE3 },
  127. { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2,
  128. PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE3 },
  129. { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA,
  130. PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
  131. { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2,
  132. PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
  133. { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA,
  134. PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
  135. { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2,
  136. PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
  137. { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
  138. PCI_ANY_ID, PCI_ANY_ID,
  139. PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC },
  140. { 0, } /* terminate list */
  141. };
  142. #define NV_HOST_FLAGS_SCR_MMIO 0x00000001
  143. struct nv_host_desc
  144. {
  145. enum nv_host_type host_type;
  146. void (*enable_hotplug)(struct ata_probe_ent *probe_ent);
  147. void (*disable_hotplug)(struct ata_host_set *host_set);
  148. void (*check_hotplug)(struct ata_host_set *host_set);
  149. };
  150. static struct nv_host_desc nv_device_tbl[] = {
  151. {
  152. .host_type = GENERIC,
  153. .enable_hotplug = NULL,
  154. .disable_hotplug= NULL,
  155. .check_hotplug = NULL,
  156. },
  157. {
  158. .host_type = NFORCE2,
  159. .enable_hotplug = nv_enable_hotplug,
  160. .disable_hotplug= nv_disable_hotplug,
  161. .check_hotplug = nv_check_hotplug,
  162. },
  163. {
  164. .host_type = NFORCE3,
  165. .enable_hotplug = nv_enable_hotplug,
  166. .disable_hotplug= nv_disable_hotplug,
  167. .check_hotplug = nv_check_hotplug,
  168. },
  169. { .host_type = CK804,
  170. .enable_hotplug = nv_enable_hotplug_ck804,
  171. .disable_hotplug= nv_disable_hotplug_ck804,
  172. .check_hotplug = nv_check_hotplug_ck804,
  173. },
  174. };
  175. struct nv_host
  176. {
  177. struct nv_host_desc *host_desc;
  178. unsigned long host_flags;
  179. };
  180. static struct pci_driver nv_pci_driver = {
  181. .name = DRV_NAME,
  182. .id_table = nv_pci_tbl,
  183. .probe = nv_init_one,
  184. .remove = ata_pci_remove_one,
  185. };
  186. static Scsi_Host_Template nv_sht = {
  187. .module = THIS_MODULE,
  188. .name = DRV_NAME,
  189. .ioctl = ata_scsi_ioctl,
  190. .queuecommand = ata_scsi_queuecmd,
  191. .eh_strategy_handler = ata_scsi_error,
  192. .can_queue = ATA_DEF_QUEUE,
  193. .this_id = ATA_SHT_THIS_ID,
  194. .sg_tablesize = LIBATA_MAX_PRD,
  195. .max_sectors = ATA_MAX_SECTORS,
  196. .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
  197. .emulated = ATA_SHT_EMULATED,
  198. .use_clustering = ATA_SHT_USE_CLUSTERING,
  199. .proc_name = DRV_NAME,
  200. .dma_boundary = ATA_DMA_BOUNDARY,
  201. .slave_configure = ata_scsi_slave_config,
  202. .bios_param = ata_std_bios_param,
  203. .ordered_flush = 1,
  204. };
  205. static struct ata_port_operations nv_ops = {
  206. .port_disable = ata_port_disable,
  207. .tf_load = ata_tf_load,
  208. .tf_read = ata_tf_read,
  209. .exec_command = ata_exec_command,
  210. .check_status = ata_check_status,
  211. .dev_select = ata_std_dev_select,
  212. .phy_reset = sata_phy_reset,
  213. .bmdma_setup = ata_bmdma_setup,
  214. .bmdma_start = ata_bmdma_start,
  215. .bmdma_stop = ata_bmdma_stop,
  216. .bmdma_status = ata_bmdma_status,
  217. .qc_prep = ata_qc_prep,
  218. .qc_issue = ata_qc_issue_prot,
  219. .eng_timeout = ata_eng_timeout,
  220. .irq_handler = nv_interrupt,
  221. .irq_clear = ata_bmdma_irq_clear,
  222. .scr_read = nv_scr_read,
  223. .scr_write = nv_scr_write,
  224. .port_start = ata_port_start,
  225. .port_stop = ata_port_stop,
  226. .host_stop = nv_host_stop,
  227. };
  228. /* FIXME: The hardware provides the necessary SATA PHY controls
  229. * to support ATA_FLAG_SATA_RESET. However, it is currently
  230. * necessary to disable that flag, to solve misdetection problems.
  231. * See http://bugme.osdl.org/show_bug.cgi?id=3352 for more info.
  232. *
  233. * This problem really needs to be investigated further. But in the
  234. * meantime, we avoid ATA_FLAG_SATA_RESET to get people working.
  235. */
  236. static struct ata_port_info nv_port_info = {
  237. .sht = &nv_sht,
  238. .host_flags = ATA_FLAG_SATA |
  239. /* ATA_FLAG_SATA_RESET | */
  240. ATA_FLAG_SRST |
  241. ATA_FLAG_NO_LEGACY,
  242. .pio_mask = NV_PIO_MASK,
  243. .mwdma_mask = NV_MWDMA_MASK,
  244. .udma_mask = NV_UDMA_MASK,
  245. .port_ops = &nv_ops,
  246. };
  247. MODULE_AUTHOR("NVIDIA");
  248. MODULE_DESCRIPTION("low-level driver for NVIDIA nForce SATA controller");
  249. MODULE_LICENSE("GPL");
  250. MODULE_DEVICE_TABLE(pci, nv_pci_tbl);
  251. MODULE_VERSION(DRV_VERSION);
  252. static irqreturn_t nv_interrupt (int irq, void *dev_instance,
  253. struct pt_regs *regs)
  254. {
  255. struct ata_host_set *host_set = dev_instance;
  256. struct nv_host *host = host_set->private_data;
  257. unsigned int i;
  258. unsigned int handled = 0;
  259. unsigned long flags;
  260. spin_lock_irqsave(&host_set->lock, flags);
  261. for (i = 0; i < host_set->n_ports; i++) {
  262. struct ata_port *ap;
  263. ap = host_set->ports[i];
  264. if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) {
  265. struct ata_queued_cmd *qc;
  266. qc = ata_qc_from_tag(ap, ap->active_tag);
  267. if (qc && (!(qc->tf.ctl & ATA_NIEN)))
  268. handled += ata_host_intr(ap, qc);
  269. }
  270. }
  271. if (host->host_desc->check_hotplug)
  272. host->host_desc->check_hotplug(host_set);
  273. spin_unlock_irqrestore(&host_set->lock, flags);
  274. return IRQ_RETVAL(handled);
  275. }
  276. static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg)
  277. {
  278. struct ata_host_set *host_set = ap->host_set;
  279. struct nv_host *host = host_set->private_data;
  280. if (sc_reg > SCR_CONTROL)
  281. return 0xffffffffU;
  282. if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
  283. return readl((void*)ap->ioaddr.scr_addr + (sc_reg * 4));
  284. else
  285. return inl(ap->ioaddr.scr_addr + (sc_reg * 4));
  286. }
  287. static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
  288. {
  289. struct ata_host_set *host_set = ap->host_set;
  290. struct nv_host *host = host_set->private_data;
  291. if (sc_reg > SCR_CONTROL)
  292. return;
  293. if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
  294. writel(val, (void*)ap->ioaddr.scr_addr + (sc_reg * 4));
  295. else
  296. outl(val, ap->ioaddr.scr_addr + (sc_reg * 4));
  297. }
  298. static void nv_host_stop (struct ata_host_set *host_set)
  299. {
  300. struct nv_host *host = host_set->private_data;
  301. // Disable hotplug event interrupts.
  302. if (host->host_desc->disable_hotplug)
  303. host->host_desc->disable_hotplug(host_set);
  304. kfree(host);
  305. ata_host_stop(host_set);
  306. }
  307. static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
  308. {
  309. static int printed_version = 0;
  310. struct nv_host *host;
  311. struct ata_port_info *ppi;
  312. struct ata_probe_ent *probe_ent;
  313. int pci_dev_busy = 0;
  314. int rc;
  315. u32 bar;
  316. // Make sure this is a SATA controller by counting the number of bars
  317. // (NVIDIA SATA controllers will always have six bars). Otherwise,
  318. // it's an IDE controller and we ignore it.
  319. for (bar=0; bar<6; bar++)
  320. if (pci_resource_start(pdev, bar) == 0)
  321. return -ENODEV;
  322. if (!printed_version++)
  323. printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
  324. rc = pci_enable_device(pdev);
  325. if (rc)
  326. goto err_out;
  327. rc = pci_request_regions(pdev, DRV_NAME);
  328. if (rc) {
  329. pci_dev_busy = 1;
  330. goto err_out_disable;
  331. }
  332. rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
  333. if (rc)
  334. goto err_out_regions;
  335. rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
  336. if (rc)
  337. goto err_out_regions;
  338. rc = -ENOMEM;
  339. ppi = &nv_port_info;
  340. probe_ent = ata_pci_init_native_mode(pdev, &ppi);
  341. if (!probe_ent)
  342. goto err_out_regions;
  343. host = kmalloc(sizeof(struct nv_host), GFP_KERNEL);
  344. if (!host)
  345. goto err_out_free_ent;
  346. memset(host, 0, sizeof(struct nv_host));
  347. host->host_desc = &nv_device_tbl[ent->driver_data];
  348. probe_ent->private_data = host;
  349. if (pci_resource_flags(pdev, 5) & IORESOURCE_MEM)
  350. host->host_flags |= NV_HOST_FLAGS_SCR_MMIO;
  351. if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO) {
  352. unsigned long base;
  353. probe_ent->mmio_base = ioremap(pci_resource_start(pdev, 5),
  354. pci_resource_len(pdev, 5));
  355. if (probe_ent->mmio_base == NULL) {
  356. rc = -EIO;
  357. goto err_out_free_host;
  358. }
  359. base = (unsigned long)probe_ent->mmio_base;
  360. probe_ent->port[0].scr_addr =
  361. base + NV_PORT0_SCR_REG_OFFSET;
  362. probe_ent->port[1].scr_addr =
  363. base + NV_PORT1_SCR_REG_OFFSET;
  364. } else {
  365. probe_ent->port[0].scr_addr =
  366. pci_resource_start(pdev, 5) | NV_PORT0_SCR_REG_OFFSET;
  367. probe_ent->port[1].scr_addr =
  368. pci_resource_start(pdev, 5) | NV_PORT1_SCR_REG_OFFSET;
  369. }
  370. pci_set_master(pdev);
  371. rc = ata_device_add(probe_ent);
  372. if (rc != NV_PORTS)
  373. goto err_out_iounmap;
  374. // Enable hotplug event interrupts.
  375. if (host->host_desc->enable_hotplug)
  376. host->host_desc->enable_hotplug(probe_ent);
  377. kfree(probe_ent);
  378. return 0;
  379. err_out_iounmap:
  380. if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
  381. iounmap(probe_ent->mmio_base);
  382. err_out_free_host:
  383. kfree(host);
  384. err_out_free_ent:
  385. kfree(probe_ent);
  386. err_out_regions:
  387. pci_release_regions(pdev);
  388. err_out_disable:
  389. if (!pci_dev_busy)
  390. pci_disable_device(pdev);
  391. err_out:
  392. return rc;
  393. }
  394. static void nv_enable_hotplug(struct ata_probe_ent *probe_ent)
  395. {
  396. u8 intr_mask;
  397. outb(NV_INT_STATUS_HOTPLUG,
  398. probe_ent->port[0].scr_addr + NV_INT_STATUS);
  399. intr_mask = inb(probe_ent->port[0].scr_addr + NV_INT_ENABLE);
  400. intr_mask |= NV_INT_ENABLE_HOTPLUG;
  401. outb(intr_mask, probe_ent->port[0].scr_addr + NV_INT_ENABLE);
  402. }
  403. static void nv_disable_hotplug(struct ata_host_set *host_set)
  404. {
  405. u8 intr_mask;
  406. intr_mask = inb(host_set->ports[0]->ioaddr.scr_addr + NV_INT_ENABLE);
  407. intr_mask &= ~(NV_INT_ENABLE_HOTPLUG);
  408. outb(intr_mask, host_set->ports[0]->ioaddr.scr_addr + NV_INT_ENABLE);
  409. }
  410. static void nv_check_hotplug(struct ata_host_set *host_set)
  411. {
  412. u8 intr_status;
  413. intr_status = inb(host_set->ports[0]->ioaddr.scr_addr + NV_INT_STATUS);
  414. // Clear interrupt status.
  415. outb(0xff, host_set->ports[0]->ioaddr.scr_addr + NV_INT_STATUS);
  416. if (intr_status & NV_INT_STATUS_HOTPLUG) {
  417. if (intr_status & NV_INT_STATUS_PDEV_ADDED)
  418. printk(KERN_WARNING "nv_sata: "
  419. "Primary device added\n");
  420. if (intr_status & NV_INT_STATUS_PDEV_REMOVED)
  421. printk(KERN_WARNING "nv_sata: "
  422. "Primary device removed\n");
  423. if (intr_status & NV_INT_STATUS_SDEV_ADDED)
  424. printk(KERN_WARNING "nv_sata: "
  425. "Secondary device added\n");
  426. if (intr_status & NV_INT_STATUS_SDEV_REMOVED)
  427. printk(KERN_WARNING "nv_sata: "
  428. "Secondary device removed\n");
  429. }
  430. }
  431. static void nv_enable_hotplug_ck804(struct ata_probe_ent *probe_ent)
  432. {
  433. struct pci_dev *pdev = to_pci_dev(probe_ent->dev);
  434. u8 intr_mask;
  435. u8 regval;
  436. pci_read_config_byte(pdev, NV_MCP_SATA_CFG_20, &regval);
  437. regval |= NV_MCP_SATA_CFG_20_SATA_SPACE_EN;
  438. pci_write_config_byte(pdev, NV_MCP_SATA_CFG_20, regval);
  439. writeb(NV_INT_STATUS_HOTPLUG, probe_ent->mmio_base + NV_INT_STATUS_CK804);
  440. intr_mask = readb(probe_ent->mmio_base + NV_INT_ENABLE_CK804);
  441. intr_mask |= NV_INT_ENABLE_HOTPLUG;
  442. writeb(intr_mask, probe_ent->mmio_base + NV_INT_ENABLE_CK804);
  443. }
  444. static void nv_disable_hotplug_ck804(struct ata_host_set *host_set)
  445. {
  446. struct pci_dev *pdev = to_pci_dev(host_set->dev);
  447. u8 intr_mask;
  448. u8 regval;
  449. intr_mask = readb(host_set->mmio_base + NV_INT_ENABLE_CK804);
  450. intr_mask &= ~(NV_INT_ENABLE_HOTPLUG);
  451. writeb(intr_mask, host_set->mmio_base + NV_INT_ENABLE_CK804);
  452. pci_read_config_byte(pdev, NV_MCP_SATA_CFG_20, &regval);
  453. regval &= ~NV_MCP_SATA_CFG_20_SATA_SPACE_EN;
  454. pci_write_config_byte(pdev, NV_MCP_SATA_CFG_20, regval);
  455. }
  456. static void nv_check_hotplug_ck804(struct ata_host_set *host_set)
  457. {
  458. u8 intr_status;
  459. intr_status = readb(host_set->mmio_base + NV_INT_STATUS_CK804);
  460. // Clear interrupt status.
  461. writeb(0xff, host_set->mmio_base + NV_INT_STATUS_CK804);
  462. if (intr_status & NV_INT_STATUS_HOTPLUG) {
  463. if (intr_status & NV_INT_STATUS_PDEV_ADDED)
  464. printk(KERN_WARNING "nv_sata: "
  465. "Primary device added\n");
  466. if (intr_status & NV_INT_STATUS_PDEV_REMOVED)
  467. printk(KERN_WARNING "nv_sata: "
  468. "Primary device removed\n");
  469. if (intr_status & NV_INT_STATUS_SDEV_ADDED)
  470. printk(KERN_WARNING "nv_sata: "
  471. "Secondary device added\n");
  472. if (intr_status & NV_INT_STATUS_SDEV_REMOVED)
  473. printk(KERN_WARNING "nv_sata: "
  474. "Secondary device removed\n");
  475. }
  476. }
  477. static int __init nv_init(void)
  478. {
  479. return pci_module_init(&nv_pci_driver);
  480. }
  481. static void __exit nv_exit(void)
  482. {
  483. pci_unregister_driver(&nv_pci_driver);
  484. }
  485. module_init(nv_init);
  486. module_exit(nv_exit);