mpparse.c 25 KB

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  1. /*
  2. * Intel Multiprocessor Specification 1.1 and 1.4
  3. * compliant MP-table parsing routines.
  4. *
  5. * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
  6. * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
  7. * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
  8. */
  9. #include <linux/mm.h>
  10. #include <linux/init.h>
  11. #include <linux/delay.h>
  12. #include <linux/bootmem.h>
  13. #include <linux/kernel_stat.h>
  14. #include <linux/mc146818rtc.h>
  15. #include <linux/bitops.h>
  16. #include <linux/acpi.h>
  17. #include <linux/module.h>
  18. #include <linux/smp.h>
  19. #include <asm/mtrr.h>
  20. #include <asm/mpspec.h>
  21. #include <asm/pgalloc.h>
  22. #include <asm/io_apic.h>
  23. #include <asm/proto.h>
  24. #include <asm/bios_ebda.h>
  25. #include <asm/e820.h>
  26. #include <asm/trampoline.h>
  27. #include <asm/setup.h>
  28. #include <asm/smp.h>
  29. #include <mach_apic.h>
  30. #ifdef CONFIG_X86_32
  31. #include <mach_apicdef.h>
  32. #include <mach_mpparse.h>
  33. #endif
  34. /*
  35. * Checksum an MP configuration block.
  36. */
  37. static int __init mpf_checksum(unsigned char *mp, int len)
  38. {
  39. int sum = 0;
  40. while (len--)
  41. sum += *mp++;
  42. return sum & 0xFF;
  43. }
  44. static void __init MP_processor_info(struct mpc_cpu *m)
  45. {
  46. int apicid;
  47. char *bootup_cpu = "";
  48. if (!(m->cpuflag & CPU_ENABLED)) {
  49. disabled_cpus++;
  50. return;
  51. }
  52. if (x86_quirks->mpc_apic_id)
  53. apicid = x86_quirks->mpc_apic_id(m);
  54. else
  55. apicid = m->apicid;
  56. if (m->cpuflag & CPU_BOOTPROCESSOR) {
  57. bootup_cpu = " (Bootup-CPU)";
  58. boot_cpu_physical_apicid = m->apicid;
  59. }
  60. printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu);
  61. generic_processor_info(apicid, m->apicver);
  62. }
  63. #ifdef CONFIG_X86_IO_APIC
  64. static void __init MP_bus_info(struct mpc_bus *m)
  65. {
  66. char str[7];
  67. memcpy(str, m->bustype, 6);
  68. str[6] = 0;
  69. if (x86_quirks->mpc_oem_bus_info)
  70. x86_quirks->mpc_oem_bus_info(m, str);
  71. else
  72. apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
  73. #if MAX_MP_BUSSES < 256
  74. if (m->busid >= MAX_MP_BUSSES) {
  75. printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
  76. " is too large, max. supported is %d\n",
  77. m->busid, str, MAX_MP_BUSSES - 1);
  78. return;
  79. }
  80. #endif
  81. if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
  82. set_bit(m->busid, mp_bus_not_pci);
  83. #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
  84. mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
  85. #endif
  86. } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
  87. if (x86_quirks->mpc_oem_pci_bus)
  88. x86_quirks->mpc_oem_pci_bus(m);
  89. clear_bit(m->busid, mp_bus_not_pci);
  90. #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
  91. mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
  92. } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
  93. mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
  94. } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
  95. mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
  96. #endif
  97. } else
  98. printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
  99. }
  100. #endif
  101. #ifdef CONFIG_X86_IO_APIC
  102. static int bad_ioapic(unsigned long address)
  103. {
  104. if (nr_ioapics >= MAX_IO_APICS) {
  105. printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
  106. "(found %d)\n", MAX_IO_APICS, nr_ioapics);
  107. panic("Recompile kernel with bigger MAX_IO_APICS!\n");
  108. }
  109. if (!address) {
  110. printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
  111. " found in table, skipping!\n");
  112. return 1;
  113. }
  114. return 0;
  115. }
  116. static void __init MP_ioapic_info(struct mpc_ioapic *m)
  117. {
  118. if (!(m->flags & MPC_APIC_USABLE))
  119. return;
  120. printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
  121. m->apicid, m->apicver, m->apicaddr);
  122. if (bad_ioapic(m->apicaddr))
  123. return;
  124. mp_ioapics[nr_ioapics].apicaddr = m->apicaddr;
  125. mp_ioapics[nr_ioapics].apicid = m->apicid;
  126. mp_ioapics[nr_ioapics].type = m->type;
  127. mp_ioapics[nr_ioapics].apicver = m->apicver;
  128. mp_ioapics[nr_ioapics].flags = m->flags;
  129. nr_ioapics++;
  130. }
  131. static void print_MP_intsrc_info(struct mpc_intsrc *m)
  132. {
  133. apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
  134. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  135. m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
  136. m->srcbusirq, m->dstapic, m->dstirq);
  137. }
  138. static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
  139. {
  140. apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
  141. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  142. mp_irq->irqtype, mp_irq->irqflag & 3,
  143. (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
  144. mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
  145. }
  146. static void __init assign_to_mp_irq(struct mpc_intsrc *m,
  147. struct mpc_intsrc *mp_irq)
  148. {
  149. mp_irq->dstapic = m->dstapic;
  150. mp_irq->type = m->type;
  151. mp_irq->irqtype = m->irqtype;
  152. mp_irq->irqflag = m->irqflag;
  153. mp_irq->srcbus = m->srcbus;
  154. mp_irq->srcbusirq = m->srcbusirq;
  155. mp_irq->dstirq = m->dstirq;
  156. }
  157. static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq,
  158. struct mpc_intsrc *m)
  159. {
  160. m->dstapic = mp_irq->dstapic;
  161. m->type = mp_irq->type;
  162. m->irqtype = mp_irq->irqtype;
  163. m->irqflag = mp_irq->irqflag;
  164. m->srcbus = mp_irq->srcbus;
  165. m->srcbusirq = mp_irq->srcbusirq;
  166. m->dstirq = mp_irq->dstirq;
  167. }
  168. static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq,
  169. struct mpc_intsrc *m)
  170. {
  171. if (mp_irq->dstapic != m->dstapic)
  172. return 1;
  173. if (mp_irq->type != m->type)
  174. return 2;
  175. if (mp_irq->irqtype != m->irqtype)
  176. return 3;
  177. if (mp_irq->irqflag != m->irqflag)
  178. return 4;
  179. if (mp_irq->srcbus != m->srcbus)
  180. return 5;
  181. if (mp_irq->srcbusirq != m->srcbusirq)
  182. return 6;
  183. if (mp_irq->dstirq != m->dstirq)
  184. return 7;
  185. return 0;
  186. }
  187. static void __init MP_intsrc_info(struct mpc_intsrc *m)
  188. {
  189. int i;
  190. print_MP_intsrc_info(m);
  191. for (i = 0; i < mp_irq_entries; i++) {
  192. if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
  193. return;
  194. }
  195. assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
  196. if (++mp_irq_entries == MAX_IRQ_SOURCES)
  197. panic("Max # of irq sources exceeded!!\n");
  198. }
  199. #endif
  200. static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
  201. {
  202. apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
  203. " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
  204. m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
  205. m->srcbusirq, m->destapic, m->destapiclint);
  206. }
  207. /*
  208. * Read/parse the MPC
  209. */
  210. static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
  211. {
  212. if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
  213. printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
  214. mpc->signature[0], mpc->signature[1],
  215. mpc->signature[2], mpc->signature[3]);
  216. return 0;
  217. }
  218. if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
  219. printk(KERN_ERR "MPTABLE: checksum error!\n");
  220. return 0;
  221. }
  222. if (mpc->spec != 0x01 && mpc->spec != 0x04) {
  223. printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
  224. mpc->spec);
  225. return 0;
  226. }
  227. if (!mpc->lapic) {
  228. printk(KERN_ERR "MPTABLE: null local APIC address!\n");
  229. return 0;
  230. }
  231. memcpy(oem, mpc->oem, 8);
  232. oem[8] = 0;
  233. printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
  234. memcpy(str, mpc->productid, 12);
  235. str[12] = 0;
  236. printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
  237. printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
  238. return 1;
  239. }
  240. static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
  241. {
  242. char str[16];
  243. char oem[10];
  244. int count = sizeof(*mpc);
  245. unsigned char *mpt = ((unsigned char *)mpc) + count;
  246. if (!smp_check_mpc(mpc, oem, str))
  247. return 0;
  248. #ifdef CONFIG_X86_32
  249. /*
  250. * need to make sure summit and es7000's mps_oem_check is safe to be
  251. * called early via genericarch 's mps_oem_check
  252. */
  253. if (early) {
  254. #ifdef CONFIG_X86_NUMAQ
  255. numaq_mps_oem_check(mpc, oem, str);
  256. #endif
  257. } else
  258. mps_oem_check(mpc, oem, str);
  259. #endif
  260. /* save the local APIC address, it might be non-default */
  261. if (!acpi_lapic)
  262. mp_lapic_addr = mpc->lapic;
  263. if (early)
  264. return 1;
  265. if (mpc->oemptr && x86_quirks->smp_read_mpc_oem) {
  266. struct mpc_oemtable *oem_table = (void *)(long)mpc->oemptr;
  267. x86_quirks->smp_read_mpc_oem(oem_table, mpc->oemsize);
  268. }
  269. /*
  270. * Now process the configuration blocks.
  271. */
  272. if (x86_quirks->mpc_record)
  273. *x86_quirks->mpc_record = 0;
  274. while (count < mpc->length) {
  275. switch (*mpt) {
  276. case MP_PROCESSOR:
  277. {
  278. struct mpc_cpu *m = (struct mpc_cpu *)mpt;
  279. /* ACPI may have already provided this data */
  280. if (!acpi_lapic)
  281. MP_processor_info(m);
  282. mpt += sizeof(*m);
  283. count += sizeof(*m);
  284. break;
  285. }
  286. case MP_BUS:
  287. {
  288. struct mpc_bus *m = (struct mpc_bus *)mpt;
  289. #ifdef CONFIG_X86_IO_APIC
  290. MP_bus_info(m);
  291. #endif
  292. mpt += sizeof(*m);
  293. count += sizeof(*m);
  294. break;
  295. }
  296. case MP_IOAPIC:
  297. {
  298. #ifdef CONFIG_X86_IO_APIC
  299. struct mpc_ioapic *m = (struct mpc_ioapic *)mpt;
  300. MP_ioapic_info(m);
  301. #endif
  302. mpt += sizeof(struct mpc_ioapic);
  303. count += sizeof(struct mpc_ioapic);
  304. break;
  305. }
  306. case MP_INTSRC:
  307. {
  308. #ifdef CONFIG_X86_IO_APIC
  309. struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
  310. MP_intsrc_info(m);
  311. #endif
  312. mpt += sizeof(struct mpc_intsrc);
  313. count += sizeof(struct mpc_intsrc);
  314. break;
  315. }
  316. case MP_LINTSRC:
  317. {
  318. struct mpc_lintsrc *m =
  319. (struct mpc_lintsrc *)mpt;
  320. MP_lintsrc_info(m);
  321. mpt += sizeof(*m);
  322. count += sizeof(*m);
  323. break;
  324. }
  325. default:
  326. /* wrong mptable */
  327. printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
  328. printk(KERN_ERR "type %x\n", *mpt);
  329. print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
  330. 1, mpc, mpc->length, 1);
  331. count = mpc->length;
  332. break;
  333. }
  334. if (x86_quirks->mpc_record)
  335. (*x86_quirks->mpc_record)++;
  336. }
  337. #ifdef CONFIG_X86_GENERICARCH
  338. generic_bigsmp_probe();
  339. #endif
  340. #ifdef CONFIG_X86_32
  341. setup_apic_routing();
  342. #endif
  343. if (!num_processors)
  344. printk(KERN_ERR "MPTABLE: no processors registered!\n");
  345. return num_processors;
  346. }
  347. #ifdef CONFIG_X86_IO_APIC
  348. static int __init ELCR_trigger(unsigned int irq)
  349. {
  350. unsigned int port;
  351. port = 0x4d0 + (irq >> 3);
  352. return (inb(port) >> (irq & 7)) & 1;
  353. }
  354. static void __init construct_default_ioirq_mptable(int mpc_default_type)
  355. {
  356. struct mpc_intsrc intsrc;
  357. int i;
  358. int ELCR_fallback = 0;
  359. intsrc.type = MP_INTSRC;
  360. intsrc.irqflag = 0; /* conforming */
  361. intsrc.srcbus = 0;
  362. intsrc.dstapic = mp_ioapics[0].apicid;
  363. intsrc.irqtype = mp_INT;
  364. /*
  365. * If true, we have an ISA/PCI system with no IRQ entries
  366. * in the MP table. To prevent the PCI interrupts from being set up
  367. * incorrectly, we try to use the ELCR. The sanity check to see if
  368. * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
  369. * never be level sensitive, so we simply see if the ELCR agrees.
  370. * If it does, we assume it's valid.
  371. */
  372. if (mpc_default_type == 5) {
  373. printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
  374. "falling back to ELCR\n");
  375. if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
  376. ELCR_trigger(13))
  377. printk(KERN_ERR "ELCR contains invalid data... "
  378. "not using ELCR\n");
  379. else {
  380. printk(KERN_INFO
  381. "Using ELCR to identify PCI interrupts\n");
  382. ELCR_fallback = 1;
  383. }
  384. }
  385. for (i = 0; i < 16; i++) {
  386. switch (mpc_default_type) {
  387. case 2:
  388. if (i == 0 || i == 13)
  389. continue; /* IRQ0 & IRQ13 not connected */
  390. /* fall through */
  391. default:
  392. if (i == 2)
  393. continue; /* IRQ2 is never connected */
  394. }
  395. if (ELCR_fallback) {
  396. /*
  397. * If the ELCR indicates a level-sensitive interrupt, we
  398. * copy that information over to the MP table in the
  399. * irqflag field (level sensitive, active high polarity).
  400. */
  401. if (ELCR_trigger(i))
  402. intsrc.irqflag = 13;
  403. else
  404. intsrc.irqflag = 0;
  405. }
  406. intsrc.srcbusirq = i;
  407. intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
  408. MP_intsrc_info(&intsrc);
  409. }
  410. intsrc.irqtype = mp_ExtINT;
  411. intsrc.srcbusirq = 0;
  412. intsrc.dstirq = 0; /* 8259A to INTIN0 */
  413. MP_intsrc_info(&intsrc);
  414. }
  415. static void __init construct_ioapic_table(int mpc_default_type)
  416. {
  417. struct mpc_ioapic ioapic;
  418. struct mpc_bus bus;
  419. bus.type = MP_BUS;
  420. bus.busid = 0;
  421. switch (mpc_default_type) {
  422. default:
  423. printk(KERN_ERR "???\nUnknown standard configuration %d\n",
  424. mpc_default_type);
  425. /* fall through */
  426. case 1:
  427. case 5:
  428. memcpy(bus.bustype, "ISA ", 6);
  429. break;
  430. case 2:
  431. case 6:
  432. case 3:
  433. memcpy(bus.bustype, "EISA ", 6);
  434. break;
  435. case 4:
  436. case 7:
  437. memcpy(bus.bustype, "MCA ", 6);
  438. }
  439. MP_bus_info(&bus);
  440. if (mpc_default_type > 4) {
  441. bus.busid = 1;
  442. memcpy(bus.bustype, "PCI ", 6);
  443. MP_bus_info(&bus);
  444. }
  445. ioapic.type = MP_IOAPIC;
  446. ioapic.apicid = 2;
  447. ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  448. ioapic.flags = MPC_APIC_USABLE;
  449. ioapic.apicaddr = 0xFEC00000;
  450. MP_ioapic_info(&ioapic);
  451. /*
  452. * We set up most of the low 16 IO-APIC pins according to MPS rules.
  453. */
  454. construct_default_ioirq_mptable(mpc_default_type);
  455. }
  456. #else
  457. static inline void __init construct_ioapic_table(int mpc_default_type) { }
  458. #endif
  459. static inline void __init construct_default_ISA_mptable(int mpc_default_type)
  460. {
  461. struct mpc_cpu processor;
  462. struct mpc_lintsrc lintsrc;
  463. int linttypes[2] = { mp_ExtINT, mp_NMI };
  464. int i;
  465. /*
  466. * local APIC has default address
  467. */
  468. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  469. /*
  470. * 2 CPUs, numbered 0 & 1.
  471. */
  472. processor.type = MP_PROCESSOR;
  473. /* Either an integrated APIC or a discrete 82489DX. */
  474. processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  475. processor.cpuflag = CPU_ENABLED;
  476. processor.cpufeature = (boot_cpu_data.x86 << 8) |
  477. (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
  478. processor.featureflag = boot_cpu_data.x86_capability[0];
  479. processor.reserved[0] = 0;
  480. processor.reserved[1] = 0;
  481. for (i = 0; i < 2; i++) {
  482. processor.apicid = i;
  483. MP_processor_info(&processor);
  484. }
  485. construct_ioapic_table(mpc_default_type);
  486. lintsrc.type = MP_LINTSRC;
  487. lintsrc.irqflag = 0; /* conforming */
  488. lintsrc.srcbusid = 0;
  489. lintsrc.srcbusirq = 0;
  490. lintsrc.destapic = MP_APIC_ALL;
  491. for (i = 0; i < 2; i++) {
  492. lintsrc.irqtype = linttypes[i];
  493. lintsrc.destapiclint = i;
  494. MP_lintsrc_info(&lintsrc);
  495. }
  496. }
  497. static struct mpf_intel *mpf_found;
  498. /*
  499. * Scan the memory blocks for an SMP configuration block.
  500. */
  501. static void __init __get_smp_config(unsigned int early)
  502. {
  503. struct mpf_intel *mpf = mpf_found;
  504. if (!mpf)
  505. return;
  506. if (acpi_lapic && early)
  507. return;
  508. /*
  509. * MPS doesn't support hyperthreading, aka only have
  510. * thread 0 apic id in MPS table
  511. */
  512. if (acpi_lapic && acpi_ioapic)
  513. return;
  514. if (x86_quirks->mach_get_smp_config) {
  515. if (x86_quirks->mach_get_smp_config(early))
  516. return;
  517. }
  518. printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
  519. mpf->specification);
  520. #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
  521. if (mpf->feature2 & (1 << 7)) {
  522. printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
  523. pic_mode = 1;
  524. } else {
  525. printk(KERN_INFO " Virtual Wire compatibility mode.\n");
  526. pic_mode = 0;
  527. }
  528. #endif
  529. /*
  530. * Now see if we need to read further.
  531. */
  532. if (mpf->feature1 != 0) {
  533. if (early) {
  534. /*
  535. * local APIC has default address
  536. */
  537. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  538. return;
  539. }
  540. printk(KERN_INFO "Default MP configuration #%d\n",
  541. mpf->feature1);
  542. construct_default_ISA_mptable(mpf->feature1);
  543. } else if (mpf->physptr) {
  544. /*
  545. * Read the physical hardware table. Anything here will
  546. * override the defaults.
  547. */
  548. if (!smp_read_mpc(phys_to_virt(mpf->physptr), early)) {
  549. #ifdef CONFIG_X86_LOCAL_APIC
  550. smp_found_config = 0;
  551. #endif
  552. printk(KERN_ERR
  553. "BIOS bug, MP table errors detected!...\n");
  554. printk(KERN_ERR "... disabling SMP support. "
  555. "(tell your hw vendor)\n");
  556. return;
  557. }
  558. if (early)
  559. return;
  560. #ifdef CONFIG_X86_IO_APIC
  561. /*
  562. * If there are no explicit MP IRQ entries, then we are
  563. * broken. We set up most of the low 16 IO-APIC pins to
  564. * ISA defaults and hope it will work.
  565. */
  566. if (!mp_irq_entries) {
  567. struct mpc_bus bus;
  568. printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
  569. "using default mptable. "
  570. "(tell your hw vendor)\n");
  571. bus.type = MP_BUS;
  572. bus.busid = 0;
  573. memcpy(bus.bustype, "ISA ", 6);
  574. MP_bus_info(&bus);
  575. construct_default_ioirq_mptable(0);
  576. }
  577. #endif
  578. } else
  579. BUG();
  580. if (!early)
  581. printk(KERN_INFO "Processors: %d\n", num_processors);
  582. /*
  583. * Only use the first configuration found.
  584. */
  585. }
  586. void __init early_get_smp_config(void)
  587. {
  588. __get_smp_config(1);
  589. }
  590. void __init get_smp_config(void)
  591. {
  592. __get_smp_config(0);
  593. }
  594. static int __init smp_scan_config(unsigned long base, unsigned long length,
  595. unsigned reserve)
  596. {
  597. unsigned int *bp = phys_to_virt(base);
  598. struct mpf_intel *mpf;
  599. apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
  600. bp, length);
  601. BUILD_BUG_ON(sizeof(*mpf) != 16);
  602. while (length > 0) {
  603. mpf = (struct mpf_intel *)bp;
  604. if ((*bp == SMP_MAGIC_IDENT) &&
  605. (mpf->length == 1) &&
  606. !mpf_checksum((unsigned char *)bp, 16) &&
  607. ((mpf->specification == 1)
  608. || (mpf->specification == 4))) {
  609. #ifdef CONFIG_X86_LOCAL_APIC
  610. smp_found_config = 1;
  611. #endif
  612. mpf_found = mpf;
  613. printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n",
  614. mpf, virt_to_phys(mpf));
  615. if (!reserve)
  616. return 1;
  617. reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE,
  618. BOOTMEM_DEFAULT);
  619. if (mpf->physptr) {
  620. unsigned long size = PAGE_SIZE;
  621. #ifdef CONFIG_X86_32
  622. /*
  623. * We cannot access to MPC table to compute
  624. * table size yet, as only few megabytes from
  625. * the bottom is mapped now.
  626. * PC-9800's MPC table places on the very last
  627. * of physical memory; so that simply reserving
  628. * PAGE_SIZE from mpf->physptr yields BUG()
  629. * in reserve_bootmem.
  630. */
  631. unsigned long end = max_low_pfn * PAGE_SIZE;
  632. if (mpf->physptr + size > end)
  633. size = end - mpf->physptr;
  634. #endif
  635. reserve_bootmem_generic(mpf->physptr, size,
  636. BOOTMEM_DEFAULT);
  637. }
  638. return 1;
  639. }
  640. bp += 4;
  641. length -= 16;
  642. }
  643. return 0;
  644. }
  645. static void __init __find_smp_config(unsigned int reserve)
  646. {
  647. unsigned int address;
  648. if (x86_quirks->mach_find_smp_config) {
  649. if (x86_quirks->mach_find_smp_config(reserve))
  650. return;
  651. }
  652. /*
  653. * FIXME: Linux assumes you have 640K of base ram..
  654. * this continues the error...
  655. *
  656. * 1) Scan the bottom 1K for a signature
  657. * 2) Scan the top 1K of base RAM
  658. * 3) Scan the 64K of bios
  659. */
  660. if (smp_scan_config(0x0, 0x400, reserve) ||
  661. smp_scan_config(639 * 0x400, 0x400, reserve) ||
  662. smp_scan_config(0xF0000, 0x10000, reserve))
  663. return;
  664. /*
  665. * If it is an SMP machine we should know now, unless the
  666. * configuration is in an EISA/MCA bus machine with an
  667. * extended bios data area.
  668. *
  669. * there is a real-mode segmented pointer pointing to the
  670. * 4K EBDA area at 0x40E, calculate and scan it here.
  671. *
  672. * NOTE! There are Linux loaders that will corrupt the EBDA
  673. * area, and as such this kind of SMP config may be less
  674. * trustworthy, simply because the SMP table may have been
  675. * stomped on during early boot. These loaders are buggy and
  676. * should be fixed.
  677. *
  678. * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
  679. */
  680. address = get_bios_ebda();
  681. if (address)
  682. smp_scan_config(address, 0x400, reserve);
  683. }
  684. void __init early_find_smp_config(void)
  685. {
  686. __find_smp_config(0);
  687. }
  688. void __init find_smp_config(void)
  689. {
  690. __find_smp_config(1);
  691. }
  692. #ifdef CONFIG_X86_IO_APIC
  693. static u8 __initdata irq_used[MAX_IRQ_SOURCES];
  694. static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
  695. {
  696. int i;
  697. if (m->irqtype != mp_INT)
  698. return 0;
  699. if (m->irqflag != 0x0f)
  700. return 0;
  701. /* not legacy */
  702. for (i = 0; i < mp_irq_entries; i++) {
  703. if (mp_irqs[i].irqtype != mp_INT)
  704. continue;
  705. if (mp_irqs[i].irqflag != 0x0f)
  706. continue;
  707. if (mp_irqs[i].srcbus != m->srcbus)
  708. continue;
  709. if (mp_irqs[i].srcbusirq != m->srcbusirq)
  710. continue;
  711. if (irq_used[i]) {
  712. /* already claimed */
  713. return -2;
  714. }
  715. irq_used[i] = 1;
  716. return i;
  717. }
  718. /* not found */
  719. return -1;
  720. }
  721. #define SPARE_SLOT_NUM 20
  722. static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
  723. #endif
  724. static int __init replace_intsrc_all(struct mpc_table *mpc,
  725. unsigned long mpc_new_phys,
  726. unsigned long mpc_new_length)
  727. {
  728. #ifdef CONFIG_X86_IO_APIC
  729. int i;
  730. int nr_m_spare = 0;
  731. #endif
  732. int count = sizeof(*mpc);
  733. unsigned char *mpt = ((unsigned char *)mpc) + count;
  734. printk(KERN_INFO "mpc_length %x\n", mpc->length);
  735. while (count < mpc->length) {
  736. switch (*mpt) {
  737. case MP_PROCESSOR:
  738. {
  739. struct mpc_cpu *m = (struct mpc_cpu *)mpt;
  740. mpt += sizeof(*m);
  741. count += sizeof(*m);
  742. break;
  743. }
  744. case MP_BUS:
  745. {
  746. struct mpc_bus *m = (struct mpc_bus *)mpt;
  747. mpt += sizeof(*m);
  748. count += sizeof(*m);
  749. break;
  750. }
  751. case MP_IOAPIC:
  752. {
  753. mpt += sizeof(struct mpc_ioapic);
  754. count += sizeof(struct mpc_ioapic);
  755. break;
  756. }
  757. case MP_INTSRC:
  758. {
  759. #ifdef CONFIG_X86_IO_APIC
  760. struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
  761. printk(KERN_INFO "OLD ");
  762. print_MP_intsrc_info(m);
  763. i = get_MP_intsrc_index(m);
  764. if (i > 0) {
  765. assign_to_mpc_intsrc(&mp_irqs[i], m);
  766. printk(KERN_INFO "NEW ");
  767. print_mp_irq_info(&mp_irqs[i]);
  768. } else if (!i) {
  769. /* legacy, do nothing */
  770. } else if (nr_m_spare < SPARE_SLOT_NUM) {
  771. /*
  772. * not found (-1), or duplicated (-2)
  773. * are invalid entries,
  774. * we need to use the slot later
  775. */
  776. m_spare[nr_m_spare] = m;
  777. nr_m_spare++;
  778. }
  779. #endif
  780. mpt += sizeof(struct mpc_intsrc);
  781. count += sizeof(struct mpc_intsrc);
  782. break;
  783. }
  784. case MP_LINTSRC:
  785. {
  786. struct mpc_lintsrc *m =
  787. (struct mpc_lintsrc *)mpt;
  788. mpt += sizeof(*m);
  789. count += sizeof(*m);
  790. break;
  791. }
  792. default:
  793. /* wrong mptable */
  794. printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
  795. printk(KERN_ERR "type %x\n", *mpt);
  796. print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
  797. 1, mpc, mpc->length, 1);
  798. goto out;
  799. }
  800. }
  801. #ifdef CONFIG_X86_IO_APIC
  802. for (i = 0; i < mp_irq_entries; i++) {
  803. if (irq_used[i])
  804. continue;
  805. if (mp_irqs[i].irqtype != mp_INT)
  806. continue;
  807. if (mp_irqs[i].irqflag != 0x0f)
  808. continue;
  809. if (nr_m_spare > 0) {
  810. printk(KERN_INFO "*NEW* found ");
  811. nr_m_spare--;
  812. assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
  813. m_spare[nr_m_spare] = NULL;
  814. } else {
  815. struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
  816. count += sizeof(struct mpc_intsrc);
  817. if (!mpc_new_phys) {
  818. printk(KERN_INFO "No spare slots, try to append...take your risk, new mpc_length %x\n", count);
  819. } else {
  820. if (count <= mpc_new_length)
  821. printk(KERN_INFO "No spare slots, try to append..., new mpc_length %x\n", count);
  822. else {
  823. printk(KERN_ERR "mpc_new_length %lx is too small\n", mpc_new_length);
  824. goto out;
  825. }
  826. }
  827. assign_to_mpc_intsrc(&mp_irqs[i], m);
  828. mpc->length = count;
  829. mpt += sizeof(struct mpc_intsrc);
  830. }
  831. print_mp_irq_info(&mp_irqs[i]);
  832. }
  833. #endif
  834. out:
  835. /* update checksum */
  836. mpc->checksum = 0;
  837. mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
  838. return 0;
  839. }
  840. static int __initdata enable_update_mptable;
  841. static int __init update_mptable_setup(char *str)
  842. {
  843. enable_update_mptable = 1;
  844. return 0;
  845. }
  846. early_param("update_mptable", update_mptable_setup);
  847. static unsigned long __initdata mpc_new_phys;
  848. static unsigned long mpc_new_length __initdata = 4096;
  849. /* alloc_mptable or alloc_mptable=4k */
  850. static int __initdata alloc_mptable;
  851. static int __init parse_alloc_mptable_opt(char *p)
  852. {
  853. enable_update_mptable = 1;
  854. alloc_mptable = 1;
  855. if (!p)
  856. return 0;
  857. mpc_new_length = memparse(p, &p);
  858. return 0;
  859. }
  860. early_param("alloc_mptable", parse_alloc_mptable_opt);
  861. void __init early_reserve_e820_mpc_new(void)
  862. {
  863. if (enable_update_mptable && alloc_mptable) {
  864. u64 startt = 0;
  865. #ifdef CONFIG_X86_TRAMPOLINE
  866. startt = TRAMPOLINE_BASE;
  867. #endif
  868. mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
  869. }
  870. }
  871. static int __init update_mp_table(void)
  872. {
  873. char str[16];
  874. char oem[10];
  875. struct mpf_intel *mpf;
  876. struct mpc_table *mpc, *mpc_new;
  877. if (!enable_update_mptable)
  878. return 0;
  879. mpf = mpf_found;
  880. if (!mpf)
  881. return 0;
  882. /*
  883. * Now see if we need to go further.
  884. */
  885. if (mpf->feature1 != 0)
  886. return 0;
  887. if (!mpf->physptr)
  888. return 0;
  889. mpc = phys_to_virt(mpf->physptr);
  890. if (!smp_check_mpc(mpc, oem, str))
  891. return 0;
  892. printk(KERN_INFO "mpf: %lx\n", virt_to_phys(mpf));
  893. printk(KERN_INFO "physptr: %x\n", mpf->physptr);
  894. if (mpc_new_phys && mpc->length > mpc_new_length) {
  895. mpc_new_phys = 0;
  896. printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
  897. mpc_new_length);
  898. }
  899. if (!mpc_new_phys) {
  900. unsigned char old, new;
  901. /* check if we can change the postion */
  902. mpc->checksum = 0;
  903. old = mpf_checksum((unsigned char *)mpc, mpc->length);
  904. mpc->checksum = 0xff;
  905. new = mpf_checksum((unsigned char *)mpc, mpc->length);
  906. if (old == new) {
  907. printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
  908. return 0;
  909. }
  910. printk(KERN_INFO "use in-positon replacing\n");
  911. } else {
  912. mpf->physptr = mpc_new_phys;
  913. mpc_new = phys_to_virt(mpc_new_phys);
  914. memcpy(mpc_new, mpc, mpc->length);
  915. mpc = mpc_new;
  916. /* check if we can modify that */
  917. if (mpc_new_phys - mpf->physptr) {
  918. struct mpf_intel *mpf_new;
  919. /* steal 16 bytes from [0, 1k) */
  920. printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
  921. mpf_new = phys_to_virt(0x400 - 16);
  922. memcpy(mpf_new, mpf, 16);
  923. mpf = mpf_new;
  924. mpf->physptr = mpc_new_phys;
  925. }
  926. mpf->checksum = 0;
  927. mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
  928. printk(KERN_INFO "physptr new: %x\n", mpf->physptr);
  929. }
  930. /*
  931. * only replace the one with mp_INT and
  932. * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
  933. * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
  934. * may need pci=routeirq for all coverage
  935. */
  936. replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
  937. return 0;
  938. }
  939. late_initcall(update_mp_table);