dm.c 47 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2012 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #include "../wifi.h"
  30. #include "../base.h"
  31. #include "reg.h"
  32. #include "def.h"
  33. #include "phy.h"
  34. #include "dm.h"
  35. #include "fw.h"
  36. #define UNDEC_SM_PWDB entry_min_undec_sm_pwdb
  37. static const u32 ofdmswing_table[OFDM_TABLE_SIZE_92D] = {
  38. 0x7f8001fe, /* 0, +6.0dB */
  39. 0x788001e2, /* 1, +5.5dB */
  40. 0x71c001c7, /* 2, +5.0dB */
  41. 0x6b8001ae, /* 3, +4.5dB */
  42. 0x65400195, /* 4, +4.0dB */
  43. 0x5fc0017f, /* 5, +3.5dB */
  44. 0x5a400169, /* 6, +3.0dB */
  45. 0x55400155, /* 7, +2.5dB */
  46. 0x50800142, /* 8, +2.0dB */
  47. 0x4c000130, /* 9, +1.5dB */
  48. 0x47c0011f, /* 10, +1.0dB */
  49. 0x43c0010f, /* 11, +0.5dB */
  50. 0x40000100, /* 12, +0dB */
  51. 0x3c8000f2, /* 13, -0.5dB */
  52. 0x390000e4, /* 14, -1.0dB */
  53. 0x35c000d7, /* 15, -1.5dB */
  54. 0x32c000cb, /* 16, -2.0dB */
  55. 0x300000c0, /* 17, -2.5dB */
  56. 0x2d4000b5, /* 18, -3.0dB */
  57. 0x2ac000ab, /* 19, -3.5dB */
  58. 0x288000a2, /* 20, -4.0dB */
  59. 0x26000098, /* 21, -4.5dB */
  60. 0x24000090, /* 22, -5.0dB */
  61. 0x22000088, /* 23, -5.5dB */
  62. 0x20000080, /* 24, -6.0dB */
  63. 0x1e400079, /* 25, -6.5dB */
  64. 0x1c800072, /* 26, -7.0dB */
  65. 0x1b00006c, /* 27. -7.5dB */
  66. 0x19800066, /* 28, -8.0dB */
  67. 0x18000060, /* 29, -8.5dB */
  68. 0x16c0005b, /* 30, -9.0dB */
  69. 0x15800056, /* 31, -9.5dB */
  70. 0x14400051, /* 32, -10.0dB */
  71. 0x1300004c, /* 33, -10.5dB */
  72. 0x12000048, /* 34, -11.0dB */
  73. 0x11000044, /* 35, -11.5dB */
  74. 0x10000040, /* 36, -12.0dB */
  75. 0x0f00003c, /* 37, -12.5dB */
  76. 0x0e400039, /* 38, -13.0dB */
  77. 0x0d800036, /* 39, -13.5dB */
  78. 0x0cc00033, /* 40, -14.0dB */
  79. 0x0c000030, /* 41, -14.5dB */
  80. 0x0b40002d, /* 42, -15.0dB */
  81. };
  82. static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = {
  83. {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */
  84. {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */
  85. {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */
  86. {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */
  87. {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */
  88. {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */
  89. {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */
  90. {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */
  91. {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */
  92. {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */
  93. {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */
  94. {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */
  95. {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB */
  96. {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */
  97. {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */
  98. {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */
  99. {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
  100. {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */
  101. {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */
  102. {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */
  103. {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */
  104. {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */
  105. {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */
  106. {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */
  107. {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */
  108. {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */
  109. {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */
  110. {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */
  111. {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */
  112. {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */
  113. {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */
  114. {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */
  115. {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */
  116. };
  117. static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {
  118. {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */
  119. {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */
  120. {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */
  121. {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */
  122. {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */
  123. {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */
  124. {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */
  125. {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */
  126. {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */
  127. {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */
  128. {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */
  129. {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */
  130. {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */
  131. {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */
  132. {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */
  133. {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */
  134. {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
  135. {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */
  136. {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */
  137. {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */
  138. {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */
  139. {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */
  140. {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */
  141. {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */
  142. {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */
  143. {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */
  144. {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */
  145. {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */
  146. {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */
  147. {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */
  148. {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */
  149. {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */
  150. {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */
  151. };
  152. static void rtl92d_dm_diginit(struct ieee80211_hw *hw)
  153. {
  154. struct rtl_priv *rtlpriv = rtl_priv(hw);
  155. struct dig_t *de_digtable = &rtlpriv->dm_digtable;
  156. de_digtable->dig_enable_flag = true;
  157. de_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
  158. de_digtable->cur_igvalue = 0x20;
  159. de_digtable->pre_igvalue = 0x0;
  160. de_digtable->cursta_cstate = DIG_STA_DISCONNECT;
  161. de_digtable->presta_cstate = DIG_STA_DISCONNECT;
  162. de_digtable->curmultista_cstate = DIG_MULTISTA_DISCONNECT;
  163. de_digtable->rssi_lowthresh = DM_DIG_THRESH_LOW;
  164. de_digtable->rssi_highthresh = DM_DIG_THRESH_HIGH;
  165. de_digtable->fa_lowthresh = DM_FALSEALARM_THRESH_LOW;
  166. de_digtable->fa_highthresh = DM_FALSEALARM_THRESH_HIGH;
  167. de_digtable->rx_gain_max = DM_DIG_FA_UPPER;
  168. de_digtable->rx_gain_min = DM_DIG_FA_LOWER;
  169. de_digtable->back_val = DM_DIG_BACKOFF_DEFAULT;
  170. de_digtable->back_range_max = DM_DIG_BACKOFF_MAX;
  171. de_digtable->back_range_min = DM_DIG_BACKOFF_MIN;
  172. de_digtable->pre_cck_pd_state = CCK_PD_STAGE_LOWRSSI;
  173. de_digtable->cur_cck_pd_state = CCK_PD_STAGE_MAX;
  174. de_digtable->large_fa_hit = 0;
  175. de_digtable->recover_cnt = 0;
  176. de_digtable->forbidden_igi = DM_DIG_FA_LOWER;
  177. }
  178. static void rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
  179. {
  180. u32 ret_value;
  181. struct rtl_priv *rtlpriv = rtl_priv(hw);
  182. struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
  183. unsigned long flag = 0;
  184. /* hold ofdm counter */
  185. rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 1); /* hold page C counter */
  186. rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 1); /*hold page D counter */
  187. ret_value = rtl_get_bbreg(hw, ROFDM0_FRAMESYNC, BMASKDWORD);
  188. falsealm_cnt->cnt_fast_fsync_fail = (ret_value & 0xffff);
  189. falsealm_cnt->cnt_sb_search_fail = ((ret_value & 0xffff0000) >> 16);
  190. ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, BMASKDWORD);
  191. falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
  192. ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, BMASKDWORD);
  193. falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
  194. falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
  195. ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, BMASKDWORD);
  196. falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
  197. falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
  198. falsealm_cnt->cnt_rate_illegal +
  199. falsealm_cnt->cnt_crc8_fail +
  200. falsealm_cnt->cnt_mcs_fail +
  201. falsealm_cnt->cnt_fast_fsync_fail +
  202. falsealm_cnt->cnt_sb_search_fail;
  203. if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
  204. /* hold cck counter */
  205. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  206. ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, BMASKBYTE0);
  207. falsealm_cnt->cnt_cck_fail = ret_value;
  208. ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, BMASKBYTE3);
  209. falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
  210. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  211. } else {
  212. falsealm_cnt->cnt_cck_fail = 0;
  213. }
  214. /* reset false alarm counter registers */
  215. falsealm_cnt->cnt_all = falsealm_cnt->cnt_fast_fsync_fail +
  216. falsealm_cnt->cnt_sb_search_fail +
  217. falsealm_cnt->cnt_parity_fail +
  218. falsealm_cnt->cnt_rate_illegal +
  219. falsealm_cnt->cnt_crc8_fail +
  220. falsealm_cnt->cnt_mcs_fail +
  221. falsealm_cnt->cnt_cck_fail;
  222. rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
  223. /* update ofdm counter */
  224. rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
  225. /* update page C counter */
  226. rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 0);
  227. /* update page D counter */
  228. rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 0);
  229. if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
  230. /* reset cck counter */
  231. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  232. rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
  233. /* enable cck counter */
  234. rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
  235. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  236. }
  237. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  238. "Cnt_Fast_Fsync_fail = %x, Cnt_SB_Search_fail = %x\n",
  239. falsealm_cnt->cnt_fast_fsync_fail,
  240. falsealm_cnt->cnt_sb_search_fail);
  241. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  242. "Cnt_Parity_Fail = %x, Cnt_Rate_Illegal = %x, Cnt_Crc8_fail = %x, Cnt_Mcs_fail = %x\n",
  243. falsealm_cnt->cnt_parity_fail,
  244. falsealm_cnt->cnt_rate_illegal,
  245. falsealm_cnt->cnt_crc8_fail,
  246. falsealm_cnt->cnt_mcs_fail);
  247. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  248. "Cnt_Ofdm_fail = %x, Cnt_Cck_fail = %x, Cnt_all = %x\n",
  249. falsealm_cnt->cnt_ofdm_fail,
  250. falsealm_cnt->cnt_cck_fail,
  251. falsealm_cnt->cnt_all);
  252. }
  253. static void rtl92d_dm_find_minimum_rssi(struct ieee80211_hw *hw)
  254. {
  255. struct rtl_priv *rtlpriv = rtl_priv(hw);
  256. struct dig_t *de_digtable = &rtlpriv->dm_digtable;
  257. struct rtl_mac *mac = rtl_mac(rtlpriv);
  258. /* Determine the minimum RSSI */
  259. if ((mac->link_state < MAC80211_LINKED) &&
  260. (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
  261. de_digtable->min_undec_pwdb_for_dm = 0;
  262. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  263. "Not connected to any\n");
  264. }
  265. if (mac->link_state >= MAC80211_LINKED) {
  266. if (mac->opmode == NL80211_IFTYPE_AP ||
  267. mac->opmode == NL80211_IFTYPE_ADHOC) {
  268. de_digtable->min_undec_pwdb_for_dm =
  269. rtlpriv->dm.UNDEC_SM_PWDB;
  270. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  271. "AP Client PWDB = 0x%lx\n",
  272. rtlpriv->dm.UNDEC_SM_PWDB);
  273. } else {
  274. de_digtable->min_undec_pwdb_for_dm =
  275. rtlpriv->dm.undec_sm_pwdb;
  276. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  277. "STA Default Port PWDB = 0x%x\n",
  278. de_digtable->min_undec_pwdb_for_dm);
  279. }
  280. } else {
  281. de_digtable->min_undec_pwdb_for_dm = rtlpriv->dm.UNDEC_SM_PWDB;
  282. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  283. "AP Ext Port or disconnect PWDB = 0x%x\n",
  284. de_digtable->min_undec_pwdb_for_dm);
  285. }
  286. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "MinUndecoratedPWDBForDM =%d\n",
  287. de_digtable->min_undec_pwdb_for_dm);
  288. }
  289. static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
  290. {
  291. struct rtl_priv *rtlpriv = rtl_priv(hw);
  292. struct dig_t *de_digtable = &rtlpriv->dm_digtable;
  293. unsigned long flag = 0;
  294. if (de_digtable->cursta_cstate == DIG_STA_CONNECT) {
  295. if (de_digtable->pre_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
  296. if (de_digtable->min_undec_pwdb_for_dm <= 25)
  297. de_digtable->cur_cck_pd_state =
  298. CCK_PD_STAGE_LOWRSSI;
  299. else
  300. de_digtable->cur_cck_pd_state =
  301. CCK_PD_STAGE_HIGHRSSI;
  302. } else {
  303. if (de_digtable->min_undec_pwdb_for_dm <= 20)
  304. de_digtable->cur_cck_pd_state =
  305. CCK_PD_STAGE_LOWRSSI;
  306. else
  307. de_digtable->cur_cck_pd_state =
  308. CCK_PD_STAGE_HIGHRSSI;
  309. }
  310. } else {
  311. de_digtable->cur_cck_pd_state = CCK_PD_STAGE_LOWRSSI;
  312. }
  313. if (de_digtable->pre_cck_pd_state != de_digtable->cur_cck_pd_state) {
  314. if (de_digtable->cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
  315. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  316. rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0x83);
  317. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  318. } else {
  319. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  320. rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0xcd);
  321. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  322. }
  323. de_digtable->pre_cck_pd_state = de_digtable->cur_cck_pd_state;
  324. }
  325. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CurSTAConnectState=%s\n",
  326. de_digtable->cursta_cstate == DIG_STA_CONNECT ?
  327. "DIG_STA_CONNECT " : "DIG_STA_DISCONNECT");
  328. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CCKPDStage=%s\n",
  329. de_digtable->cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI ?
  330. "Low RSSI " : "High RSSI ");
  331. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "is92d single phy =%x\n",
  332. IS_92D_SINGLEPHY(rtlpriv->rtlhal.version));
  333. }
  334. void rtl92d_dm_write_dig(struct ieee80211_hw *hw)
  335. {
  336. struct rtl_priv *rtlpriv = rtl_priv(hw);
  337. struct dig_t *de_digtable = &rtlpriv->dm_digtable;
  338. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  339. "cur_igvalue = 0x%x, pre_igvalue = 0x%x, back_val = %d\n",
  340. de_digtable->cur_igvalue, de_digtable->pre_igvalue,
  341. de_digtable->back_val);
  342. if (de_digtable->dig_enable_flag == false) {
  343. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "DIG is disabled\n");
  344. de_digtable->pre_igvalue = 0x17;
  345. return;
  346. }
  347. if (de_digtable->pre_igvalue != de_digtable->cur_igvalue) {
  348. rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,
  349. de_digtable->cur_igvalue);
  350. rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,
  351. de_digtable->cur_igvalue);
  352. de_digtable->pre_igvalue = de_digtable->cur_igvalue;
  353. }
  354. }
  355. static void rtl92d_early_mode_enabled(struct rtl_priv *rtlpriv)
  356. {
  357. struct dig_t *de_digtable = &rtlpriv->dm_digtable;
  358. if ((rtlpriv->mac80211.link_state >= MAC80211_LINKED) &&
  359. (rtlpriv->mac80211.vendor == PEER_CISCO)) {
  360. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "IOT_PEER = CISCO\n");
  361. if (de_digtable->last_min_undec_pwdb_for_dm >= 50
  362. && de_digtable->min_undec_pwdb_for_dm < 50) {
  363. rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x00);
  364. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  365. "Early Mode Off\n");
  366. } else if (de_digtable->last_min_undec_pwdb_for_dm <= 55 &&
  367. de_digtable->min_undec_pwdb_for_dm > 55) {
  368. rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
  369. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  370. "Early Mode On\n");
  371. }
  372. } else if (!(rtl_read_byte(rtlpriv, REG_EARLY_MODE_CONTROL) & 0xf)) {
  373. rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
  374. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "Early Mode On\n");
  375. }
  376. }
  377. static void rtl92d_dm_dig(struct ieee80211_hw *hw)
  378. {
  379. struct rtl_priv *rtlpriv = rtl_priv(hw);
  380. struct dig_t *de_digtable = &rtlpriv->dm_digtable;
  381. u8 value_igi = de_digtable->cur_igvalue;
  382. struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
  383. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "==>\n");
  384. if (rtlpriv->rtlhal.earlymode_enable) {
  385. rtl92d_early_mode_enabled(rtlpriv);
  386. de_digtable->last_min_undec_pwdb_for_dm =
  387. de_digtable->min_undec_pwdb_for_dm;
  388. }
  389. if (!rtlpriv->dm.dm_initialgain_enable)
  390. return;
  391. /* because we will send data pkt when scanning
  392. * this will cause some ap like gear-3700 wep TP
  393. * lower if we return here, this is the diff of
  394. * mac80211 driver vs ieee80211 driver */
  395. /* if (rtlpriv->mac80211.act_scanning)
  396. * return; */
  397. /* Not STA mode return tmp */
  398. if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
  399. return;
  400. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "progress\n");
  401. /* Decide the current status and if modify initial gain or not */
  402. if (rtlpriv->mac80211.link_state >= MAC80211_LINKED)
  403. de_digtable->cursta_cstate = DIG_STA_CONNECT;
  404. else
  405. de_digtable->cursta_cstate = DIG_STA_DISCONNECT;
  406. /* adjust initial gain according to false alarm counter */
  407. if (falsealm_cnt->cnt_all < DM_DIG_FA_TH0)
  408. value_igi--;
  409. else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH1)
  410. value_igi += 0;
  411. else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH2)
  412. value_igi++;
  413. else if (falsealm_cnt->cnt_all >= DM_DIG_FA_TH2)
  414. value_igi += 2;
  415. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  416. "dm_DIG() Before: large_fa_hit=%d, forbidden_igi=%x\n",
  417. de_digtable->large_fa_hit, de_digtable->forbidden_igi);
  418. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  419. "dm_DIG() Before: Recover_cnt=%d, rx_gain_min=%x\n",
  420. de_digtable->recover_cnt, de_digtable->rx_gain_min);
  421. /* deal with abnorally large false alarm */
  422. if (falsealm_cnt->cnt_all > 10000) {
  423. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  424. "dm_DIG(): Abnormally false alarm case\n");
  425. de_digtable->large_fa_hit++;
  426. if (de_digtable->forbidden_igi < de_digtable->cur_igvalue) {
  427. de_digtable->forbidden_igi = de_digtable->cur_igvalue;
  428. de_digtable->large_fa_hit = 1;
  429. }
  430. if (de_digtable->large_fa_hit >= 3) {
  431. if ((de_digtable->forbidden_igi + 1) > DM_DIG_MAX)
  432. de_digtable->rx_gain_min = DM_DIG_MAX;
  433. else
  434. de_digtable->rx_gain_min =
  435. (de_digtable->forbidden_igi + 1);
  436. de_digtable->recover_cnt = 3600; /* 3600=2hr */
  437. }
  438. } else {
  439. /* Recovery mechanism for IGI lower bound */
  440. if (de_digtable->recover_cnt != 0) {
  441. de_digtable->recover_cnt--;
  442. } else {
  443. if (de_digtable->large_fa_hit == 0) {
  444. if ((de_digtable->forbidden_igi - 1) <
  445. DM_DIG_FA_LOWER) {
  446. de_digtable->forbidden_igi =
  447. DM_DIG_FA_LOWER;
  448. de_digtable->rx_gain_min =
  449. DM_DIG_FA_LOWER;
  450. } else {
  451. de_digtable->forbidden_igi--;
  452. de_digtable->rx_gain_min =
  453. (de_digtable->forbidden_igi + 1);
  454. }
  455. } else if (de_digtable->large_fa_hit == 3) {
  456. de_digtable->large_fa_hit = 0;
  457. }
  458. }
  459. }
  460. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  461. "dm_DIG() After: large_fa_hit=%d, forbidden_igi=%x\n",
  462. de_digtable->large_fa_hit, de_digtable->forbidden_igi);
  463. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  464. "dm_DIG() After: recover_cnt=%d, rx_gain_min=%x\n",
  465. de_digtable->recover_cnt, de_digtable->rx_gain_min);
  466. if (value_igi > DM_DIG_MAX)
  467. value_igi = DM_DIG_MAX;
  468. else if (value_igi < de_digtable->rx_gain_min)
  469. value_igi = de_digtable->rx_gain_min;
  470. de_digtable->cur_igvalue = value_igi;
  471. rtl92d_dm_write_dig(hw);
  472. if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G)
  473. rtl92d_dm_cck_packet_detection_thresh(hw);
  474. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "<<==\n");
  475. }
  476. static void rtl92d_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
  477. {
  478. struct rtl_priv *rtlpriv = rtl_priv(hw);
  479. rtlpriv->dm.dynamic_txpower_enable = true;
  480. rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
  481. rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
  482. }
  483. static void rtl92d_dm_dynamic_txpower(struct ieee80211_hw *hw)
  484. {
  485. struct rtl_priv *rtlpriv = rtl_priv(hw);
  486. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  487. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  488. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  489. long undec_sm_pwdb;
  490. if ((!rtlpriv->dm.dynamic_txpower_enable)
  491. || rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
  492. rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
  493. return;
  494. }
  495. if ((mac->link_state < MAC80211_LINKED) &&
  496. (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
  497. RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
  498. "Not connected to any\n");
  499. rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
  500. rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
  501. return;
  502. }
  503. if (mac->link_state >= MAC80211_LINKED) {
  504. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  505. undec_sm_pwdb =
  506. rtlpriv->dm.UNDEC_SM_PWDB;
  507. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  508. "IBSS Client PWDB = 0x%lx\n",
  509. undec_sm_pwdb);
  510. } else {
  511. undec_sm_pwdb =
  512. rtlpriv->dm.undec_sm_pwdb;
  513. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  514. "STA Default Port PWDB = 0x%lx\n",
  515. undec_sm_pwdb);
  516. }
  517. } else {
  518. undec_sm_pwdb =
  519. rtlpriv->dm.UNDEC_SM_PWDB;
  520. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  521. "AP Ext Port PWDB = 0x%lx\n",
  522. undec_sm_pwdb);
  523. }
  524. if (rtlhal->current_bandtype == BAND_ON_5G) {
  525. if (undec_sm_pwdb >= 0x33) {
  526. rtlpriv->dm.dynamic_txhighpower_lvl =
  527. TXHIGHPWRLEVEL_LEVEL2;
  528. RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
  529. "5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n");
  530. } else if ((undec_sm_pwdb < 0x33)
  531. && (undec_sm_pwdb >= 0x2b)) {
  532. rtlpriv->dm.dynamic_txhighpower_lvl =
  533. TXHIGHPWRLEVEL_LEVEL1;
  534. RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
  535. "5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n");
  536. } else if (undec_sm_pwdb < 0x2b) {
  537. rtlpriv->dm.dynamic_txhighpower_lvl =
  538. TXHIGHPWRLEVEL_NORMAL;
  539. RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
  540. "5G:TxHighPwrLevel_Normal\n");
  541. }
  542. } else {
  543. if (undec_sm_pwdb >=
  544. TX_POWER_NEAR_FIELD_THRESH_LVL2) {
  545. rtlpriv->dm.dynamic_txhighpower_lvl =
  546. TXHIGHPWRLEVEL_LEVEL2;
  547. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  548. "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
  549. } else
  550. if ((undec_sm_pwdb <
  551. (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3))
  552. && (undec_sm_pwdb >=
  553. TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
  554. rtlpriv->dm.dynamic_txhighpower_lvl =
  555. TXHIGHPWRLEVEL_LEVEL1;
  556. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  557. "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
  558. } else if (undec_sm_pwdb <
  559. (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
  560. rtlpriv->dm.dynamic_txhighpower_lvl =
  561. TXHIGHPWRLEVEL_NORMAL;
  562. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  563. "TXHIGHPWRLEVEL_NORMAL\n");
  564. }
  565. }
  566. if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
  567. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  568. "PHY_SetTxPowerLevel8192S() Channel = %d\n",
  569. rtlphy->current_channel);
  570. rtl92d_phy_set_txpower_level(hw, rtlphy->current_channel);
  571. }
  572. rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
  573. }
  574. static void rtl92d_dm_pwdb_monitor(struct ieee80211_hw *hw)
  575. {
  576. struct rtl_priv *rtlpriv = rtl_priv(hw);
  577. /* AP & ADHOC & MESH will return tmp */
  578. if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
  579. return;
  580. /* Indicate Rx signal strength to FW. */
  581. if (rtlpriv->dm.useramask) {
  582. u32 temp = rtlpriv->dm.undec_sm_pwdb;
  583. temp <<= 16;
  584. temp |= 0x100;
  585. /* fw v12 cmdid 5:use max macid ,for nic ,
  586. * default macid is 0 ,max macid is 1 */
  587. rtl92d_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, (u8 *) (&temp));
  588. } else {
  589. rtl_write_byte(rtlpriv, 0x4fe,
  590. (u8) rtlpriv->dm.undec_sm_pwdb);
  591. }
  592. }
  593. void rtl92d_dm_init_edca_turbo(struct ieee80211_hw *hw)
  594. {
  595. struct rtl_priv *rtlpriv = rtl_priv(hw);
  596. rtlpriv->dm.current_turbo_edca = false;
  597. rtlpriv->dm.is_any_nonbepkts = false;
  598. rtlpriv->dm.is_cur_rdlstate = false;
  599. }
  600. static void rtl92d_dm_check_edca_turbo(struct ieee80211_hw *hw)
  601. {
  602. struct rtl_priv *rtlpriv = rtl_priv(hw);
  603. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  604. static u64 last_txok_cnt;
  605. static u64 last_rxok_cnt;
  606. u64 cur_txok_cnt;
  607. u64 cur_rxok_cnt;
  608. u32 edca_be_ul = 0x5ea42b;
  609. u32 edca_be_dl = 0x5ea42b;
  610. if (mac->link_state != MAC80211_LINKED) {
  611. rtlpriv->dm.current_turbo_edca = false;
  612. goto exit;
  613. }
  614. /* Enable BEQ TxOP limit configuration in wireless G-mode. */
  615. /* To check whether we shall force turn on TXOP configuration. */
  616. if ((!rtlpriv->dm.disable_framebursting) &&
  617. (rtlpriv->sec.pairwise_enc_algorithm == WEP40_ENCRYPTION ||
  618. rtlpriv->sec.pairwise_enc_algorithm == WEP104_ENCRYPTION ||
  619. rtlpriv->sec.pairwise_enc_algorithm == TKIP_ENCRYPTION)) {
  620. /* Force TxOP limit to 0x005e for UL. */
  621. if (!(edca_be_ul & 0xffff0000))
  622. edca_be_ul |= 0x005e0000;
  623. /* Force TxOP limit to 0x005e for DL. */
  624. if (!(edca_be_dl & 0xffff0000))
  625. edca_be_dl |= 0x005e0000;
  626. }
  627. if ((!rtlpriv->dm.is_any_nonbepkts) &&
  628. (!rtlpriv->dm.disable_framebursting)) {
  629. cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
  630. cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
  631. if (cur_rxok_cnt > 4 * cur_txok_cnt) {
  632. if (!rtlpriv->dm.is_cur_rdlstate ||
  633. !rtlpriv->dm.current_turbo_edca) {
  634. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
  635. edca_be_dl);
  636. rtlpriv->dm.is_cur_rdlstate = true;
  637. }
  638. } else {
  639. if (rtlpriv->dm.is_cur_rdlstate ||
  640. !rtlpriv->dm.current_turbo_edca) {
  641. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
  642. edca_be_ul);
  643. rtlpriv->dm.is_cur_rdlstate = false;
  644. }
  645. }
  646. rtlpriv->dm.current_turbo_edca = true;
  647. } else {
  648. if (rtlpriv->dm.current_turbo_edca) {
  649. u8 tmp = AC0_BE;
  650. rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM,
  651. &tmp);
  652. rtlpriv->dm.current_turbo_edca = false;
  653. }
  654. }
  655. exit:
  656. rtlpriv->dm.is_any_nonbepkts = false;
  657. last_txok_cnt = rtlpriv->stats.txbytesunicast;
  658. last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
  659. }
  660. static void rtl92d_dm_rxgain_tracking_thermalmeter(struct ieee80211_hw *hw)
  661. {
  662. struct rtl_priv *rtlpriv = rtl_priv(hw);
  663. u8 index_mapping[RX_INDEX_MAPPING_NUM] = {
  664. 0x0f, 0x0f, 0x0d, 0x0c, 0x0b,
  665. 0x0a, 0x09, 0x08, 0x07, 0x06,
  666. 0x05, 0x04, 0x04, 0x03, 0x02
  667. };
  668. int i;
  669. u32 u4tmp;
  670. u4tmp = (index_mapping[(rtlpriv->efuse.eeprom_thermalmeter -
  671. rtlpriv->dm.thermalvalue_rxgain)]) << 12;
  672. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  673. "===> Rx Gain %x\n", u4tmp);
  674. for (i = RF90_PATH_A; i < rtlpriv->phy.num_total_rfpath; i++)
  675. rtl_set_rfreg(hw, i, 0x3C, BRFREGOFFSETMASK,
  676. (rtlpriv->phy.reg_rf3c[i] & (~(0xF000))) | u4tmp);
  677. }
  678. static void rtl92d_bandtype_2_4G(struct ieee80211_hw *hw, long *temp_cckg,
  679. u8 *cck_index_old)
  680. {
  681. struct rtl_priv *rtlpriv = rtl_priv(hw);
  682. int i;
  683. unsigned long flag = 0;
  684. long temp_cck;
  685. /* Query CCK default setting From 0xa24 */
  686. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  687. temp_cck = rtl_get_bbreg(hw, RCCK0_TXFILTER2,
  688. BMASKDWORD) & BMASKCCK;
  689. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  690. for (i = 0; i < CCK_TABLE_LENGTH; i++) {
  691. if (rtlpriv->dm.cck_inch14) {
  692. if (!memcmp((void *)&temp_cck,
  693. (void *)&cckswing_table_ch14[i][2], 4)) {
  694. *cck_index_old = (u8) i;
  695. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  696. "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch 14 %d\n",
  697. RCCK0_TXFILTER2, temp_cck,
  698. *cck_index_old,
  699. rtlpriv->dm.cck_inch14);
  700. break;
  701. }
  702. } else {
  703. if (!memcmp((void *) &temp_cck,
  704. &cckswing_table_ch1ch13[i][2], 4)) {
  705. *cck_index_old = (u8) i;
  706. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  707. "Initial reg0x%x = 0x%lx, cck_index = 0x%x, ch14 %d\n",
  708. RCCK0_TXFILTER2, temp_cck,
  709. *cck_index_old,
  710. rtlpriv->dm.cck_inch14);
  711. break;
  712. }
  713. }
  714. }
  715. *temp_cckg = temp_cck;
  716. }
  717. static void rtl92d_bandtype_5G(struct rtl_hal *rtlhal, u8 *ofdm_index,
  718. bool *internal_pa, u8 thermalvalue, u8 delta,
  719. u8 rf, struct rtl_efuse *rtlefuse,
  720. struct rtl_priv *rtlpriv, struct rtl_phy *rtlphy,
  721. u8 index_mapping[5][INDEX_MAPPING_NUM],
  722. u8 index_mapping_pa[8][INDEX_MAPPING_NUM])
  723. {
  724. int i;
  725. u8 index;
  726. u8 offset = 0;
  727. for (i = 0; i < rf; i++) {
  728. if (rtlhal->macphymode == DUALMAC_DUALPHY &&
  729. rtlhal->interfaceindex == 1) /* MAC 1 5G */
  730. *internal_pa = rtlefuse->internal_pa_5g[1];
  731. else
  732. *internal_pa = rtlefuse->internal_pa_5g[i];
  733. if (*internal_pa) {
  734. if (rtlhal->interfaceindex == 1 || i == rf)
  735. offset = 4;
  736. else
  737. offset = 0;
  738. if (rtlphy->current_channel >= 100 &&
  739. rtlphy->current_channel <= 165)
  740. offset += 2;
  741. } else {
  742. if (rtlhal->interfaceindex == 1 || i == rf)
  743. offset = 2;
  744. else
  745. offset = 0;
  746. }
  747. if (thermalvalue > rtlefuse->eeprom_thermalmeter)
  748. offset++;
  749. if (*internal_pa) {
  750. if (delta > INDEX_MAPPING_NUM - 1)
  751. index = index_mapping_pa[offset]
  752. [INDEX_MAPPING_NUM - 1];
  753. else
  754. index =
  755. index_mapping_pa[offset][delta];
  756. } else {
  757. if (delta > INDEX_MAPPING_NUM - 1)
  758. index =
  759. index_mapping[offset][INDEX_MAPPING_NUM - 1];
  760. else
  761. index = index_mapping[offset][delta];
  762. }
  763. if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
  764. if (*internal_pa && thermalvalue > 0x12) {
  765. ofdm_index[i] = rtlpriv->dm.ofdm_index[i] -
  766. ((delta / 2) * 3 + (delta % 2));
  767. } else {
  768. ofdm_index[i] -= index;
  769. }
  770. } else {
  771. ofdm_index[i] += index;
  772. }
  773. }
  774. }
  775. static void rtl92d_dm_txpower_tracking_callback_thermalmeter(
  776. struct ieee80211_hw *hw)
  777. {
  778. struct rtl_priv *rtlpriv = rtl_priv(hw);
  779. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  780. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  781. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  782. u8 thermalvalue, delta, delta_lck, delta_iqk, delta_rxgain;
  783. u8 offset, thermalvalue_avg_count = 0;
  784. u32 thermalvalue_avg = 0;
  785. bool internal_pa = false;
  786. long ele_a = 0, ele_d, temp_cck, val_x, value32;
  787. long val_y, ele_c = 0;
  788. u8 ofdm_index[3];
  789. s8 cck_index = 0;
  790. u8 ofdm_index_old[3] = {0, 0, 0};
  791. s8 cck_index_old = 0;
  792. u8 index;
  793. int i;
  794. bool is2t = IS_92D_SINGLEPHY(rtlhal->version);
  795. u8 ofdm_min_index = 6, ofdm_min_index_internal_pa = 3, rf;
  796. u8 indexforchannel =
  797. rtl92d_get_rightchnlplace_for_iqk(rtlphy->current_channel);
  798. u8 index_mapping[5][INDEX_MAPPING_NUM] = {
  799. /* 5G, path A/MAC 0, decrease power */
  800. {0, 1, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
  801. /* 5G, path A/MAC 0, increase power */
  802. {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
  803. /* 5G, path B/MAC 1, decrease power */
  804. {0, 2, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
  805. /* 5G, path B/MAC 1, increase power */
  806. {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
  807. /* 2.4G, for decreas power */
  808. {0, 1, 2, 3, 4, 5, 6, 7, 7, 8, 9, 10, 10},
  809. };
  810. u8 index_mapping_internal_pa[8][INDEX_MAPPING_NUM] = {
  811. /* 5G, path A/MAC 0, ch36-64, decrease power */
  812. {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
  813. /* 5G, path A/MAC 0, ch36-64, increase power */
  814. {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
  815. /* 5G, path A/MAC 0, ch100-165, decrease power */
  816. {0, 1, 2, 3, 5, 6, 8, 10, 11, 13, 14, 15, 15},
  817. /* 5G, path A/MAC 0, ch100-165, increase power */
  818. {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
  819. /* 5G, path B/MAC 1, ch36-64, decrease power */
  820. {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
  821. /* 5G, path B/MAC 1, ch36-64, increase power */
  822. {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
  823. /* 5G, path B/MAC 1, ch100-165, decrease power */
  824. {0, 1, 2, 3, 5, 6, 8, 9, 10, 12, 13, 14, 14},
  825. /* 5G, path B/MAC 1, ch100-165, increase power */
  826. {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
  827. };
  828. rtlpriv->dm.txpower_trackinginit = true;
  829. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "\n");
  830. thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0xf800);
  831. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  832. "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x\n",
  833. thermalvalue,
  834. rtlpriv->dm.thermalvalue, rtlefuse->eeprom_thermalmeter);
  835. rtl92d_phy_ap_calibrate(hw, (thermalvalue -
  836. rtlefuse->eeprom_thermalmeter));
  837. if (is2t)
  838. rf = 2;
  839. else
  840. rf = 1;
  841. if (thermalvalue) {
  842. ele_d = rtl_get_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
  843. BMASKDWORD) & BMASKOFDM_D;
  844. for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
  845. if (ele_d == (ofdmswing_table[i] & BMASKOFDM_D)) {
  846. ofdm_index_old[0] = (u8) i;
  847. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  848. "Initial pathA ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n",
  849. ROFDM0_XATxIQIMBALANCE,
  850. ele_d, ofdm_index_old[0]);
  851. break;
  852. }
  853. }
  854. if (is2t) {
  855. ele_d = rtl_get_bbreg(hw, ROFDM0_XBTxIQIMBALANCE,
  856. BMASKDWORD) & BMASKOFDM_D;
  857. for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
  858. if (ele_d ==
  859. (ofdmswing_table[i] & BMASKOFDM_D)) {
  860. ofdm_index_old[1] = (u8) i;
  861. RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
  862. DBG_LOUD,
  863. "Initial pathB ele_d reg 0x%x = 0x%lx, ofdm_index = 0x%x\n",
  864. ROFDM0_XBTxIQIMBALANCE, ele_d,
  865. ofdm_index_old[1]);
  866. break;
  867. }
  868. }
  869. }
  870. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  871. rtl92d_bandtype_2_4G(hw, &temp_cck, &cck_index_old);
  872. } else {
  873. temp_cck = 0x090e1317;
  874. cck_index_old = 12;
  875. }
  876. if (!rtlpriv->dm.thermalvalue) {
  877. rtlpriv->dm.thermalvalue =
  878. rtlefuse->eeprom_thermalmeter;
  879. rtlpriv->dm.thermalvalue_lck = thermalvalue;
  880. rtlpriv->dm.thermalvalue_iqk = thermalvalue;
  881. rtlpriv->dm.thermalvalue_rxgain =
  882. rtlefuse->eeprom_thermalmeter;
  883. for (i = 0; i < rf; i++)
  884. rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
  885. rtlpriv->dm.cck_index = cck_index_old;
  886. }
  887. if (rtlhal->reloadtxpowerindex) {
  888. for (i = 0; i < rf; i++)
  889. rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
  890. rtlpriv->dm.cck_index = cck_index_old;
  891. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  892. "reload ofdm index for band switch\n");
  893. }
  894. rtlpriv->dm.thermalvalue_avg
  895. [rtlpriv->dm.thermalvalue_avg_index] = thermalvalue;
  896. rtlpriv->dm.thermalvalue_avg_index++;
  897. if (rtlpriv->dm.thermalvalue_avg_index == AVG_THERMAL_NUM)
  898. rtlpriv->dm.thermalvalue_avg_index = 0;
  899. for (i = 0; i < AVG_THERMAL_NUM; i++) {
  900. if (rtlpriv->dm.thermalvalue_avg[i]) {
  901. thermalvalue_avg +=
  902. rtlpriv->dm.thermalvalue_avg[i];
  903. thermalvalue_avg_count++;
  904. }
  905. }
  906. if (thermalvalue_avg_count)
  907. thermalvalue = (u8) (thermalvalue_avg /
  908. thermalvalue_avg_count);
  909. if (rtlhal->reloadtxpowerindex) {
  910. delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
  911. (thermalvalue - rtlefuse->eeprom_thermalmeter) :
  912. (rtlefuse->eeprom_thermalmeter - thermalvalue);
  913. rtlhal->reloadtxpowerindex = false;
  914. rtlpriv->dm.done_txpower = false;
  915. } else if (rtlpriv->dm.done_txpower) {
  916. delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
  917. (thermalvalue - rtlpriv->dm.thermalvalue) :
  918. (rtlpriv->dm.thermalvalue - thermalvalue);
  919. } else {
  920. delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
  921. (thermalvalue - rtlefuse->eeprom_thermalmeter) :
  922. (rtlefuse->eeprom_thermalmeter - thermalvalue);
  923. }
  924. delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
  925. (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
  926. (rtlpriv->dm.thermalvalue_lck - thermalvalue);
  927. delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
  928. (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
  929. (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
  930. delta_rxgain =
  931. (thermalvalue > rtlpriv->dm.thermalvalue_rxgain) ?
  932. (thermalvalue - rtlpriv->dm.thermalvalue_rxgain) :
  933. (rtlpriv->dm.thermalvalue_rxgain - thermalvalue);
  934. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  935. "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x delta 0x%x delta_lck 0x%x delta_iqk 0x%x\n",
  936. thermalvalue, rtlpriv->dm.thermalvalue,
  937. rtlefuse->eeprom_thermalmeter, delta, delta_lck,
  938. delta_iqk);
  939. if ((delta_lck > rtlefuse->delta_lck) &&
  940. (rtlefuse->delta_lck != 0)) {
  941. rtlpriv->dm.thermalvalue_lck = thermalvalue;
  942. rtl92d_phy_lc_calibrate(hw);
  943. }
  944. if (delta > 0 && rtlpriv->dm.txpower_track_control) {
  945. rtlpriv->dm.done_txpower = true;
  946. delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
  947. (thermalvalue - rtlefuse->eeprom_thermalmeter) :
  948. (rtlefuse->eeprom_thermalmeter - thermalvalue);
  949. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  950. offset = 4;
  951. if (delta > INDEX_MAPPING_NUM - 1)
  952. index = index_mapping[offset]
  953. [INDEX_MAPPING_NUM - 1];
  954. else
  955. index = index_mapping[offset][delta];
  956. if (thermalvalue > rtlpriv->dm.thermalvalue) {
  957. for (i = 0; i < rf; i++)
  958. ofdm_index[i] -= delta;
  959. cck_index -= delta;
  960. } else {
  961. for (i = 0; i < rf; i++)
  962. ofdm_index[i] += index;
  963. cck_index += index;
  964. }
  965. } else if (rtlhal->current_bandtype == BAND_ON_5G) {
  966. rtl92d_bandtype_5G(rtlhal, ofdm_index,
  967. &internal_pa, thermalvalue,
  968. delta, rf, rtlefuse, rtlpriv,
  969. rtlphy, index_mapping,
  970. index_mapping_internal_pa);
  971. }
  972. if (is2t) {
  973. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  974. "temp OFDM_A_index=0x%x, OFDM_B_index = 0x%x,cck_index=0x%x\n",
  975. rtlpriv->dm.ofdm_index[0],
  976. rtlpriv->dm.ofdm_index[1],
  977. rtlpriv->dm.cck_index);
  978. } else {
  979. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  980. "temp OFDM_A_index=0x%x,cck_index = 0x%x\n",
  981. rtlpriv->dm.ofdm_index[0],
  982. rtlpriv->dm.cck_index);
  983. }
  984. for (i = 0; i < rf; i++) {
  985. if (ofdm_index[i] > OFDM_TABLE_SIZE_92D - 1)
  986. ofdm_index[i] = OFDM_TABLE_SIZE_92D - 1;
  987. else if (ofdm_index[i] < ofdm_min_index)
  988. ofdm_index[i] = ofdm_min_index;
  989. }
  990. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  991. if (cck_index > CCK_TABLE_SIZE - 1) {
  992. cck_index = CCK_TABLE_SIZE - 1;
  993. } else if (internal_pa ||
  994. rtlhal->current_bandtype ==
  995. BAND_ON_2_4G) {
  996. if (ofdm_index[i] <
  997. ofdm_min_index_internal_pa)
  998. ofdm_index[i] =
  999. ofdm_min_index_internal_pa;
  1000. } else if (cck_index < 0) {
  1001. cck_index = 0;
  1002. }
  1003. }
  1004. if (is2t) {
  1005. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1006. "new OFDM_A_index=0x%x, OFDM_B_index = 0x%x, cck_index=0x%x\n",
  1007. ofdm_index[0], ofdm_index[1],
  1008. cck_index);
  1009. } else {
  1010. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1011. "new OFDM_A_index=0x%x,cck_index = 0x%x\n",
  1012. ofdm_index[0], cck_index);
  1013. }
  1014. ele_d = (ofdmswing_table[(u8) ofdm_index[0]] &
  1015. 0xFFC00000) >> 22;
  1016. val_x = rtlphy->iqk_matrix
  1017. [indexforchannel].value[0][0];
  1018. val_y = rtlphy->iqk_matrix
  1019. [indexforchannel].value[0][1];
  1020. if (val_x != 0) {
  1021. if ((val_x & 0x00000200) != 0)
  1022. val_x = val_x | 0xFFFFFC00;
  1023. ele_a =
  1024. ((val_x * ele_d) >> 8) & 0x000003FF;
  1025. /* new element C = element D x Y */
  1026. if ((val_y & 0x00000200) != 0)
  1027. val_y = val_y | 0xFFFFFC00;
  1028. ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
  1029. /* wirte new elements A, C, D to regC80 and
  1030. * regC94, element B is always 0 */
  1031. value32 = (ele_d << 22) | ((ele_c & 0x3F) <<
  1032. 16) | ele_a;
  1033. rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
  1034. BMASKDWORD, value32);
  1035. value32 = (ele_c & 0x000003C0) >> 6;
  1036. rtl_set_bbreg(hw, ROFDM0_XCTxAFE, BMASKH4BITS,
  1037. value32);
  1038. value32 = ((val_x * ele_d) >> 7) & 0x01;
  1039. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(24),
  1040. value32);
  1041. } else {
  1042. rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
  1043. BMASKDWORD,
  1044. ofdmswing_table
  1045. [(u8)ofdm_index[0]]);
  1046. rtl_set_bbreg(hw, ROFDM0_XCTxAFE, BMASKH4BITS,
  1047. 0x00);
  1048. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
  1049. BIT(24), 0x00);
  1050. }
  1051. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1052. "TxPwrTracking for interface %d path A: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xe94 = 0x%lx 0xe9c = 0x%lx\n",
  1053. rtlhal->interfaceindex,
  1054. val_x, val_y, ele_a, ele_c, ele_d,
  1055. val_x, val_y);
  1056. if (cck_index >= CCK_TABLE_SIZE)
  1057. cck_index = CCK_TABLE_SIZE - 1;
  1058. if (cck_index < 0)
  1059. cck_index = 0;
  1060. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  1061. /* Adjust CCK according to IQK result */
  1062. if (!rtlpriv->dm.cck_inch14) {
  1063. rtl_write_byte(rtlpriv, 0xa22,
  1064. cckswing_table_ch1ch13
  1065. [(u8)cck_index][0]);
  1066. rtl_write_byte(rtlpriv, 0xa23,
  1067. cckswing_table_ch1ch13
  1068. [(u8)cck_index][1]);
  1069. rtl_write_byte(rtlpriv, 0xa24,
  1070. cckswing_table_ch1ch13
  1071. [(u8)cck_index][2]);
  1072. rtl_write_byte(rtlpriv, 0xa25,
  1073. cckswing_table_ch1ch13
  1074. [(u8)cck_index][3]);
  1075. rtl_write_byte(rtlpriv, 0xa26,
  1076. cckswing_table_ch1ch13
  1077. [(u8)cck_index][4]);
  1078. rtl_write_byte(rtlpriv, 0xa27,
  1079. cckswing_table_ch1ch13
  1080. [(u8)cck_index][5]);
  1081. rtl_write_byte(rtlpriv, 0xa28,
  1082. cckswing_table_ch1ch13
  1083. [(u8)cck_index][6]);
  1084. rtl_write_byte(rtlpriv, 0xa29,
  1085. cckswing_table_ch1ch13
  1086. [(u8)cck_index][7]);
  1087. } else {
  1088. rtl_write_byte(rtlpriv, 0xa22,
  1089. cckswing_table_ch14
  1090. [(u8)cck_index][0]);
  1091. rtl_write_byte(rtlpriv, 0xa23,
  1092. cckswing_table_ch14
  1093. [(u8)cck_index][1]);
  1094. rtl_write_byte(rtlpriv, 0xa24,
  1095. cckswing_table_ch14
  1096. [(u8)cck_index][2]);
  1097. rtl_write_byte(rtlpriv, 0xa25,
  1098. cckswing_table_ch14
  1099. [(u8)cck_index][3]);
  1100. rtl_write_byte(rtlpriv, 0xa26,
  1101. cckswing_table_ch14
  1102. [(u8)cck_index][4]);
  1103. rtl_write_byte(rtlpriv, 0xa27,
  1104. cckswing_table_ch14
  1105. [(u8)cck_index][5]);
  1106. rtl_write_byte(rtlpriv, 0xa28,
  1107. cckswing_table_ch14
  1108. [(u8)cck_index][6]);
  1109. rtl_write_byte(rtlpriv, 0xa29,
  1110. cckswing_table_ch14
  1111. [(u8)cck_index][7]);
  1112. }
  1113. }
  1114. if (is2t) {
  1115. ele_d = (ofdmswing_table[(u8) ofdm_index[1]] &
  1116. 0xFFC00000) >> 22;
  1117. val_x = rtlphy->iqk_matrix
  1118. [indexforchannel].value[0][4];
  1119. val_y = rtlphy->iqk_matrix
  1120. [indexforchannel].value[0][5];
  1121. if (val_x != 0) {
  1122. if ((val_x & 0x00000200) != 0)
  1123. /* consider minus */
  1124. val_x = val_x | 0xFFFFFC00;
  1125. ele_a = ((val_x * ele_d) >> 8) &
  1126. 0x000003FF;
  1127. /* new element C = element D x Y */
  1128. if ((val_y & 0x00000200) != 0)
  1129. val_y =
  1130. val_y | 0xFFFFFC00;
  1131. ele_c =
  1132. ((val_y *
  1133. ele_d) >> 8) & 0x00003FF;
  1134. /* write new elements A, C, D to regC88
  1135. * and regC9C, element B is always 0
  1136. */
  1137. value32 = (ele_d << 22) |
  1138. ((ele_c & 0x3F) << 16) |
  1139. ele_a;
  1140. rtl_set_bbreg(hw,
  1141. ROFDM0_XBTxIQIMBALANCE,
  1142. BMASKDWORD, value32);
  1143. value32 = (ele_c & 0x000003C0) >> 6;
  1144. rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
  1145. BMASKH4BITS, value32);
  1146. value32 = ((val_x * ele_d) >> 7) & 0x01;
  1147. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
  1148. BIT(28), value32);
  1149. } else {
  1150. rtl_set_bbreg(hw,
  1151. ROFDM0_XBTxIQIMBALANCE,
  1152. BMASKDWORD,
  1153. ofdmswing_table
  1154. [(u8) ofdm_index[1]]);
  1155. rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
  1156. BMASKH4BITS, 0x00);
  1157. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
  1158. BIT(28), 0x00);
  1159. }
  1160. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1161. "TxPwrTracking path B: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xeb4 = 0x%lx 0xebc = 0x%lx\n",
  1162. val_x, val_y, ele_a, ele_c,
  1163. ele_d, val_x, val_y);
  1164. }
  1165. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1166. "TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n",
  1167. rtl_get_bbreg(hw, 0xc80, BMASKDWORD),
  1168. rtl_get_bbreg(hw, 0xc94, BMASKDWORD),
  1169. rtl_get_rfreg(hw, RF90_PATH_A, 0x24,
  1170. BRFREGOFFSETMASK));
  1171. }
  1172. if ((delta_iqk > rtlefuse->delta_iqk) &&
  1173. (rtlefuse->delta_iqk != 0)) {
  1174. rtl92d_phy_reset_iqk_result(hw);
  1175. rtlpriv->dm.thermalvalue_iqk = thermalvalue;
  1176. rtl92d_phy_iq_calibrate(hw);
  1177. }
  1178. if (delta_rxgain > 0 && rtlhal->current_bandtype == BAND_ON_5G
  1179. && thermalvalue <= rtlefuse->eeprom_thermalmeter) {
  1180. rtlpriv->dm.thermalvalue_rxgain = thermalvalue;
  1181. rtl92d_dm_rxgain_tracking_thermalmeter(hw);
  1182. }
  1183. if (rtlpriv->dm.txpower_track_control)
  1184. rtlpriv->dm.thermalvalue = thermalvalue;
  1185. }
  1186. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "<===\n");
  1187. }
  1188. static void rtl92d_dm_initialize_txpower_tracking(struct ieee80211_hw *hw)
  1189. {
  1190. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1191. rtlpriv->dm.txpower_tracking = true;
  1192. rtlpriv->dm.txpower_trackinginit = false;
  1193. rtlpriv->dm.txpower_track_control = true;
  1194. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1195. "pMgntInfo->txpower_tracking = %d\n",
  1196. rtlpriv->dm.txpower_tracking);
  1197. }
  1198. void rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw *hw)
  1199. {
  1200. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1201. static u8 tm_trigger;
  1202. if (!rtlpriv->dm.txpower_tracking)
  1203. return;
  1204. if (!tm_trigger) {
  1205. rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, BIT(17) |
  1206. BIT(16), 0x03);
  1207. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1208. "Trigger 92S Thermal Meter!!\n");
  1209. tm_trigger = 1;
  1210. return;
  1211. } else {
  1212. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1213. "Schedule TxPowerTracking direct call!!\n");
  1214. rtl92d_dm_txpower_tracking_callback_thermalmeter(hw);
  1215. tm_trigger = 0;
  1216. }
  1217. }
  1218. void rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
  1219. {
  1220. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1221. struct rate_adaptive *ra = &(rtlpriv->ra);
  1222. ra->ratr_state = DM_RATR_STA_INIT;
  1223. ra->pre_ratr_state = DM_RATR_STA_INIT;
  1224. if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
  1225. rtlpriv->dm.useramask = true;
  1226. else
  1227. rtlpriv->dm.useramask = false;
  1228. }
  1229. void rtl92d_dm_init(struct ieee80211_hw *hw)
  1230. {
  1231. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1232. rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
  1233. rtl92d_dm_diginit(hw);
  1234. rtl92d_dm_init_dynamic_txpower(hw);
  1235. rtl92d_dm_init_edca_turbo(hw);
  1236. rtl92d_dm_init_rate_adaptive_mask(hw);
  1237. rtl92d_dm_initialize_txpower_tracking(hw);
  1238. }
  1239. void rtl92d_dm_watchdog(struct ieee80211_hw *hw)
  1240. {
  1241. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  1242. bool fw_current_inpsmode = false;
  1243. bool fwps_awake = true;
  1244. /* 1. RF is OFF. (No need to do DM.)
  1245. * 2. Fw is under power saving mode for FwLPS.
  1246. * (Prevent from SW/FW I/O racing.)
  1247. * 3. IPS workitem is scheduled. (Prevent from IPS sequence
  1248. * to be swapped with DM.
  1249. * 4. RFChangeInProgress is TRUE.
  1250. * (Prevent from broken by IPS/HW/SW Rf off.) */
  1251. if ((ppsc->rfpwr_state == ERFON) && ((!fw_current_inpsmode) &&
  1252. fwps_awake) && (!ppsc->rfchange_inprogress)) {
  1253. rtl92d_dm_pwdb_monitor(hw);
  1254. rtl92d_dm_false_alarm_counter_statistics(hw);
  1255. rtl92d_dm_find_minimum_rssi(hw);
  1256. rtl92d_dm_dig(hw);
  1257. /* rtl92d_dm_dynamic_bb_powersaving(hw); */
  1258. rtl92d_dm_dynamic_txpower(hw);
  1259. /* rtl92d_dm_check_txpower_tracking_thermal_meter(hw); */
  1260. /* rtl92d_dm_refresh_rate_adaptive_mask(hw); */
  1261. /* rtl92d_dm_interrupt_migration(hw); */
  1262. rtl92d_dm_check_edca_turbo(hw);
  1263. }
  1264. }