wcn36xx.h 6.8 KB

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  1. /*
  2. * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11. * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13. * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14. * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef _WCN36XX_H_
  17. #define _WCN36XX_H_
  18. #include <linux/completion.h>
  19. #include <linux/printk.h>
  20. #include <linux/spinlock.h>
  21. #include <net/mac80211.h>
  22. #include "hal.h"
  23. #include "smd.h"
  24. #include "txrx.h"
  25. #include "dxe.h"
  26. #include "pmc.h"
  27. #include "debug.h"
  28. #define WLAN_NV_FILE "wlan/prima/WCNSS_qcom_wlan_nv.bin"
  29. #define WCN36XX_AGGR_BUFFER_SIZE 64
  30. extern unsigned int wcn36xx_dbg_mask;
  31. enum wcn36xx_debug_mask {
  32. WCN36XX_DBG_DXE = 0x00000001,
  33. WCN36XX_DBG_DXE_DUMP = 0x00000002,
  34. WCN36XX_DBG_SMD = 0x00000004,
  35. WCN36XX_DBG_SMD_DUMP = 0x00000008,
  36. WCN36XX_DBG_RX = 0x00000010,
  37. WCN36XX_DBG_RX_DUMP = 0x00000020,
  38. WCN36XX_DBG_TX = 0x00000040,
  39. WCN36XX_DBG_TX_DUMP = 0x00000080,
  40. WCN36XX_DBG_HAL = 0x00000100,
  41. WCN36XX_DBG_HAL_DUMP = 0x00000200,
  42. WCN36XX_DBG_MAC = 0x00000400,
  43. WCN36XX_DBG_BEACON = 0x00000800,
  44. WCN36XX_DBG_BEACON_DUMP = 0x00001000,
  45. WCN36XX_DBG_PMC = 0x00002000,
  46. WCN36XX_DBG_PMC_DUMP = 0x00004000,
  47. WCN36XX_DBG_ANY = 0xffffffff,
  48. };
  49. #define wcn36xx_err(fmt, arg...) \
  50. printk(KERN_ERR pr_fmt("ERROR " fmt), ##arg);
  51. #define wcn36xx_warn(fmt, arg...) \
  52. printk(KERN_WARNING pr_fmt("WARNING " fmt), ##arg)
  53. #define wcn36xx_info(fmt, arg...) \
  54. printk(KERN_INFO pr_fmt(fmt), ##arg)
  55. #define wcn36xx_dbg(mask, fmt, arg...) do { \
  56. if (wcn36xx_dbg_mask & mask) \
  57. printk(KERN_DEBUG pr_fmt(fmt), ##arg); \
  58. } while (0)
  59. #define wcn36xx_dbg_dump(mask, prefix_str, buf, len) do { \
  60. if (wcn36xx_dbg_mask & mask) \
  61. print_hex_dump(KERN_DEBUG, pr_fmt(prefix_str), \
  62. DUMP_PREFIX_OFFSET, 32, 1, \
  63. buf, len, false); \
  64. } while (0)
  65. #define WCN36XX_HW_CHANNEL(__wcn) (__wcn->hw->conf.chandef.chan->hw_value)
  66. #define WCN36XX_BAND(__wcn) (__wcn->hw->conf.chandef.chan->band)
  67. #define WCN36XX_CENTER_FREQ(__wcn) (__wcn->hw->conf.chandef.chan->center_freq)
  68. #define WCN36XX_LISTEN_INTERVAL(__wcn) (__wcn->hw->conf.listen_interval)
  69. #define WCN36XX_FLAGS(__wcn) (__wcn->hw->flags)
  70. #define WCN36XX_MAX_POWER(__wcn) (__wcn->hw->conf.chandef.chan->max_power)
  71. static inline void buff_to_be(u32 *buf, size_t len)
  72. {
  73. int i;
  74. for (i = 0; i < len; i++)
  75. buf[i] = cpu_to_be32(buf[i]);
  76. }
  77. struct nv_data {
  78. int is_valid;
  79. u8 table;
  80. };
  81. /* Interface for platform control path
  82. *
  83. * @open: hook must be called when wcn36xx wants to open control channel.
  84. * @tx: sends a buffer.
  85. */
  86. struct wcn36xx_platform_ctrl_ops {
  87. int (*open)(void *drv_priv, void *rsp_cb);
  88. void (*close)(void);
  89. int (*tx)(char *buf, size_t len);
  90. int (*get_hw_mac)(u8 *addr);
  91. int (*smsm_change_state)(u32 clear_mask, u32 set_mask);
  92. };
  93. /**
  94. * struct wcn36xx_vif - holds VIF related fields
  95. *
  96. * @bss_index: bss_index is initially set to 0xFF. bss_index is received from
  97. * HW after first config_bss call and must be used in delete_bss and
  98. * enter/exit_bmps.
  99. */
  100. struct wcn36xx_vif {
  101. struct list_head list;
  102. struct wcn36xx_sta *sta;
  103. u8 dtim_period;
  104. enum ani_ed_type encrypt_type;
  105. bool is_joining;
  106. struct wcn36xx_hal_mac_ssid ssid;
  107. /* Power management */
  108. enum wcn36xx_power_state pw_state;
  109. u8 bss_index;
  110. u8 ucast_dpu_signature;
  111. /* Returned from WCN36XX_HAL_ADD_STA_SELF_RSP */
  112. u8 self_sta_index;
  113. u8 self_dpu_desc_index;
  114. };
  115. /**
  116. * struct wcn36xx_sta - holds STA related fields
  117. *
  118. * @tid: traffic ID that is used during AMPDU and in TX BD.
  119. * @sta_index: STA index is returned from HW after config_sta call and is
  120. * used in both SMD channel and TX BD.
  121. * @dpu_desc_index: DPU descriptor index is returned from HW after config_sta
  122. * call and is used in TX BD.
  123. * @bss_sta_index: STA index is returned from HW after config_bss call and is
  124. * used in both SMD channel and TX BD. See table bellow when it is used.
  125. * @bss_dpu_desc_index: DPU descriptor index is returned from HW after
  126. * config_bss call and is used in TX BD.
  127. * ______________________________________________
  128. * | | STA | AP |
  129. * |______________|_____________|_______________|
  130. * | TX BD |bss_sta_index| sta_index |
  131. * |______________|_____________|_______________|
  132. * |all SMD calls |bss_sta_index| sta_index |
  133. * |______________|_____________|_______________|
  134. * |smd_delete_sta| sta_index | sta_index |
  135. * |______________|_____________|_______________|
  136. */
  137. struct wcn36xx_sta {
  138. struct wcn36xx_vif *vif;
  139. u16 aid;
  140. u16 tid;
  141. u8 sta_index;
  142. u8 dpu_desc_index;
  143. u8 bss_sta_index;
  144. u8 bss_dpu_desc_index;
  145. bool is_data_encrypted;
  146. /* Rates */
  147. struct wcn36xx_hal_supported_rates supported_rates;
  148. };
  149. struct wcn36xx_dxe_ch;
  150. struct wcn36xx {
  151. struct ieee80211_hw *hw;
  152. struct device *dev;
  153. struct list_head vif_list;
  154. u8 fw_revision;
  155. u8 fw_version;
  156. u8 fw_minor;
  157. u8 fw_major;
  158. /* extra byte for the NULL termination */
  159. u8 crm_version[WCN36XX_HAL_VERSION_LENGTH + 1];
  160. u8 wlan_version[WCN36XX_HAL_VERSION_LENGTH + 1];
  161. /* IRQs */
  162. int tx_irq;
  163. int rx_irq;
  164. void __iomem *mmio;
  165. struct wcn36xx_platform_ctrl_ops *ctrl_ops;
  166. /*
  167. * smd_buf must be protected with smd_mutex to garantee
  168. * that all messages are sent one after another
  169. */
  170. u8 *hal_buf;
  171. size_t hal_rsp_len;
  172. struct mutex hal_mutex;
  173. struct completion hal_rsp_compl;
  174. struct workqueue_struct *hal_ind_wq;
  175. struct work_struct hal_ind_work;
  176. struct mutex hal_ind_mutex;
  177. struct list_head hal_ind_queue;
  178. /* DXE channels */
  179. struct wcn36xx_dxe_ch dxe_tx_l_ch; /* TX low */
  180. struct wcn36xx_dxe_ch dxe_tx_h_ch; /* TX high */
  181. struct wcn36xx_dxe_ch dxe_rx_l_ch; /* RX low */
  182. struct wcn36xx_dxe_ch dxe_rx_h_ch; /* RX high */
  183. /* For synchronization of DXE resources from BH, IRQ and WQ contexts */
  184. spinlock_t dxe_lock;
  185. bool queues_stopped;
  186. /* Memory pools */
  187. struct wcn36xx_dxe_mem_pool mgmt_mem_pool;
  188. struct wcn36xx_dxe_mem_pool data_mem_pool;
  189. struct sk_buff *tx_ack_skb;
  190. #ifdef CONFIG_WCN36XX_DEBUGFS
  191. /* Debug file system entry */
  192. struct wcn36xx_dfs_entry dfs;
  193. #endif /* CONFIG_WCN36XX_DEBUGFS */
  194. };
  195. static inline bool wcn36xx_is_fw_version(struct wcn36xx *wcn,
  196. u8 major,
  197. u8 minor,
  198. u8 version,
  199. u8 revision)
  200. {
  201. return (wcn->fw_major == major &&
  202. wcn->fw_minor == minor &&
  203. wcn->fw_version == version &&
  204. wcn->fw_revision == revision);
  205. }
  206. void wcn36xx_set_default_rates(struct wcn36xx_hal_supported_rates *rates);
  207. #endif /* _WCN36XX_H_ */