htt_tx.c 14 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/etherdevice.h>
  18. #include "htt.h"
  19. #include "mac.h"
  20. #include "hif.h"
  21. #include "txrx.h"
  22. #include "debug.h"
  23. void __ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)
  24. {
  25. htt->num_pending_tx--;
  26. if (htt->num_pending_tx == htt->max_num_pending_tx - 1)
  27. ieee80211_wake_queues(htt->ar->hw);
  28. }
  29. static void ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)
  30. {
  31. spin_lock_bh(&htt->tx_lock);
  32. __ath10k_htt_tx_dec_pending(htt);
  33. spin_unlock_bh(&htt->tx_lock);
  34. }
  35. static int ath10k_htt_tx_inc_pending(struct ath10k_htt *htt)
  36. {
  37. int ret = 0;
  38. spin_lock_bh(&htt->tx_lock);
  39. if (htt->num_pending_tx >= htt->max_num_pending_tx) {
  40. ret = -EBUSY;
  41. goto exit;
  42. }
  43. htt->num_pending_tx++;
  44. if (htt->num_pending_tx == htt->max_num_pending_tx)
  45. ieee80211_stop_queues(htt->ar->hw);
  46. exit:
  47. spin_unlock_bh(&htt->tx_lock);
  48. return ret;
  49. }
  50. int ath10k_htt_tx_alloc_msdu_id(struct ath10k_htt *htt)
  51. {
  52. int msdu_id;
  53. lockdep_assert_held(&htt->tx_lock);
  54. msdu_id = find_first_zero_bit(htt->used_msdu_ids,
  55. htt->max_num_pending_tx);
  56. if (msdu_id == htt->max_num_pending_tx)
  57. return -ENOBUFS;
  58. ath10k_dbg(ATH10K_DBG_HTT, "htt tx alloc msdu_id %d\n", msdu_id);
  59. __set_bit(msdu_id, htt->used_msdu_ids);
  60. return msdu_id;
  61. }
  62. void ath10k_htt_tx_free_msdu_id(struct ath10k_htt *htt, u16 msdu_id)
  63. {
  64. lockdep_assert_held(&htt->tx_lock);
  65. if (!test_bit(msdu_id, htt->used_msdu_ids))
  66. ath10k_warn("trying to free unallocated msdu_id %d\n", msdu_id);
  67. ath10k_dbg(ATH10K_DBG_HTT, "htt tx free msdu_id %hu\n", msdu_id);
  68. __clear_bit(msdu_id, htt->used_msdu_ids);
  69. }
  70. int ath10k_htt_tx_attach(struct ath10k_htt *htt)
  71. {
  72. u8 pipe;
  73. spin_lock_init(&htt->tx_lock);
  74. init_waitqueue_head(&htt->empty_tx_wq);
  75. /* At the beginning free queue number should hint us the maximum
  76. * queue length */
  77. pipe = htt->ar->htc.endpoint[htt->eid].ul_pipe_id;
  78. htt->max_num_pending_tx = ath10k_hif_get_free_queue_number(htt->ar,
  79. pipe);
  80. ath10k_dbg(ATH10K_DBG_BOOT, "htt tx max num pending tx %d\n",
  81. htt->max_num_pending_tx);
  82. htt->pending_tx = kzalloc(sizeof(*htt->pending_tx) *
  83. htt->max_num_pending_tx, GFP_KERNEL);
  84. if (!htt->pending_tx)
  85. return -ENOMEM;
  86. htt->used_msdu_ids = kzalloc(sizeof(unsigned long) *
  87. BITS_TO_LONGS(htt->max_num_pending_tx),
  88. GFP_KERNEL);
  89. if (!htt->used_msdu_ids) {
  90. kfree(htt->pending_tx);
  91. return -ENOMEM;
  92. }
  93. return 0;
  94. }
  95. static void ath10k_htt_tx_cleanup_pending(struct ath10k_htt *htt)
  96. {
  97. struct htt_tx_done tx_done = {0};
  98. int msdu_id;
  99. /* No locks needed. Called after communication with the device has
  100. * been stopped. */
  101. for (msdu_id = 0; msdu_id < htt->max_num_pending_tx; msdu_id++) {
  102. if (!test_bit(msdu_id, htt->used_msdu_ids))
  103. continue;
  104. ath10k_dbg(ATH10K_DBG_HTT, "force cleanup msdu_id %hu\n",
  105. msdu_id);
  106. tx_done.discard = 1;
  107. tx_done.msdu_id = msdu_id;
  108. ath10k_txrx_tx_unref(htt, &tx_done);
  109. }
  110. }
  111. void ath10k_htt_tx_detach(struct ath10k_htt *htt)
  112. {
  113. ath10k_htt_tx_cleanup_pending(htt);
  114. kfree(htt->pending_tx);
  115. kfree(htt->used_msdu_ids);
  116. return;
  117. }
  118. void ath10k_htt_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
  119. {
  120. dev_kfree_skb_any(skb);
  121. }
  122. int ath10k_htt_h2t_ver_req_msg(struct ath10k_htt *htt)
  123. {
  124. struct sk_buff *skb;
  125. struct htt_cmd *cmd;
  126. int len = 0;
  127. int ret;
  128. len += sizeof(cmd->hdr);
  129. len += sizeof(cmd->ver_req);
  130. skb = ath10k_htc_alloc_skb(len);
  131. if (!skb)
  132. return -ENOMEM;
  133. skb_put(skb, len);
  134. cmd = (struct htt_cmd *)skb->data;
  135. cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_VERSION_REQ;
  136. ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
  137. if (ret) {
  138. dev_kfree_skb_any(skb);
  139. return ret;
  140. }
  141. return 0;
  142. }
  143. int ath10k_htt_h2t_stats_req(struct ath10k_htt *htt, u8 mask, u64 cookie)
  144. {
  145. struct htt_stats_req *req;
  146. struct sk_buff *skb;
  147. struct htt_cmd *cmd;
  148. int len = 0, ret;
  149. len += sizeof(cmd->hdr);
  150. len += sizeof(cmd->stats_req);
  151. skb = ath10k_htc_alloc_skb(len);
  152. if (!skb)
  153. return -ENOMEM;
  154. skb_put(skb, len);
  155. cmd = (struct htt_cmd *)skb->data;
  156. cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_STATS_REQ;
  157. req = &cmd->stats_req;
  158. memset(req, 0, sizeof(*req));
  159. /* currently we support only max 8 bit masks so no need to worry
  160. * about endian support */
  161. req->upload_types[0] = mask;
  162. req->reset_types[0] = mask;
  163. req->stat_type = HTT_STATS_REQ_CFG_STAT_TYPE_INVALID;
  164. req->cookie_lsb = cpu_to_le32(cookie & 0xffffffff);
  165. req->cookie_msb = cpu_to_le32((cookie & 0xffffffff00000000ULL) >> 32);
  166. ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
  167. if (ret) {
  168. ath10k_warn("failed to send htt type stats request: %d", ret);
  169. dev_kfree_skb_any(skb);
  170. return ret;
  171. }
  172. return 0;
  173. }
  174. int ath10k_htt_send_rx_ring_cfg_ll(struct ath10k_htt *htt)
  175. {
  176. struct sk_buff *skb;
  177. struct htt_cmd *cmd;
  178. struct htt_rx_ring_setup_ring *ring;
  179. const int num_rx_ring = 1;
  180. u16 flags;
  181. u32 fw_idx;
  182. int len;
  183. int ret;
  184. /*
  185. * the HW expects the buffer to be an integral number of 4-byte
  186. * "words"
  187. */
  188. BUILD_BUG_ON(!IS_ALIGNED(HTT_RX_BUF_SIZE, 4));
  189. BUILD_BUG_ON((HTT_RX_BUF_SIZE & HTT_MAX_CACHE_LINE_SIZE_MASK) != 0);
  190. len = sizeof(cmd->hdr) + sizeof(cmd->rx_setup.hdr)
  191. + (sizeof(*ring) * num_rx_ring);
  192. skb = ath10k_htc_alloc_skb(len);
  193. if (!skb)
  194. return -ENOMEM;
  195. skb_put(skb, len);
  196. cmd = (struct htt_cmd *)skb->data;
  197. ring = &cmd->rx_setup.rings[0];
  198. cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_RX_RING_CFG;
  199. cmd->rx_setup.hdr.num_rings = 1;
  200. /* FIXME: do we need all of this? */
  201. flags = 0;
  202. flags |= HTT_RX_RING_FLAGS_MAC80211_HDR;
  203. flags |= HTT_RX_RING_FLAGS_MSDU_PAYLOAD;
  204. flags |= HTT_RX_RING_FLAGS_PPDU_START;
  205. flags |= HTT_RX_RING_FLAGS_PPDU_END;
  206. flags |= HTT_RX_RING_FLAGS_MPDU_START;
  207. flags |= HTT_RX_RING_FLAGS_MPDU_END;
  208. flags |= HTT_RX_RING_FLAGS_MSDU_START;
  209. flags |= HTT_RX_RING_FLAGS_MSDU_END;
  210. flags |= HTT_RX_RING_FLAGS_RX_ATTENTION;
  211. flags |= HTT_RX_RING_FLAGS_FRAG_INFO;
  212. flags |= HTT_RX_RING_FLAGS_UNICAST_RX;
  213. flags |= HTT_RX_RING_FLAGS_MULTICAST_RX;
  214. flags |= HTT_RX_RING_FLAGS_CTRL_RX;
  215. flags |= HTT_RX_RING_FLAGS_MGMT_RX;
  216. flags |= HTT_RX_RING_FLAGS_NULL_RX;
  217. flags |= HTT_RX_RING_FLAGS_PHY_DATA_RX;
  218. fw_idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
  219. ring->fw_idx_shadow_reg_paddr =
  220. __cpu_to_le32(htt->rx_ring.alloc_idx.paddr);
  221. ring->rx_ring_base_paddr = __cpu_to_le32(htt->rx_ring.base_paddr);
  222. ring->rx_ring_len = __cpu_to_le16(htt->rx_ring.size);
  223. ring->rx_ring_bufsize = __cpu_to_le16(HTT_RX_BUF_SIZE);
  224. ring->flags = __cpu_to_le16(flags);
  225. ring->fw_idx_init_val = __cpu_to_le16(fw_idx);
  226. #define desc_offset(x) (offsetof(struct htt_rx_desc, x) / 4)
  227. ring->mac80211_hdr_offset = __cpu_to_le16(desc_offset(rx_hdr_status));
  228. ring->msdu_payload_offset = __cpu_to_le16(desc_offset(msdu_payload));
  229. ring->ppdu_start_offset = __cpu_to_le16(desc_offset(ppdu_start));
  230. ring->ppdu_end_offset = __cpu_to_le16(desc_offset(ppdu_end));
  231. ring->mpdu_start_offset = __cpu_to_le16(desc_offset(mpdu_start));
  232. ring->mpdu_end_offset = __cpu_to_le16(desc_offset(mpdu_end));
  233. ring->msdu_start_offset = __cpu_to_le16(desc_offset(msdu_start));
  234. ring->msdu_end_offset = __cpu_to_le16(desc_offset(msdu_end));
  235. ring->rx_attention_offset = __cpu_to_le16(desc_offset(attention));
  236. ring->frag_info_offset = __cpu_to_le16(desc_offset(frag_info));
  237. #undef desc_offset
  238. ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
  239. if (ret) {
  240. dev_kfree_skb_any(skb);
  241. return ret;
  242. }
  243. return 0;
  244. }
  245. int ath10k_htt_mgmt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
  246. {
  247. struct device *dev = htt->ar->dev;
  248. struct sk_buff *txdesc = NULL;
  249. struct htt_cmd *cmd;
  250. struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(msdu);
  251. u8 vdev_id = skb_cb->htt.vdev_id;
  252. int len = 0;
  253. int msdu_id = -1;
  254. int res;
  255. res = ath10k_htt_tx_inc_pending(htt);
  256. if (res)
  257. goto err;
  258. len += sizeof(cmd->hdr);
  259. len += sizeof(cmd->mgmt_tx);
  260. spin_lock_bh(&htt->tx_lock);
  261. res = ath10k_htt_tx_alloc_msdu_id(htt);
  262. if (res < 0) {
  263. spin_unlock_bh(&htt->tx_lock);
  264. goto err_tx_dec;
  265. }
  266. msdu_id = res;
  267. htt->pending_tx[msdu_id] = msdu;
  268. spin_unlock_bh(&htt->tx_lock);
  269. txdesc = ath10k_htc_alloc_skb(len);
  270. if (!txdesc) {
  271. res = -ENOMEM;
  272. goto err_free_msdu_id;
  273. }
  274. res = ath10k_skb_map(dev, msdu);
  275. if (res)
  276. goto err_free_txdesc;
  277. skb_put(txdesc, len);
  278. cmd = (struct htt_cmd *)txdesc->data;
  279. cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_MGMT_TX;
  280. cmd->mgmt_tx.msdu_paddr = __cpu_to_le32(ATH10K_SKB_CB(msdu)->paddr);
  281. cmd->mgmt_tx.len = __cpu_to_le32(msdu->len);
  282. cmd->mgmt_tx.desc_id = __cpu_to_le32(msdu_id);
  283. cmd->mgmt_tx.vdev_id = __cpu_to_le32(vdev_id);
  284. memcpy(cmd->mgmt_tx.hdr, msdu->data,
  285. min_t(int, msdu->len, HTT_MGMT_FRM_HDR_DOWNLOAD_LEN));
  286. skb_cb->htt.frag_len = 0;
  287. skb_cb->htt.pad_len = 0;
  288. res = ath10k_htc_send(&htt->ar->htc, htt->eid, txdesc);
  289. if (res)
  290. goto err_unmap_msdu;
  291. return 0;
  292. err_unmap_msdu:
  293. ath10k_skb_unmap(dev, msdu);
  294. err_free_txdesc:
  295. dev_kfree_skb_any(txdesc);
  296. err_free_msdu_id:
  297. spin_lock_bh(&htt->tx_lock);
  298. htt->pending_tx[msdu_id] = NULL;
  299. ath10k_htt_tx_free_msdu_id(htt, msdu_id);
  300. spin_unlock_bh(&htt->tx_lock);
  301. err_tx_dec:
  302. ath10k_htt_tx_dec_pending(htt);
  303. err:
  304. return res;
  305. }
  306. int ath10k_htt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
  307. {
  308. struct device *dev = htt->ar->dev;
  309. struct htt_cmd *cmd;
  310. struct htt_data_tx_desc_frag *tx_frags;
  311. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)msdu->data;
  312. struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(msdu);
  313. struct sk_buff *txdesc = NULL;
  314. bool use_frags;
  315. u8 vdev_id = ATH10K_SKB_CB(msdu)->htt.vdev_id;
  316. u8 tid;
  317. int prefetch_len, desc_len;
  318. int msdu_id = -1;
  319. int res;
  320. u8 flags0;
  321. u16 flags1;
  322. res = ath10k_htt_tx_inc_pending(htt);
  323. if (res)
  324. goto err;
  325. spin_lock_bh(&htt->tx_lock);
  326. res = ath10k_htt_tx_alloc_msdu_id(htt);
  327. if (res < 0) {
  328. spin_unlock_bh(&htt->tx_lock);
  329. goto err_tx_dec;
  330. }
  331. msdu_id = res;
  332. htt->pending_tx[msdu_id] = msdu;
  333. spin_unlock_bh(&htt->tx_lock);
  334. prefetch_len = min(htt->prefetch_len, msdu->len);
  335. prefetch_len = roundup(prefetch_len, 4);
  336. desc_len = sizeof(cmd->hdr) + sizeof(cmd->data_tx) + prefetch_len;
  337. txdesc = ath10k_htc_alloc_skb(desc_len);
  338. if (!txdesc) {
  339. res = -ENOMEM;
  340. goto err_free_msdu_id;
  341. }
  342. /* Since HTT 3.0 there is no separate mgmt tx command. However in case
  343. * of mgmt tx using TX_FRM there is not tx fragment list. Instead of tx
  344. * fragment list host driver specifies directly frame pointer. */
  345. use_frags = htt->target_version_major < 3 ||
  346. !ieee80211_is_mgmt(hdr->frame_control);
  347. if (!IS_ALIGNED((unsigned long)txdesc->data, 4)) {
  348. ath10k_warn("htt alignment check failed. dropping packet.\n");
  349. res = -EIO;
  350. goto err_free_txdesc;
  351. }
  352. if (use_frags) {
  353. skb_cb->htt.frag_len = sizeof(*tx_frags) * 2;
  354. skb_cb->htt.pad_len = (unsigned long)msdu->data -
  355. round_down((unsigned long)msdu->data, 4);
  356. skb_push(msdu, skb_cb->htt.frag_len + skb_cb->htt.pad_len);
  357. } else {
  358. skb_cb->htt.frag_len = 0;
  359. skb_cb->htt.pad_len = 0;
  360. }
  361. res = ath10k_skb_map(dev, msdu);
  362. if (res)
  363. goto err_pull_txfrag;
  364. if (use_frags) {
  365. dma_sync_single_for_cpu(dev, skb_cb->paddr, msdu->len,
  366. DMA_TO_DEVICE);
  367. /* tx fragment list must be terminated with zero-entry */
  368. tx_frags = (struct htt_data_tx_desc_frag *)msdu->data;
  369. tx_frags[0].paddr = __cpu_to_le32(skb_cb->paddr +
  370. skb_cb->htt.frag_len +
  371. skb_cb->htt.pad_len);
  372. tx_frags[0].len = __cpu_to_le32(msdu->len -
  373. skb_cb->htt.frag_len -
  374. skb_cb->htt.pad_len);
  375. tx_frags[1].paddr = __cpu_to_le32(0);
  376. tx_frags[1].len = __cpu_to_le32(0);
  377. dma_sync_single_for_device(dev, skb_cb->paddr, msdu->len,
  378. DMA_TO_DEVICE);
  379. }
  380. ath10k_dbg(ATH10K_DBG_HTT, "msdu 0x%llx\n",
  381. (unsigned long long) ATH10K_SKB_CB(msdu)->paddr);
  382. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "msdu: ",
  383. msdu->data, msdu->len);
  384. skb_put(txdesc, desc_len);
  385. cmd = (struct htt_cmd *)txdesc->data;
  386. tid = ATH10K_SKB_CB(msdu)->htt.tid;
  387. ath10k_dbg(ATH10K_DBG_HTT, "htt data tx using tid %hhu\n", tid);
  388. flags0 = 0;
  389. if (!ieee80211_has_protected(hdr->frame_control))
  390. flags0 |= HTT_DATA_TX_DESC_FLAGS0_NO_ENCRYPT;
  391. flags0 |= HTT_DATA_TX_DESC_FLAGS0_MAC_HDR_PRESENT;
  392. if (use_frags)
  393. flags0 |= SM(ATH10K_HW_TXRX_NATIVE_WIFI,
  394. HTT_DATA_TX_DESC_FLAGS0_PKT_TYPE);
  395. else
  396. flags0 |= SM(ATH10K_HW_TXRX_MGMT,
  397. HTT_DATA_TX_DESC_FLAGS0_PKT_TYPE);
  398. flags1 = 0;
  399. flags1 |= SM((u16)vdev_id, HTT_DATA_TX_DESC_FLAGS1_VDEV_ID);
  400. flags1 |= SM((u16)tid, HTT_DATA_TX_DESC_FLAGS1_EXT_TID);
  401. flags1 |= HTT_DATA_TX_DESC_FLAGS1_CKSUM_L3_OFFLOAD;
  402. flags1 |= HTT_DATA_TX_DESC_FLAGS1_CKSUM_L4_OFFLOAD;
  403. cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_TX_FRM;
  404. cmd->data_tx.flags0 = flags0;
  405. cmd->data_tx.flags1 = __cpu_to_le16(flags1);
  406. cmd->data_tx.len = __cpu_to_le16(msdu->len -
  407. skb_cb->htt.frag_len -
  408. skb_cb->htt.pad_len);
  409. cmd->data_tx.id = __cpu_to_le16(msdu_id);
  410. cmd->data_tx.frags_paddr = __cpu_to_le32(skb_cb->paddr);
  411. cmd->data_tx.peerid = __cpu_to_le32(HTT_INVALID_PEERID);
  412. memcpy(cmd->data_tx.prefetch, hdr, prefetch_len);
  413. res = ath10k_htc_send(&htt->ar->htc, htt->eid, txdesc);
  414. if (res)
  415. goto err_unmap_msdu;
  416. return 0;
  417. err_unmap_msdu:
  418. ath10k_skb_unmap(dev, msdu);
  419. err_pull_txfrag:
  420. skb_pull(msdu, skb_cb->htt.frag_len + skb_cb->htt.pad_len);
  421. err_free_txdesc:
  422. dev_kfree_skb_any(txdesc);
  423. err_free_msdu_id:
  424. spin_lock_bh(&htt->tx_lock);
  425. htt->pending_tx[msdu_id] = NULL;
  426. ath10k_htt_tx_free_msdu_id(htt, msdu_id);
  427. spin_unlock_bh(&htt->tx_lock);
  428. err_tx_dec:
  429. ath10k_htt_tx_dec_pending(htt);
  430. err:
  431. return res;
  432. }