core.h 9.1 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #ifndef _CORE_H_
  18. #define _CORE_H_
  19. #include <linux/completion.h>
  20. #include <linux/if_ether.h>
  21. #include <linux/types.h>
  22. #include <linux/pci.h>
  23. #include "htt.h"
  24. #include "htc.h"
  25. #include "hw.h"
  26. #include "targaddrs.h"
  27. #include "wmi.h"
  28. #include "../ath.h"
  29. #include "../regd.h"
  30. #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
  31. #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
  32. #define WO(_f) ((_f##_OFFSET) >> 2)
  33. #define ATH10K_SCAN_ID 0
  34. #define WMI_READY_TIMEOUT (5 * HZ)
  35. #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
  36. #define ATH10K_NUM_CHANS 38
  37. /* Antenna noise floor */
  38. #define ATH10K_DEFAULT_NOISE_FLOOR -95
  39. struct ath10k;
  40. struct ath10k_skb_cb {
  41. dma_addr_t paddr;
  42. bool is_mapped;
  43. bool is_aborted;
  44. struct {
  45. u8 vdev_id;
  46. u8 tid;
  47. bool is_offchan;
  48. u8 frag_len;
  49. u8 pad_len;
  50. } __packed htt;
  51. } __packed;
  52. static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
  53. {
  54. BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
  55. IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
  56. return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
  57. }
  58. static inline int ath10k_skb_map(struct device *dev, struct sk_buff *skb)
  59. {
  60. if (ATH10K_SKB_CB(skb)->is_mapped)
  61. return -EINVAL;
  62. ATH10K_SKB_CB(skb)->paddr = dma_map_single(dev, skb->data, skb->len,
  63. DMA_TO_DEVICE);
  64. if (unlikely(dma_mapping_error(dev, ATH10K_SKB_CB(skb)->paddr)))
  65. return -EIO;
  66. ATH10K_SKB_CB(skb)->is_mapped = true;
  67. return 0;
  68. }
  69. static inline int ath10k_skb_unmap(struct device *dev, struct sk_buff *skb)
  70. {
  71. if (!ATH10K_SKB_CB(skb)->is_mapped)
  72. return -EINVAL;
  73. dma_unmap_single(dev, ATH10K_SKB_CB(skb)->paddr, skb->len,
  74. DMA_TO_DEVICE);
  75. ATH10K_SKB_CB(skb)->is_mapped = false;
  76. return 0;
  77. }
  78. static inline u32 host_interest_item_address(u32 item_offset)
  79. {
  80. return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
  81. }
  82. struct ath10k_bmi {
  83. bool done_sent;
  84. };
  85. struct ath10k_wmi {
  86. enum ath10k_htc_ep_id eid;
  87. struct completion service_ready;
  88. struct completion unified_ready;
  89. wait_queue_head_t tx_credits_wq;
  90. };
  91. struct ath10k_peer_stat {
  92. u8 peer_macaddr[ETH_ALEN];
  93. u32 peer_rssi;
  94. u32 peer_tx_rate;
  95. };
  96. struct ath10k_target_stats {
  97. /* PDEV stats */
  98. s32 ch_noise_floor;
  99. u32 tx_frame_count;
  100. u32 rx_frame_count;
  101. u32 rx_clear_count;
  102. u32 cycle_count;
  103. u32 phy_err_count;
  104. u32 chan_tx_power;
  105. /* PDEV TX stats */
  106. s32 comp_queued;
  107. s32 comp_delivered;
  108. s32 msdu_enqued;
  109. s32 mpdu_enqued;
  110. s32 wmm_drop;
  111. s32 local_enqued;
  112. s32 local_freed;
  113. s32 hw_queued;
  114. s32 hw_reaped;
  115. s32 underrun;
  116. s32 tx_abort;
  117. s32 mpdus_requed;
  118. u32 tx_ko;
  119. u32 data_rc;
  120. u32 self_triggers;
  121. u32 sw_retry_failure;
  122. u32 illgl_rate_phy_err;
  123. u32 pdev_cont_xretry;
  124. u32 pdev_tx_timeout;
  125. u32 pdev_resets;
  126. u32 phy_underrun;
  127. u32 txop_ovf;
  128. /* PDEV RX stats */
  129. s32 mid_ppdu_route_change;
  130. s32 status_rcvd;
  131. s32 r0_frags;
  132. s32 r1_frags;
  133. s32 r2_frags;
  134. s32 r3_frags;
  135. s32 htt_msdus;
  136. s32 htt_mpdus;
  137. s32 loc_msdus;
  138. s32 loc_mpdus;
  139. s32 oversize_amsdu;
  140. s32 phy_errs;
  141. s32 phy_err_drop;
  142. s32 mpdu_errs;
  143. /* VDEV STATS */
  144. /* PEER STATS */
  145. u8 peers;
  146. struct ath10k_peer_stat peer_stat[TARGET_NUM_PEERS];
  147. /* TODO: Beacon filter stats */
  148. };
  149. #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
  150. struct ath10k_peer {
  151. struct list_head list;
  152. int vdev_id;
  153. u8 addr[ETH_ALEN];
  154. DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
  155. struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
  156. };
  157. #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
  158. struct ath10k_vif {
  159. u32 vdev_id;
  160. enum wmi_vdev_type vdev_type;
  161. enum wmi_vdev_subtype vdev_subtype;
  162. u32 beacon_interval;
  163. u32 dtim_period;
  164. struct sk_buff *beacon;
  165. struct ath10k *ar;
  166. struct ieee80211_vif *vif;
  167. struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
  168. u8 def_wep_key_index;
  169. u16 tx_seq_no;
  170. union {
  171. struct {
  172. u8 bssid[ETH_ALEN];
  173. u32 uapsd;
  174. } sta;
  175. struct {
  176. /* 127 stations; wmi limit */
  177. u8 tim_bitmap[16];
  178. u8 tim_len;
  179. u32 ssid_len;
  180. u8 ssid[IEEE80211_MAX_SSID_LEN];
  181. bool hidden_ssid;
  182. /* P2P_IE with NoA attribute for P2P_GO case */
  183. u32 noa_len;
  184. u8 *noa_data;
  185. } ap;
  186. struct {
  187. u8 bssid[ETH_ALEN];
  188. } ibss;
  189. } u;
  190. };
  191. struct ath10k_vif_iter {
  192. u32 vdev_id;
  193. struct ath10k_vif *arvif;
  194. };
  195. struct ath10k_debug {
  196. struct dentry *debugfs_phy;
  197. struct ath10k_target_stats target_stats;
  198. u32 wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
  199. struct completion event_stats_compl;
  200. unsigned long htt_stats_mask;
  201. struct delayed_work htt_stats_dwork;
  202. };
  203. enum ath10k_state {
  204. ATH10K_STATE_OFF = 0,
  205. ATH10K_STATE_ON,
  206. /* When doing firmware recovery the device is first powered down.
  207. * mac80211 is supposed to call in to start() hook later on. It is
  208. * however possible that driver unloading and firmware crash overlap.
  209. * mac80211 can wait on conf_mutex in stop() while the device is
  210. * stopped in ath10k_core_restart() work holding conf_mutex. The state
  211. * RESTARTED means that the device is up and mac80211 has started hw
  212. * reconfiguration. Once mac80211 is done with the reconfiguration we
  213. * set the state to STATE_ON in restart_complete(). */
  214. ATH10K_STATE_RESTARTING,
  215. ATH10K_STATE_RESTARTED,
  216. /* The device has crashed while restarting hw. This state is like ON
  217. * but commands are blocked in HTC and -ECOMM response is given. This
  218. * prevents completion timeouts and makes the driver more responsive to
  219. * userspace commands. This is also prevents recursive recovery. */
  220. ATH10K_STATE_WEDGED,
  221. };
  222. enum ath10k_fw_features {
  223. /* wmi_mgmt_rx_hdr contains extra RSSI information */
  224. ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
  225. /* keep last */
  226. ATH10K_FW_FEATURE_COUNT,
  227. };
  228. struct ath10k {
  229. struct ath_common ath_common;
  230. struct ieee80211_hw *hw;
  231. struct device *dev;
  232. u8 mac_addr[ETH_ALEN];
  233. u32 chip_id;
  234. u32 target_version;
  235. u8 fw_version_major;
  236. u32 fw_version_minor;
  237. u16 fw_version_release;
  238. u16 fw_version_build;
  239. u32 phy_capability;
  240. u32 hw_min_tx_power;
  241. u32 hw_max_tx_power;
  242. u32 ht_cap_info;
  243. u32 vht_cap_info;
  244. u32 num_rf_chains;
  245. DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
  246. struct targetdef *targetdef;
  247. struct hostdef *hostdef;
  248. bool p2p;
  249. struct {
  250. void *priv;
  251. const struct ath10k_hif_ops *ops;
  252. } hif;
  253. wait_queue_head_t event_queue;
  254. bool is_target_paused;
  255. struct ath10k_bmi bmi;
  256. struct ath10k_wmi wmi;
  257. struct ath10k_htc htc;
  258. struct ath10k_htt htt;
  259. struct ath10k_hw_params {
  260. u32 id;
  261. const char *name;
  262. u32 patch_load_addr;
  263. struct ath10k_hw_params_fw {
  264. const char *dir;
  265. const char *fw;
  266. const char *otp;
  267. const char *board;
  268. } fw;
  269. } hw_params;
  270. const struct firmware *board_data;
  271. const struct firmware *otp;
  272. const struct firmware *firmware;
  273. struct {
  274. struct completion started;
  275. struct completion completed;
  276. struct completion on_channel;
  277. struct timer_list timeout;
  278. bool is_roc;
  279. bool in_progress;
  280. bool aborting;
  281. int vdev_id;
  282. int roc_freq;
  283. } scan;
  284. struct {
  285. struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
  286. } mac;
  287. /* should never be NULL; needed for regular htt rx */
  288. struct ieee80211_channel *rx_channel;
  289. /* valid during scan; needed for mgmt rx during scan */
  290. struct ieee80211_channel *scan_channel;
  291. int free_vdev_map;
  292. int monitor_vdev_id;
  293. bool monitor_enabled;
  294. bool monitor_present;
  295. unsigned int filter_flags;
  296. struct wmi_pdev_set_wmm_params_arg wmm_params;
  297. struct completion install_key_done;
  298. struct completion vdev_setup_done;
  299. struct workqueue_struct *workqueue;
  300. /* prevents concurrent FW reconfiguration */
  301. struct mutex conf_mutex;
  302. /* protects shared structure data */
  303. spinlock_t data_lock;
  304. struct list_head peers;
  305. wait_queue_head_t peer_mapping_wq;
  306. struct work_struct offchan_tx_work;
  307. struct sk_buff_head offchan_tx_queue;
  308. struct completion offchan_tx_completed;
  309. struct sk_buff *offchan_tx_skb;
  310. enum ath10k_state state;
  311. struct work_struct restart_work;
  312. /* cycle count is reported twice for each visited channel during scan.
  313. * access protected by data_lock */
  314. u32 survey_last_rx_clear_count;
  315. u32 survey_last_cycle_count;
  316. struct survey_info survey[ATH10K_NUM_CHANS];
  317. #ifdef CONFIG_ATH10K_DEBUGFS
  318. struct ath10k_debug debug;
  319. #endif
  320. };
  321. struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
  322. const struct ath10k_hif_ops *hif_ops);
  323. void ath10k_core_destroy(struct ath10k *ar);
  324. int ath10k_core_start(struct ath10k *ar);
  325. void ath10k_core_stop(struct ath10k *ar);
  326. int ath10k_core_register(struct ath10k *ar, u32 chip_id);
  327. void ath10k_core_unregister(struct ath10k *ar);
  328. #endif /* _CORE_H_ */