ixgbevf_main.c 99 KB

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  1. /*******************************************************************************
  2. Intel 82599 Virtual Function driver
  3. Copyright(c) 1999 - 2012 Intel Corporation.
  4. This program is free software; you can redistribute it and/or modify it
  5. under the terms and conditions of the GNU General Public License,
  6. version 2, as published by the Free Software Foundation.
  7. This program is distributed in the hope it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc.,
  13. 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  14. The full GNU General Public License is included in this distribution in
  15. the file called "COPYING".
  16. Contact Information:
  17. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. /******************************************************************************
  21. Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
  22. ******************************************************************************/
  23. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  24. #include <linux/types.h>
  25. #include <linux/bitops.h>
  26. #include <linux/module.h>
  27. #include <linux/pci.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/vmalloc.h>
  30. #include <linux/string.h>
  31. #include <linux/in.h>
  32. #include <linux/ip.h>
  33. #include <linux/tcp.h>
  34. #include <linux/sctp.h>
  35. #include <linux/ipv6.h>
  36. #include <linux/slab.h>
  37. #include <net/checksum.h>
  38. #include <net/ip6_checksum.h>
  39. #include <linux/ethtool.h>
  40. #include <linux/if.h>
  41. #include <linux/if_vlan.h>
  42. #include <linux/prefetch.h>
  43. #include "ixgbevf.h"
  44. const char ixgbevf_driver_name[] = "ixgbevf";
  45. static const char ixgbevf_driver_string[] =
  46. "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
  47. #define DRV_VERSION "2.11.3-k"
  48. const char ixgbevf_driver_version[] = DRV_VERSION;
  49. static char ixgbevf_copyright[] =
  50. "Copyright (c) 2009 - 2012 Intel Corporation.";
  51. static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
  52. [board_82599_vf] = &ixgbevf_82599_vf_info,
  53. [board_X540_vf] = &ixgbevf_X540_vf_info,
  54. };
  55. /* ixgbevf_pci_tbl - PCI Device ID Table
  56. *
  57. * Wildcard entries (PCI_ANY_ID) should come last
  58. * Last entry must be all 0s
  59. *
  60. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  61. * Class, Class Mask, private data (not used) }
  62. */
  63. static DEFINE_PCI_DEVICE_TABLE(ixgbevf_pci_tbl) = {
  64. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
  65. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
  66. /* required last entry */
  67. {0, }
  68. };
  69. MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
  70. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  71. MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
  72. MODULE_LICENSE("GPL");
  73. MODULE_VERSION(DRV_VERSION);
  74. #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  75. static int debug = -1;
  76. module_param(debug, int, 0);
  77. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  78. /* forward decls */
  79. static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
  80. static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
  81. static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
  82. struct ixgbevf_ring *rx_ring,
  83. u32 val)
  84. {
  85. /*
  86. * Force memory writes to complete before letting h/w
  87. * know there are new descriptors to fetch. (Only
  88. * applicable for weak-ordered memory model archs,
  89. * such as IA-64).
  90. */
  91. wmb();
  92. IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
  93. }
  94. /**
  95. * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
  96. * @adapter: pointer to adapter struct
  97. * @direction: 0 for Rx, 1 for Tx, -1 for other causes
  98. * @queue: queue to map the corresponding interrupt to
  99. * @msix_vector: the vector to map to the corresponding queue
  100. */
  101. static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
  102. u8 queue, u8 msix_vector)
  103. {
  104. u32 ivar, index;
  105. struct ixgbe_hw *hw = &adapter->hw;
  106. if (direction == -1) {
  107. /* other causes */
  108. msix_vector |= IXGBE_IVAR_ALLOC_VAL;
  109. ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
  110. ivar &= ~0xFF;
  111. ivar |= msix_vector;
  112. IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
  113. } else {
  114. /* tx or rx causes */
  115. msix_vector |= IXGBE_IVAR_ALLOC_VAL;
  116. index = ((16 * (queue & 1)) + (8 * direction));
  117. ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
  118. ivar &= ~(0xFF << index);
  119. ivar |= (msix_vector << index);
  120. IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
  121. }
  122. }
  123. static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring,
  124. struct ixgbevf_tx_buffer
  125. *tx_buffer_info)
  126. {
  127. if (tx_buffer_info->dma) {
  128. if (tx_buffer_info->mapped_as_page)
  129. dma_unmap_page(tx_ring->dev,
  130. tx_buffer_info->dma,
  131. tx_buffer_info->length,
  132. DMA_TO_DEVICE);
  133. else
  134. dma_unmap_single(tx_ring->dev,
  135. tx_buffer_info->dma,
  136. tx_buffer_info->length,
  137. DMA_TO_DEVICE);
  138. tx_buffer_info->dma = 0;
  139. }
  140. if (tx_buffer_info->skb) {
  141. dev_kfree_skb_any(tx_buffer_info->skb);
  142. tx_buffer_info->skb = NULL;
  143. }
  144. tx_buffer_info->time_stamp = 0;
  145. /* tx_buffer_info must be completely set up in the transmit path */
  146. }
  147. #define IXGBE_MAX_TXD_PWR 14
  148. #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
  149. /* Tx Descriptors needed, worst case */
  150. #define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD)
  151. #define DESC_NEEDED (MAX_SKB_FRAGS + 4)
  152. static void ixgbevf_tx_timeout(struct net_device *netdev);
  153. /**
  154. * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
  155. * @q_vector: board private structure
  156. * @tx_ring: tx ring to clean
  157. **/
  158. static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
  159. struct ixgbevf_ring *tx_ring)
  160. {
  161. struct ixgbevf_adapter *adapter = q_vector->adapter;
  162. union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
  163. struct ixgbevf_tx_buffer *tx_buffer_info;
  164. unsigned int i, count = 0;
  165. unsigned int total_bytes = 0, total_packets = 0;
  166. if (test_bit(__IXGBEVF_DOWN, &adapter->state))
  167. return true;
  168. i = tx_ring->next_to_clean;
  169. tx_buffer_info = &tx_ring->tx_buffer_info[i];
  170. eop_desc = tx_buffer_info->next_to_watch;
  171. do {
  172. bool cleaned = false;
  173. /* if next_to_watch is not set then there is no work pending */
  174. if (!eop_desc)
  175. break;
  176. /* prevent any other reads prior to eop_desc */
  177. read_barrier_depends();
  178. /* if DD is not set pending work has not been completed */
  179. if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
  180. break;
  181. /* clear next_to_watch to prevent false hangs */
  182. tx_buffer_info->next_to_watch = NULL;
  183. for ( ; !cleaned; count++) {
  184. struct sk_buff *skb;
  185. tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
  186. cleaned = (tx_desc == eop_desc);
  187. skb = tx_buffer_info->skb;
  188. if (cleaned && skb) {
  189. unsigned int segs, bytecount;
  190. /* gso_segs is currently only valid for tcp */
  191. segs = skb_shinfo(skb)->gso_segs ?: 1;
  192. /* multiply data chunks by size of headers */
  193. bytecount = ((segs - 1) * skb_headlen(skb)) +
  194. skb->len;
  195. total_packets += segs;
  196. total_bytes += bytecount;
  197. }
  198. ixgbevf_unmap_and_free_tx_resource(tx_ring,
  199. tx_buffer_info);
  200. tx_desc->wb.status = 0;
  201. i++;
  202. if (i == tx_ring->count)
  203. i = 0;
  204. tx_buffer_info = &tx_ring->tx_buffer_info[i];
  205. }
  206. eop_desc = tx_buffer_info->next_to_watch;
  207. } while (count < tx_ring->count);
  208. tx_ring->next_to_clean = i;
  209. #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
  210. if (unlikely(count && netif_carrier_ok(tx_ring->netdev) &&
  211. (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
  212. /* Make sure that anybody stopping the queue after this
  213. * sees the new next_to_clean.
  214. */
  215. smp_mb();
  216. if (__netif_subqueue_stopped(tx_ring->netdev,
  217. tx_ring->queue_index) &&
  218. !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
  219. netif_wake_subqueue(tx_ring->netdev,
  220. tx_ring->queue_index);
  221. ++adapter->restart_queue;
  222. }
  223. }
  224. u64_stats_update_begin(&tx_ring->syncp);
  225. tx_ring->total_bytes += total_bytes;
  226. tx_ring->total_packets += total_packets;
  227. u64_stats_update_end(&tx_ring->syncp);
  228. q_vector->tx.total_bytes += total_bytes;
  229. q_vector->tx.total_packets += total_packets;
  230. return count < tx_ring->count;
  231. }
  232. /**
  233. * ixgbevf_receive_skb - Send a completed packet up the stack
  234. * @q_vector: structure containing interrupt and ring information
  235. * @skb: packet to send up
  236. * @status: hardware indication of status of receive
  237. * @rx_desc: rx descriptor
  238. **/
  239. static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
  240. struct sk_buff *skb, u8 status,
  241. union ixgbe_adv_rx_desc *rx_desc)
  242. {
  243. struct ixgbevf_adapter *adapter = q_vector->adapter;
  244. bool is_vlan = (status & IXGBE_RXD_STAT_VP);
  245. u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
  246. if (is_vlan && test_bit(tag & VLAN_VID_MASK, adapter->active_vlans))
  247. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
  248. if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
  249. napi_gro_receive(&q_vector->napi, skb);
  250. else
  251. netif_rx(skb);
  252. }
  253. /**
  254. * ixgbevf_rx_skb - Helper function to determine proper Rx method
  255. * @q_vector: structure containing interrupt and ring information
  256. * @skb: packet to send up
  257. * @status: hardware indication of status of receive
  258. * @rx_desc: rx descriptor
  259. **/
  260. static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
  261. struct sk_buff *skb, u8 status,
  262. union ixgbe_adv_rx_desc *rx_desc)
  263. {
  264. #ifdef CONFIG_NET_RX_BUSY_POLL
  265. skb_mark_napi_id(skb, &q_vector->napi);
  266. if (ixgbevf_qv_busy_polling(q_vector)) {
  267. netif_receive_skb(skb);
  268. /* exit early if we busy polled */
  269. return;
  270. }
  271. #endif /* CONFIG_NET_RX_BUSY_POLL */
  272. ixgbevf_receive_skb(q_vector, skb, status, rx_desc);
  273. }
  274. /**
  275. * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
  276. * @ring: pointer to Rx descriptor ring structure
  277. * @status_err: hardware indication of status of receive
  278. * @skb: skb currently being received and modified
  279. **/
  280. static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
  281. u32 status_err, struct sk_buff *skb)
  282. {
  283. skb_checksum_none_assert(skb);
  284. /* Rx csum disabled */
  285. if (!(ring->netdev->features & NETIF_F_RXCSUM))
  286. return;
  287. /* if IP and error */
  288. if ((status_err & IXGBE_RXD_STAT_IPCS) &&
  289. (status_err & IXGBE_RXDADV_ERR_IPE)) {
  290. ring->hw_csum_rx_error++;
  291. return;
  292. }
  293. if (!(status_err & IXGBE_RXD_STAT_L4CS))
  294. return;
  295. if (status_err & IXGBE_RXDADV_ERR_TCPE) {
  296. ring->hw_csum_rx_error++;
  297. return;
  298. }
  299. /* It must be a TCP or UDP packet with a valid checksum */
  300. skb->ip_summed = CHECKSUM_UNNECESSARY;
  301. ring->hw_csum_rx_good++;
  302. }
  303. /**
  304. * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
  305. * @adapter: address of board private structure
  306. **/
  307. static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
  308. struct ixgbevf_ring *rx_ring,
  309. int cleaned_count)
  310. {
  311. struct pci_dev *pdev = adapter->pdev;
  312. union ixgbe_adv_rx_desc *rx_desc;
  313. struct ixgbevf_rx_buffer *bi;
  314. unsigned int i = rx_ring->next_to_use;
  315. bi = &rx_ring->rx_buffer_info[i];
  316. while (cleaned_count--) {
  317. rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
  318. if (!bi->skb) {
  319. struct sk_buff *skb;
  320. skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
  321. rx_ring->rx_buf_len);
  322. if (!skb) {
  323. adapter->alloc_rx_buff_failed++;
  324. goto no_buffers;
  325. }
  326. bi->skb = skb;
  327. bi->dma = dma_map_single(&pdev->dev, skb->data,
  328. rx_ring->rx_buf_len,
  329. DMA_FROM_DEVICE);
  330. if (dma_mapping_error(&pdev->dev, bi->dma)) {
  331. dev_kfree_skb(skb);
  332. bi->skb = NULL;
  333. dev_err(&pdev->dev, "RX DMA map failed\n");
  334. break;
  335. }
  336. }
  337. rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
  338. i++;
  339. if (i == rx_ring->count)
  340. i = 0;
  341. bi = &rx_ring->rx_buffer_info[i];
  342. }
  343. no_buffers:
  344. if (rx_ring->next_to_use != i) {
  345. rx_ring->next_to_use = i;
  346. ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
  347. }
  348. }
  349. static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
  350. u32 qmask)
  351. {
  352. struct ixgbe_hw *hw = &adapter->hw;
  353. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
  354. }
  355. static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
  356. struct ixgbevf_ring *rx_ring,
  357. int budget)
  358. {
  359. struct ixgbevf_adapter *adapter = q_vector->adapter;
  360. struct pci_dev *pdev = adapter->pdev;
  361. union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
  362. struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
  363. struct sk_buff *skb;
  364. unsigned int i;
  365. u32 len, staterr;
  366. int cleaned_count = 0;
  367. unsigned int total_rx_bytes = 0, total_rx_packets = 0;
  368. i = rx_ring->next_to_clean;
  369. rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
  370. staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
  371. rx_buffer_info = &rx_ring->rx_buffer_info[i];
  372. while (staterr & IXGBE_RXD_STAT_DD) {
  373. if (!budget)
  374. break;
  375. budget--;
  376. rmb(); /* read descriptor and rx_buffer_info after status DD */
  377. len = le16_to_cpu(rx_desc->wb.upper.length);
  378. skb = rx_buffer_info->skb;
  379. prefetch(skb->data - NET_IP_ALIGN);
  380. rx_buffer_info->skb = NULL;
  381. if (rx_buffer_info->dma) {
  382. dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
  383. rx_ring->rx_buf_len,
  384. DMA_FROM_DEVICE);
  385. rx_buffer_info->dma = 0;
  386. skb_put(skb, len);
  387. }
  388. i++;
  389. if (i == rx_ring->count)
  390. i = 0;
  391. next_rxd = IXGBEVF_RX_DESC(rx_ring, i);
  392. prefetch(next_rxd);
  393. cleaned_count++;
  394. next_buffer = &rx_ring->rx_buffer_info[i];
  395. if (!(staterr & IXGBE_RXD_STAT_EOP)) {
  396. skb->next = next_buffer->skb;
  397. IXGBE_CB(skb->next)->prev = skb;
  398. adapter->non_eop_descs++;
  399. goto next_desc;
  400. }
  401. /* we should not be chaining buffers, if we did drop the skb */
  402. if (IXGBE_CB(skb)->prev) {
  403. do {
  404. struct sk_buff *this = skb;
  405. skb = IXGBE_CB(skb)->prev;
  406. dev_kfree_skb(this);
  407. } while (skb);
  408. goto next_desc;
  409. }
  410. /* ERR_MASK will only have valid bits if EOP set */
  411. if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
  412. dev_kfree_skb_irq(skb);
  413. goto next_desc;
  414. }
  415. ixgbevf_rx_checksum(rx_ring, staterr, skb);
  416. /* probably a little skewed due to removing CRC */
  417. total_rx_bytes += skb->len;
  418. total_rx_packets++;
  419. /*
  420. * Work around issue of some types of VM to VM loop back
  421. * packets not getting split correctly
  422. */
  423. if (staterr & IXGBE_RXD_STAT_LB) {
  424. u32 header_fixup_len = skb_headlen(skb);
  425. if (header_fixup_len < 14)
  426. skb_push(skb, header_fixup_len);
  427. }
  428. skb->protocol = eth_type_trans(skb, rx_ring->netdev);
  429. /* Workaround hardware that can't do proper VEPA multicast
  430. * source pruning.
  431. */
  432. if ((skb->pkt_type & (PACKET_BROADCAST | PACKET_MULTICAST)) &&
  433. ether_addr_equal(adapter->netdev->dev_addr,
  434. eth_hdr(skb)->h_source)) {
  435. dev_kfree_skb_irq(skb);
  436. goto next_desc;
  437. }
  438. ixgbevf_rx_skb(q_vector, skb, staterr, rx_desc);
  439. next_desc:
  440. rx_desc->wb.upper.status_error = 0;
  441. /* return some buffers to hardware, one at a time is too slow */
  442. if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
  443. ixgbevf_alloc_rx_buffers(adapter, rx_ring,
  444. cleaned_count);
  445. cleaned_count = 0;
  446. }
  447. /* use prefetched values */
  448. rx_desc = next_rxd;
  449. rx_buffer_info = &rx_ring->rx_buffer_info[i];
  450. staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
  451. }
  452. rx_ring->next_to_clean = i;
  453. cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
  454. if (cleaned_count)
  455. ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
  456. u64_stats_update_begin(&rx_ring->syncp);
  457. rx_ring->total_packets += total_rx_packets;
  458. rx_ring->total_bytes += total_rx_bytes;
  459. u64_stats_update_end(&rx_ring->syncp);
  460. q_vector->rx.total_packets += total_rx_packets;
  461. q_vector->rx.total_bytes += total_rx_bytes;
  462. return total_rx_packets;
  463. }
  464. /**
  465. * ixgbevf_poll - NAPI polling calback
  466. * @napi: napi struct with our devices info in it
  467. * @budget: amount of work driver is allowed to do this pass, in packets
  468. *
  469. * This function will clean more than one or more rings associated with a
  470. * q_vector.
  471. **/
  472. static int ixgbevf_poll(struct napi_struct *napi, int budget)
  473. {
  474. struct ixgbevf_q_vector *q_vector =
  475. container_of(napi, struct ixgbevf_q_vector, napi);
  476. struct ixgbevf_adapter *adapter = q_vector->adapter;
  477. struct ixgbevf_ring *ring;
  478. int per_ring_budget;
  479. bool clean_complete = true;
  480. ixgbevf_for_each_ring(ring, q_vector->tx)
  481. clean_complete &= ixgbevf_clean_tx_irq(q_vector, ring);
  482. #ifdef CONFIG_NET_RX_BUSY_POLL
  483. if (!ixgbevf_qv_lock_napi(q_vector))
  484. return budget;
  485. #endif
  486. /* attempt to distribute budget to each queue fairly, but don't allow
  487. * the budget to go below 1 because we'll exit polling */
  488. if (q_vector->rx.count > 1)
  489. per_ring_budget = max(budget/q_vector->rx.count, 1);
  490. else
  491. per_ring_budget = budget;
  492. adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
  493. ixgbevf_for_each_ring(ring, q_vector->rx)
  494. clean_complete &= (ixgbevf_clean_rx_irq(q_vector, ring,
  495. per_ring_budget)
  496. < per_ring_budget);
  497. adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
  498. #ifdef CONFIG_NET_RX_BUSY_POLL
  499. ixgbevf_qv_unlock_napi(q_vector);
  500. #endif
  501. /* If all work not completed, return budget and keep polling */
  502. if (!clean_complete)
  503. return budget;
  504. /* all work done, exit the polling mode */
  505. napi_complete(napi);
  506. if (adapter->rx_itr_setting & 1)
  507. ixgbevf_set_itr(q_vector);
  508. if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
  509. ixgbevf_irq_enable_queues(adapter,
  510. 1 << q_vector->v_idx);
  511. return 0;
  512. }
  513. /**
  514. * ixgbevf_write_eitr - write VTEITR register in hardware specific way
  515. * @q_vector: structure containing interrupt and ring information
  516. */
  517. void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
  518. {
  519. struct ixgbevf_adapter *adapter = q_vector->adapter;
  520. struct ixgbe_hw *hw = &adapter->hw;
  521. int v_idx = q_vector->v_idx;
  522. u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
  523. /*
  524. * set the WDIS bit to not clear the timer bits and cause an
  525. * immediate assertion of the interrupt
  526. */
  527. itr_reg |= IXGBE_EITR_CNT_WDIS;
  528. IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
  529. }
  530. #ifdef CONFIG_NET_RX_BUSY_POLL
  531. /* must be called with local_bh_disable()d */
  532. static int ixgbevf_busy_poll_recv(struct napi_struct *napi)
  533. {
  534. struct ixgbevf_q_vector *q_vector =
  535. container_of(napi, struct ixgbevf_q_vector, napi);
  536. struct ixgbevf_adapter *adapter = q_vector->adapter;
  537. struct ixgbevf_ring *ring;
  538. int found = 0;
  539. if (test_bit(__IXGBEVF_DOWN, &adapter->state))
  540. return LL_FLUSH_FAILED;
  541. if (!ixgbevf_qv_lock_poll(q_vector))
  542. return LL_FLUSH_BUSY;
  543. ixgbevf_for_each_ring(ring, q_vector->rx) {
  544. found = ixgbevf_clean_rx_irq(q_vector, ring, 4);
  545. #ifdef BP_EXTENDED_STATS
  546. if (found)
  547. ring->bp_cleaned += found;
  548. else
  549. ring->bp_misses++;
  550. #endif
  551. if (found)
  552. break;
  553. }
  554. ixgbevf_qv_unlock_poll(q_vector);
  555. return found;
  556. }
  557. #endif /* CONFIG_NET_RX_BUSY_POLL */
  558. /**
  559. * ixgbevf_configure_msix - Configure MSI-X hardware
  560. * @adapter: board private structure
  561. *
  562. * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
  563. * interrupts.
  564. **/
  565. static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
  566. {
  567. struct ixgbevf_q_vector *q_vector;
  568. int q_vectors, v_idx;
  569. q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  570. adapter->eims_enable_mask = 0;
  571. /*
  572. * Populate the IVAR table and set the ITR values to the
  573. * corresponding register.
  574. */
  575. for (v_idx = 0; v_idx < q_vectors; v_idx++) {
  576. struct ixgbevf_ring *ring;
  577. q_vector = adapter->q_vector[v_idx];
  578. ixgbevf_for_each_ring(ring, q_vector->rx)
  579. ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
  580. ixgbevf_for_each_ring(ring, q_vector->tx)
  581. ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
  582. if (q_vector->tx.ring && !q_vector->rx.ring) {
  583. /* tx only vector */
  584. if (adapter->tx_itr_setting == 1)
  585. q_vector->itr = IXGBE_10K_ITR;
  586. else
  587. q_vector->itr = adapter->tx_itr_setting;
  588. } else {
  589. /* rx or rx/tx vector */
  590. if (adapter->rx_itr_setting == 1)
  591. q_vector->itr = IXGBE_20K_ITR;
  592. else
  593. q_vector->itr = adapter->rx_itr_setting;
  594. }
  595. /* add q_vector eims value to global eims_enable_mask */
  596. adapter->eims_enable_mask |= 1 << v_idx;
  597. ixgbevf_write_eitr(q_vector);
  598. }
  599. ixgbevf_set_ivar(adapter, -1, 1, v_idx);
  600. /* setup eims_other and add value to global eims_enable_mask */
  601. adapter->eims_other = 1 << v_idx;
  602. adapter->eims_enable_mask |= adapter->eims_other;
  603. }
  604. enum latency_range {
  605. lowest_latency = 0,
  606. low_latency = 1,
  607. bulk_latency = 2,
  608. latency_invalid = 255
  609. };
  610. /**
  611. * ixgbevf_update_itr - update the dynamic ITR value based on statistics
  612. * @q_vector: structure containing interrupt and ring information
  613. * @ring_container: structure containing ring performance data
  614. *
  615. * Stores a new ITR value based on packets and byte
  616. * counts during the last interrupt. The advantage of per interrupt
  617. * computation is faster updates and more accurate ITR for the current
  618. * traffic pattern. Constants in this function were computed
  619. * based on theoretical maximum wire speed and thresholds were set based
  620. * on testing data as well as attempting to minimize response time
  621. * while increasing bulk throughput.
  622. **/
  623. static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
  624. struct ixgbevf_ring_container *ring_container)
  625. {
  626. int bytes = ring_container->total_bytes;
  627. int packets = ring_container->total_packets;
  628. u32 timepassed_us;
  629. u64 bytes_perint;
  630. u8 itr_setting = ring_container->itr;
  631. if (packets == 0)
  632. return;
  633. /* simple throttlerate management
  634. * 0-20MB/s lowest (100000 ints/s)
  635. * 20-100MB/s low (20000 ints/s)
  636. * 100-1249MB/s bulk (8000 ints/s)
  637. */
  638. /* what was last interrupt timeslice? */
  639. timepassed_us = q_vector->itr >> 2;
  640. bytes_perint = bytes / timepassed_us; /* bytes/usec */
  641. switch (itr_setting) {
  642. case lowest_latency:
  643. if (bytes_perint > 10)
  644. itr_setting = low_latency;
  645. break;
  646. case low_latency:
  647. if (bytes_perint > 20)
  648. itr_setting = bulk_latency;
  649. else if (bytes_perint <= 10)
  650. itr_setting = lowest_latency;
  651. break;
  652. case bulk_latency:
  653. if (bytes_perint <= 20)
  654. itr_setting = low_latency;
  655. break;
  656. }
  657. /* clear work counters since we have the values we need */
  658. ring_container->total_bytes = 0;
  659. ring_container->total_packets = 0;
  660. /* write updated itr to ring container */
  661. ring_container->itr = itr_setting;
  662. }
  663. static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
  664. {
  665. u32 new_itr = q_vector->itr;
  666. u8 current_itr;
  667. ixgbevf_update_itr(q_vector, &q_vector->tx);
  668. ixgbevf_update_itr(q_vector, &q_vector->rx);
  669. current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
  670. switch (current_itr) {
  671. /* counts and packets in update_itr are dependent on these numbers */
  672. case lowest_latency:
  673. new_itr = IXGBE_100K_ITR;
  674. break;
  675. case low_latency:
  676. new_itr = IXGBE_20K_ITR;
  677. break;
  678. case bulk_latency:
  679. default:
  680. new_itr = IXGBE_8K_ITR;
  681. break;
  682. }
  683. if (new_itr != q_vector->itr) {
  684. /* do an exponential smoothing */
  685. new_itr = (10 * new_itr * q_vector->itr) /
  686. ((9 * new_itr) + q_vector->itr);
  687. /* save the algorithm value here */
  688. q_vector->itr = new_itr;
  689. ixgbevf_write_eitr(q_vector);
  690. }
  691. }
  692. static irqreturn_t ixgbevf_msix_other(int irq, void *data)
  693. {
  694. struct ixgbevf_adapter *adapter = data;
  695. struct ixgbe_hw *hw = &adapter->hw;
  696. hw->mac.get_link_status = 1;
  697. if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
  698. mod_timer(&adapter->watchdog_timer, jiffies);
  699. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
  700. return IRQ_HANDLED;
  701. }
  702. /**
  703. * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
  704. * @irq: unused
  705. * @data: pointer to our q_vector struct for this interrupt vector
  706. **/
  707. static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
  708. {
  709. struct ixgbevf_q_vector *q_vector = data;
  710. /* EIAM disabled interrupts (on this vector) for us */
  711. if (q_vector->rx.ring || q_vector->tx.ring)
  712. napi_schedule(&q_vector->napi);
  713. return IRQ_HANDLED;
  714. }
  715. static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
  716. int r_idx)
  717. {
  718. struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
  719. a->rx_ring[r_idx].next = q_vector->rx.ring;
  720. q_vector->rx.ring = &a->rx_ring[r_idx];
  721. q_vector->rx.count++;
  722. }
  723. static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
  724. int t_idx)
  725. {
  726. struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
  727. a->tx_ring[t_idx].next = q_vector->tx.ring;
  728. q_vector->tx.ring = &a->tx_ring[t_idx];
  729. q_vector->tx.count++;
  730. }
  731. /**
  732. * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
  733. * @adapter: board private structure to initialize
  734. *
  735. * This function maps descriptor rings to the queue-specific vectors
  736. * we were allotted through the MSI-X enabling code. Ideally, we'd have
  737. * one vector per ring/queue, but on a constrained vector budget, we
  738. * group the rings as "efficiently" as possible. You would add new
  739. * mapping configurations in here.
  740. **/
  741. static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
  742. {
  743. int q_vectors;
  744. int v_start = 0;
  745. int rxr_idx = 0, txr_idx = 0;
  746. int rxr_remaining = adapter->num_rx_queues;
  747. int txr_remaining = adapter->num_tx_queues;
  748. int i, j;
  749. int rqpv, tqpv;
  750. int err = 0;
  751. q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  752. /*
  753. * The ideal configuration...
  754. * We have enough vectors to map one per queue.
  755. */
  756. if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
  757. for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
  758. map_vector_to_rxq(adapter, v_start, rxr_idx);
  759. for (; txr_idx < txr_remaining; v_start++, txr_idx++)
  760. map_vector_to_txq(adapter, v_start, txr_idx);
  761. goto out;
  762. }
  763. /*
  764. * If we don't have enough vectors for a 1-to-1
  765. * mapping, we'll have to group them so there are
  766. * multiple queues per vector.
  767. */
  768. /* Re-adjusting *qpv takes care of the remainder. */
  769. for (i = v_start; i < q_vectors; i++) {
  770. rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
  771. for (j = 0; j < rqpv; j++) {
  772. map_vector_to_rxq(adapter, i, rxr_idx);
  773. rxr_idx++;
  774. rxr_remaining--;
  775. }
  776. }
  777. for (i = v_start; i < q_vectors; i++) {
  778. tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
  779. for (j = 0; j < tqpv; j++) {
  780. map_vector_to_txq(adapter, i, txr_idx);
  781. txr_idx++;
  782. txr_remaining--;
  783. }
  784. }
  785. out:
  786. return err;
  787. }
  788. /**
  789. * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
  790. * @adapter: board private structure
  791. *
  792. * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
  793. * interrupts from the kernel.
  794. **/
  795. static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
  796. {
  797. struct net_device *netdev = adapter->netdev;
  798. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  799. int vector, err;
  800. int ri = 0, ti = 0;
  801. for (vector = 0; vector < q_vectors; vector++) {
  802. struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
  803. struct msix_entry *entry = &adapter->msix_entries[vector];
  804. if (q_vector->tx.ring && q_vector->rx.ring) {
  805. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  806. "%s-%s-%d", netdev->name, "TxRx", ri++);
  807. ti++;
  808. } else if (q_vector->rx.ring) {
  809. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  810. "%s-%s-%d", netdev->name, "rx", ri++);
  811. } else if (q_vector->tx.ring) {
  812. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  813. "%s-%s-%d", netdev->name, "tx", ti++);
  814. } else {
  815. /* skip this unused q_vector */
  816. continue;
  817. }
  818. err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
  819. q_vector->name, q_vector);
  820. if (err) {
  821. hw_dbg(&adapter->hw,
  822. "request_irq failed for MSIX interrupt "
  823. "Error: %d\n", err);
  824. goto free_queue_irqs;
  825. }
  826. }
  827. err = request_irq(adapter->msix_entries[vector].vector,
  828. &ixgbevf_msix_other, 0, netdev->name, adapter);
  829. if (err) {
  830. hw_dbg(&adapter->hw,
  831. "request_irq for msix_other failed: %d\n", err);
  832. goto free_queue_irqs;
  833. }
  834. return 0;
  835. free_queue_irqs:
  836. while (vector) {
  837. vector--;
  838. free_irq(adapter->msix_entries[vector].vector,
  839. adapter->q_vector[vector]);
  840. }
  841. /* This failure is non-recoverable - it indicates the system is
  842. * out of MSIX vector resources and the VF driver cannot run
  843. * without them. Set the number of msix vectors to zero
  844. * indicating that not enough can be allocated. The error
  845. * will be returned to the user indicating device open failed.
  846. * Any further attempts to force the driver to open will also
  847. * fail. The only way to recover is to unload the driver and
  848. * reload it again. If the system has recovered some MSIX
  849. * vectors then it may succeed.
  850. */
  851. adapter->num_msix_vectors = 0;
  852. return err;
  853. }
  854. static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
  855. {
  856. int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  857. for (i = 0; i < q_vectors; i++) {
  858. struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
  859. q_vector->rx.ring = NULL;
  860. q_vector->tx.ring = NULL;
  861. q_vector->rx.count = 0;
  862. q_vector->tx.count = 0;
  863. }
  864. }
  865. /**
  866. * ixgbevf_request_irq - initialize interrupts
  867. * @adapter: board private structure
  868. *
  869. * Attempts to configure interrupts using the best available
  870. * capabilities of the hardware and kernel.
  871. **/
  872. static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
  873. {
  874. int err = 0;
  875. err = ixgbevf_request_msix_irqs(adapter);
  876. if (err)
  877. hw_dbg(&adapter->hw,
  878. "request_irq failed, Error %d\n", err);
  879. return err;
  880. }
  881. static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
  882. {
  883. int i, q_vectors;
  884. q_vectors = adapter->num_msix_vectors;
  885. i = q_vectors - 1;
  886. free_irq(adapter->msix_entries[i].vector, adapter);
  887. i--;
  888. for (; i >= 0; i--) {
  889. /* free only the irqs that were actually requested */
  890. if (!adapter->q_vector[i]->rx.ring &&
  891. !adapter->q_vector[i]->tx.ring)
  892. continue;
  893. free_irq(adapter->msix_entries[i].vector,
  894. adapter->q_vector[i]);
  895. }
  896. ixgbevf_reset_q_vectors(adapter);
  897. }
  898. /**
  899. * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
  900. * @adapter: board private structure
  901. **/
  902. static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
  903. {
  904. struct ixgbe_hw *hw = &adapter->hw;
  905. int i;
  906. IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
  907. IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
  908. IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
  909. IXGBE_WRITE_FLUSH(hw);
  910. for (i = 0; i < adapter->num_msix_vectors; i++)
  911. synchronize_irq(adapter->msix_entries[i].vector);
  912. }
  913. /**
  914. * ixgbevf_irq_enable - Enable default interrupt generation settings
  915. * @adapter: board private structure
  916. **/
  917. static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
  918. {
  919. struct ixgbe_hw *hw = &adapter->hw;
  920. IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
  921. IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
  922. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
  923. }
  924. /**
  925. * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
  926. * @adapter: board private structure
  927. *
  928. * Configure the Tx unit of the MAC after a reset.
  929. **/
  930. static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
  931. {
  932. u64 tdba;
  933. struct ixgbe_hw *hw = &adapter->hw;
  934. u32 i, j, tdlen, txctrl;
  935. /* Setup the HW Tx Head and Tail descriptor pointers */
  936. for (i = 0; i < adapter->num_tx_queues; i++) {
  937. struct ixgbevf_ring *ring = &adapter->tx_ring[i];
  938. j = ring->reg_idx;
  939. tdba = ring->dma;
  940. tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
  941. IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
  942. (tdba & DMA_BIT_MASK(32)));
  943. IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
  944. IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
  945. IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
  946. IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
  947. adapter->tx_ring[i].head = IXGBE_VFTDH(j);
  948. adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
  949. /* Disable Tx Head Writeback RO bit, since this hoses
  950. * bookkeeping if things aren't delivered in order.
  951. */
  952. txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
  953. txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
  954. IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
  955. }
  956. }
  957. #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
  958. static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
  959. {
  960. struct ixgbevf_ring *rx_ring;
  961. struct ixgbe_hw *hw = &adapter->hw;
  962. u32 srrctl;
  963. rx_ring = &adapter->rx_ring[index];
  964. srrctl = IXGBE_SRRCTL_DROP_EN;
  965. srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
  966. srrctl |= ALIGN(rx_ring->rx_buf_len, 1024) >>
  967. IXGBE_SRRCTL_BSIZEPKT_SHIFT;
  968. IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
  969. }
  970. static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
  971. {
  972. struct ixgbe_hw *hw = &adapter->hw;
  973. /* PSRTYPE must be initialized in 82599 */
  974. u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
  975. IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
  976. IXGBE_PSRTYPE_L2HDR;
  977. if (adapter->num_rx_queues > 1)
  978. psrtype |= 1 << 29;
  979. IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
  980. }
  981. static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter)
  982. {
  983. struct ixgbe_hw *hw = &adapter->hw;
  984. struct net_device *netdev = adapter->netdev;
  985. int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
  986. int i;
  987. u16 rx_buf_len;
  988. /* notify the PF of our intent to use this size of frame */
  989. ixgbevf_rlpml_set_vf(hw, max_frame);
  990. /* PF will allow an extra 4 bytes past for vlan tagged frames */
  991. max_frame += VLAN_HLEN;
  992. /*
  993. * Allocate buffer sizes that fit well into 32K and
  994. * take into account max frame size of 9.5K
  995. */
  996. if ((hw->mac.type == ixgbe_mac_X540_vf) &&
  997. (max_frame <= MAXIMUM_ETHERNET_VLAN_SIZE))
  998. rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  999. else if (max_frame <= IXGBEVF_RXBUFFER_2K)
  1000. rx_buf_len = IXGBEVF_RXBUFFER_2K;
  1001. else if (max_frame <= IXGBEVF_RXBUFFER_4K)
  1002. rx_buf_len = IXGBEVF_RXBUFFER_4K;
  1003. else if (max_frame <= IXGBEVF_RXBUFFER_8K)
  1004. rx_buf_len = IXGBEVF_RXBUFFER_8K;
  1005. else
  1006. rx_buf_len = IXGBEVF_RXBUFFER_10K;
  1007. for (i = 0; i < adapter->num_rx_queues; i++)
  1008. adapter->rx_ring[i].rx_buf_len = rx_buf_len;
  1009. }
  1010. /**
  1011. * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
  1012. * @adapter: board private structure
  1013. *
  1014. * Configure the Rx unit of the MAC after a reset.
  1015. **/
  1016. static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
  1017. {
  1018. u64 rdba;
  1019. struct ixgbe_hw *hw = &adapter->hw;
  1020. int i, j;
  1021. u32 rdlen;
  1022. ixgbevf_setup_psrtype(adapter);
  1023. /* set_rx_buffer_len must be called before ring initialization */
  1024. ixgbevf_set_rx_buffer_len(adapter);
  1025. rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
  1026. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1027. * the Base and Length of the Rx Descriptor Ring */
  1028. for (i = 0; i < adapter->num_rx_queues; i++) {
  1029. rdba = adapter->rx_ring[i].dma;
  1030. j = adapter->rx_ring[i].reg_idx;
  1031. IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
  1032. (rdba & DMA_BIT_MASK(32)));
  1033. IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
  1034. IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
  1035. IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
  1036. IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
  1037. adapter->rx_ring[i].head = IXGBE_VFRDH(j);
  1038. adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
  1039. ixgbevf_configure_srrctl(adapter, j);
  1040. }
  1041. }
  1042. static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
  1043. __be16 proto, u16 vid)
  1044. {
  1045. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1046. struct ixgbe_hw *hw = &adapter->hw;
  1047. int err;
  1048. spin_lock_bh(&adapter->mbx_lock);
  1049. /* add VID to filter table */
  1050. err = hw->mac.ops.set_vfta(hw, vid, 0, true);
  1051. spin_unlock_bh(&adapter->mbx_lock);
  1052. /* translate error return types so error makes sense */
  1053. if (err == IXGBE_ERR_MBX)
  1054. return -EIO;
  1055. if (err == IXGBE_ERR_INVALID_ARGUMENT)
  1056. return -EACCES;
  1057. set_bit(vid, adapter->active_vlans);
  1058. return err;
  1059. }
  1060. static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
  1061. __be16 proto, u16 vid)
  1062. {
  1063. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1064. struct ixgbe_hw *hw = &adapter->hw;
  1065. int err = -EOPNOTSUPP;
  1066. spin_lock_bh(&adapter->mbx_lock);
  1067. /* remove VID from filter table */
  1068. err = hw->mac.ops.set_vfta(hw, vid, 0, false);
  1069. spin_unlock_bh(&adapter->mbx_lock);
  1070. clear_bit(vid, adapter->active_vlans);
  1071. return err;
  1072. }
  1073. static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
  1074. {
  1075. u16 vid;
  1076. for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
  1077. ixgbevf_vlan_rx_add_vid(adapter->netdev,
  1078. htons(ETH_P_8021Q), vid);
  1079. }
  1080. static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
  1081. {
  1082. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1083. struct ixgbe_hw *hw = &adapter->hw;
  1084. int count = 0;
  1085. if ((netdev_uc_count(netdev)) > 10) {
  1086. pr_err("Too many unicast filters - No Space\n");
  1087. return -ENOSPC;
  1088. }
  1089. if (!netdev_uc_empty(netdev)) {
  1090. struct netdev_hw_addr *ha;
  1091. netdev_for_each_uc_addr(ha, netdev) {
  1092. hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
  1093. udelay(200);
  1094. }
  1095. } else {
  1096. /*
  1097. * If the list is empty then send message to PF driver to
  1098. * clear all macvlans on this VF.
  1099. */
  1100. hw->mac.ops.set_uc_addr(hw, 0, NULL);
  1101. }
  1102. return count;
  1103. }
  1104. /**
  1105. * ixgbevf_set_rx_mode - Multicast and unicast set
  1106. * @netdev: network interface device structure
  1107. *
  1108. * The set_rx_method entry point is called whenever the multicast address
  1109. * list, unicast address list or the network interface flags are updated.
  1110. * This routine is responsible for configuring the hardware for proper
  1111. * multicast mode and configuring requested unicast filters.
  1112. **/
  1113. static void ixgbevf_set_rx_mode(struct net_device *netdev)
  1114. {
  1115. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1116. struct ixgbe_hw *hw = &adapter->hw;
  1117. spin_lock_bh(&adapter->mbx_lock);
  1118. /* reprogram multicast list */
  1119. hw->mac.ops.update_mc_addr_list(hw, netdev);
  1120. ixgbevf_write_uc_addr_list(netdev);
  1121. spin_unlock_bh(&adapter->mbx_lock);
  1122. }
  1123. static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
  1124. {
  1125. int q_idx;
  1126. struct ixgbevf_q_vector *q_vector;
  1127. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1128. for (q_idx = 0; q_idx < q_vectors; q_idx++) {
  1129. q_vector = adapter->q_vector[q_idx];
  1130. #ifdef CONFIG_NET_RX_BUSY_POLL
  1131. ixgbevf_qv_init_lock(adapter->q_vector[q_idx]);
  1132. #endif
  1133. napi_enable(&q_vector->napi);
  1134. }
  1135. }
  1136. static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
  1137. {
  1138. int q_idx;
  1139. struct ixgbevf_q_vector *q_vector;
  1140. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1141. for (q_idx = 0; q_idx < q_vectors; q_idx++) {
  1142. q_vector = adapter->q_vector[q_idx];
  1143. napi_disable(&q_vector->napi);
  1144. #ifdef CONFIG_NET_RX_BUSY_POLL
  1145. while (!ixgbevf_qv_disable(adapter->q_vector[q_idx])) {
  1146. pr_info("QV %d locked\n", q_idx);
  1147. usleep_range(1000, 20000);
  1148. }
  1149. #endif /* CONFIG_NET_RX_BUSY_POLL */
  1150. }
  1151. }
  1152. static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
  1153. {
  1154. struct net_device *netdev = adapter->netdev;
  1155. int i;
  1156. ixgbevf_set_rx_mode(netdev);
  1157. ixgbevf_restore_vlan(adapter);
  1158. ixgbevf_configure_tx(adapter);
  1159. ixgbevf_configure_rx(adapter);
  1160. for (i = 0; i < adapter->num_rx_queues; i++) {
  1161. struct ixgbevf_ring *ring = &adapter->rx_ring[i];
  1162. ixgbevf_alloc_rx_buffers(adapter, ring,
  1163. IXGBE_DESC_UNUSED(ring));
  1164. }
  1165. }
  1166. #define IXGBEVF_MAX_RX_DESC_POLL 10
  1167. static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
  1168. int rxr)
  1169. {
  1170. struct ixgbe_hw *hw = &adapter->hw;
  1171. int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
  1172. u32 rxdctl;
  1173. int j = adapter->rx_ring[rxr].reg_idx;
  1174. do {
  1175. usleep_range(1000, 2000);
  1176. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
  1177. } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
  1178. if (!wait_loop)
  1179. hw_dbg(hw, "RXDCTL.ENABLE queue %d not set while polling\n",
  1180. rxr);
  1181. ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
  1182. (adapter->rx_ring[rxr].count - 1));
  1183. }
  1184. static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
  1185. struct ixgbevf_ring *ring)
  1186. {
  1187. struct ixgbe_hw *hw = &adapter->hw;
  1188. int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
  1189. u32 rxdctl;
  1190. u8 reg_idx = ring->reg_idx;
  1191. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1192. rxdctl &= ~IXGBE_RXDCTL_ENABLE;
  1193. /* write value back with RXDCTL.ENABLE bit cleared */
  1194. IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
  1195. /* the hardware may take up to 100us to really disable the rx queue */
  1196. do {
  1197. udelay(10);
  1198. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1199. } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
  1200. if (!wait_loop)
  1201. hw_dbg(hw, "RXDCTL.ENABLE queue %d not cleared while polling\n",
  1202. reg_idx);
  1203. }
  1204. static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
  1205. {
  1206. /* Only save pre-reset stats if there are some */
  1207. if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
  1208. adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
  1209. adapter->stats.base_vfgprc;
  1210. adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
  1211. adapter->stats.base_vfgptc;
  1212. adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
  1213. adapter->stats.base_vfgorc;
  1214. adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
  1215. adapter->stats.base_vfgotc;
  1216. adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
  1217. adapter->stats.base_vfmprc;
  1218. }
  1219. }
  1220. static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
  1221. {
  1222. struct ixgbe_hw *hw = &adapter->hw;
  1223. adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
  1224. adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
  1225. adapter->stats.last_vfgorc |=
  1226. (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
  1227. adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
  1228. adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
  1229. adapter->stats.last_vfgotc |=
  1230. (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
  1231. adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
  1232. adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
  1233. adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
  1234. adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
  1235. adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
  1236. adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
  1237. }
  1238. static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
  1239. {
  1240. struct ixgbe_hw *hw = &adapter->hw;
  1241. int api[] = { ixgbe_mbox_api_11,
  1242. ixgbe_mbox_api_10,
  1243. ixgbe_mbox_api_unknown };
  1244. int err = 0, idx = 0;
  1245. spin_lock_bh(&adapter->mbx_lock);
  1246. while (api[idx] != ixgbe_mbox_api_unknown) {
  1247. err = ixgbevf_negotiate_api_version(hw, api[idx]);
  1248. if (!err)
  1249. break;
  1250. idx++;
  1251. }
  1252. spin_unlock_bh(&adapter->mbx_lock);
  1253. }
  1254. static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
  1255. {
  1256. struct net_device *netdev = adapter->netdev;
  1257. struct ixgbe_hw *hw = &adapter->hw;
  1258. int i, j = 0;
  1259. int num_rx_rings = adapter->num_rx_queues;
  1260. u32 txdctl, rxdctl;
  1261. for (i = 0; i < adapter->num_tx_queues; i++) {
  1262. j = adapter->tx_ring[i].reg_idx;
  1263. txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
  1264. /* enable WTHRESH=8 descriptors, to encourage burst writeback */
  1265. txdctl |= (8 << 16);
  1266. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
  1267. }
  1268. for (i = 0; i < adapter->num_tx_queues; i++) {
  1269. j = adapter->tx_ring[i].reg_idx;
  1270. txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
  1271. txdctl |= IXGBE_TXDCTL_ENABLE;
  1272. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
  1273. }
  1274. for (i = 0; i < num_rx_rings; i++) {
  1275. j = adapter->rx_ring[i].reg_idx;
  1276. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
  1277. rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
  1278. if (hw->mac.type == ixgbe_mac_X540_vf) {
  1279. rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
  1280. rxdctl |= ((netdev->mtu + ETH_HLEN + ETH_FCS_LEN) |
  1281. IXGBE_RXDCTL_RLPML_EN);
  1282. }
  1283. IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
  1284. ixgbevf_rx_desc_queue_enable(adapter, i);
  1285. }
  1286. ixgbevf_configure_msix(adapter);
  1287. spin_lock_bh(&adapter->mbx_lock);
  1288. if (is_valid_ether_addr(hw->mac.addr))
  1289. hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
  1290. else
  1291. hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
  1292. spin_unlock_bh(&adapter->mbx_lock);
  1293. clear_bit(__IXGBEVF_DOWN, &adapter->state);
  1294. ixgbevf_napi_enable_all(adapter);
  1295. /* enable transmits */
  1296. netif_tx_start_all_queues(netdev);
  1297. ixgbevf_save_reset_stats(adapter);
  1298. ixgbevf_init_last_counter_stats(adapter);
  1299. hw->mac.get_link_status = 1;
  1300. mod_timer(&adapter->watchdog_timer, jiffies);
  1301. }
  1302. static int ixgbevf_reset_queues(struct ixgbevf_adapter *adapter)
  1303. {
  1304. struct ixgbe_hw *hw = &adapter->hw;
  1305. struct ixgbevf_ring *rx_ring;
  1306. unsigned int def_q = 0;
  1307. unsigned int num_tcs = 0;
  1308. unsigned int num_rx_queues = 1;
  1309. int err, i;
  1310. spin_lock_bh(&adapter->mbx_lock);
  1311. /* fetch queue configuration from the PF */
  1312. err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
  1313. spin_unlock_bh(&adapter->mbx_lock);
  1314. if (err)
  1315. return err;
  1316. if (num_tcs > 1) {
  1317. /* update default Tx ring register index */
  1318. adapter->tx_ring[0].reg_idx = def_q;
  1319. /* we need as many queues as traffic classes */
  1320. num_rx_queues = num_tcs;
  1321. }
  1322. /* nothing to do if we have the correct number of queues */
  1323. if (adapter->num_rx_queues == num_rx_queues)
  1324. return 0;
  1325. /* allocate new rings */
  1326. rx_ring = kcalloc(num_rx_queues,
  1327. sizeof(struct ixgbevf_ring), GFP_KERNEL);
  1328. if (!rx_ring)
  1329. return -ENOMEM;
  1330. /* setup ring fields */
  1331. for (i = 0; i < num_rx_queues; i++) {
  1332. rx_ring[i].count = adapter->rx_ring_count;
  1333. rx_ring[i].queue_index = i;
  1334. rx_ring[i].reg_idx = i;
  1335. rx_ring[i].dev = &adapter->pdev->dev;
  1336. rx_ring[i].netdev = adapter->netdev;
  1337. /* allocate resources on the ring */
  1338. err = ixgbevf_setup_rx_resources(adapter, &rx_ring[i]);
  1339. if (err) {
  1340. while (i) {
  1341. i--;
  1342. ixgbevf_free_rx_resources(adapter, &rx_ring[i]);
  1343. }
  1344. kfree(rx_ring);
  1345. return err;
  1346. }
  1347. }
  1348. /* free the existing rings and queues */
  1349. ixgbevf_free_all_rx_resources(adapter);
  1350. adapter->num_rx_queues = 0;
  1351. kfree(adapter->rx_ring);
  1352. /* move new rings into position on the adapter struct */
  1353. adapter->rx_ring = rx_ring;
  1354. adapter->num_rx_queues = num_rx_queues;
  1355. /* reset ring to vector mapping */
  1356. ixgbevf_reset_q_vectors(adapter);
  1357. ixgbevf_map_rings_to_vectors(adapter);
  1358. return 0;
  1359. }
  1360. void ixgbevf_up(struct ixgbevf_adapter *adapter)
  1361. {
  1362. struct ixgbe_hw *hw = &adapter->hw;
  1363. ixgbevf_reset_queues(adapter);
  1364. ixgbevf_configure(adapter);
  1365. ixgbevf_up_complete(adapter);
  1366. /* clear any pending interrupts, may auto mask */
  1367. IXGBE_READ_REG(hw, IXGBE_VTEICR);
  1368. ixgbevf_irq_enable(adapter);
  1369. }
  1370. /**
  1371. * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
  1372. * @adapter: board private structure
  1373. * @rx_ring: ring to free buffers from
  1374. **/
  1375. static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
  1376. struct ixgbevf_ring *rx_ring)
  1377. {
  1378. struct pci_dev *pdev = adapter->pdev;
  1379. unsigned long size;
  1380. unsigned int i;
  1381. if (!rx_ring->rx_buffer_info)
  1382. return;
  1383. /* Free all the Rx ring sk_buffs */
  1384. for (i = 0; i < rx_ring->count; i++) {
  1385. struct ixgbevf_rx_buffer *rx_buffer_info;
  1386. rx_buffer_info = &rx_ring->rx_buffer_info[i];
  1387. if (rx_buffer_info->dma) {
  1388. dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
  1389. rx_ring->rx_buf_len,
  1390. DMA_FROM_DEVICE);
  1391. rx_buffer_info->dma = 0;
  1392. }
  1393. if (rx_buffer_info->skb) {
  1394. struct sk_buff *skb = rx_buffer_info->skb;
  1395. rx_buffer_info->skb = NULL;
  1396. do {
  1397. struct sk_buff *this = skb;
  1398. skb = IXGBE_CB(skb)->prev;
  1399. dev_kfree_skb(this);
  1400. } while (skb);
  1401. }
  1402. }
  1403. size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
  1404. memset(rx_ring->rx_buffer_info, 0, size);
  1405. /* Zero out the descriptor ring */
  1406. memset(rx_ring->desc, 0, rx_ring->size);
  1407. rx_ring->next_to_clean = 0;
  1408. rx_ring->next_to_use = 0;
  1409. if (rx_ring->head)
  1410. writel(0, adapter->hw.hw_addr + rx_ring->head);
  1411. if (rx_ring->tail)
  1412. writel(0, adapter->hw.hw_addr + rx_ring->tail);
  1413. }
  1414. /**
  1415. * ixgbevf_clean_tx_ring - Free Tx Buffers
  1416. * @adapter: board private structure
  1417. * @tx_ring: ring to be cleaned
  1418. **/
  1419. static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
  1420. struct ixgbevf_ring *tx_ring)
  1421. {
  1422. struct ixgbevf_tx_buffer *tx_buffer_info;
  1423. unsigned long size;
  1424. unsigned int i;
  1425. if (!tx_ring->tx_buffer_info)
  1426. return;
  1427. /* Free all the Tx ring sk_buffs */
  1428. for (i = 0; i < tx_ring->count; i++) {
  1429. tx_buffer_info = &tx_ring->tx_buffer_info[i];
  1430. ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
  1431. }
  1432. size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
  1433. memset(tx_ring->tx_buffer_info, 0, size);
  1434. memset(tx_ring->desc, 0, tx_ring->size);
  1435. tx_ring->next_to_use = 0;
  1436. tx_ring->next_to_clean = 0;
  1437. if (tx_ring->head)
  1438. writel(0, adapter->hw.hw_addr + tx_ring->head);
  1439. if (tx_ring->tail)
  1440. writel(0, adapter->hw.hw_addr + tx_ring->tail);
  1441. }
  1442. /**
  1443. * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
  1444. * @adapter: board private structure
  1445. **/
  1446. static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
  1447. {
  1448. int i;
  1449. for (i = 0; i < adapter->num_rx_queues; i++)
  1450. ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1451. }
  1452. /**
  1453. * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
  1454. * @adapter: board private structure
  1455. **/
  1456. static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
  1457. {
  1458. int i;
  1459. for (i = 0; i < adapter->num_tx_queues; i++)
  1460. ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1461. }
  1462. void ixgbevf_down(struct ixgbevf_adapter *adapter)
  1463. {
  1464. struct net_device *netdev = adapter->netdev;
  1465. struct ixgbe_hw *hw = &adapter->hw;
  1466. u32 txdctl;
  1467. int i, j;
  1468. /* signal that we are down to the interrupt handler */
  1469. set_bit(__IXGBEVF_DOWN, &adapter->state);
  1470. /* disable all enabled rx queues */
  1471. for (i = 0; i < adapter->num_rx_queues; i++)
  1472. ixgbevf_disable_rx_queue(adapter, &adapter->rx_ring[i]);
  1473. netif_tx_disable(netdev);
  1474. msleep(10);
  1475. netif_tx_stop_all_queues(netdev);
  1476. ixgbevf_irq_disable(adapter);
  1477. ixgbevf_napi_disable_all(adapter);
  1478. del_timer_sync(&adapter->watchdog_timer);
  1479. /* can't call flush scheduled work here because it can deadlock
  1480. * if linkwatch_event tries to acquire the rtnl_lock which we are
  1481. * holding */
  1482. while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
  1483. msleep(1);
  1484. /* disable transmits in the hardware now that interrupts are off */
  1485. for (i = 0; i < adapter->num_tx_queues; i++) {
  1486. j = adapter->tx_ring[i].reg_idx;
  1487. txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
  1488. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
  1489. (txdctl & ~IXGBE_TXDCTL_ENABLE));
  1490. }
  1491. netif_carrier_off(netdev);
  1492. if (!pci_channel_offline(adapter->pdev))
  1493. ixgbevf_reset(adapter);
  1494. ixgbevf_clean_all_tx_rings(adapter);
  1495. ixgbevf_clean_all_rx_rings(adapter);
  1496. }
  1497. void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
  1498. {
  1499. WARN_ON(in_interrupt());
  1500. while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
  1501. msleep(1);
  1502. ixgbevf_down(adapter);
  1503. ixgbevf_up(adapter);
  1504. clear_bit(__IXGBEVF_RESETTING, &adapter->state);
  1505. }
  1506. void ixgbevf_reset(struct ixgbevf_adapter *adapter)
  1507. {
  1508. struct ixgbe_hw *hw = &adapter->hw;
  1509. struct net_device *netdev = adapter->netdev;
  1510. if (hw->mac.ops.reset_hw(hw)) {
  1511. hw_dbg(hw, "PF still resetting\n");
  1512. } else {
  1513. hw->mac.ops.init_hw(hw);
  1514. ixgbevf_negotiate_api(adapter);
  1515. }
  1516. if (is_valid_ether_addr(adapter->hw.mac.addr)) {
  1517. memcpy(netdev->dev_addr, adapter->hw.mac.addr,
  1518. netdev->addr_len);
  1519. memcpy(netdev->perm_addr, adapter->hw.mac.addr,
  1520. netdev->addr_len);
  1521. }
  1522. }
  1523. static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
  1524. int vectors)
  1525. {
  1526. int err = 0;
  1527. int vector_threshold;
  1528. /* We'll want at least 2 (vector_threshold):
  1529. * 1) TxQ[0] + RxQ[0] handler
  1530. * 2) Other (Link Status Change, etc.)
  1531. */
  1532. vector_threshold = MIN_MSIX_COUNT;
  1533. /* The more we get, the more we will assign to Tx/Rx Cleanup
  1534. * for the separate queues...where Rx Cleanup >= Tx Cleanup.
  1535. * Right now, we simply care about how many we'll get; we'll
  1536. * set them up later while requesting irq's.
  1537. */
  1538. while (vectors >= vector_threshold) {
  1539. err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
  1540. vectors);
  1541. if (!err || err < 0) /* Success or a nasty failure. */
  1542. break;
  1543. else /* err == number of vectors we should try again with */
  1544. vectors = err;
  1545. }
  1546. if (vectors < vector_threshold)
  1547. err = -ENOMEM;
  1548. if (err) {
  1549. dev_err(&adapter->pdev->dev,
  1550. "Unable to allocate MSI-X interrupts\n");
  1551. kfree(adapter->msix_entries);
  1552. adapter->msix_entries = NULL;
  1553. } else {
  1554. /*
  1555. * Adjust for only the vectors we'll use, which is minimum
  1556. * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
  1557. * vectors we were allocated.
  1558. */
  1559. adapter->num_msix_vectors = vectors;
  1560. }
  1561. return err;
  1562. }
  1563. /**
  1564. * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
  1565. * @adapter: board private structure to initialize
  1566. *
  1567. * This is the top level queue allocation routine. The order here is very
  1568. * important, starting with the "most" number of features turned on at once,
  1569. * and ending with the smallest set of features. This way large combinations
  1570. * can be allocated if they're turned on, and smaller combinations are the
  1571. * fallthrough conditions.
  1572. *
  1573. **/
  1574. static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
  1575. {
  1576. /* Start with base case */
  1577. adapter->num_rx_queues = 1;
  1578. adapter->num_tx_queues = 1;
  1579. }
  1580. /**
  1581. * ixgbevf_alloc_queues - Allocate memory for all rings
  1582. * @adapter: board private structure to initialize
  1583. *
  1584. * We allocate one ring per queue at run-time since we don't know the
  1585. * number of queues at compile-time. The polling_netdev array is
  1586. * intended for Multiqueue, but should work fine with a single queue.
  1587. **/
  1588. static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
  1589. {
  1590. int i;
  1591. adapter->tx_ring = kcalloc(adapter->num_tx_queues,
  1592. sizeof(struct ixgbevf_ring), GFP_KERNEL);
  1593. if (!adapter->tx_ring)
  1594. goto err_tx_ring_allocation;
  1595. adapter->rx_ring = kcalloc(adapter->num_rx_queues,
  1596. sizeof(struct ixgbevf_ring), GFP_KERNEL);
  1597. if (!adapter->rx_ring)
  1598. goto err_rx_ring_allocation;
  1599. for (i = 0; i < adapter->num_tx_queues; i++) {
  1600. adapter->tx_ring[i].count = adapter->tx_ring_count;
  1601. adapter->tx_ring[i].queue_index = i;
  1602. /* reg_idx may be remapped later by DCB config */
  1603. adapter->tx_ring[i].reg_idx = i;
  1604. adapter->tx_ring[i].dev = &adapter->pdev->dev;
  1605. adapter->tx_ring[i].netdev = adapter->netdev;
  1606. }
  1607. for (i = 0; i < adapter->num_rx_queues; i++) {
  1608. adapter->rx_ring[i].count = adapter->rx_ring_count;
  1609. adapter->rx_ring[i].queue_index = i;
  1610. adapter->rx_ring[i].reg_idx = i;
  1611. adapter->rx_ring[i].dev = &adapter->pdev->dev;
  1612. adapter->rx_ring[i].netdev = adapter->netdev;
  1613. }
  1614. return 0;
  1615. err_rx_ring_allocation:
  1616. kfree(adapter->tx_ring);
  1617. err_tx_ring_allocation:
  1618. return -ENOMEM;
  1619. }
  1620. /**
  1621. * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
  1622. * @adapter: board private structure to initialize
  1623. *
  1624. * Attempt to configure the interrupts using the best available
  1625. * capabilities of the hardware and the kernel.
  1626. **/
  1627. static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
  1628. {
  1629. struct net_device *netdev = adapter->netdev;
  1630. int err = 0;
  1631. int vector, v_budget;
  1632. /*
  1633. * It's easy to be greedy for MSI-X vectors, but it really
  1634. * doesn't do us much good if we have a lot more vectors
  1635. * than CPU's. So let's be conservative and only ask for
  1636. * (roughly) the same number of vectors as there are CPU's.
  1637. * The default is to use pairs of vectors.
  1638. */
  1639. v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
  1640. v_budget = min_t(int, v_budget, num_online_cpus());
  1641. v_budget += NON_Q_VECTORS;
  1642. /* A failure in MSI-X entry allocation isn't fatal, but it does
  1643. * mean we disable MSI-X capabilities of the adapter. */
  1644. adapter->msix_entries = kcalloc(v_budget,
  1645. sizeof(struct msix_entry), GFP_KERNEL);
  1646. if (!adapter->msix_entries) {
  1647. err = -ENOMEM;
  1648. goto out;
  1649. }
  1650. for (vector = 0; vector < v_budget; vector++)
  1651. adapter->msix_entries[vector].entry = vector;
  1652. err = ixgbevf_acquire_msix_vectors(adapter, v_budget);
  1653. if (err)
  1654. goto out;
  1655. err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
  1656. if (err)
  1657. goto out;
  1658. err = netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
  1659. out:
  1660. return err;
  1661. }
  1662. /**
  1663. * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
  1664. * @adapter: board private structure to initialize
  1665. *
  1666. * We allocate one q_vector per queue interrupt. If allocation fails we
  1667. * return -ENOMEM.
  1668. **/
  1669. static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
  1670. {
  1671. int q_idx, num_q_vectors;
  1672. struct ixgbevf_q_vector *q_vector;
  1673. num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1674. for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
  1675. q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
  1676. if (!q_vector)
  1677. goto err_out;
  1678. q_vector->adapter = adapter;
  1679. q_vector->v_idx = q_idx;
  1680. netif_napi_add(adapter->netdev, &q_vector->napi,
  1681. ixgbevf_poll, 64);
  1682. #ifdef CONFIG_NET_RX_BUSY_POLL
  1683. napi_hash_add(&q_vector->napi);
  1684. #endif
  1685. adapter->q_vector[q_idx] = q_vector;
  1686. }
  1687. return 0;
  1688. err_out:
  1689. while (q_idx) {
  1690. q_idx--;
  1691. q_vector = adapter->q_vector[q_idx];
  1692. #ifdef CONFIG_NET_RX_BUSY_POLL
  1693. napi_hash_del(&q_vector->napi);
  1694. #endif
  1695. netif_napi_del(&q_vector->napi);
  1696. kfree(q_vector);
  1697. adapter->q_vector[q_idx] = NULL;
  1698. }
  1699. return -ENOMEM;
  1700. }
  1701. /**
  1702. * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
  1703. * @adapter: board private structure to initialize
  1704. *
  1705. * This function frees the memory allocated to the q_vectors. In addition if
  1706. * NAPI is enabled it will delete any references to the NAPI struct prior
  1707. * to freeing the q_vector.
  1708. **/
  1709. static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
  1710. {
  1711. int q_idx, num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1712. for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
  1713. struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
  1714. adapter->q_vector[q_idx] = NULL;
  1715. #ifdef CONFIG_NET_RX_BUSY_POLL
  1716. napi_hash_del(&q_vector->napi);
  1717. #endif
  1718. netif_napi_del(&q_vector->napi);
  1719. kfree(q_vector);
  1720. }
  1721. }
  1722. /**
  1723. * ixgbevf_reset_interrupt_capability - Reset MSIX setup
  1724. * @adapter: board private structure
  1725. *
  1726. **/
  1727. static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
  1728. {
  1729. pci_disable_msix(adapter->pdev);
  1730. kfree(adapter->msix_entries);
  1731. adapter->msix_entries = NULL;
  1732. }
  1733. /**
  1734. * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
  1735. * @adapter: board private structure to initialize
  1736. *
  1737. **/
  1738. static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
  1739. {
  1740. int err;
  1741. /* Number of supported queues */
  1742. ixgbevf_set_num_queues(adapter);
  1743. err = ixgbevf_set_interrupt_capability(adapter);
  1744. if (err) {
  1745. hw_dbg(&adapter->hw,
  1746. "Unable to setup interrupt capabilities\n");
  1747. goto err_set_interrupt;
  1748. }
  1749. err = ixgbevf_alloc_q_vectors(adapter);
  1750. if (err) {
  1751. hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
  1752. "vectors\n");
  1753. goto err_alloc_q_vectors;
  1754. }
  1755. err = ixgbevf_alloc_queues(adapter);
  1756. if (err) {
  1757. pr_err("Unable to allocate memory for queues\n");
  1758. goto err_alloc_queues;
  1759. }
  1760. hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
  1761. "Tx Queue count = %u\n",
  1762. (adapter->num_rx_queues > 1) ? "Enabled" :
  1763. "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
  1764. set_bit(__IXGBEVF_DOWN, &adapter->state);
  1765. return 0;
  1766. err_alloc_queues:
  1767. ixgbevf_free_q_vectors(adapter);
  1768. err_alloc_q_vectors:
  1769. ixgbevf_reset_interrupt_capability(adapter);
  1770. err_set_interrupt:
  1771. return err;
  1772. }
  1773. /**
  1774. * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
  1775. * @adapter: board private structure to clear interrupt scheme on
  1776. *
  1777. * We go through and clear interrupt specific resources and reset the structure
  1778. * to pre-load conditions
  1779. **/
  1780. static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
  1781. {
  1782. adapter->num_tx_queues = 0;
  1783. adapter->num_rx_queues = 0;
  1784. ixgbevf_free_q_vectors(adapter);
  1785. ixgbevf_reset_interrupt_capability(adapter);
  1786. }
  1787. /**
  1788. * ixgbevf_sw_init - Initialize general software structures
  1789. * (struct ixgbevf_adapter)
  1790. * @adapter: board private structure to initialize
  1791. *
  1792. * ixgbevf_sw_init initializes the Adapter private data structure.
  1793. * Fields are initialized based on PCI device information and
  1794. * OS network device settings (MTU size).
  1795. **/
  1796. static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
  1797. {
  1798. struct ixgbe_hw *hw = &adapter->hw;
  1799. struct pci_dev *pdev = adapter->pdev;
  1800. struct net_device *netdev = adapter->netdev;
  1801. int err;
  1802. /* PCI config space info */
  1803. hw->vendor_id = pdev->vendor;
  1804. hw->device_id = pdev->device;
  1805. hw->revision_id = pdev->revision;
  1806. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  1807. hw->subsystem_device_id = pdev->subsystem_device;
  1808. hw->mbx.ops.init_params(hw);
  1809. /* assume legacy case in which PF would only give VF 2 queues */
  1810. hw->mac.max_tx_queues = 2;
  1811. hw->mac.max_rx_queues = 2;
  1812. /* lock to protect mailbox accesses */
  1813. spin_lock_init(&adapter->mbx_lock);
  1814. err = hw->mac.ops.reset_hw(hw);
  1815. if (err) {
  1816. dev_info(&pdev->dev,
  1817. "PF still in reset state. Is the PF interface up?\n");
  1818. } else {
  1819. err = hw->mac.ops.init_hw(hw);
  1820. if (err) {
  1821. pr_err("init_shared_code failed: %d\n", err);
  1822. goto out;
  1823. }
  1824. ixgbevf_negotiate_api(adapter);
  1825. err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
  1826. if (err)
  1827. dev_info(&pdev->dev, "Error reading MAC address\n");
  1828. else if (is_zero_ether_addr(adapter->hw.mac.addr))
  1829. dev_info(&pdev->dev,
  1830. "MAC address not assigned by administrator.\n");
  1831. memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
  1832. }
  1833. if (!is_valid_ether_addr(netdev->dev_addr)) {
  1834. dev_info(&pdev->dev, "Assigning random MAC address\n");
  1835. eth_hw_addr_random(netdev);
  1836. memcpy(hw->mac.addr, netdev->dev_addr, netdev->addr_len);
  1837. }
  1838. /* Enable dynamic interrupt throttling rates */
  1839. adapter->rx_itr_setting = 1;
  1840. adapter->tx_itr_setting = 1;
  1841. /* set default ring sizes */
  1842. adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
  1843. adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
  1844. set_bit(__IXGBEVF_DOWN, &adapter->state);
  1845. return 0;
  1846. out:
  1847. return err;
  1848. }
  1849. #define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
  1850. { \
  1851. u32 current_counter = IXGBE_READ_REG(hw, reg); \
  1852. if (current_counter < last_counter) \
  1853. counter += 0x100000000LL; \
  1854. last_counter = current_counter; \
  1855. counter &= 0xFFFFFFFF00000000LL; \
  1856. counter |= current_counter; \
  1857. }
  1858. #define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
  1859. { \
  1860. u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
  1861. u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
  1862. u64 current_counter = (current_counter_msb << 32) | \
  1863. current_counter_lsb; \
  1864. if (current_counter < last_counter) \
  1865. counter += 0x1000000000LL; \
  1866. last_counter = current_counter; \
  1867. counter &= 0xFFFFFFF000000000LL; \
  1868. counter |= current_counter; \
  1869. }
  1870. /**
  1871. * ixgbevf_update_stats - Update the board statistics counters.
  1872. * @adapter: board private structure
  1873. **/
  1874. void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
  1875. {
  1876. struct ixgbe_hw *hw = &adapter->hw;
  1877. int i;
  1878. if (!adapter->link_up)
  1879. return;
  1880. UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
  1881. adapter->stats.vfgprc);
  1882. UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
  1883. adapter->stats.vfgptc);
  1884. UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
  1885. adapter->stats.last_vfgorc,
  1886. adapter->stats.vfgorc);
  1887. UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
  1888. adapter->stats.last_vfgotc,
  1889. adapter->stats.vfgotc);
  1890. UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
  1891. adapter->stats.vfmprc);
  1892. for (i = 0; i < adapter->num_rx_queues; i++) {
  1893. adapter->hw_csum_rx_error +=
  1894. adapter->rx_ring[i].hw_csum_rx_error;
  1895. adapter->hw_csum_rx_good +=
  1896. adapter->rx_ring[i].hw_csum_rx_good;
  1897. adapter->rx_ring[i].hw_csum_rx_error = 0;
  1898. adapter->rx_ring[i].hw_csum_rx_good = 0;
  1899. }
  1900. }
  1901. /**
  1902. * ixgbevf_watchdog - Timer Call-back
  1903. * @data: pointer to adapter cast into an unsigned long
  1904. **/
  1905. static void ixgbevf_watchdog(unsigned long data)
  1906. {
  1907. struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
  1908. struct ixgbe_hw *hw = &adapter->hw;
  1909. u32 eics = 0;
  1910. int i;
  1911. /*
  1912. * Do the watchdog outside of interrupt context due to the lovely
  1913. * delays that some of the newer hardware requires
  1914. */
  1915. if (test_bit(__IXGBEVF_DOWN, &adapter->state))
  1916. goto watchdog_short_circuit;
  1917. /* get one bit for every active tx/rx interrupt vector */
  1918. for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
  1919. struct ixgbevf_q_vector *qv = adapter->q_vector[i];
  1920. if (qv->rx.ring || qv->tx.ring)
  1921. eics |= 1 << i;
  1922. }
  1923. IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
  1924. watchdog_short_circuit:
  1925. schedule_work(&adapter->watchdog_task);
  1926. }
  1927. /**
  1928. * ixgbevf_tx_timeout - Respond to a Tx Hang
  1929. * @netdev: network interface device structure
  1930. **/
  1931. static void ixgbevf_tx_timeout(struct net_device *netdev)
  1932. {
  1933. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1934. /* Do the reset outside of interrupt context */
  1935. schedule_work(&adapter->reset_task);
  1936. }
  1937. static void ixgbevf_reset_task(struct work_struct *work)
  1938. {
  1939. struct ixgbevf_adapter *adapter;
  1940. adapter = container_of(work, struct ixgbevf_adapter, reset_task);
  1941. /* If we're already down or resetting, just bail */
  1942. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  1943. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  1944. return;
  1945. adapter->tx_timeout_count++;
  1946. ixgbevf_reinit_locked(adapter);
  1947. }
  1948. /**
  1949. * ixgbevf_watchdog_task - worker thread to bring link up
  1950. * @work: pointer to work_struct containing our data
  1951. **/
  1952. static void ixgbevf_watchdog_task(struct work_struct *work)
  1953. {
  1954. struct ixgbevf_adapter *adapter = container_of(work,
  1955. struct ixgbevf_adapter,
  1956. watchdog_task);
  1957. struct net_device *netdev = adapter->netdev;
  1958. struct ixgbe_hw *hw = &adapter->hw;
  1959. u32 link_speed = adapter->link_speed;
  1960. bool link_up = adapter->link_up;
  1961. s32 need_reset;
  1962. adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
  1963. /*
  1964. * Always check the link on the watchdog because we have
  1965. * no LSC interrupt
  1966. */
  1967. spin_lock_bh(&adapter->mbx_lock);
  1968. need_reset = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
  1969. spin_unlock_bh(&adapter->mbx_lock);
  1970. if (need_reset) {
  1971. adapter->link_up = link_up;
  1972. adapter->link_speed = link_speed;
  1973. netif_carrier_off(netdev);
  1974. netif_tx_stop_all_queues(netdev);
  1975. schedule_work(&adapter->reset_task);
  1976. goto pf_has_reset;
  1977. }
  1978. adapter->link_up = link_up;
  1979. adapter->link_speed = link_speed;
  1980. if (link_up) {
  1981. if (!netif_carrier_ok(netdev)) {
  1982. char *link_speed_string;
  1983. switch (link_speed) {
  1984. case IXGBE_LINK_SPEED_10GB_FULL:
  1985. link_speed_string = "10 Gbps";
  1986. break;
  1987. case IXGBE_LINK_SPEED_1GB_FULL:
  1988. link_speed_string = "1 Gbps";
  1989. break;
  1990. case IXGBE_LINK_SPEED_100_FULL:
  1991. link_speed_string = "100 Mbps";
  1992. break;
  1993. default:
  1994. link_speed_string = "unknown speed";
  1995. break;
  1996. }
  1997. dev_info(&adapter->pdev->dev,
  1998. "NIC Link is Up, %s\n", link_speed_string);
  1999. netif_carrier_on(netdev);
  2000. netif_tx_wake_all_queues(netdev);
  2001. }
  2002. } else {
  2003. adapter->link_up = false;
  2004. adapter->link_speed = 0;
  2005. if (netif_carrier_ok(netdev)) {
  2006. dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
  2007. netif_carrier_off(netdev);
  2008. netif_tx_stop_all_queues(netdev);
  2009. }
  2010. }
  2011. ixgbevf_update_stats(adapter);
  2012. pf_has_reset:
  2013. /* Reset the timer */
  2014. if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
  2015. mod_timer(&adapter->watchdog_timer,
  2016. round_jiffies(jiffies + (2 * HZ)));
  2017. adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
  2018. }
  2019. /**
  2020. * ixgbevf_free_tx_resources - Free Tx Resources per Queue
  2021. * @adapter: board private structure
  2022. * @tx_ring: Tx descriptor ring for a specific queue
  2023. *
  2024. * Free all transmit software resources
  2025. **/
  2026. void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
  2027. struct ixgbevf_ring *tx_ring)
  2028. {
  2029. struct pci_dev *pdev = adapter->pdev;
  2030. ixgbevf_clean_tx_ring(adapter, tx_ring);
  2031. vfree(tx_ring->tx_buffer_info);
  2032. tx_ring->tx_buffer_info = NULL;
  2033. dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
  2034. tx_ring->dma);
  2035. tx_ring->desc = NULL;
  2036. }
  2037. /**
  2038. * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
  2039. * @adapter: board private structure
  2040. *
  2041. * Free all transmit software resources
  2042. **/
  2043. static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
  2044. {
  2045. int i;
  2046. for (i = 0; i < adapter->num_tx_queues; i++)
  2047. if (adapter->tx_ring[i].desc)
  2048. ixgbevf_free_tx_resources(adapter,
  2049. &adapter->tx_ring[i]);
  2050. }
  2051. /**
  2052. * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
  2053. * @adapter: board private structure
  2054. * @tx_ring: tx descriptor ring (for a specific queue) to setup
  2055. *
  2056. * Return 0 on success, negative on failure
  2057. **/
  2058. int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
  2059. struct ixgbevf_ring *tx_ring)
  2060. {
  2061. struct pci_dev *pdev = adapter->pdev;
  2062. int size;
  2063. size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
  2064. tx_ring->tx_buffer_info = vzalloc(size);
  2065. if (!tx_ring->tx_buffer_info)
  2066. goto err;
  2067. /* round up to nearest 4K */
  2068. tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
  2069. tx_ring->size = ALIGN(tx_ring->size, 4096);
  2070. tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
  2071. &tx_ring->dma, GFP_KERNEL);
  2072. if (!tx_ring->desc)
  2073. goto err;
  2074. tx_ring->next_to_use = 0;
  2075. tx_ring->next_to_clean = 0;
  2076. return 0;
  2077. err:
  2078. vfree(tx_ring->tx_buffer_info);
  2079. tx_ring->tx_buffer_info = NULL;
  2080. hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
  2081. "descriptor ring\n");
  2082. return -ENOMEM;
  2083. }
  2084. /**
  2085. * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
  2086. * @adapter: board private structure
  2087. *
  2088. * If this function returns with an error, then it's possible one or
  2089. * more of the rings is populated (while the rest are not). It is the
  2090. * callers duty to clean those orphaned rings.
  2091. *
  2092. * Return 0 on success, negative on failure
  2093. **/
  2094. static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
  2095. {
  2096. int i, err = 0;
  2097. for (i = 0; i < adapter->num_tx_queues; i++) {
  2098. err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  2099. if (!err)
  2100. continue;
  2101. hw_dbg(&adapter->hw,
  2102. "Allocation for Tx Queue %u failed\n", i);
  2103. break;
  2104. }
  2105. return err;
  2106. }
  2107. /**
  2108. * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
  2109. * @adapter: board private structure
  2110. * @rx_ring: rx descriptor ring (for a specific queue) to setup
  2111. *
  2112. * Returns 0 on success, negative on failure
  2113. **/
  2114. int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
  2115. struct ixgbevf_ring *rx_ring)
  2116. {
  2117. struct pci_dev *pdev = adapter->pdev;
  2118. int size;
  2119. size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
  2120. rx_ring->rx_buffer_info = vzalloc(size);
  2121. if (!rx_ring->rx_buffer_info)
  2122. goto alloc_failed;
  2123. /* Round up to nearest 4K */
  2124. rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
  2125. rx_ring->size = ALIGN(rx_ring->size, 4096);
  2126. rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
  2127. &rx_ring->dma, GFP_KERNEL);
  2128. if (!rx_ring->desc) {
  2129. vfree(rx_ring->rx_buffer_info);
  2130. rx_ring->rx_buffer_info = NULL;
  2131. goto alloc_failed;
  2132. }
  2133. rx_ring->next_to_clean = 0;
  2134. rx_ring->next_to_use = 0;
  2135. return 0;
  2136. alloc_failed:
  2137. return -ENOMEM;
  2138. }
  2139. /**
  2140. * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
  2141. * @adapter: board private structure
  2142. *
  2143. * If this function returns with an error, then it's possible one or
  2144. * more of the rings is populated (while the rest are not). It is the
  2145. * callers duty to clean those orphaned rings.
  2146. *
  2147. * Return 0 on success, negative on failure
  2148. **/
  2149. static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
  2150. {
  2151. int i, err = 0;
  2152. for (i = 0; i < adapter->num_rx_queues; i++) {
  2153. err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  2154. if (!err)
  2155. continue;
  2156. hw_dbg(&adapter->hw,
  2157. "Allocation for Rx Queue %u failed\n", i);
  2158. break;
  2159. }
  2160. return err;
  2161. }
  2162. /**
  2163. * ixgbevf_free_rx_resources - Free Rx Resources
  2164. * @adapter: board private structure
  2165. * @rx_ring: ring to clean the resources from
  2166. *
  2167. * Free all receive software resources
  2168. **/
  2169. void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
  2170. struct ixgbevf_ring *rx_ring)
  2171. {
  2172. struct pci_dev *pdev = adapter->pdev;
  2173. ixgbevf_clean_rx_ring(adapter, rx_ring);
  2174. vfree(rx_ring->rx_buffer_info);
  2175. rx_ring->rx_buffer_info = NULL;
  2176. dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
  2177. rx_ring->dma);
  2178. rx_ring->desc = NULL;
  2179. }
  2180. /**
  2181. * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
  2182. * @adapter: board private structure
  2183. *
  2184. * Free all receive software resources
  2185. **/
  2186. static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
  2187. {
  2188. int i;
  2189. for (i = 0; i < adapter->num_rx_queues; i++)
  2190. if (adapter->rx_ring[i].desc)
  2191. ixgbevf_free_rx_resources(adapter,
  2192. &adapter->rx_ring[i]);
  2193. }
  2194. static int ixgbevf_setup_queues(struct ixgbevf_adapter *adapter)
  2195. {
  2196. struct ixgbe_hw *hw = &adapter->hw;
  2197. struct ixgbevf_ring *rx_ring;
  2198. unsigned int def_q = 0;
  2199. unsigned int num_tcs = 0;
  2200. unsigned int num_rx_queues = 1;
  2201. int err, i;
  2202. spin_lock_bh(&adapter->mbx_lock);
  2203. /* fetch queue configuration from the PF */
  2204. err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
  2205. spin_unlock_bh(&adapter->mbx_lock);
  2206. if (err)
  2207. return err;
  2208. if (num_tcs > 1) {
  2209. /* update default Tx ring register index */
  2210. adapter->tx_ring[0].reg_idx = def_q;
  2211. /* we need as many queues as traffic classes */
  2212. num_rx_queues = num_tcs;
  2213. }
  2214. /* nothing to do if we have the correct number of queues */
  2215. if (adapter->num_rx_queues == num_rx_queues)
  2216. return 0;
  2217. /* allocate new rings */
  2218. rx_ring = kcalloc(num_rx_queues,
  2219. sizeof(struct ixgbevf_ring), GFP_KERNEL);
  2220. if (!rx_ring)
  2221. return -ENOMEM;
  2222. /* setup ring fields */
  2223. for (i = 0; i < num_rx_queues; i++) {
  2224. rx_ring[i].count = adapter->rx_ring_count;
  2225. rx_ring[i].queue_index = i;
  2226. rx_ring[i].reg_idx = i;
  2227. rx_ring[i].dev = &adapter->pdev->dev;
  2228. rx_ring[i].netdev = adapter->netdev;
  2229. }
  2230. /* free the existing ring and queues */
  2231. adapter->num_rx_queues = 0;
  2232. kfree(adapter->rx_ring);
  2233. /* move new rings into position on the adapter struct */
  2234. adapter->rx_ring = rx_ring;
  2235. adapter->num_rx_queues = num_rx_queues;
  2236. return 0;
  2237. }
  2238. /**
  2239. * ixgbevf_open - Called when a network interface is made active
  2240. * @netdev: network interface device structure
  2241. *
  2242. * Returns 0 on success, negative value on failure
  2243. *
  2244. * The open entry point is called when a network interface is made
  2245. * active by the system (IFF_UP). At this point all resources needed
  2246. * for transmit and receive operations are allocated, the interrupt
  2247. * handler is registered with the OS, the watchdog timer is started,
  2248. * and the stack is notified that the interface is ready.
  2249. **/
  2250. static int ixgbevf_open(struct net_device *netdev)
  2251. {
  2252. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2253. struct ixgbe_hw *hw = &adapter->hw;
  2254. int err;
  2255. /* A previous failure to open the device because of a lack of
  2256. * available MSIX vector resources may have reset the number
  2257. * of msix vectors variable to zero. The only way to recover
  2258. * is to unload/reload the driver and hope that the system has
  2259. * been able to recover some MSIX vector resources.
  2260. */
  2261. if (!adapter->num_msix_vectors)
  2262. return -ENOMEM;
  2263. /* disallow open during test */
  2264. if (test_bit(__IXGBEVF_TESTING, &adapter->state))
  2265. return -EBUSY;
  2266. if (hw->adapter_stopped) {
  2267. ixgbevf_reset(adapter);
  2268. /* if adapter is still stopped then PF isn't up and
  2269. * the vf can't start. */
  2270. if (hw->adapter_stopped) {
  2271. err = IXGBE_ERR_MBX;
  2272. pr_err("Unable to start - perhaps the PF Driver isn't "
  2273. "up yet\n");
  2274. goto err_setup_reset;
  2275. }
  2276. }
  2277. /* setup queue reg_idx and Rx queue count */
  2278. err = ixgbevf_setup_queues(adapter);
  2279. if (err)
  2280. goto err_setup_queues;
  2281. /* allocate transmit descriptors */
  2282. err = ixgbevf_setup_all_tx_resources(adapter);
  2283. if (err)
  2284. goto err_setup_tx;
  2285. /* allocate receive descriptors */
  2286. err = ixgbevf_setup_all_rx_resources(adapter);
  2287. if (err)
  2288. goto err_setup_rx;
  2289. ixgbevf_configure(adapter);
  2290. /*
  2291. * Map the Tx/Rx rings to the vectors we were allotted.
  2292. * if request_irq will be called in this function map_rings
  2293. * must be called *before* up_complete
  2294. */
  2295. ixgbevf_map_rings_to_vectors(adapter);
  2296. ixgbevf_up_complete(adapter);
  2297. /* clear any pending interrupts, may auto mask */
  2298. IXGBE_READ_REG(hw, IXGBE_VTEICR);
  2299. err = ixgbevf_request_irq(adapter);
  2300. if (err)
  2301. goto err_req_irq;
  2302. ixgbevf_irq_enable(adapter);
  2303. return 0;
  2304. err_req_irq:
  2305. ixgbevf_down(adapter);
  2306. err_setup_rx:
  2307. ixgbevf_free_all_rx_resources(adapter);
  2308. err_setup_tx:
  2309. ixgbevf_free_all_tx_resources(adapter);
  2310. err_setup_queues:
  2311. ixgbevf_reset(adapter);
  2312. err_setup_reset:
  2313. return err;
  2314. }
  2315. /**
  2316. * ixgbevf_close - Disables a network interface
  2317. * @netdev: network interface device structure
  2318. *
  2319. * Returns 0, this is not allowed to fail
  2320. *
  2321. * The close entry point is called when an interface is de-activated
  2322. * by the OS. The hardware is still under the drivers control, but
  2323. * needs to be disabled. A global MAC reset is issued to stop the
  2324. * hardware, and all transmit and receive resources are freed.
  2325. **/
  2326. static int ixgbevf_close(struct net_device *netdev)
  2327. {
  2328. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2329. ixgbevf_down(adapter);
  2330. ixgbevf_free_irq(adapter);
  2331. ixgbevf_free_all_tx_resources(adapter);
  2332. ixgbevf_free_all_rx_resources(adapter);
  2333. return 0;
  2334. }
  2335. static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
  2336. u32 vlan_macip_lens, u32 type_tucmd,
  2337. u32 mss_l4len_idx)
  2338. {
  2339. struct ixgbe_adv_tx_context_desc *context_desc;
  2340. u16 i = tx_ring->next_to_use;
  2341. context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
  2342. i++;
  2343. tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
  2344. /* set bits to identify this as an advanced context descriptor */
  2345. type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
  2346. context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
  2347. context_desc->seqnum_seed = 0;
  2348. context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
  2349. context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
  2350. }
  2351. static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
  2352. struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
  2353. {
  2354. u32 vlan_macip_lens, type_tucmd;
  2355. u32 mss_l4len_idx, l4len;
  2356. if (!skb_is_gso(skb))
  2357. return 0;
  2358. if (skb_header_cloned(skb)) {
  2359. int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2360. if (err)
  2361. return err;
  2362. }
  2363. /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
  2364. type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
  2365. if (skb->protocol == htons(ETH_P_IP)) {
  2366. struct iphdr *iph = ip_hdr(skb);
  2367. iph->tot_len = 0;
  2368. iph->check = 0;
  2369. tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
  2370. iph->daddr, 0,
  2371. IPPROTO_TCP,
  2372. 0);
  2373. type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
  2374. } else if (skb_is_gso_v6(skb)) {
  2375. ipv6_hdr(skb)->payload_len = 0;
  2376. tcp_hdr(skb)->check =
  2377. ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  2378. &ipv6_hdr(skb)->daddr,
  2379. 0, IPPROTO_TCP, 0);
  2380. }
  2381. /* compute header lengths */
  2382. l4len = tcp_hdrlen(skb);
  2383. *hdr_len += l4len;
  2384. *hdr_len = skb_transport_offset(skb) + l4len;
  2385. /* mss_l4len_id: use 1 as index for TSO */
  2386. mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
  2387. mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
  2388. mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
  2389. /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
  2390. vlan_macip_lens = skb_network_header_len(skb);
  2391. vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
  2392. vlan_macip_lens |= tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
  2393. ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
  2394. type_tucmd, mss_l4len_idx);
  2395. return 1;
  2396. }
  2397. static bool ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
  2398. struct sk_buff *skb, u32 tx_flags)
  2399. {
  2400. u32 vlan_macip_lens = 0;
  2401. u32 mss_l4len_idx = 0;
  2402. u32 type_tucmd = 0;
  2403. if (skb->ip_summed == CHECKSUM_PARTIAL) {
  2404. u8 l4_hdr = 0;
  2405. switch (skb->protocol) {
  2406. case __constant_htons(ETH_P_IP):
  2407. vlan_macip_lens |= skb_network_header_len(skb);
  2408. type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
  2409. l4_hdr = ip_hdr(skb)->protocol;
  2410. break;
  2411. case __constant_htons(ETH_P_IPV6):
  2412. vlan_macip_lens |= skb_network_header_len(skb);
  2413. l4_hdr = ipv6_hdr(skb)->nexthdr;
  2414. break;
  2415. default:
  2416. if (unlikely(net_ratelimit())) {
  2417. dev_warn(tx_ring->dev,
  2418. "partial checksum but proto=%x!\n",
  2419. skb->protocol);
  2420. }
  2421. break;
  2422. }
  2423. switch (l4_hdr) {
  2424. case IPPROTO_TCP:
  2425. type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
  2426. mss_l4len_idx = tcp_hdrlen(skb) <<
  2427. IXGBE_ADVTXD_L4LEN_SHIFT;
  2428. break;
  2429. case IPPROTO_SCTP:
  2430. type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
  2431. mss_l4len_idx = sizeof(struct sctphdr) <<
  2432. IXGBE_ADVTXD_L4LEN_SHIFT;
  2433. break;
  2434. case IPPROTO_UDP:
  2435. mss_l4len_idx = sizeof(struct udphdr) <<
  2436. IXGBE_ADVTXD_L4LEN_SHIFT;
  2437. break;
  2438. default:
  2439. if (unlikely(net_ratelimit())) {
  2440. dev_warn(tx_ring->dev,
  2441. "partial checksum but l4 proto=%x!\n",
  2442. l4_hdr);
  2443. }
  2444. break;
  2445. }
  2446. }
  2447. /* vlan_macip_lens: MACLEN, VLAN tag */
  2448. vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
  2449. vlan_macip_lens |= tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
  2450. ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
  2451. type_tucmd, mss_l4len_idx);
  2452. return (skb->ip_summed == CHECKSUM_PARTIAL);
  2453. }
  2454. static int ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
  2455. struct sk_buff *skb, u32 tx_flags)
  2456. {
  2457. struct ixgbevf_tx_buffer *tx_buffer_info;
  2458. unsigned int len;
  2459. unsigned int total = skb->len;
  2460. unsigned int offset = 0, size;
  2461. int count = 0;
  2462. unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
  2463. unsigned int f;
  2464. int i;
  2465. i = tx_ring->next_to_use;
  2466. len = min(skb_headlen(skb), total);
  2467. while (len) {
  2468. tx_buffer_info = &tx_ring->tx_buffer_info[i];
  2469. size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
  2470. tx_buffer_info->length = size;
  2471. tx_buffer_info->mapped_as_page = false;
  2472. tx_buffer_info->dma = dma_map_single(tx_ring->dev,
  2473. skb->data + offset,
  2474. size, DMA_TO_DEVICE);
  2475. if (dma_mapping_error(tx_ring->dev, tx_buffer_info->dma))
  2476. goto dma_error;
  2477. len -= size;
  2478. total -= size;
  2479. offset += size;
  2480. count++;
  2481. i++;
  2482. if (i == tx_ring->count)
  2483. i = 0;
  2484. }
  2485. for (f = 0; f < nr_frags; f++) {
  2486. const struct skb_frag_struct *frag;
  2487. frag = &skb_shinfo(skb)->frags[f];
  2488. len = min((unsigned int)skb_frag_size(frag), total);
  2489. offset = 0;
  2490. while (len) {
  2491. tx_buffer_info = &tx_ring->tx_buffer_info[i];
  2492. size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
  2493. tx_buffer_info->length = size;
  2494. tx_buffer_info->dma =
  2495. skb_frag_dma_map(tx_ring->dev, frag,
  2496. offset, size, DMA_TO_DEVICE);
  2497. if (dma_mapping_error(tx_ring->dev,
  2498. tx_buffer_info->dma))
  2499. goto dma_error;
  2500. tx_buffer_info->mapped_as_page = true;
  2501. len -= size;
  2502. total -= size;
  2503. offset += size;
  2504. count++;
  2505. i++;
  2506. if (i == tx_ring->count)
  2507. i = 0;
  2508. }
  2509. if (total == 0)
  2510. break;
  2511. }
  2512. if (i == 0)
  2513. i = tx_ring->count - 1;
  2514. else
  2515. i = i - 1;
  2516. tx_ring->tx_buffer_info[i].skb = skb;
  2517. return count;
  2518. dma_error:
  2519. dev_err(tx_ring->dev, "TX DMA map failed\n");
  2520. /* clear timestamp and dma mappings for failed tx_buffer_info map */
  2521. tx_buffer_info->dma = 0;
  2522. count--;
  2523. /* clear timestamp and dma mappings for remaining portion of packet */
  2524. while (count >= 0) {
  2525. count--;
  2526. i--;
  2527. if (i < 0)
  2528. i += tx_ring->count;
  2529. tx_buffer_info = &tx_ring->tx_buffer_info[i];
  2530. ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
  2531. }
  2532. return count;
  2533. }
  2534. static void ixgbevf_tx_queue(struct ixgbevf_ring *tx_ring, int tx_flags,
  2535. int count, unsigned int first, u32 paylen,
  2536. u8 hdr_len)
  2537. {
  2538. union ixgbe_adv_tx_desc *tx_desc = NULL;
  2539. struct ixgbevf_tx_buffer *tx_buffer_info;
  2540. u32 olinfo_status = 0, cmd_type_len = 0;
  2541. unsigned int i;
  2542. u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
  2543. cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
  2544. cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
  2545. if (tx_flags & IXGBE_TX_FLAGS_VLAN)
  2546. cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
  2547. if (tx_flags & IXGBE_TX_FLAGS_CSUM)
  2548. olinfo_status |= IXGBE_ADVTXD_POPTS_TXSM;
  2549. if (tx_flags & IXGBE_TX_FLAGS_TSO) {
  2550. cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
  2551. /* use index 1 context for tso */
  2552. olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
  2553. if (tx_flags & IXGBE_TX_FLAGS_IPV4)
  2554. olinfo_status |= IXGBE_ADVTXD_POPTS_IXSM;
  2555. }
  2556. /*
  2557. * Check Context must be set if Tx switch is enabled, which it
  2558. * always is for case where virtual functions are running
  2559. */
  2560. olinfo_status |= IXGBE_ADVTXD_CC;
  2561. olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
  2562. i = tx_ring->next_to_use;
  2563. while (count--) {
  2564. tx_buffer_info = &tx_ring->tx_buffer_info[i];
  2565. tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
  2566. tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
  2567. tx_desc->read.cmd_type_len =
  2568. cpu_to_le32(cmd_type_len | tx_buffer_info->length);
  2569. tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
  2570. i++;
  2571. if (i == tx_ring->count)
  2572. i = 0;
  2573. }
  2574. tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
  2575. tx_ring->tx_buffer_info[first].time_stamp = jiffies;
  2576. /* Force memory writes to complete before letting h/w
  2577. * know there are new descriptors to fetch. (Only
  2578. * applicable for weak-ordered memory model archs,
  2579. * such as IA-64).
  2580. */
  2581. wmb();
  2582. tx_ring->tx_buffer_info[first].next_to_watch = tx_desc;
  2583. tx_ring->next_to_use = i;
  2584. }
  2585. static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
  2586. {
  2587. struct ixgbevf_adapter *adapter = netdev_priv(tx_ring->netdev);
  2588. netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
  2589. /* Herbert's original patch had:
  2590. * smp_mb__after_netif_stop_queue();
  2591. * but since that doesn't exist yet, just open code it. */
  2592. smp_mb();
  2593. /* We need to check again in a case another CPU has just
  2594. * made room available. */
  2595. if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
  2596. return -EBUSY;
  2597. /* A reprieve! - use start_queue because it doesn't call schedule */
  2598. netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
  2599. ++adapter->restart_queue;
  2600. return 0;
  2601. }
  2602. static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
  2603. {
  2604. if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
  2605. return 0;
  2606. return __ixgbevf_maybe_stop_tx(tx_ring, size);
  2607. }
  2608. static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2609. {
  2610. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2611. struct ixgbevf_ring *tx_ring;
  2612. unsigned int first;
  2613. unsigned int tx_flags = 0;
  2614. u8 hdr_len = 0;
  2615. int r_idx = 0, tso;
  2616. u16 count = TXD_USE_COUNT(skb_headlen(skb));
  2617. #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
  2618. unsigned short f;
  2619. #endif
  2620. u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
  2621. if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
  2622. dev_kfree_skb(skb);
  2623. return NETDEV_TX_OK;
  2624. }
  2625. tx_ring = &adapter->tx_ring[r_idx];
  2626. /*
  2627. * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
  2628. * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
  2629. * + 2 desc gap to keep tail from touching head,
  2630. * + 1 desc for context descriptor,
  2631. * otherwise try next time
  2632. */
  2633. #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
  2634. for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
  2635. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
  2636. #else
  2637. count += skb_shinfo(skb)->nr_frags;
  2638. #endif
  2639. if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
  2640. adapter->tx_busy++;
  2641. return NETDEV_TX_BUSY;
  2642. }
  2643. if (vlan_tx_tag_present(skb)) {
  2644. tx_flags |= vlan_tx_tag_get(skb);
  2645. tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
  2646. tx_flags |= IXGBE_TX_FLAGS_VLAN;
  2647. }
  2648. first = tx_ring->next_to_use;
  2649. if (skb->protocol == htons(ETH_P_IP))
  2650. tx_flags |= IXGBE_TX_FLAGS_IPV4;
  2651. tso = ixgbevf_tso(tx_ring, skb, tx_flags, &hdr_len);
  2652. if (tso < 0) {
  2653. dev_kfree_skb_any(skb);
  2654. return NETDEV_TX_OK;
  2655. }
  2656. if (tso)
  2657. tx_flags |= IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_CSUM;
  2658. else if (ixgbevf_tx_csum(tx_ring, skb, tx_flags))
  2659. tx_flags |= IXGBE_TX_FLAGS_CSUM;
  2660. ixgbevf_tx_queue(tx_ring, tx_flags,
  2661. ixgbevf_tx_map(tx_ring, skb, tx_flags),
  2662. first, skb->len, hdr_len);
  2663. writel(tx_ring->next_to_use, adapter->hw.hw_addr + tx_ring->tail);
  2664. ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
  2665. return NETDEV_TX_OK;
  2666. }
  2667. /**
  2668. * ixgbevf_set_mac - Change the Ethernet Address of the NIC
  2669. * @netdev: network interface device structure
  2670. * @p: pointer to an address structure
  2671. *
  2672. * Returns 0 on success, negative on failure
  2673. **/
  2674. static int ixgbevf_set_mac(struct net_device *netdev, void *p)
  2675. {
  2676. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2677. struct ixgbe_hw *hw = &adapter->hw;
  2678. struct sockaddr *addr = p;
  2679. if (!is_valid_ether_addr(addr->sa_data))
  2680. return -EADDRNOTAVAIL;
  2681. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  2682. memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
  2683. spin_lock_bh(&adapter->mbx_lock);
  2684. hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
  2685. spin_unlock_bh(&adapter->mbx_lock);
  2686. return 0;
  2687. }
  2688. /**
  2689. * ixgbevf_change_mtu - Change the Maximum Transfer Unit
  2690. * @netdev: network interface device structure
  2691. * @new_mtu: new value for maximum frame size
  2692. *
  2693. * Returns 0 on success, negative on failure
  2694. **/
  2695. static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
  2696. {
  2697. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2698. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
  2699. int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
  2700. switch (adapter->hw.api_version) {
  2701. case ixgbe_mbox_api_11:
  2702. max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
  2703. break;
  2704. default:
  2705. if (adapter->hw.mac.type == ixgbe_mac_X540_vf)
  2706. max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
  2707. break;
  2708. }
  2709. /* MTU < 68 is an error and causes problems on some kernels */
  2710. if ((new_mtu < 68) || (max_frame > max_possible_frame))
  2711. return -EINVAL;
  2712. hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
  2713. netdev->mtu, new_mtu);
  2714. /* must set new MTU before calling down or up */
  2715. netdev->mtu = new_mtu;
  2716. if (netif_running(netdev))
  2717. ixgbevf_reinit_locked(adapter);
  2718. return 0;
  2719. }
  2720. static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
  2721. {
  2722. struct net_device *netdev = pci_get_drvdata(pdev);
  2723. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2724. #ifdef CONFIG_PM
  2725. int retval = 0;
  2726. #endif
  2727. netif_device_detach(netdev);
  2728. if (netif_running(netdev)) {
  2729. rtnl_lock();
  2730. ixgbevf_down(adapter);
  2731. ixgbevf_free_irq(adapter);
  2732. ixgbevf_free_all_tx_resources(adapter);
  2733. ixgbevf_free_all_rx_resources(adapter);
  2734. rtnl_unlock();
  2735. }
  2736. ixgbevf_clear_interrupt_scheme(adapter);
  2737. #ifdef CONFIG_PM
  2738. retval = pci_save_state(pdev);
  2739. if (retval)
  2740. return retval;
  2741. #endif
  2742. pci_disable_device(pdev);
  2743. return 0;
  2744. }
  2745. #ifdef CONFIG_PM
  2746. static int ixgbevf_resume(struct pci_dev *pdev)
  2747. {
  2748. struct ixgbevf_adapter *adapter = pci_get_drvdata(pdev);
  2749. struct net_device *netdev = adapter->netdev;
  2750. u32 err;
  2751. pci_set_power_state(pdev, PCI_D0);
  2752. pci_restore_state(pdev);
  2753. /*
  2754. * pci_restore_state clears dev->state_saved so call
  2755. * pci_save_state to restore it.
  2756. */
  2757. pci_save_state(pdev);
  2758. err = pci_enable_device_mem(pdev);
  2759. if (err) {
  2760. dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
  2761. return err;
  2762. }
  2763. pci_set_master(pdev);
  2764. ixgbevf_reset(adapter);
  2765. rtnl_lock();
  2766. err = ixgbevf_init_interrupt_scheme(adapter);
  2767. rtnl_unlock();
  2768. if (err) {
  2769. dev_err(&pdev->dev, "Cannot initialize interrupts\n");
  2770. return err;
  2771. }
  2772. if (netif_running(netdev)) {
  2773. err = ixgbevf_open(netdev);
  2774. if (err)
  2775. return err;
  2776. }
  2777. netif_device_attach(netdev);
  2778. return err;
  2779. }
  2780. #endif /* CONFIG_PM */
  2781. static void ixgbevf_shutdown(struct pci_dev *pdev)
  2782. {
  2783. ixgbevf_suspend(pdev, PMSG_SUSPEND);
  2784. }
  2785. static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev,
  2786. struct rtnl_link_stats64 *stats)
  2787. {
  2788. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2789. unsigned int start;
  2790. u64 bytes, packets;
  2791. const struct ixgbevf_ring *ring;
  2792. int i;
  2793. ixgbevf_update_stats(adapter);
  2794. stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
  2795. for (i = 0; i < adapter->num_rx_queues; i++) {
  2796. ring = &adapter->rx_ring[i];
  2797. do {
  2798. start = u64_stats_fetch_begin_bh(&ring->syncp);
  2799. bytes = ring->total_bytes;
  2800. packets = ring->total_packets;
  2801. } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
  2802. stats->rx_bytes += bytes;
  2803. stats->rx_packets += packets;
  2804. }
  2805. for (i = 0; i < adapter->num_tx_queues; i++) {
  2806. ring = &adapter->tx_ring[i];
  2807. do {
  2808. start = u64_stats_fetch_begin_bh(&ring->syncp);
  2809. bytes = ring->total_bytes;
  2810. packets = ring->total_packets;
  2811. } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
  2812. stats->tx_bytes += bytes;
  2813. stats->tx_packets += packets;
  2814. }
  2815. return stats;
  2816. }
  2817. static const struct net_device_ops ixgbevf_netdev_ops = {
  2818. .ndo_open = ixgbevf_open,
  2819. .ndo_stop = ixgbevf_close,
  2820. .ndo_start_xmit = ixgbevf_xmit_frame,
  2821. .ndo_set_rx_mode = ixgbevf_set_rx_mode,
  2822. .ndo_get_stats64 = ixgbevf_get_stats,
  2823. .ndo_validate_addr = eth_validate_addr,
  2824. .ndo_set_mac_address = ixgbevf_set_mac,
  2825. .ndo_change_mtu = ixgbevf_change_mtu,
  2826. .ndo_tx_timeout = ixgbevf_tx_timeout,
  2827. .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
  2828. .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
  2829. #ifdef CONFIG_NET_RX_BUSY_POLL
  2830. .ndo_busy_poll = ixgbevf_busy_poll_recv,
  2831. #endif
  2832. };
  2833. static void ixgbevf_assign_netdev_ops(struct net_device *dev)
  2834. {
  2835. dev->netdev_ops = &ixgbevf_netdev_ops;
  2836. ixgbevf_set_ethtool_ops(dev);
  2837. dev->watchdog_timeo = 5 * HZ;
  2838. }
  2839. /**
  2840. * ixgbevf_probe - Device Initialization Routine
  2841. * @pdev: PCI device information struct
  2842. * @ent: entry in ixgbevf_pci_tbl
  2843. *
  2844. * Returns 0 on success, negative on failure
  2845. *
  2846. * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
  2847. * The OS initialization, configuring of the adapter private structure,
  2848. * and a hardware reset occur.
  2849. **/
  2850. static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  2851. {
  2852. struct net_device *netdev;
  2853. struct ixgbevf_adapter *adapter = NULL;
  2854. struct ixgbe_hw *hw = NULL;
  2855. const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
  2856. static int cards_found;
  2857. int err, pci_using_dac;
  2858. err = pci_enable_device(pdev);
  2859. if (err)
  2860. return err;
  2861. if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
  2862. !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
  2863. pci_using_dac = 1;
  2864. } else {
  2865. err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
  2866. if (err) {
  2867. err = dma_set_coherent_mask(&pdev->dev,
  2868. DMA_BIT_MASK(32));
  2869. if (err) {
  2870. dev_err(&pdev->dev, "No usable DMA "
  2871. "configuration, aborting\n");
  2872. goto err_dma;
  2873. }
  2874. }
  2875. pci_using_dac = 0;
  2876. }
  2877. err = pci_request_regions(pdev, ixgbevf_driver_name);
  2878. if (err) {
  2879. dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
  2880. goto err_pci_reg;
  2881. }
  2882. pci_set_master(pdev);
  2883. netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
  2884. MAX_TX_QUEUES);
  2885. if (!netdev) {
  2886. err = -ENOMEM;
  2887. goto err_alloc_etherdev;
  2888. }
  2889. SET_NETDEV_DEV(netdev, &pdev->dev);
  2890. pci_set_drvdata(pdev, netdev);
  2891. adapter = netdev_priv(netdev);
  2892. adapter->netdev = netdev;
  2893. adapter->pdev = pdev;
  2894. hw = &adapter->hw;
  2895. hw->back = adapter;
  2896. adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
  2897. /*
  2898. * call save state here in standalone driver because it relies on
  2899. * adapter struct to exist, and needs to call netdev_priv
  2900. */
  2901. pci_save_state(pdev);
  2902. hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
  2903. pci_resource_len(pdev, 0));
  2904. if (!hw->hw_addr) {
  2905. err = -EIO;
  2906. goto err_ioremap;
  2907. }
  2908. ixgbevf_assign_netdev_ops(netdev);
  2909. adapter->bd_number = cards_found;
  2910. /* Setup hw api */
  2911. memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
  2912. hw->mac.type = ii->mac;
  2913. memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
  2914. sizeof(struct ixgbe_mbx_operations));
  2915. /* setup the private structure */
  2916. err = ixgbevf_sw_init(adapter);
  2917. if (err)
  2918. goto err_sw_init;
  2919. /* The HW MAC address was set and/or determined in sw_init */
  2920. if (!is_valid_ether_addr(netdev->dev_addr)) {
  2921. pr_err("invalid MAC address\n");
  2922. err = -EIO;
  2923. goto err_sw_init;
  2924. }
  2925. netdev->hw_features = NETIF_F_SG |
  2926. NETIF_F_IP_CSUM |
  2927. NETIF_F_IPV6_CSUM |
  2928. NETIF_F_TSO |
  2929. NETIF_F_TSO6 |
  2930. NETIF_F_RXCSUM;
  2931. netdev->features = netdev->hw_features |
  2932. NETIF_F_HW_VLAN_CTAG_TX |
  2933. NETIF_F_HW_VLAN_CTAG_RX |
  2934. NETIF_F_HW_VLAN_CTAG_FILTER;
  2935. netdev->vlan_features |= NETIF_F_TSO;
  2936. netdev->vlan_features |= NETIF_F_TSO6;
  2937. netdev->vlan_features |= NETIF_F_IP_CSUM;
  2938. netdev->vlan_features |= NETIF_F_IPV6_CSUM;
  2939. netdev->vlan_features |= NETIF_F_SG;
  2940. if (pci_using_dac)
  2941. netdev->features |= NETIF_F_HIGHDMA;
  2942. netdev->priv_flags |= IFF_UNICAST_FLT;
  2943. init_timer(&adapter->watchdog_timer);
  2944. adapter->watchdog_timer.function = ixgbevf_watchdog;
  2945. adapter->watchdog_timer.data = (unsigned long)adapter;
  2946. INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
  2947. INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
  2948. err = ixgbevf_init_interrupt_scheme(adapter);
  2949. if (err)
  2950. goto err_sw_init;
  2951. strcpy(netdev->name, "eth%d");
  2952. err = register_netdev(netdev);
  2953. if (err)
  2954. goto err_register;
  2955. netif_carrier_off(netdev);
  2956. ixgbevf_init_last_counter_stats(adapter);
  2957. /* print the MAC address */
  2958. hw_dbg(hw, "%pM\n", netdev->dev_addr);
  2959. hw_dbg(hw, "MAC: %d\n", hw->mac.type);
  2960. hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
  2961. cards_found++;
  2962. return 0;
  2963. err_register:
  2964. ixgbevf_clear_interrupt_scheme(adapter);
  2965. err_sw_init:
  2966. ixgbevf_reset_interrupt_capability(adapter);
  2967. iounmap(hw->hw_addr);
  2968. err_ioremap:
  2969. free_netdev(netdev);
  2970. err_alloc_etherdev:
  2971. pci_release_regions(pdev);
  2972. err_pci_reg:
  2973. err_dma:
  2974. pci_disable_device(pdev);
  2975. return err;
  2976. }
  2977. /**
  2978. * ixgbevf_remove - Device Removal Routine
  2979. * @pdev: PCI device information struct
  2980. *
  2981. * ixgbevf_remove is called by the PCI subsystem to alert the driver
  2982. * that it should release a PCI device. The could be caused by a
  2983. * Hot-Plug event, or because the driver is going to be removed from
  2984. * memory.
  2985. **/
  2986. static void ixgbevf_remove(struct pci_dev *pdev)
  2987. {
  2988. struct net_device *netdev = pci_get_drvdata(pdev);
  2989. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2990. set_bit(__IXGBEVF_DOWN, &adapter->state);
  2991. del_timer_sync(&adapter->watchdog_timer);
  2992. cancel_work_sync(&adapter->reset_task);
  2993. cancel_work_sync(&adapter->watchdog_task);
  2994. if (netdev->reg_state == NETREG_REGISTERED)
  2995. unregister_netdev(netdev);
  2996. ixgbevf_clear_interrupt_scheme(adapter);
  2997. ixgbevf_reset_interrupt_capability(adapter);
  2998. iounmap(adapter->hw.hw_addr);
  2999. pci_release_regions(pdev);
  3000. hw_dbg(&adapter->hw, "Remove complete\n");
  3001. kfree(adapter->tx_ring);
  3002. kfree(adapter->rx_ring);
  3003. free_netdev(netdev);
  3004. pci_disable_device(pdev);
  3005. }
  3006. /**
  3007. * ixgbevf_io_error_detected - called when PCI error is detected
  3008. * @pdev: Pointer to PCI device
  3009. * @state: The current pci connection state
  3010. *
  3011. * This function is called after a PCI bus error affecting
  3012. * this device has been detected.
  3013. */
  3014. static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
  3015. pci_channel_state_t state)
  3016. {
  3017. struct net_device *netdev = pci_get_drvdata(pdev);
  3018. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3019. netif_device_detach(netdev);
  3020. if (state == pci_channel_io_perm_failure)
  3021. return PCI_ERS_RESULT_DISCONNECT;
  3022. if (netif_running(netdev))
  3023. ixgbevf_down(adapter);
  3024. pci_disable_device(pdev);
  3025. /* Request a slot slot reset. */
  3026. return PCI_ERS_RESULT_NEED_RESET;
  3027. }
  3028. /**
  3029. * ixgbevf_io_slot_reset - called after the pci bus has been reset.
  3030. * @pdev: Pointer to PCI device
  3031. *
  3032. * Restart the card from scratch, as if from a cold-boot. Implementation
  3033. * resembles the first-half of the ixgbevf_resume routine.
  3034. */
  3035. static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
  3036. {
  3037. struct net_device *netdev = pci_get_drvdata(pdev);
  3038. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3039. if (pci_enable_device_mem(pdev)) {
  3040. dev_err(&pdev->dev,
  3041. "Cannot re-enable PCI device after reset.\n");
  3042. return PCI_ERS_RESULT_DISCONNECT;
  3043. }
  3044. pci_set_master(pdev);
  3045. ixgbevf_reset(adapter);
  3046. return PCI_ERS_RESULT_RECOVERED;
  3047. }
  3048. /**
  3049. * ixgbevf_io_resume - called when traffic can start flowing again.
  3050. * @pdev: Pointer to PCI device
  3051. *
  3052. * This callback is called when the error recovery driver tells us that
  3053. * its OK to resume normal operation. Implementation resembles the
  3054. * second-half of the ixgbevf_resume routine.
  3055. */
  3056. static void ixgbevf_io_resume(struct pci_dev *pdev)
  3057. {
  3058. struct net_device *netdev = pci_get_drvdata(pdev);
  3059. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3060. if (netif_running(netdev))
  3061. ixgbevf_up(adapter);
  3062. netif_device_attach(netdev);
  3063. }
  3064. /* PCI Error Recovery (ERS) */
  3065. static const struct pci_error_handlers ixgbevf_err_handler = {
  3066. .error_detected = ixgbevf_io_error_detected,
  3067. .slot_reset = ixgbevf_io_slot_reset,
  3068. .resume = ixgbevf_io_resume,
  3069. };
  3070. static struct pci_driver ixgbevf_driver = {
  3071. .name = ixgbevf_driver_name,
  3072. .id_table = ixgbevf_pci_tbl,
  3073. .probe = ixgbevf_probe,
  3074. .remove = ixgbevf_remove,
  3075. #ifdef CONFIG_PM
  3076. /* Power Management Hooks */
  3077. .suspend = ixgbevf_suspend,
  3078. .resume = ixgbevf_resume,
  3079. #endif
  3080. .shutdown = ixgbevf_shutdown,
  3081. .err_handler = &ixgbevf_err_handler
  3082. };
  3083. /**
  3084. * ixgbevf_init_module - Driver Registration Routine
  3085. *
  3086. * ixgbevf_init_module is the first routine called when the driver is
  3087. * loaded. All it does is register with the PCI subsystem.
  3088. **/
  3089. static int __init ixgbevf_init_module(void)
  3090. {
  3091. int ret;
  3092. pr_info("%s - version %s\n", ixgbevf_driver_string,
  3093. ixgbevf_driver_version);
  3094. pr_info("%s\n", ixgbevf_copyright);
  3095. ret = pci_register_driver(&ixgbevf_driver);
  3096. return ret;
  3097. }
  3098. module_init(ixgbevf_init_module);
  3099. /**
  3100. * ixgbevf_exit_module - Driver Exit Cleanup Routine
  3101. *
  3102. * ixgbevf_exit_module is called just before the driver is removed
  3103. * from memory.
  3104. **/
  3105. static void __exit ixgbevf_exit_module(void)
  3106. {
  3107. pci_unregister_driver(&ixgbevf_driver);
  3108. }
  3109. #ifdef DEBUG
  3110. /**
  3111. * ixgbevf_get_hw_dev_name - return device name string
  3112. * used by hardware layer to print debugging information
  3113. **/
  3114. char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
  3115. {
  3116. struct ixgbevf_adapter *adapter = hw->back;
  3117. return adapter->netdev->name;
  3118. }
  3119. #endif
  3120. module_exit(ixgbevf_exit_module);
  3121. /* ixgbevf_main.c */