irq.c 3.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125
  1. /*
  2. * linux/arch/sh/boards/se/770x/irq.c
  3. *
  4. * Copyright (C) 2000 Kazumoto Kojima
  5. * Copyright (C) 2006 Nobuhiro Iwamatsu
  6. *
  7. * Hitachi SolutionEngine Support.
  8. *
  9. */
  10. #include <linux/init.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/irq.h>
  13. #include <asm/irq.h>
  14. #include <asm/io.h>
  15. #include <asm/se.h>
  16. /*
  17. * If the problem of make_ipr_irq is solved,
  18. * this code will become unnecessary. :-)
  19. */
  20. static void se770x_disable_ipr_irq(unsigned int irq)
  21. {
  22. struct ipr_data *p = get_irq_chip_data(irq);
  23. ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << p->shift)), p->addr);
  24. }
  25. static void se770x_enable_ipr_irq(unsigned int irq)
  26. {
  27. struct ipr_data *p = get_irq_chip_data(irq);
  28. ctrl_outw(ctrl_inw(p->addr) | (p->priority << p->shift), p->addr);
  29. }
  30. static struct irq_chip se770x_irq_chip = {
  31. .name = "MS770xSE-FPGA",
  32. .mask = se770x_disable_ipr_irq,
  33. .unmask = se770x_enable_ipr_irq,
  34. .mask_ack = se770x_disable_ipr_irq,
  35. };
  36. void make_se770x_irq(struct ipr_data *table, unsigned int nr_irqs)
  37. {
  38. int i;
  39. for (i = 0; i < nr_irqs; i++) {
  40. unsigned int irq = table[i].irq;
  41. disable_irq_nosync(irq);
  42. set_irq_chip_and_handler_name(irq, &se770x_irq_chip,
  43. handle_level_irq, "level");
  44. set_irq_chip_data(irq, &table[i]);
  45. se770x_enable_ipr_irq(irq);
  46. }
  47. }
  48. static struct ipr_data se770x_ipr_map[] = {
  49. #if defined(CONFIG_CPU_SUBTYPE_SH7705)
  50. /* This is default value */
  51. { 0xf-0x2, 0, 8, 0x2 , BCR_ILCRA},
  52. { 0xf-0xa, 0, 4, 0xa , BCR_ILCRA},
  53. { 0xf-0x5, 0, 0, 0x5 , BCR_ILCRB},
  54. { 0xf-0x8, 0, 4, 0x8 , BCR_ILCRC},
  55. { 0xf-0xc, 0, 0, 0xc , BCR_ILCRC},
  56. { 0xf-0xe, 0, 12, 0xe , BCR_ILCRD},
  57. { 0xf-0x3, 0, 4, 0x3 , BCR_ILCRD}, /* LAN */
  58. { 0xf-0xd, 0, 8, 0xd , BCR_ILCRE},
  59. { 0xf-0x9, 0, 4, 0x9 , BCR_ILCRE},
  60. { 0xf-0x1, 0, 0, 0x1 , BCR_ILCRE},
  61. { 0xf-0xf, 0, 12, 0xf , BCR_ILCRF},
  62. { 0xf-0xb, 0, 4, 0xb , BCR_ILCRF},
  63. { 0xf-0x7, 0, 12, 0x7 , BCR_ILCRG},
  64. { 0xf-0x6, 0, 8, 0x6 , BCR_ILCRG},
  65. { 0xf-0x4, 0, 4, 0x4 , BCR_ILCRG},
  66. #else
  67. { 14, 0, 8, 0x0f-14 ,BCR_ILCRA},
  68. { 12, 0, 4, 0x0f-12 ,BCR_ILCRA},
  69. { 8, 0, 4, 0x0f- 8 ,BCR_ILCRB},
  70. { 6, 0, 12, 0x0f- 6 ,BCR_ILCRC},
  71. { 5, 0, 8, 0x0f- 5 ,BCR_ILCRC},
  72. { 4, 0, 4, 0x0f- 4 ,BCR_ILCRC},
  73. { 3, 0, 0, 0x0f- 3 ,BCR_ILCRC},
  74. { 1, 0, 12, 0x0f- 1 ,BCR_ILCRD},
  75. /* ST NIC */
  76. { 10, 0, 4, 0x0f-10 ,BCR_ILCRD}, /* LAN */
  77. /* MRSHPC IRQs setting */
  78. { 0, 0, 12, 0x0f- 0 ,BCR_ILCRE}, /* PCIRQ3 */
  79. { 11, 0, 8, 0x0f-11 ,BCR_ILCRE}, /* PCIRQ2 */
  80. { 9, 0, 4, 0x0f- 9 ,BCR_ILCRE}, /* PCIRQ1 */
  81. { 7, 0, 0, 0x0f- 7 ,BCR_ILCRE}, /* PCIRQ0 */
  82. /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
  83. /* NOTE: #2 and #13 are not used on PC */
  84. { 13, 0, 4, 0x0f-13 ,BCR_ILCRG}, /* SLOTIRQ2 */
  85. { 2, 0, 0, 0x0f- 2 ,BCR_ILCRG}, /* SLOTIRQ1 */
  86. #endif
  87. };
  88. /*
  89. * Initialize IRQ setting
  90. */
  91. void __init init_se_IRQ(void)
  92. {
  93. /*
  94. * Super I/O (Just mimic PC):
  95. * 1: keyboard
  96. * 3: serial 0
  97. * 4: serial 1
  98. * 5: printer
  99. * 6: floppy
  100. * 8: rtc
  101. * 12: mouse
  102. * 14: ide0
  103. */
  104. #if defined(CONFIG_CPU_SUBTYPE_SH7705)
  105. /* Disable all interrupts */
  106. ctrl_outw(0, BCR_ILCRA);
  107. ctrl_outw(0, BCR_ILCRB);
  108. ctrl_outw(0, BCR_ILCRC);
  109. ctrl_outw(0, BCR_ILCRD);
  110. ctrl_outw(0, BCR_ILCRE);
  111. ctrl_outw(0, BCR_ILCRF);
  112. ctrl_outw(0, BCR_ILCRG);
  113. #endif
  114. make_se770x_irq(se770x_ipr_map, ARRAY_SIZE(se770x_ipr_map));
  115. }