mwl8k.c 101 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/list.h>
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/completion.h>
  20. #include <linux/etherdevice.h>
  21. #include <net/mac80211.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/firmware.h>
  24. #include <linux/workqueue.h>
  25. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  26. #define MWL8K_NAME KBUILD_MODNAME
  27. #define MWL8K_VERSION "0.11"
  28. /* Register definitions */
  29. #define MWL8K_HIU_GEN_PTR 0x00000c10
  30. #define MWL8K_MODE_STA 0x0000005a
  31. #define MWL8K_MODE_AP 0x000000a5
  32. #define MWL8K_HIU_INT_CODE 0x00000c14
  33. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  34. #define MWL8K_FWAP_READY 0xf1f2f4a5
  35. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  36. #define MWL8K_HIU_SCRATCH 0x00000c40
  37. /* Host->device communications */
  38. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  39. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  40. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  41. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  42. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  43. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  44. #define MWL8K_H2A_INT_RESET (1 << 15)
  45. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  46. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  47. /* Device->host communications */
  48. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  49. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  50. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  51. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  52. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  53. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  54. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  55. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  56. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  57. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  58. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  59. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  60. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  61. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  62. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  63. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  64. MWL8K_A2H_INT_CHNL_SWITCHED | \
  65. MWL8K_A2H_INT_QUEUE_EMPTY | \
  66. MWL8K_A2H_INT_RADAR_DETECT | \
  67. MWL8K_A2H_INT_RADIO_ON | \
  68. MWL8K_A2H_INT_RADIO_OFF | \
  69. MWL8K_A2H_INT_MAC_EVENT | \
  70. MWL8K_A2H_INT_OPC_DONE | \
  71. MWL8K_A2H_INT_RX_READY | \
  72. MWL8K_A2H_INT_TX_DONE)
  73. #define MWL8K_RX_QUEUES 1
  74. #define MWL8K_TX_QUEUES 4
  75. struct rxd_ops {
  76. int rxd_size;
  77. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  78. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  79. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  80. __le16 *qos);
  81. };
  82. struct mwl8k_device_info {
  83. char *part_name;
  84. char *helper_image;
  85. char *fw_image;
  86. struct rxd_ops *ap_rxd_ops;
  87. };
  88. struct mwl8k_rx_queue {
  89. int rxd_count;
  90. /* hw receives here */
  91. int head;
  92. /* refill descs here */
  93. int tail;
  94. void *rxd;
  95. dma_addr_t rxd_dma;
  96. struct {
  97. struct sk_buff *skb;
  98. DECLARE_PCI_UNMAP_ADDR(dma)
  99. } *buf;
  100. };
  101. struct mwl8k_tx_queue {
  102. /* hw transmits here */
  103. int head;
  104. /* sw appends here */
  105. int tail;
  106. struct ieee80211_tx_queue_stats stats;
  107. struct mwl8k_tx_desc *txd;
  108. dma_addr_t txd_dma;
  109. struct sk_buff **skb;
  110. };
  111. struct mwl8k_priv {
  112. struct ieee80211_hw *hw;
  113. struct pci_dev *pdev;
  114. struct mwl8k_device_info *device_info;
  115. void __iomem *sram;
  116. void __iomem *regs;
  117. /* firmware */
  118. struct firmware *fw_helper;
  119. struct firmware *fw_ucode;
  120. /* hardware/firmware parameters */
  121. bool ap_fw;
  122. struct rxd_ops *rxd_ops;
  123. struct ieee80211_supported_band band_24;
  124. struct ieee80211_channel channels_24[14];
  125. struct ieee80211_rate rates_24[14];
  126. struct ieee80211_supported_band band_50;
  127. struct ieee80211_channel channels_50[4];
  128. struct ieee80211_rate rates_50[9];
  129. /* firmware access */
  130. struct mutex fw_mutex;
  131. struct task_struct *fw_mutex_owner;
  132. int fw_mutex_depth;
  133. struct completion *hostcmd_wait;
  134. /* lock held over TX and TX reap */
  135. spinlock_t tx_lock;
  136. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  137. struct completion *tx_wait;
  138. /* List of interfaces. */
  139. struct list_head vif_list;
  140. /* power management status cookie from firmware */
  141. u32 *cookie;
  142. dma_addr_t cookie_dma;
  143. u16 num_mcaddrs;
  144. u8 hw_rev;
  145. u32 fw_rev;
  146. /*
  147. * Running count of TX packets in flight, to avoid
  148. * iterating over the transmit rings each time.
  149. */
  150. int pending_tx_pkts;
  151. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  152. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  153. bool radio_on;
  154. bool radio_short_preamble;
  155. bool sniffer_enabled;
  156. bool wmm_enabled;
  157. struct work_struct sta_notify_worker;
  158. spinlock_t sta_notify_list_lock;
  159. struct list_head sta_notify_list;
  160. /* XXX need to convert this to handle multiple interfaces */
  161. bool capture_beacon;
  162. u8 capture_bssid[ETH_ALEN];
  163. struct sk_buff *beacon_skb;
  164. /*
  165. * This FJ worker has to be global as it is scheduled from the
  166. * RX handler. At this point we don't know which interface it
  167. * belongs to until the list of bssids waiting to complete join
  168. * is checked.
  169. */
  170. struct work_struct finalize_join_worker;
  171. /* Tasklet to perform TX reclaim. */
  172. struct tasklet_struct poll_tx_task;
  173. /* Tasklet to perform RX. */
  174. struct tasklet_struct poll_rx_task;
  175. };
  176. /* Per interface specific private data */
  177. struct mwl8k_vif {
  178. struct list_head list;
  179. struct ieee80211_vif *vif;
  180. /* Firmware macid for this vif. */
  181. int macid;
  182. /* Non AMPDU sequence number assigned by driver. */
  183. u16 seqno;
  184. };
  185. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  186. struct mwl8k_sta {
  187. /* Index into station database. Returned by UPDATE_STADB. */
  188. u8 peer_id;
  189. };
  190. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  191. static const struct ieee80211_channel mwl8k_channels_24[] = {
  192. { .center_freq = 2412, .hw_value = 1, },
  193. { .center_freq = 2417, .hw_value = 2, },
  194. { .center_freq = 2422, .hw_value = 3, },
  195. { .center_freq = 2427, .hw_value = 4, },
  196. { .center_freq = 2432, .hw_value = 5, },
  197. { .center_freq = 2437, .hw_value = 6, },
  198. { .center_freq = 2442, .hw_value = 7, },
  199. { .center_freq = 2447, .hw_value = 8, },
  200. { .center_freq = 2452, .hw_value = 9, },
  201. { .center_freq = 2457, .hw_value = 10, },
  202. { .center_freq = 2462, .hw_value = 11, },
  203. { .center_freq = 2467, .hw_value = 12, },
  204. { .center_freq = 2472, .hw_value = 13, },
  205. { .center_freq = 2484, .hw_value = 14, },
  206. };
  207. static const struct ieee80211_rate mwl8k_rates_24[] = {
  208. { .bitrate = 10, .hw_value = 2, },
  209. { .bitrate = 20, .hw_value = 4, },
  210. { .bitrate = 55, .hw_value = 11, },
  211. { .bitrate = 110, .hw_value = 22, },
  212. { .bitrate = 220, .hw_value = 44, },
  213. { .bitrate = 60, .hw_value = 12, },
  214. { .bitrate = 90, .hw_value = 18, },
  215. { .bitrate = 120, .hw_value = 24, },
  216. { .bitrate = 180, .hw_value = 36, },
  217. { .bitrate = 240, .hw_value = 48, },
  218. { .bitrate = 360, .hw_value = 72, },
  219. { .bitrate = 480, .hw_value = 96, },
  220. { .bitrate = 540, .hw_value = 108, },
  221. { .bitrate = 720, .hw_value = 144, },
  222. };
  223. static const struct ieee80211_channel mwl8k_channels_50[] = {
  224. { .center_freq = 5180, .hw_value = 36, },
  225. { .center_freq = 5200, .hw_value = 40, },
  226. { .center_freq = 5220, .hw_value = 44, },
  227. { .center_freq = 5240, .hw_value = 48, },
  228. };
  229. static const struct ieee80211_rate mwl8k_rates_50[] = {
  230. { .bitrate = 60, .hw_value = 12, },
  231. { .bitrate = 90, .hw_value = 18, },
  232. { .bitrate = 120, .hw_value = 24, },
  233. { .bitrate = 180, .hw_value = 36, },
  234. { .bitrate = 240, .hw_value = 48, },
  235. { .bitrate = 360, .hw_value = 72, },
  236. { .bitrate = 480, .hw_value = 96, },
  237. { .bitrate = 540, .hw_value = 108, },
  238. { .bitrate = 720, .hw_value = 144, },
  239. };
  240. /* Set or get info from Firmware */
  241. #define MWL8K_CMD_SET 0x0001
  242. #define MWL8K_CMD_GET 0x0000
  243. /* Firmware command codes */
  244. #define MWL8K_CMD_CODE_DNLD 0x0001
  245. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  246. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  247. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  248. #define MWL8K_CMD_GET_STAT 0x0014
  249. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  250. #define MWL8K_CMD_RF_TX_POWER 0x001e
  251. #define MWL8K_CMD_RF_ANTENNA 0x0020
  252. #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
  253. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  254. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  255. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  256. #define MWL8K_CMD_SET_AID 0x010d
  257. #define MWL8K_CMD_SET_RATE 0x0110
  258. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  259. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  260. #define MWL8K_CMD_SET_SLOT 0x0114
  261. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  262. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  263. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  264. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  265. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  266. #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
  267. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  268. #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
  269. #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
  270. #define MWL8K_CMD_UPDATE_STADB 0x1123
  271. static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
  272. {
  273. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  274. snprintf(buf, bufsize, "%s", #x);\
  275. return buf;\
  276. } while (0)
  277. switch (cmd & ~0x8000) {
  278. MWL8K_CMDNAME(CODE_DNLD);
  279. MWL8K_CMDNAME(GET_HW_SPEC);
  280. MWL8K_CMDNAME(SET_HW_SPEC);
  281. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  282. MWL8K_CMDNAME(GET_STAT);
  283. MWL8K_CMDNAME(RADIO_CONTROL);
  284. MWL8K_CMDNAME(RF_TX_POWER);
  285. MWL8K_CMDNAME(RF_ANTENNA);
  286. MWL8K_CMDNAME(SET_BEACON);
  287. MWL8K_CMDNAME(SET_PRE_SCAN);
  288. MWL8K_CMDNAME(SET_POST_SCAN);
  289. MWL8K_CMDNAME(SET_RF_CHANNEL);
  290. MWL8K_CMDNAME(SET_AID);
  291. MWL8K_CMDNAME(SET_RATE);
  292. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  293. MWL8K_CMDNAME(RTS_THRESHOLD);
  294. MWL8K_CMDNAME(SET_SLOT);
  295. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  296. MWL8K_CMDNAME(SET_WMM_MODE);
  297. MWL8K_CMDNAME(MIMO_CONFIG);
  298. MWL8K_CMDNAME(USE_FIXED_RATE);
  299. MWL8K_CMDNAME(ENABLE_SNIFFER);
  300. MWL8K_CMDNAME(SET_MAC_ADDR);
  301. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  302. MWL8K_CMDNAME(BSS_START);
  303. MWL8K_CMDNAME(SET_NEW_STN);
  304. MWL8K_CMDNAME(UPDATE_STADB);
  305. default:
  306. snprintf(buf, bufsize, "0x%x", cmd);
  307. }
  308. #undef MWL8K_CMDNAME
  309. return buf;
  310. }
  311. /* Hardware and firmware reset */
  312. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  313. {
  314. iowrite32(MWL8K_H2A_INT_RESET,
  315. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  316. iowrite32(MWL8K_H2A_INT_RESET,
  317. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  318. msleep(20);
  319. }
  320. /* Release fw image */
  321. static void mwl8k_release_fw(struct firmware **fw)
  322. {
  323. if (*fw == NULL)
  324. return;
  325. release_firmware(*fw);
  326. *fw = NULL;
  327. }
  328. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  329. {
  330. mwl8k_release_fw(&priv->fw_ucode);
  331. mwl8k_release_fw(&priv->fw_helper);
  332. }
  333. /* Request fw image */
  334. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  335. const char *fname, struct firmware **fw)
  336. {
  337. /* release current image */
  338. if (*fw != NULL)
  339. mwl8k_release_fw(fw);
  340. return request_firmware((const struct firmware **)fw,
  341. fname, &priv->pdev->dev);
  342. }
  343. static int mwl8k_request_firmware(struct mwl8k_priv *priv)
  344. {
  345. struct mwl8k_device_info *di = priv->device_info;
  346. int rc;
  347. if (di->helper_image != NULL) {
  348. rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
  349. if (rc) {
  350. printk(KERN_ERR "%s: Error requesting helper "
  351. "firmware file %s\n", pci_name(priv->pdev),
  352. di->helper_image);
  353. return rc;
  354. }
  355. }
  356. rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
  357. if (rc) {
  358. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  359. pci_name(priv->pdev), di->fw_image);
  360. mwl8k_release_fw(&priv->fw_helper);
  361. return rc;
  362. }
  363. return 0;
  364. }
  365. struct mwl8k_cmd_pkt {
  366. __le16 code;
  367. __le16 length;
  368. __u8 seq_num;
  369. __u8 macid;
  370. __le16 result;
  371. char payload[0];
  372. } __attribute__((packed));
  373. /*
  374. * Firmware loading.
  375. */
  376. static int
  377. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  378. {
  379. void __iomem *regs = priv->regs;
  380. dma_addr_t dma_addr;
  381. int loops;
  382. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  383. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  384. return -ENOMEM;
  385. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  386. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  387. iowrite32(MWL8K_H2A_INT_DOORBELL,
  388. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  389. iowrite32(MWL8K_H2A_INT_DUMMY,
  390. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  391. loops = 1000;
  392. do {
  393. u32 int_code;
  394. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  395. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  396. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  397. break;
  398. }
  399. cond_resched();
  400. udelay(1);
  401. } while (--loops);
  402. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  403. return loops ? 0 : -ETIMEDOUT;
  404. }
  405. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  406. const u8 *data, size_t length)
  407. {
  408. struct mwl8k_cmd_pkt *cmd;
  409. int done;
  410. int rc = 0;
  411. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  412. if (cmd == NULL)
  413. return -ENOMEM;
  414. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  415. cmd->seq_num = 0;
  416. cmd->macid = 0;
  417. cmd->result = 0;
  418. done = 0;
  419. while (length) {
  420. int block_size = length > 256 ? 256 : length;
  421. memcpy(cmd->payload, data + done, block_size);
  422. cmd->length = cpu_to_le16(block_size);
  423. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  424. sizeof(*cmd) + block_size);
  425. if (rc)
  426. break;
  427. done += block_size;
  428. length -= block_size;
  429. }
  430. if (!rc) {
  431. cmd->length = 0;
  432. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  433. }
  434. kfree(cmd);
  435. return rc;
  436. }
  437. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  438. const u8 *data, size_t length)
  439. {
  440. unsigned char *buffer;
  441. int may_continue, rc = 0;
  442. u32 done, prev_block_size;
  443. buffer = kmalloc(1024, GFP_KERNEL);
  444. if (buffer == NULL)
  445. return -ENOMEM;
  446. done = 0;
  447. prev_block_size = 0;
  448. may_continue = 1000;
  449. while (may_continue > 0) {
  450. u32 block_size;
  451. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  452. if (block_size & 1) {
  453. block_size &= ~1;
  454. may_continue--;
  455. } else {
  456. done += prev_block_size;
  457. length -= prev_block_size;
  458. }
  459. if (block_size > 1024 || block_size > length) {
  460. rc = -EOVERFLOW;
  461. break;
  462. }
  463. if (length == 0) {
  464. rc = 0;
  465. break;
  466. }
  467. if (block_size == 0) {
  468. rc = -EPROTO;
  469. may_continue--;
  470. udelay(1);
  471. continue;
  472. }
  473. prev_block_size = block_size;
  474. memcpy(buffer, data + done, block_size);
  475. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  476. if (rc)
  477. break;
  478. }
  479. if (!rc && length != 0)
  480. rc = -EREMOTEIO;
  481. kfree(buffer);
  482. return rc;
  483. }
  484. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  485. {
  486. struct mwl8k_priv *priv = hw->priv;
  487. struct firmware *fw = priv->fw_ucode;
  488. int rc;
  489. int loops;
  490. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  491. struct firmware *helper = priv->fw_helper;
  492. if (helper == NULL) {
  493. printk(KERN_ERR "%s: helper image needed but none "
  494. "given\n", pci_name(priv->pdev));
  495. return -EINVAL;
  496. }
  497. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  498. if (rc) {
  499. printk(KERN_ERR "%s: unable to load firmware "
  500. "helper image\n", pci_name(priv->pdev));
  501. return rc;
  502. }
  503. msleep(5);
  504. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  505. } else {
  506. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  507. }
  508. if (rc) {
  509. printk(KERN_ERR "%s: unable to load firmware image\n",
  510. pci_name(priv->pdev));
  511. return rc;
  512. }
  513. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  514. loops = 500000;
  515. do {
  516. u32 ready_code;
  517. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  518. if (ready_code == MWL8K_FWAP_READY) {
  519. priv->ap_fw = 1;
  520. break;
  521. } else if (ready_code == MWL8K_FWSTA_READY) {
  522. priv->ap_fw = 0;
  523. break;
  524. }
  525. cond_resched();
  526. udelay(1);
  527. } while (--loops);
  528. return loops ? 0 : -ETIMEDOUT;
  529. }
  530. /* DMA header used by firmware and hardware. */
  531. struct mwl8k_dma_data {
  532. __le16 fwlen;
  533. struct ieee80211_hdr wh;
  534. char data[0];
  535. } __attribute__((packed));
  536. /* Routines to add/remove DMA header from skb. */
  537. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  538. {
  539. struct mwl8k_dma_data *tr;
  540. int hdrlen;
  541. tr = (struct mwl8k_dma_data *)skb->data;
  542. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  543. if (hdrlen != sizeof(tr->wh)) {
  544. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  545. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  546. *((__le16 *)(tr->data - 2)) = qos;
  547. } else {
  548. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  549. }
  550. }
  551. if (hdrlen != sizeof(*tr))
  552. skb_pull(skb, sizeof(*tr) - hdrlen);
  553. }
  554. static inline void mwl8k_add_dma_header(struct sk_buff *skb)
  555. {
  556. struct ieee80211_hdr *wh;
  557. int hdrlen;
  558. struct mwl8k_dma_data *tr;
  559. /*
  560. * Add a firmware DMA header; the firmware requires that we
  561. * present a 2-byte payload length followed by a 4-address
  562. * header (without QoS field), followed (optionally) by any
  563. * WEP/ExtIV header (but only filled in for CCMP).
  564. */
  565. wh = (struct ieee80211_hdr *)skb->data;
  566. hdrlen = ieee80211_hdrlen(wh->frame_control);
  567. if (hdrlen != sizeof(*tr))
  568. skb_push(skb, sizeof(*tr) - hdrlen);
  569. if (ieee80211_is_data_qos(wh->frame_control))
  570. hdrlen -= 2;
  571. tr = (struct mwl8k_dma_data *)skb->data;
  572. if (wh != &tr->wh)
  573. memmove(&tr->wh, wh, hdrlen);
  574. if (hdrlen != sizeof(tr->wh))
  575. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  576. /*
  577. * Firmware length is the length of the fully formed "802.11
  578. * payload". That is, everything except for the 802.11 header.
  579. * This includes all crypto material including the MIC.
  580. */
  581. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
  582. }
  583. /*
  584. * Packet reception for 88w8366 AP firmware.
  585. */
  586. struct mwl8k_rxd_8366_ap {
  587. __le16 pkt_len;
  588. __u8 sq2;
  589. __u8 rate;
  590. __le32 pkt_phys_addr;
  591. __le32 next_rxd_phys_addr;
  592. __le16 qos_control;
  593. __le16 htsig2;
  594. __le32 hw_rssi_info;
  595. __le32 hw_noise_floor_info;
  596. __u8 noise_floor;
  597. __u8 pad0[3];
  598. __u8 rssi;
  599. __u8 rx_status;
  600. __u8 channel;
  601. __u8 rx_ctrl;
  602. } __attribute__((packed));
  603. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  604. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  605. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  606. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  607. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  608. {
  609. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  610. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  611. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  612. }
  613. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  614. {
  615. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  616. rxd->pkt_len = cpu_to_le16(len);
  617. rxd->pkt_phys_addr = cpu_to_le32(addr);
  618. wmb();
  619. rxd->rx_ctrl = 0;
  620. }
  621. static int
  622. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  623. __le16 *qos)
  624. {
  625. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  626. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  627. return -1;
  628. rmb();
  629. memset(status, 0, sizeof(*status));
  630. status->signal = -rxd->rssi;
  631. status->noise = -rxd->noise_floor;
  632. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  633. status->flag |= RX_FLAG_HT;
  634. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  635. status->flag |= RX_FLAG_40MHZ;
  636. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  637. } else {
  638. int i;
  639. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  640. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  641. status->rate_idx = i;
  642. break;
  643. }
  644. }
  645. }
  646. if (rxd->channel > 14) {
  647. status->band = IEEE80211_BAND_5GHZ;
  648. if (!(status->flag & RX_FLAG_HT))
  649. status->rate_idx -= 5;
  650. } else {
  651. status->band = IEEE80211_BAND_2GHZ;
  652. }
  653. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  654. *qos = rxd->qos_control;
  655. return le16_to_cpu(rxd->pkt_len);
  656. }
  657. static struct rxd_ops rxd_8366_ap_ops = {
  658. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  659. .rxd_init = mwl8k_rxd_8366_ap_init,
  660. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  661. .rxd_process = mwl8k_rxd_8366_ap_process,
  662. };
  663. /*
  664. * Packet reception for STA firmware.
  665. */
  666. struct mwl8k_rxd_sta {
  667. __le16 pkt_len;
  668. __u8 link_quality;
  669. __u8 noise_level;
  670. __le32 pkt_phys_addr;
  671. __le32 next_rxd_phys_addr;
  672. __le16 qos_control;
  673. __le16 rate_info;
  674. __le32 pad0[4];
  675. __u8 rssi;
  676. __u8 channel;
  677. __le16 pad1;
  678. __u8 rx_ctrl;
  679. __u8 rx_status;
  680. __u8 pad2[2];
  681. } __attribute__((packed));
  682. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  683. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  684. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  685. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  686. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  687. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  688. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  689. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  690. {
  691. struct mwl8k_rxd_sta *rxd = _rxd;
  692. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  693. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  694. }
  695. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  696. {
  697. struct mwl8k_rxd_sta *rxd = _rxd;
  698. rxd->pkt_len = cpu_to_le16(len);
  699. rxd->pkt_phys_addr = cpu_to_le32(addr);
  700. wmb();
  701. rxd->rx_ctrl = 0;
  702. }
  703. static int
  704. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  705. __le16 *qos)
  706. {
  707. struct mwl8k_rxd_sta *rxd = _rxd;
  708. u16 rate_info;
  709. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  710. return -1;
  711. rmb();
  712. rate_info = le16_to_cpu(rxd->rate_info);
  713. memset(status, 0, sizeof(*status));
  714. status->signal = -rxd->rssi;
  715. status->noise = -rxd->noise_level;
  716. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  717. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  718. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  719. status->flag |= RX_FLAG_SHORTPRE;
  720. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  721. status->flag |= RX_FLAG_40MHZ;
  722. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  723. status->flag |= RX_FLAG_SHORT_GI;
  724. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  725. status->flag |= RX_FLAG_HT;
  726. if (rxd->channel > 14) {
  727. status->band = IEEE80211_BAND_5GHZ;
  728. if (!(status->flag & RX_FLAG_HT))
  729. status->rate_idx -= 5;
  730. } else {
  731. status->band = IEEE80211_BAND_2GHZ;
  732. }
  733. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  734. *qos = rxd->qos_control;
  735. return le16_to_cpu(rxd->pkt_len);
  736. }
  737. static struct rxd_ops rxd_sta_ops = {
  738. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  739. .rxd_init = mwl8k_rxd_sta_init,
  740. .rxd_refill = mwl8k_rxd_sta_refill,
  741. .rxd_process = mwl8k_rxd_sta_process,
  742. };
  743. #define MWL8K_RX_DESCS 256
  744. #define MWL8K_RX_MAXSZ 3800
  745. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  746. {
  747. struct mwl8k_priv *priv = hw->priv;
  748. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  749. int size;
  750. int i;
  751. rxq->rxd_count = 0;
  752. rxq->head = 0;
  753. rxq->tail = 0;
  754. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  755. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  756. if (rxq->rxd == NULL) {
  757. printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
  758. wiphy_name(hw->wiphy));
  759. return -ENOMEM;
  760. }
  761. memset(rxq->rxd, 0, size);
  762. rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
  763. if (rxq->buf == NULL) {
  764. printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
  765. wiphy_name(hw->wiphy));
  766. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  767. return -ENOMEM;
  768. }
  769. memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
  770. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  771. int desc_size;
  772. void *rxd;
  773. int nexti;
  774. dma_addr_t next_dma_addr;
  775. desc_size = priv->rxd_ops->rxd_size;
  776. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  777. nexti = i + 1;
  778. if (nexti == MWL8K_RX_DESCS)
  779. nexti = 0;
  780. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  781. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  782. }
  783. return 0;
  784. }
  785. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  786. {
  787. struct mwl8k_priv *priv = hw->priv;
  788. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  789. int refilled;
  790. refilled = 0;
  791. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  792. struct sk_buff *skb;
  793. dma_addr_t addr;
  794. int rx;
  795. void *rxd;
  796. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  797. if (skb == NULL)
  798. break;
  799. addr = pci_map_single(priv->pdev, skb->data,
  800. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  801. rxq->rxd_count++;
  802. rx = rxq->tail++;
  803. if (rxq->tail == MWL8K_RX_DESCS)
  804. rxq->tail = 0;
  805. rxq->buf[rx].skb = skb;
  806. pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
  807. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  808. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  809. refilled++;
  810. }
  811. return refilled;
  812. }
  813. /* Must be called only when the card's reception is completely halted */
  814. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  815. {
  816. struct mwl8k_priv *priv = hw->priv;
  817. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  818. int i;
  819. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  820. if (rxq->buf[i].skb != NULL) {
  821. pci_unmap_single(priv->pdev,
  822. pci_unmap_addr(&rxq->buf[i], dma),
  823. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  824. pci_unmap_addr_set(&rxq->buf[i], dma, 0);
  825. kfree_skb(rxq->buf[i].skb);
  826. rxq->buf[i].skb = NULL;
  827. }
  828. }
  829. kfree(rxq->buf);
  830. rxq->buf = NULL;
  831. pci_free_consistent(priv->pdev,
  832. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  833. rxq->rxd, rxq->rxd_dma);
  834. rxq->rxd = NULL;
  835. }
  836. /*
  837. * Scan a list of BSSIDs to process for finalize join.
  838. * Allows for extension to process multiple BSSIDs.
  839. */
  840. static inline int
  841. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  842. {
  843. return priv->capture_beacon &&
  844. ieee80211_is_beacon(wh->frame_control) &&
  845. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  846. }
  847. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  848. struct sk_buff *skb)
  849. {
  850. struct mwl8k_priv *priv = hw->priv;
  851. priv->capture_beacon = false;
  852. memset(priv->capture_bssid, 0, ETH_ALEN);
  853. /*
  854. * Use GFP_ATOMIC as rxq_process is called from
  855. * the primary interrupt handler, memory allocation call
  856. * must not sleep.
  857. */
  858. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  859. if (priv->beacon_skb != NULL)
  860. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  861. }
  862. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  863. {
  864. struct mwl8k_priv *priv = hw->priv;
  865. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  866. int processed;
  867. processed = 0;
  868. while (rxq->rxd_count && limit--) {
  869. struct sk_buff *skb;
  870. void *rxd;
  871. int pkt_len;
  872. struct ieee80211_rx_status status;
  873. __le16 qos;
  874. skb = rxq->buf[rxq->head].skb;
  875. if (skb == NULL)
  876. break;
  877. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  878. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
  879. if (pkt_len < 0)
  880. break;
  881. rxq->buf[rxq->head].skb = NULL;
  882. pci_unmap_single(priv->pdev,
  883. pci_unmap_addr(&rxq->buf[rxq->head], dma),
  884. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  885. pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  886. rxq->head++;
  887. if (rxq->head == MWL8K_RX_DESCS)
  888. rxq->head = 0;
  889. rxq->rxd_count--;
  890. skb_put(skb, pkt_len);
  891. mwl8k_remove_dma_header(skb, qos);
  892. /*
  893. * Check for a pending join operation. Save a
  894. * copy of the beacon and schedule a tasklet to
  895. * send a FINALIZE_JOIN command to the firmware.
  896. */
  897. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  898. mwl8k_save_beacon(hw, skb);
  899. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  900. ieee80211_rx_irqsafe(hw, skb);
  901. processed++;
  902. }
  903. return processed;
  904. }
  905. /*
  906. * Packet transmission.
  907. */
  908. #define MWL8K_TXD_STATUS_OK 0x00000001
  909. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  910. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  911. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  912. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  913. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  914. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  915. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  916. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  917. #define MWL8K_QOS_EOSP 0x0010
  918. struct mwl8k_tx_desc {
  919. __le32 status;
  920. __u8 data_rate;
  921. __u8 tx_priority;
  922. __le16 qos_control;
  923. __le32 pkt_phys_addr;
  924. __le16 pkt_len;
  925. __u8 dest_MAC_addr[ETH_ALEN];
  926. __le32 next_txd_phys_addr;
  927. __le32 reserved;
  928. __le16 rate_info;
  929. __u8 peer_id;
  930. __u8 tx_frag_cnt;
  931. } __attribute__((packed));
  932. #define MWL8K_TX_DESCS 128
  933. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  934. {
  935. struct mwl8k_priv *priv = hw->priv;
  936. struct mwl8k_tx_queue *txq = priv->txq + index;
  937. int size;
  938. int i;
  939. memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
  940. txq->stats.limit = MWL8K_TX_DESCS;
  941. txq->head = 0;
  942. txq->tail = 0;
  943. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  944. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  945. if (txq->txd == NULL) {
  946. printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
  947. wiphy_name(hw->wiphy));
  948. return -ENOMEM;
  949. }
  950. memset(txq->txd, 0, size);
  951. txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
  952. if (txq->skb == NULL) {
  953. printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
  954. wiphy_name(hw->wiphy));
  955. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  956. return -ENOMEM;
  957. }
  958. memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
  959. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  960. struct mwl8k_tx_desc *tx_desc;
  961. int nexti;
  962. tx_desc = txq->txd + i;
  963. nexti = (i + 1) % MWL8K_TX_DESCS;
  964. tx_desc->status = 0;
  965. tx_desc->next_txd_phys_addr =
  966. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  967. }
  968. return 0;
  969. }
  970. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  971. {
  972. iowrite32(MWL8K_H2A_INT_PPA_READY,
  973. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  974. iowrite32(MWL8K_H2A_INT_DUMMY,
  975. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  976. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  977. }
  978. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  979. {
  980. struct mwl8k_priv *priv = hw->priv;
  981. int i;
  982. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  983. struct mwl8k_tx_queue *txq = priv->txq + i;
  984. int fw_owned = 0;
  985. int drv_owned = 0;
  986. int unused = 0;
  987. int desc;
  988. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  989. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  990. u32 status;
  991. status = le32_to_cpu(tx_desc->status);
  992. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  993. fw_owned++;
  994. else
  995. drv_owned++;
  996. if (tx_desc->pkt_len == 0)
  997. unused++;
  998. }
  999. printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
  1000. "fw_owned=%d drv_owned=%d unused=%d\n",
  1001. wiphy_name(hw->wiphy), i,
  1002. txq->stats.len, txq->head, txq->tail,
  1003. fw_owned, drv_owned, unused);
  1004. }
  1005. }
  1006. /*
  1007. * Must be called with priv->fw_mutex held and tx queues stopped.
  1008. */
  1009. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1010. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1011. {
  1012. struct mwl8k_priv *priv = hw->priv;
  1013. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1014. int retry;
  1015. int rc;
  1016. might_sleep();
  1017. /*
  1018. * The TX queues are stopped at this point, so this test
  1019. * doesn't need to take ->tx_lock.
  1020. */
  1021. if (!priv->pending_tx_pkts)
  1022. return 0;
  1023. retry = 0;
  1024. rc = 0;
  1025. spin_lock_bh(&priv->tx_lock);
  1026. priv->tx_wait = &tx_wait;
  1027. while (!rc) {
  1028. int oldcount;
  1029. unsigned long timeout;
  1030. oldcount = priv->pending_tx_pkts;
  1031. spin_unlock_bh(&priv->tx_lock);
  1032. timeout = wait_for_completion_timeout(&tx_wait,
  1033. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1034. spin_lock_bh(&priv->tx_lock);
  1035. if (timeout) {
  1036. WARN_ON(priv->pending_tx_pkts);
  1037. if (retry) {
  1038. printk(KERN_NOTICE "%s: tx rings drained\n",
  1039. wiphy_name(hw->wiphy));
  1040. }
  1041. break;
  1042. }
  1043. if (priv->pending_tx_pkts < oldcount) {
  1044. printk(KERN_NOTICE "%s: waiting for tx rings "
  1045. "to drain (%d -> %d pkts)\n",
  1046. wiphy_name(hw->wiphy), oldcount,
  1047. priv->pending_tx_pkts);
  1048. retry = 1;
  1049. continue;
  1050. }
  1051. priv->tx_wait = NULL;
  1052. printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
  1053. wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
  1054. mwl8k_dump_tx_rings(hw);
  1055. rc = -ETIMEDOUT;
  1056. }
  1057. spin_unlock_bh(&priv->tx_lock);
  1058. return rc;
  1059. }
  1060. #define MWL8K_TXD_SUCCESS(status) \
  1061. ((status) & (MWL8K_TXD_STATUS_OK | \
  1062. MWL8K_TXD_STATUS_OK_RETRY | \
  1063. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1064. static int
  1065. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1066. {
  1067. struct mwl8k_priv *priv = hw->priv;
  1068. struct mwl8k_tx_queue *txq = priv->txq + index;
  1069. int processed;
  1070. processed = 0;
  1071. while (txq->stats.len > 0 && limit--) {
  1072. int tx;
  1073. struct mwl8k_tx_desc *tx_desc;
  1074. unsigned long addr;
  1075. int size;
  1076. struct sk_buff *skb;
  1077. struct ieee80211_tx_info *info;
  1078. u32 status;
  1079. tx = txq->head;
  1080. tx_desc = txq->txd + tx;
  1081. status = le32_to_cpu(tx_desc->status);
  1082. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1083. if (!force)
  1084. break;
  1085. tx_desc->status &=
  1086. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1087. }
  1088. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1089. BUG_ON(txq->stats.len == 0);
  1090. txq->stats.len--;
  1091. priv->pending_tx_pkts--;
  1092. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1093. size = le16_to_cpu(tx_desc->pkt_len);
  1094. skb = txq->skb[tx];
  1095. txq->skb[tx] = NULL;
  1096. BUG_ON(skb == NULL);
  1097. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1098. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1099. /* Mark descriptor as unused */
  1100. tx_desc->pkt_phys_addr = 0;
  1101. tx_desc->pkt_len = 0;
  1102. info = IEEE80211_SKB_CB(skb);
  1103. ieee80211_tx_info_clear_status(info);
  1104. if (MWL8K_TXD_SUCCESS(status))
  1105. info->flags |= IEEE80211_TX_STAT_ACK;
  1106. ieee80211_tx_status_irqsafe(hw, skb);
  1107. processed++;
  1108. }
  1109. if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
  1110. ieee80211_wake_queue(hw, index);
  1111. return processed;
  1112. }
  1113. /* must be called only when the card's transmit is completely halted */
  1114. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1115. {
  1116. struct mwl8k_priv *priv = hw->priv;
  1117. struct mwl8k_tx_queue *txq = priv->txq + index;
  1118. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1119. kfree(txq->skb);
  1120. txq->skb = NULL;
  1121. pci_free_consistent(priv->pdev,
  1122. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1123. txq->txd, txq->txd_dma);
  1124. txq->txd = NULL;
  1125. }
  1126. static int
  1127. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1128. {
  1129. struct mwl8k_priv *priv = hw->priv;
  1130. struct ieee80211_tx_info *tx_info;
  1131. struct mwl8k_vif *mwl8k_vif;
  1132. struct ieee80211_hdr *wh;
  1133. struct mwl8k_tx_queue *txq;
  1134. struct mwl8k_tx_desc *tx;
  1135. dma_addr_t dma;
  1136. u32 txstatus;
  1137. u8 txdatarate;
  1138. u16 qos;
  1139. wh = (struct ieee80211_hdr *)skb->data;
  1140. if (ieee80211_is_data_qos(wh->frame_control))
  1141. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1142. else
  1143. qos = 0;
  1144. mwl8k_add_dma_header(skb);
  1145. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1146. tx_info = IEEE80211_SKB_CB(skb);
  1147. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1148. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1149. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1150. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1151. mwl8k_vif->seqno += 0x10;
  1152. }
  1153. /* Setup firmware control bit fields for each frame type. */
  1154. txstatus = 0;
  1155. txdatarate = 0;
  1156. if (ieee80211_is_mgmt(wh->frame_control) ||
  1157. ieee80211_is_ctl(wh->frame_control)) {
  1158. txdatarate = 0;
  1159. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1160. } else if (ieee80211_is_data(wh->frame_control)) {
  1161. txdatarate = 1;
  1162. if (is_multicast_ether_addr(wh->addr1))
  1163. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1164. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1165. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1166. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1167. else
  1168. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1169. }
  1170. dma = pci_map_single(priv->pdev, skb->data,
  1171. skb->len, PCI_DMA_TODEVICE);
  1172. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1173. printk(KERN_DEBUG "%s: failed to dma map skb, "
  1174. "dropping TX frame.\n", wiphy_name(hw->wiphy));
  1175. dev_kfree_skb(skb);
  1176. return NETDEV_TX_OK;
  1177. }
  1178. spin_lock_bh(&priv->tx_lock);
  1179. txq = priv->txq + index;
  1180. BUG_ON(txq->skb[txq->tail] != NULL);
  1181. txq->skb[txq->tail] = skb;
  1182. tx = txq->txd + txq->tail;
  1183. tx->data_rate = txdatarate;
  1184. tx->tx_priority = index;
  1185. tx->qos_control = cpu_to_le16(qos);
  1186. tx->pkt_phys_addr = cpu_to_le32(dma);
  1187. tx->pkt_len = cpu_to_le16(skb->len);
  1188. tx->rate_info = 0;
  1189. if (!priv->ap_fw && tx_info->control.sta != NULL)
  1190. tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
  1191. else
  1192. tx->peer_id = 0;
  1193. wmb();
  1194. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1195. txq->stats.count++;
  1196. txq->stats.len++;
  1197. priv->pending_tx_pkts++;
  1198. txq->tail++;
  1199. if (txq->tail == MWL8K_TX_DESCS)
  1200. txq->tail = 0;
  1201. if (txq->head == txq->tail)
  1202. ieee80211_stop_queue(hw, index);
  1203. mwl8k_tx_start(priv);
  1204. spin_unlock_bh(&priv->tx_lock);
  1205. return NETDEV_TX_OK;
  1206. }
  1207. /*
  1208. * Firmware access.
  1209. *
  1210. * We have the following requirements for issuing firmware commands:
  1211. * - Some commands require that the packet transmit path is idle when
  1212. * the command is issued. (For simplicity, we'll just quiesce the
  1213. * transmit path for every command.)
  1214. * - There are certain sequences of commands that need to be issued to
  1215. * the hardware sequentially, with no other intervening commands.
  1216. *
  1217. * This leads to an implementation of a "firmware lock" as a mutex that
  1218. * can be taken recursively, and which is taken by both the low-level
  1219. * command submission function (mwl8k_post_cmd) as well as any users of
  1220. * that function that require issuing of an atomic sequence of commands,
  1221. * and quiesces the transmit path whenever it's taken.
  1222. */
  1223. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1224. {
  1225. struct mwl8k_priv *priv = hw->priv;
  1226. if (priv->fw_mutex_owner != current) {
  1227. int rc;
  1228. mutex_lock(&priv->fw_mutex);
  1229. ieee80211_stop_queues(hw);
  1230. rc = mwl8k_tx_wait_empty(hw);
  1231. if (rc) {
  1232. ieee80211_wake_queues(hw);
  1233. mutex_unlock(&priv->fw_mutex);
  1234. return rc;
  1235. }
  1236. priv->fw_mutex_owner = current;
  1237. }
  1238. priv->fw_mutex_depth++;
  1239. return 0;
  1240. }
  1241. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1242. {
  1243. struct mwl8k_priv *priv = hw->priv;
  1244. if (!--priv->fw_mutex_depth) {
  1245. ieee80211_wake_queues(hw);
  1246. priv->fw_mutex_owner = NULL;
  1247. mutex_unlock(&priv->fw_mutex);
  1248. }
  1249. }
  1250. /*
  1251. * Command processing.
  1252. */
  1253. /* Timeout firmware commands after 10s */
  1254. #define MWL8K_CMD_TIMEOUT_MS 10000
  1255. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1256. {
  1257. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1258. struct mwl8k_priv *priv = hw->priv;
  1259. void __iomem *regs = priv->regs;
  1260. dma_addr_t dma_addr;
  1261. unsigned int dma_size;
  1262. int rc;
  1263. unsigned long timeout = 0;
  1264. u8 buf[32];
  1265. cmd->result = 0xffff;
  1266. dma_size = le16_to_cpu(cmd->length);
  1267. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1268. PCI_DMA_BIDIRECTIONAL);
  1269. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1270. return -ENOMEM;
  1271. rc = mwl8k_fw_lock(hw);
  1272. if (rc) {
  1273. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1274. PCI_DMA_BIDIRECTIONAL);
  1275. return rc;
  1276. }
  1277. priv->hostcmd_wait = &cmd_wait;
  1278. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1279. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1280. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1281. iowrite32(MWL8K_H2A_INT_DUMMY,
  1282. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1283. timeout = wait_for_completion_timeout(&cmd_wait,
  1284. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1285. priv->hostcmd_wait = NULL;
  1286. mwl8k_fw_unlock(hw);
  1287. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1288. PCI_DMA_BIDIRECTIONAL);
  1289. if (!timeout) {
  1290. printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
  1291. wiphy_name(hw->wiphy),
  1292. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1293. MWL8K_CMD_TIMEOUT_MS);
  1294. rc = -ETIMEDOUT;
  1295. } else {
  1296. int ms;
  1297. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1298. rc = cmd->result ? -EINVAL : 0;
  1299. if (rc)
  1300. printk(KERN_ERR "%s: Command %s error 0x%x\n",
  1301. wiphy_name(hw->wiphy),
  1302. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1303. le16_to_cpu(cmd->result));
  1304. else if (ms > 2000)
  1305. printk(KERN_NOTICE "%s: Command %s took %d ms\n",
  1306. wiphy_name(hw->wiphy),
  1307. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1308. ms);
  1309. }
  1310. return rc;
  1311. }
  1312. static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
  1313. struct ieee80211_vif *vif,
  1314. struct mwl8k_cmd_pkt *cmd)
  1315. {
  1316. if (vif != NULL)
  1317. cmd->macid = MWL8K_VIF(vif)->macid;
  1318. return mwl8k_post_cmd(hw, cmd);
  1319. }
  1320. /*
  1321. * Setup code shared between STA and AP firmware images.
  1322. */
  1323. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1324. {
  1325. struct mwl8k_priv *priv = hw->priv;
  1326. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1327. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1328. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1329. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1330. priv->band_24.band = IEEE80211_BAND_2GHZ;
  1331. priv->band_24.channels = priv->channels_24;
  1332. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1333. priv->band_24.bitrates = priv->rates_24;
  1334. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1335. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
  1336. }
  1337. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1338. {
  1339. struct mwl8k_priv *priv = hw->priv;
  1340. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1341. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1342. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1343. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1344. priv->band_50.band = IEEE80211_BAND_5GHZ;
  1345. priv->band_50.channels = priv->channels_50;
  1346. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1347. priv->band_50.bitrates = priv->rates_50;
  1348. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1349. hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
  1350. }
  1351. /*
  1352. * CMD_GET_HW_SPEC (STA version).
  1353. */
  1354. struct mwl8k_cmd_get_hw_spec_sta {
  1355. struct mwl8k_cmd_pkt header;
  1356. __u8 hw_rev;
  1357. __u8 host_interface;
  1358. __le16 num_mcaddrs;
  1359. __u8 perm_addr[ETH_ALEN];
  1360. __le16 region_code;
  1361. __le32 fw_rev;
  1362. __le32 ps_cookie;
  1363. __le32 caps;
  1364. __u8 mcs_bitmap[16];
  1365. __le32 rx_queue_ptr;
  1366. __le32 num_tx_queues;
  1367. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1368. __le32 caps2;
  1369. __le32 num_tx_desc_per_queue;
  1370. __le32 total_rxd;
  1371. } __attribute__((packed));
  1372. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1373. #define MWL8K_CAP_GREENFIELD 0x08000000
  1374. #define MWL8K_CAP_AMPDU 0x04000000
  1375. #define MWL8K_CAP_RX_STBC 0x01000000
  1376. #define MWL8K_CAP_TX_STBC 0x00800000
  1377. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1378. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1379. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1380. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1381. #define MWL8K_CAP_DELAY_BA 0x00003000
  1382. #define MWL8K_CAP_MIMO 0x00000200
  1383. #define MWL8K_CAP_40MHZ 0x00000100
  1384. #define MWL8K_CAP_BAND_MASK 0x00000007
  1385. #define MWL8K_CAP_5GHZ 0x00000004
  1386. #define MWL8K_CAP_2GHZ4 0x00000001
  1387. static void
  1388. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1389. struct ieee80211_supported_band *band, u32 cap)
  1390. {
  1391. int rx_streams;
  1392. int tx_streams;
  1393. band->ht_cap.ht_supported = 1;
  1394. if (cap & MWL8K_CAP_MAX_AMSDU)
  1395. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1396. if (cap & MWL8K_CAP_GREENFIELD)
  1397. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1398. if (cap & MWL8K_CAP_AMPDU) {
  1399. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1400. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1401. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  1402. }
  1403. if (cap & MWL8K_CAP_RX_STBC)
  1404. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1405. if (cap & MWL8K_CAP_TX_STBC)
  1406. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1407. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1408. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1409. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1410. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1411. if (cap & MWL8K_CAP_DELAY_BA)
  1412. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1413. if (cap & MWL8K_CAP_40MHZ)
  1414. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1415. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1416. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1417. band->ht_cap.mcs.rx_mask[0] = 0xff;
  1418. if (rx_streams >= 2)
  1419. band->ht_cap.mcs.rx_mask[1] = 0xff;
  1420. if (rx_streams >= 3)
  1421. band->ht_cap.mcs.rx_mask[2] = 0xff;
  1422. band->ht_cap.mcs.rx_mask[4] = 0x01;
  1423. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  1424. if (rx_streams != tx_streams) {
  1425. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  1426. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  1427. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1428. }
  1429. }
  1430. static void
  1431. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  1432. {
  1433. struct mwl8k_priv *priv = hw->priv;
  1434. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  1435. mwl8k_setup_2ghz_band(hw);
  1436. if (caps & MWL8K_CAP_MIMO)
  1437. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  1438. }
  1439. if (caps & MWL8K_CAP_5GHZ) {
  1440. mwl8k_setup_5ghz_band(hw);
  1441. if (caps & MWL8K_CAP_MIMO)
  1442. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  1443. }
  1444. }
  1445. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  1446. {
  1447. struct mwl8k_priv *priv = hw->priv;
  1448. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  1449. int rc;
  1450. int i;
  1451. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1452. if (cmd == NULL)
  1453. return -ENOMEM;
  1454. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1455. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1456. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1457. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1458. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1459. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1460. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1461. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1462. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1463. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1464. rc = mwl8k_post_cmd(hw, &cmd->header);
  1465. if (!rc) {
  1466. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1467. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1468. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1469. priv->hw_rev = cmd->hw_rev;
  1470. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  1471. }
  1472. kfree(cmd);
  1473. return rc;
  1474. }
  1475. /*
  1476. * CMD_GET_HW_SPEC (AP version).
  1477. */
  1478. struct mwl8k_cmd_get_hw_spec_ap {
  1479. struct mwl8k_cmd_pkt header;
  1480. __u8 hw_rev;
  1481. __u8 host_interface;
  1482. __le16 num_wcb;
  1483. __le16 num_mcaddrs;
  1484. __u8 perm_addr[ETH_ALEN];
  1485. __le16 region_code;
  1486. __le16 num_antenna;
  1487. __le32 fw_rev;
  1488. __le32 wcbbase0;
  1489. __le32 rxwrptr;
  1490. __le32 rxrdptr;
  1491. __le32 ps_cookie;
  1492. __le32 wcbbase1;
  1493. __le32 wcbbase2;
  1494. __le32 wcbbase3;
  1495. } __attribute__((packed));
  1496. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  1497. {
  1498. struct mwl8k_priv *priv = hw->priv;
  1499. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  1500. int rc;
  1501. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1502. if (cmd == NULL)
  1503. return -ENOMEM;
  1504. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1505. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1506. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1507. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1508. rc = mwl8k_post_cmd(hw, &cmd->header);
  1509. if (!rc) {
  1510. int off;
  1511. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1512. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1513. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1514. priv->hw_rev = cmd->hw_rev;
  1515. mwl8k_setup_2ghz_band(hw);
  1516. off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  1517. iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
  1518. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  1519. iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
  1520. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  1521. iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
  1522. off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  1523. iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
  1524. off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  1525. iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
  1526. off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  1527. iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
  1528. }
  1529. kfree(cmd);
  1530. return rc;
  1531. }
  1532. /*
  1533. * CMD_SET_HW_SPEC.
  1534. */
  1535. struct mwl8k_cmd_set_hw_spec {
  1536. struct mwl8k_cmd_pkt header;
  1537. __u8 hw_rev;
  1538. __u8 host_interface;
  1539. __le16 num_mcaddrs;
  1540. __u8 perm_addr[ETH_ALEN];
  1541. __le16 region_code;
  1542. __le32 fw_rev;
  1543. __le32 ps_cookie;
  1544. __le32 caps;
  1545. __le32 rx_queue_ptr;
  1546. __le32 num_tx_queues;
  1547. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1548. __le32 flags;
  1549. __le32 num_tx_desc_per_queue;
  1550. __le32 total_rxd;
  1551. } __attribute__((packed));
  1552. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  1553. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  1554. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  1555. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  1556. {
  1557. struct mwl8k_priv *priv = hw->priv;
  1558. struct mwl8k_cmd_set_hw_spec *cmd;
  1559. int rc;
  1560. int i;
  1561. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1562. if (cmd == NULL)
  1563. return -ENOMEM;
  1564. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  1565. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1566. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1567. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1568. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1569. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1570. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1571. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  1572. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  1573. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
  1574. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1575. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1576. rc = mwl8k_post_cmd(hw, &cmd->header);
  1577. kfree(cmd);
  1578. return rc;
  1579. }
  1580. /*
  1581. * CMD_MAC_MULTICAST_ADR.
  1582. */
  1583. struct mwl8k_cmd_mac_multicast_adr {
  1584. struct mwl8k_cmd_pkt header;
  1585. __le16 action;
  1586. __le16 numaddr;
  1587. __u8 addr[0][ETH_ALEN];
  1588. };
  1589. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  1590. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  1591. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  1592. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  1593. static struct mwl8k_cmd_pkt *
  1594. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  1595. int mc_count, struct dev_addr_list *mclist)
  1596. {
  1597. struct mwl8k_priv *priv = hw->priv;
  1598. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1599. int size;
  1600. if (allmulti || mc_count > priv->num_mcaddrs) {
  1601. allmulti = 1;
  1602. mc_count = 0;
  1603. }
  1604. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  1605. cmd = kzalloc(size, GFP_ATOMIC);
  1606. if (cmd == NULL)
  1607. return NULL;
  1608. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1609. cmd->header.length = cpu_to_le16(size);
  1610. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  1611. MWL8K_ENABLE_RX_BROADCAST);
  1612. if (allmulti) {
  1613. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  1614. } else if (mc_count) {
  1615. int i;
  1616. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1617. cmd->numaddr = cpu_to_le16(mc_count);
  1618. for (i = 0; i < mc_count && mclist; i++) {
  1619. if (mclist->da_addrlen != ETH_ALEN) {
  1620. kfree(cmd);
  1621. return NULL;
  1622. }
  1623. memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
  1624. mclist = mclist->next;
  1625. }
  1626. }
  1627. return &cmd->header;
  1628. }
  1629. /*
  1630. * CMD_GET_STAT.
  1631. */
  1632. struct mwl8k_cmd_get_stat {
  1633. struct mwl8k_cmd_pkt header;
  1634. __le32 stats[64];
  1635. } __attribute__((packed));
  1636. #define MWL8K_STAT_ACK_FAILURE 9
  1637. #define MWL8K_STAT_RTS_FAILURE 12
  1638. #define MWL8K_STAT_FCS_ERROR 24
  1639. #define MWL8K_STAT_RTS_SUCCESS 11
  1640. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  1641. struct ieee80211_low_level_stats *stats)
  1642. {
  1643. struct mwl8k_cmd_get_stat *cmd;
  1644. int rc;
  1645. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1646. if (cmd == NULL)
  1647. return -ENOMEM;
  1648. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1649. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1650. rc = mwl8k_post_cmd(hw, &cmd->header);
  1651. if (!rc) {
  1652. stats->dot11ACKFailureCount =
  1653. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1654. stats->dot11RTSFailureCount =
  1655. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1656. stats->dot11FCSErrorCount =
  1657. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1658. stats->dot11RTSSuccessCount =
  1659. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1660. }
  1661. kfree(cmd);
  1662. return rc;
  1663. }
  1664. /*
  1665. * CMD_RADIO_CONTROL.
  1666. */
  1667. struct mwl8k_cmd_radio_control {
  1668. struct mwl8k_cmd_pkt header;
  1669. __le16 action;
  1670. __le16 control;
  1671. __le16 radio_on;
  1672. } __attribute__((packed));
  1673. static int
  1674. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  1675. {
  1676. struct mwl8k_priv *priv = hw->priv;
  1677. struct mwl8k_cmd_radio_control *cmd;
  1678. int rc;
  1679. if (enable == priv->radio_on && !force)
  1680. return 0;
  1681. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1682. if (cmd == NULL)
  1683. return -ENOMEM;
  1684. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1685. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1686. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1687. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  1688. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1689. rc = mwl8k_post_cmd(hw, &cmd->header);
  1690. kfree(cmd);
  1691. if (!rc)
  1692. priv->radio_on = enable;
  1693. return rc;
  1694. }
  1695. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  1696. {
  1697. return mwl8k_cmd_radio_control(hw, 0, 0);
  1698. }
  1699. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  1700. {
  1701. return mwl8k_cmd_radio_control(hw, 1, 0);
  1702. }
  1703. static int
  1704. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1705. {
  1706. struct mwl8k_priv *priv = hw->priv;
  1707. priv->radio_short_preamble = short_preamble;
  1708. return mwl8k_cmd_radio_control(hw, 1, 1);
  1709. }
  1710. /*
  1711. * CMD_RF_TX_POWER.
  1712. */
  1713. #define MWL8K_TX_POWER_LEVEL_TOTAL 8
  1714. struct mwl8k_cmd_rf_tx_power {
  1715. struct mwl8k_cmd_pkt header;
  1716. __le16 action;
  1717. __le16 support_level;
  1718. __le16 current_level;
  1719. __le16 reserved;
  1720. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1721. } __attribute__((packed));
  1722. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1723. {
  1724. struct mwl8k_cmd_rf_tx_power *cmd;
  1725. int rc;
  1726. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1727. if (cmd == NULL)
  1728. return -ENOMEM;
  1729. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1730. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1731. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1732. cmd->support_level = cpu_to_le16(dBm);
  1733. rc = mwl8k_post_cmd(hw, &cmd->header);
  1734. kfree(cmd);
  1735. return rc;
  1736. }
  1737. /*
  1738. * CMD_RF_ANTENNA.
  1739. */
  1740. struct mwl8k_cmd_rf_antenna {
  1741. struct mwl8k_cmd_pkt header;
  1742. __le16 antenna;
  1743. __le16 mode;
  1744. } __attribute__((packed));
  1745. #define MWL8K_RF_ANTENNA_RX 1
  1746. #define MWL8K_RF_ANTENNA_TX 2
  1747. static int
  1748. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  1749. {
  1750. struct mwl8k_cmd_rf_antenna *cmd;
  1751. int rc;
  1752. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1753. if (cmd == NULL)
  1754. return -ENOMEM;
  1755. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  1756. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1757. cmd->antenna = cpu_to_le16(antenna);
  1758. cmd->mode = cpu_to_le16(mask);
  1759. rc = mwl8k_post_cmd(hw, &cmd->header);
  1760. kfree(cmd);
  1761. return rc;
  1762. }
  1763. /*
  1764. * CMD_SET_BEACON.
  1765. */
  1766. struct mwl8k_cmd_set_beacon {
  1767. struct mwl8k_cmd_pkt header;
  1768. __le16 beacon_len;
  1769. __u8 beacon[0];
  1770. };
  1771. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
  1772. struct ieee80211_vif *vif, u8 *beacon, int len)
  1773. {
  1774. struct mwl8k_cmd_set_beacon *cmd;
  1775. int rc;
  1776. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  1777. if (cmd == NULL)
  1778. return -ENOMEM;
  1779. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  1780. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  1781. cmd->beacon_len = cpu_to_le16(len);
  1782. memcpy(cmd->beacon, beacon, len);
  1783. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  1784. kfree(cmd);
  1785. return rc;
  1786. }
  1787. /*
  1788. * CMD_SET_PRE_SCAN.
  1789. */
  1790. struct mwl8k_cmd_set_pre_scan {
  1791. struct mwl8k_cmd_pkt header;
  1792. } __attribute__((packed));
  1793. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1794. {
  1795. struct mwl8k_cmd_set_pre_scan *cmd;
  1796. int rc;
  1797. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1798. if (cmd == NULL)
  1799. return -ENOMEM;
  1800. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1801. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1802. rc = mwl8k_post_cmd(hw, &cmd->header);
  1803. kfree(cmd);
  1804. return rc;
  1805. }
  1806. /*
  1807. * CMD_SET_POST_SCAN.
  1808. */
  1809. struct mwl8k_cmd_set_post_scan {
  1810. struct mwl8k_cmd_pkt header;
  1811. __le32 isibss;
  1812. __u8 bssid[ETH_ALEN];
  1813. } __attribute__((packed));
  1814. static int
  1815. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  1816. {
  1817. struct mwl8k_cmd_set_post_scan *cmd;
  1818. int rc;
  1819. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1820. if (cmd == NULL)
  1821. return -ENOMEM;
  1822. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1823. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1824. cmd->isibss = 0;
  1825. memcpy(cmd->bssid, mac, ETH_ALEN);
  1826. rc = mwl8k_post_cmd(hw, &cmd->header);
  1827. kfree(cmd);
  1828. return rc;
  1829. }
  1830. /*
  1831. * CMD_SET_RF_CHANNEL.
  1832. */
  1833. struct mwl8k_cmd_set_rf_channel {
  1834. struct mwl8k_cmd_pkt header;
  1835. __le16 action;
  1836. __u8 current_channel;
  1837. __le32 channel_flags;
  1838. } __attribute__((packed));
  1839. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1840. struct ieee80211_conf *conf)
  1841. {
  1842. struct ieee80211_channel *channel = conf->channel;
  1843. struct mwl8k_cmd_set_rf_channel *cmd;
  1844. int rc;
  1845. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1846. if (cmd == NULL)
  1847. return -ENOMEM;
  1848. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1849. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1850. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1851. cmd->current_channel = channel->hw_value;
  1852. if (channel->band == IEEE80211_BAND_2GHZ)
  1853. cmd->channel_flags |= cpu_to_le32(0x00000001);
  1854. else if (channel->band == IEEE80211_BAND_5GHZ)
  1855. cmd->channel_flags |= cpu_to_le32(0x00000004);
  1856. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  1857. conf->channel_type == NL80211_CHAN_HT20)
  1858. cmd->channel_flags |= cpu_to_le32(0x00000080);
  1859. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  1860. cmd->channel_flags |= cpu_to_le32(0x000001900);
  1861. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  1862. cmd->channel_flags |= cpu_to_le32(0x000000900);
  1863. rc = mwl8k_post_cmd(hw, &cmd->header);
  1864. kfree(cmd);
  1865. return rc;
  1866. }
  1867. /*
  1868. * CMD_SET_AID.
  1869. */
  1870. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1871. #define MWL8K_FRAME_PROT_11G 0x07
  1872. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1873. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1874. struct mwl8k_cmd_update_set_aid {
  1875. struct mwl8k_cmd_pkt header;
  1876. __le16 aid;
  1877. /* AP's MAC address (BSSID) */
  1878. __u8 bssid[ETH_ALEN];
  1879. __le16 protection_mode;
  1880. __u8 supp_rates[14];
  1881. } __attribute__((packed));
  1882. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  1883. {
  1884. int i;
  1885. int j;
  1886. /*
  1887. * Clear nonstandard rates 4 and 13.
  1888. */
  1889. mask &= 0x1fef;
  1890. for (i = 0, j = 0; i < 14; i++) {
  1891. if (mask & (1 << i))
  1892. rates[j++] = mwl8k_rates_24[i].hw_value;
  1893. }
  1894. }
  1895. static int
  1896. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  1897. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  1898. {
  1899. struct mwl8k_cmd_update_set_aid *cmd;
  1900. u16 prot_mode;
  1901. int rc;
  1902. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1903. if (cmd == NULL)
  1904. return -ENOMEM;
  1905. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  1906. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1907. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  1908. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  1909. if (vif->bss_conf.use_cts_prot) {
  1910. prot_mode = MWL8K_FRAME_PROT_11G;
  1911. } else {
  1912. switch (vif->bss_conf.ht_operation_mode &
  1913. IEEE80211_HT_OP_MODE_PROTECTION) {
  1914. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  1915. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  1916. break;
  1917. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  1918. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  1919. break;
  1920. default:
  1921. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1922. break;
  1923. }
  1924. }
  1925. cmd->protection_mode = cpu_to_le16(prot_mode);
  1926. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  1927. rc = mwl8k_post_cmd(hw, &cmd->header);
  1928. kfree(cmd);
  1929. return rc;
  1930. }
  1931. /*
  1932. * CMD_SET_RATE.
  1933. */
  1934. struct mwl8k_cmd_set_rate {
  1935. struct mwl8k_cmd_pkt header;
  1936. __u8 legacy_rates[14];
  1937. /* Bitmap for supported MCS codes. */
  1938. __u8 mcs_set[16];
  1939. __u8 reserved[16];
  1940. } __attribute__((packed));
  1941. static int
  1942. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1943. u32 legacy_rate_mask, u8 *mcs_rates)
  1944. {
  1945. struct mwl8k_cmd_set_rate *cmd;
  1946. int rc;
  1947. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1948. if (cmd == NULL)
  1949. return -ENOMEM;
  1950. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  1951. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1952. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  1953. memcpy(cmd->mcs_set, mcs_rates, 16);
  1954. rc = mwl8k_post_cmd(hw, &cmd->header);
  1955. kfree(cmd);
  1956. return rc;
  1957. }
  1958. /*
  1959. * CMD_FINALIZE_JOIN.
  1960. */
  1961. #define MWL8K_FJ_BEACON_MAXLEN 128
  1962. struct mwl8k_cmd_finalize_join {
  1963. struct mwl8k_cmd_pkt header;
  1964. __le32 sleep_interval; /* Number of beacon periods to sleep */
  1965. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  1966. } __attribute__((packed));
  1967. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  1968. int framelen, int dtim)
  1969. {
  1970. struct mwl8k_cmd_finalize_join *cmd;
  1971. struct ieee80211_mgmt *payload = frame;
  1972. int payload_len;
  1973. int rc;
  1974. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1975. if (cmd == NULL)
  1976. return -ENOMEM;
  1977. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  1978. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1979. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  1980. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  1981. if (payload_len < 0)
  1982. payload_len = 0;
  1983. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  1984. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  1985. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  1986. rc = mwl8k_post_cmd(hw, &cmd->header);
  1987. kfree(cmd);
  1988. return rc;
  1989. }
  1990. /*
  1991. * CMD_SET_RTS_THRESHOLD.
  1992. */
  1993. struct mwl8k_cmd_set_rts_threshold {
  1994. struct mwl8k_cmd_pkt header;
  1995. __le16 action;
  1996. __le16 threshold;
  1997. } __attribute__((packed));
  1998. static int
  1999. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  2000. {
  2001. struct mwl8k_cmd_set_rts_threshold *cmd;
  2002. int rc;
  2003. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2004. if (cmd == NULL)
  2005. return -ENOMEM;
  2006. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  2007. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2008. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2009. cmd->threshold = cpu_to_le16(rts_thresh);
  2010. rc = mwl8k_post_cmd(hw, &cmd->header);
  2011. kfree(cmd);
  2012. return rc;
  2013. }
  2014. /*
  2015. * CMD_SET_SLOT.
  2016. */
  2017. struct mwl8k_cmd_set_slot {
  2018. struct mwl8k_cmd_pkt header;
  2019. __le16 action;
  2020. __u8 short_slot;
  2021. } __attribute__((packed));
  2022. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2023. {
  2024. struct mwl8k_cmd_set_slot *cmd;
  2025. int rc;
  2026. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2027. if (cmd == NULL)
  2028. return -ENOMEM;
  2029. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2030. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2031. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2032. cmd->short_slot = short_slot_time;
  2033. rc = mwl8k_post_cmd(hw, &cmd->header);
  2034. kfree(cmd);
  2035. return rc;
  2036. }
  2037. /*
  2038. * CMD_SET_EDCA_PARAMS.
  2039. */
  2040. struct mwl8k_cmd_set_edca_params {
  2041. struct mwl8k_cmd_pkt header;
  2042. /* See MWL8K_SET_EDCA_XXX below */
  2043. __le16 action;
  2044. /* TX opportunity in units of 32 us */
  2045. __le16 txop;
  2046. union {
  2047. struct {
  2048. /* Log exponent of max contention period: 0...15 */
  2049. __le32 log_cw_max;
  2050. /* Log exponent of min contention period: 0...15 */
  2051. __le32 log_cw_min;
  2052. /* Adaptive interframe spacing in units of 32us */
  2053. __u8 aifs;
  2054. /* TX queue to configure */
  2055. __u8 txq;
  2056. } ap;
  2057. struct {
  2058. /* Log exponent of max contention period: 0...15 */
  2059. __u8 log_cw_max;
  2060. /* Log exponent of min contention period: 0...15 */
  2061. __u8 log_cw_min;
  2062. /* Adaptive interframe spacing in units of 32us */
  2063. __u8 aifs;
  2064. /* TX queue to configure */
  2065. __u8 txq;
  2066. } sta;
  2067. };
  2068. } __attribute__((packed));
  2069. #define MWL8K_SET_EDCA_CW 0x01
  2070. #define MWL8K_SET_EDCA_TXOP 0x02
  2071. #define MWL8K_SET_EDCA_AIFS 0x04
  2072. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2073. MWL8K_SET_EDCA_TXOP | \
  2074. MWL8K_SET_EDCA_AIFS)
  2075. static int
  2076. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2077. __u16 cw_min, __u16 cw_max,
  2078. __u8 aifs, __u16 txop)
  2079. {
  2080. struct mwl8k_priv *priv = hw->priv;
  2081. struct mwl8k_cmd_set_edca_params *cmd;
  2082. int rc;
  2083. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2084. if (cmd == NULL)
  2085. return -ENOMEM;
  2086. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2087. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2088. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2089. cmd->txop = cpu_to_le16(txop);
  2090. if (priv->ap_fw) {
  2091. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2092. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2093. cmd->ap.aifs = aifs;
  2094. cmd->ap.txq = qnum;
  2095. } else {
  2096. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2097. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2098. cmd->sta.aifs = aifs;
  2099. cmd->sta.txq = qnum;
  2100. }
  2101. rc = mwl8k_post_cmd(hw, &cmd->header);
  2102. kfree(cmd);
  2103. return rc;
  2104. }
  2105. /*
  2106. * CMD_SET_WMM_MODE.
  2107. */
  2108. struct mwl8k_cmd_set_wmm_mode {
  2109. struct mwl8k_cmd_pkt header;
  2110. __le16 action;
  2111. } __attribute__((packed));
  2112. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2113. {
  2114. struct mwl8k_priv *priv = hw->priv;
  2115. struct mwl8k_cmd_set_wmm_mode *cmd;
  2116. int rc;
  2117. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2118. if (cmd == NULL)
  2119. return -ENOMEM;
  2120. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2121. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2122. cmd->action = cpu_to_le16(!!enable);
  2123. rc = mwl8k_post_cmd(hw, &cmd->header);
  2124. kfree(cmd);
  2125. if (!rc)
  2126. priv->wmm_enabled = enable;
  2127. return rc;
  2128. }
  2129. /*
  2130. * CMD_MIMO_CONFIG.
  2131. */
  2132. struct mwl8k_cmd_mimo_config {
  2133. struct mwl8k_cmd_pkt header;
  2134. __le32 action;
  2135. __u8 rx_antenna_map;
  2136. __u8 tx_antenna_map;
  2137. } __attribute__((packed));
  2138. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2139. {
  2140. struct mwl8k_cmd_mimo_config *cmd;
  2141. int rc;
  2142. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2143. if (cmd == NULL)
  2144. return -ENOMEM;
  2145. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2146. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2147. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2148. cmd->rx_antenna_map = rx;
  2149. cmd->tx_antenna_map = tx;
  2150. rc = mwl8k_post_cmd(hw, &cmd->header);
  2151. kfree(cmd);
  2152. return rc;
  2153. }
  2154. /*
  2155. * CMD_USE_FIXED_RATE (STA version).
  2156. */
  2157. struct mwl8k_cmd_use_fixed_rate_sta {
  2158. struct mwl8k_cmd_pkt header;
  2159. __le32 action;
  2160. __le32 allow_rate_drop;
  2161. __le32 num_rates;
  2162. struct {
  2163. __le32 is_ht_rate;
  2164. __le32 enable_retry;
  2165. __le32 rate;
  2166. __le32 retry_count;
  2167. } rate_entry[8];
  2168. __le32 rate_type;
  2169. __le32 reserved1;
  2170. __le32 reserved2;
  2171. } __attribute__((packed));
  2172. #define MWL8K_USE_AUTO_RATE 0x0002
  2173. #define MWL8K_UCAST_RATE 0
  2174. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2175. {
  2176. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2177. int rc;
  2178. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2179. if (cmd == NULL)
  2180. return -ENOMEM;
  2181. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2182. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2183. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2184. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2185. rc = mwl8k_post_cmd(hw, &cmd->header);
  2186. kfree(cmd);
  2187. return rc;
  2188. }
  2189. /*
  2190. * CMD_USE_FIXED_RATE (AP version).
  2191. */
  2192. struct mwl8k_cmd_use_fixed_rate_ap {
  2193. struct mwl8k_cmd_pkt header;
  2194. __le32 action;
  2195. __le32 allow_rate_drop;
  2196. __le32 num_rates;
  2197. struct mwl8k_rate_entry_ap {
  2198. __le32 is_ht_rate;
  2199. __le32 enable_retry;
  2200. __le32 rate;
  2201. __le32 retry_count;
  2202. } rate_entry[4];
  2203. u8 multicast_rate;
  2204. u8 multicast_rate_type;
  2205. u8 management_rate;
  2206. } __attribute__((packed));
  2207. static int
  2208. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2209. {
  2210. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2211. int rc;
  2212. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2213. if (cmd == NULL)
  2214. return -ENOMEM;
  2215. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2216. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2217. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2218. cmd->multicast_rate = mcast;
  2219. cmd->management_rate = mgmt;
  2220. rc = mwl8k_post_cmd(hw, &cmd->header);
  2221. kfree(cmd);
  2222. return rc;
  2223. }
  2224. /*
  2225. * CMD_ENABLE_SNIFFER.
  2226. */
  2227. struct mwl8k_cmd_enable_sniffer {
  2228. struct mwl8k_cmd_pkt header;
  2229. __le32 action;
  2230. } __attribute__((packed));
  2231. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2232. {
  2233. struct mwl8k_cmd_enable_sniffer *cmd;
  2234. int rc;
  2235. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2236. if (cmd == NULL)
  2237. return -ENOMEM;
  2238. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2239. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2240. cmd->action = cpu_to_le32(!!enable);
  2241. rc = mwl8k_post_cmd(hw, &cmd->header);
  2242. kfree(cmd);
  2243. return rc;
  2244. }
  2245. /*
  2246. * CMD_SET_MAC_ADDR.
  2247. */
  2248. struct mwl8k_cmd_set_mac_addr {
  2249. struct mwl8k_cmd_pkt header;
  2250. union {
  2251. struct {
  2252. __le16 mac_type;
  2253. __u8 mac_addr[ETH_ALEN];
  2254. } mbss;
  2255. __u8 mac_addr[ETH_ALEN];
  2256. };
  2257. } __attribute__((packed));
  2258. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2259. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2260. static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
  2261. struct ieee80211_vif *vif, u8 *mac)
  2262. {
  2263. struct mwl8k_priv *priv = hw->priv;
  2264. struct mwl8k_cmd_set_mac_addr *cmd;
  2265. int rc;
  2266. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2267. if (cmd == NULL)
  2268. return -ENOMEM;
  2269. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2270. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2271. if (priv->ap_fw) {
  2272. cmd->mbss.mac_type = cpu_to_le16(MWL8K_MAC_TYPE_PRIMARY_AP);
  2273. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2274. } else {
  2275. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2276. }
  2277. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2278. kfree(cmd);
  2279. return rc;
  2280. }
  2281. /*
  2282. * CMD_SET_RATEADAPT_MODE.
  2283. */
  2284. struct mwl8k_cmd_set_rate_adapt_mode {
  2285. struct mwl8k_cmd_pkt header;
  2286. __le16 action;
  2287. __le16 mode;
  2288. } __attribute__((packed));
  2289. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2290. {
  2291. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2292. int rc;
  2293. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2294. if (cmd == NULL)
  2295. return -ENOMEM;
  2296. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  2297. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2298. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2299. cmd->mode = cpu_to_le16(mode);
  2300. rc = mwl8k_post_cmd(hw, &cmd->header);
  2301. kfree(cmd);
  2302. return rc;
  2303. }
  2304. /*
  2305. * CMD_BSS_START.
  2306. */
  2307. struct mwl8k_cmd_bss_start {
  2308. struct mwl8k_cmd_pkt header;
  2309. __le32 enable;
  2310. } __attribute__((packed));
  2311. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
  2312. struct ieee80211_vif *vif, int enable)
  2313. {
  2314. struct mwl8k_cmd_bss_start *cmd;
  2315. int rc;
  2316. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2317. if (cmd == NULL)
  2318. return -ENOMEM;
  2319. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  2320. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2321. cmd->enable = cpu_to_le32(enable);
  2322. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2323. kfree(cmd);
  2324. return rc;
  2325. }
  2326. /*
  2327. * CMD_SET_NEW_STN.
  2328. */
  2329. struct mwl8k_cmd_set_new_stn {
  2330. struct mwl8k_cmd_pkt header;
  2331. __le16 aid;
  2332. __u8 mac_addr[6];
  2333. __le16 stn_id;
  2334. __le16 action;
  2335. __le16 rsvd;
  2336. __le32 legacy_rates;
  2337. __u8 ht_rates[4];
  2338. __le16 cap_info;
  2339. __le16 ht_capabilities_info;
  2340. __u8 mac_ht_param_info;
  2341. __u8 rev;
  2342. __u8 control_channel;
  2343. __u8 add_channel;
  2344. __le16 op_mode;
  2345. __le16 stbc;
  2346. __u8 add_qos_info;
  2347. __u8 is_qos_sta;
  2348. __le32 fw_sta_ptr;
  2349. } __attribute__((packed));
  2350. #define MWL8K_STA_ACTION_ADD 0
  2351. #define MWL8K_STA_ACTION_REMOVE 2
  2352. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  2353. struct ieee80211_vif *vif,
  2354. struct ieee80211_sta *sta)
  2355. {
  2356. struct mwl8k_cmd_set_new_stn *cmd;
  2357. u32 rates;
  2358. int rc;
  2359. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2360. if (cmd == NULL)
  2361. return -ENOMEM;
  2362. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2363. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2364. cmd->aid = cpu_to_le16(sta->aid);
  2365. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  2366. cmd->stn_id = cpu_to_le16(sta->aid);
  2367. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  2368. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2369. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2370. else
  2371. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2372. cmd->legacy_rates = cpu_to_le32(rates);
  2373. if (sta->ht_cap.ht_supported) {
  2374. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  2375. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  2376. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  2377. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  2378. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  2379. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  2380. ((sta->ht_cap.ampdu_density & 7) << 2);
  2381. cmd->is_qos_sta = 1;
  2382. }
  2383. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2384. kfree(cmd);
  2385. return rc;
  2386. }
  2387. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  2388. struct ieee80211_vif *vif)
  2389. {
  2390. struct mwl8k_cmd_set_new_stn *cmd;
  2391. int rc;
  2392. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2393. if (cmd == NULL)
  2394. return -ENOMEM;
  2395. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2396. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2397. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  2398. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2399. kfree(cmd);
  2400. return rc;
  2401. }
  2402. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  2403. struct ieee80211_vif *vif, u8 *addr)
  2404. {
  2405. struct mwl8k_cmd_set_new_stn *cmd;
  2406. int rc;
  2407. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2408. if (cmd == NULL)
  2409. return -ENOMEM;
  2410. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2411. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2412. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  2413. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  2414. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2415. kfree(cmd);
  2416. return rc;
  2417. }
  2418. /*
  2419. * CMD_UPDATE_STADB.
  2420. */
  2421. struct ewc_ht_info {
  2422. __le16 control1;
  2423. __le16 control2;
  2424. __le16 control3;
  2425. } __attribute__((packed));
  2426. struct peer_capability_info {
  2427. /* Peer type - AP vs. STA. */
  2428. __u8 peer_type;
  2429. /* Basic 802.11 capabilities from assoc resp. */
  2430. __le16 basic_caps;
  2431. /* Set if peer supports 802.11n high throughput (HT). */
  2432. __u8 ht_support;
  2433. /* Valid if HT is supported. */
  2434. __le16 ht_caps;
  2435. __u8 extended_ht_caps;
  2436. struct ewc_ht_info ewc_info;
  2437. /* Legacy rate table. Intersection of our rates and peer rates. */
  2438. __u8 legacy_rates[12];
  2439. /* HT rate table. Intersection of our rates and peer rates. */
  2440. __u8 ht_rates[16];
  2441. __u8 pad[16];
  2442. /* If set, interoperability mode, no proprietary extensions. */
  2443. __u8 interop;
  2444. __u8 pad2;
  2445. __u8 station_id;
  2446. __le16 amsdu_enabled;
  2447. } __attribute__((packed));
  2448. struct mwl8k_cmd_update_stadb {
  2449. struct mwl8k_cmd_pkt header;
  2450. /* See STADB_ACTION_TYPE */
  2451. __le32 action;
  2452. /* Peer MAC address */
  2453. __u8 peer_addr[ETH_ALEN];
  2454. __le32 reserved;
  2455. /* Peer info - valid during add/update. */
  2456. struct peer_capability_info peer_info;
  2457. } __attribute__((packed));
  2458. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  2459. #define MWL8K_STA_DB_DEL_ENTRY 2
  2460. /* Peer Entry flags - used to define the type of the peer node */
  2461. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  2462. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  2463. struct ieee80211_vif *vif,
  2464. struct ieee80211_sta *sta)
  2465. {
  2466. struct mwl8k_cmd_update_stadb *cmd;
  2467. struct peer_capability_info *p;
  2468. u32 rates;
  2469. int rc;
  2470. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2471. if (cmd == NULL)
  2472. return -ENOMEM;
  2473. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2474. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2475. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  2476. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  2477. p = &cmd->peer_info;
  2478. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  2479. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  2480. p->ht_support = sta->ht_cap.ht_supported;
  2481. p->ht_caps = sta->ht_cap.cap;
  2482. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  2483. ((sta->ht_cap.ampdu_density & 7) << 2);
  2484. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2485. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2486. else
  2487. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2488. legacy_rate_mask_to_array(p->legacy_rates, rates);
  2489. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  2490. p->interop = 1;
  2491. p->amsdu_enabled = 0;
  2492. rc = mwl8k_post_cmd(hw, &cmd->header);
  2493. kfree(cmd);
  2494. return rc ? rc : p->station_id;
  2495. }
  2496. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  2497. struct ieee80211_vif *vif, u8 *addr)
  2498. {
  2499. struct mwl8k_cmd_update_stadb *cmd;
  2500. int rc;
  2501. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2502. if (cmd == NULL)
  2503. return -ENOMEM;
  2504. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2505. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2506. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  2507. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  2508. rc = mwl8k_post_cmd(hw, &cmd->header);
  2509. kfree(cmd);
  2510. return rc;
  2511. }
  2512. /*
  2513. * Interrupt handling.
  2514. */
  2515. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  2516. {
  2517. struct ieee80211_hw *hw = dev_id;
  2518. struct mwl8k_priv *priv = hw->priv;
  2519. u32 status;
  2520. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2521. if (!status)
  2522. return IRQ_NONE;
  2523. if (status & MWL8K_A2H_INT_TX_DONE) {
  2524. status &= ~MWL8K_A2H_INT_TX_DONE;
  2525. tasklet_schedule(&priv->poll_tx_task);
  2526. }
  2527. if (status & MWL8K_A2H_INT_RX_READY) {
  2528. status &= ~MWL8K_A2H_INT_RX_READY;
  2529. tasklet_schedule(&priv->poll_rx_task);
  2530. }
  2531. if (status)
  2532. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2533. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2534. if (priv->hostcmd_wait != NULL)
  2535. complete(priv->hostcmd_wait);
  2536. }
  2537. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2538. if (!mutex_is_locked(&priv->fw_mutex) &&
  2539. priv->radio_on && priv->pending_tx_pkts)
  2540. mwl8k_tx_start(priv);
  2541. }
  2542. return IRQ_HANDLED;
  2543. }
  2544. static void mwl8k_tx_poll(unsigned long data)
  2545. {
  2546. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2547. struct mwl8k_priv *priv = hw->priv;
  2548. int limit;
  2549. int i;
  2550. limit = 32;
  2551. spin_lock_bh(&priv->tx_lock);
  2552. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2553. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  2554. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  2555. complete(priv->tx_wait);
  2556. priv->tx_wait = NULL;
  2557. }
  2558. spin_unlock_bh(&priv->tx_lock);
  2559. if (limit) {
  2560. writel(~MWL8K_A2H_INT_TX_DONE,
  2561. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2562. } else {
  2563. tasklet_schedule(&priv->poll_tx_task);
  2564. }
  2565. }
  2566. static void mwl8k_rx_poll(unsigned long data)
  2567. {
  2568. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2569. struct mwl8k_priv *priv = hw->priv;
  2570. int limit;
  2571. limit = 32;
  2572. limit -= rxq_process(hw, 0, limit);
  2573. limit -= rxq_refill(hw, 0, limit);
  2574. if (limit) {
  2575. writel(~MWL8K_A2H_INT_RX_READY,
  2576. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2577. } else {
  2578. tasklet_schedule(&priv->poll_rx_task);
  2579. }
  2580. }
  2581. /*
  2582. * Core driver operations.
  2583. */
  2584. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2585. {
  2586. struct mwl8k_priv *priv = hw->priv;
  2587. int index = skb_get_queue_mapping(skb);
  2588. int rc;
  2589. if (!priv->radio_on) {
  2590. printk(KERN_DEBUG "%s: dropped TX frame since radio "
  2591. "disabled\n", wiphy_name(hw->wiphy));
  2592. dev_kfree_skb(skb);
  2593. return NETDEV_TX_OK;
  2594. }
  2595. rc = mwl8k_txq_xmit(hw, index, skb);
  2596. return rc;
  2597. }
  2598. static int mwl8k_start(struct ieee80211_hw *hw)
  2599. {
  2600. struct mwl8k_priv *priv = hw->priv;
  2601. int rc;
  2602. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  2603. IRQF_SHARED, MWL8K_NAME, hw);
  2604. if (rc) {
  2605. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2606. wiphy_name(hw->wiphy));
  2607. return -EIO;
  2608. }
  2609. /* Enable TX reclaim and RX tasklets. */
  2610. tasklet_enable(&priv->poll_tx_task);
  2611. tasklet_enable(&priv->poll_rx_task);
  2612. /* Enable interrupts */
  2613. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2614. rc = mwl8k_fw_lock(hw);
  2615. if (!rc) {
  2616. rc = mwl8k_cmd_radio_enable(hw);
  2617. if (!priv->ap_fw) {
  2618. if (!rc)
  2619. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  2620. if (!rc)
  2621. rc = mwl8k_cmd_set_pre_scan(hw);
  2622. if (!rc)
  2623. rc = mwl8k_cmd_set_post_scan(hw,
  2624. "\x00\x00\x00\x00\x00\x00");
  2625. }
  2626. if (!rc)
  2627. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  2628. if (!rc)
  2629. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  2630. mwl8k_fw_unlock(hw);
  2631. }
  2632. if (rc) {
  2633. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2634. free_irq(priv->pdev->irq, hw);
  2635. tasklet_disable(&priv->poll_tx_task);
  2636. tasklet_disable(&priv->poll_rx_task);
  2637. }
  2638. return rc;
  2639. }
  2640. static void mwl8k_stop(struct ieee80211_hw *hw)
  2641. {
  2642. struct mwl8k_priv *priv = hw->priv;
  2643. int i;
  2644. mwl8k_cmd_radio_disable(hw);
  2645. ieee80211_stop_queues(hw);
  2646. /* Disable interrupts */
  2647. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2648. free_irq(priv->pdev->irq, hw);
  2649. /* Stop finalize join worker */
  2650. cancel_work_sync(&priv->finalize_join_worker);
  2651. if (priv->beacon_skb != NULL)
  2652. dev_kfree_skb(priv->beacon_skb);
  2653. /* Stop TX reclaim and RX tasklets. */
  2654. tasklet_disable(&priv->poll_tx_task);
  2655. tasklet_disable(&priv->poll_rx_task);
  2656. /* Return all skbs to mac80211 */
  2657. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2658. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  2659. }
  2660. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2661. struct ieee80211_vif *vif)
  2662. {
  2663. struct mwl8k_priv *priv = hw->priv;
  2664. struct mwl8k_vif *mwl8k_vif;
  2665. /*
  2666. * We only support one active interface at a time.
  2667. */
  2668. if (!list_empty(&priv->vif_list))
  2669. return -EBUSY;
  2670. /*
  2671. * Reject interface creation if sniffer mode is active, as
  2672. * STA operation is mutually exclusive with hardware sniffer
  2673. * mode. (Sniffer mode is only used on STA firmware.)
  2674. */
  2675. if (priv->sniffer_enabled) {
  2676. printk(KERN_INFO "%s: unable to create STA "
  2677. "interface due to sniffer mode being enabled\n",
  2678. wiphy_name(hw->wiphy));
  2679. return -EINVAL;
  2680. }
  2681. /* Setup driver private area. */
  2682. mwl8k_vif = MWL8K_VIF(vif);
  2683. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2684. mwl8k_vif->vif = vif;
  2685. mwl8k_vif->macid = 0;
  2686. mwl8k_vif->seqno = 0;
  2687. /* Set the mac address. */
  2688. mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
  2689. if (priv->ap_fw)
  2690. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  2691. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  2692. return 0;
  2693. }
  2694. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2695. struct ieee80211_vif *vif)
  2696. {
  2697. struct mwl8k_priv *priv = hw->priv;
  2698. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2699. if (priv->ap_fw)
  2700. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  2701. mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
  2702. list_del(&mwl8k_vif->list);
  2703. }
  2704. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2705. {
  2706. struct ieee80211_conf *conf = &hw->conf;
  2707. struct mwl8k_priv *priv = hw->priv;
  2708. int rc;
  2709. if (conf->flags & IEEE80211_CONF_IDLE) {
  2710. mwl8k_cmd_radio_disable(hw);
  2711. return 0;
  2712. }
  2713. rc = mwl8k_fw_lock(hw);
  2714. if (rc)
  2715. return rc;
  2716. rc = mwl8k_cmd_radio_enable(hw);
  2717. if (rc)
  2718. goto out;
  2719. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  2720. if (rc)
  2721. goto out;
  2722. if (conf->power_level > 18)
  2723. conf->power_level = 18;
  2724. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  2725. if (rc)
  2726. goto out;
  2727. if (priv->ap_fw) {
  2728. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
  2729. if (!rc)
  2730. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  2731. } else {
  2732. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  2733. }
  2734. out:
  2735. mwl8k_fw_unlock(hw);
  2736. return rc;
  2737. }
  2738. static void
  2739. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2740. struct ieee80211_bss_conf *info, u32 changed)
  2741. {
  2742. struct mwl8k_priv *priv = hw->priv;
  2743. u32 ap_legacy_rates;
  2744. u8 ap_mcs_rates[16];
  2745. int rc;
  2746. if (mwl8k_fw_lock(hw))
  2747. return;
  2748. /*
  2749. * No need to capture a beacon if we're no longer associated.
  2750. */
  2751. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  2752. priv->capture_beacon = false;
  2753. /*
  2754. * Get the AP's legacy and MCS rates.
  2755. */
  2756. if (vif->bss_conf.assoc) {
  2757. struct ieee80211_sta *ap;
  2758. rcu_read_lock();
  2759. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  2760. if (ap == NULL) {
  2761. rcu_read_unlock();
  2762. goto out;
  2763. }
  2764. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
  2765. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  2766. } else {
  2767. ap_legacy_rates =
  2768. ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2769. }
  2770. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  2771. rcu_read_unlock();
  2772. }
  2773. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
  2774. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  2775. if (rc)
  2776. goto out;
  2777. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  2778. if (rc)
  2779. goto out;
  2780. }
  2781. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2782. rc = mwl8k_set_radio_preamble(hw,
  2783. vif->bss_conf.use_short_preamble);
  2784. if (rc)
  2785. goto out;
  2786. }
  2787. if (changed & BSS_CHANGED_ERP_SLOT) {
  2788. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  2789. if (rc)
  2790. goto out;
  2791. }
  2792. if (vif->bss_conf.assoc &&
  2793. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  2794. BSS_CHANGED_HT))) {
  2795. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  2796. if (rc)
  2797. goto out;
  2798. }
  2799. if (vif->bss_conf.assoc &&
  2800. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  2801. /*
  2802. * Finalize the join. Tell rx handler to process
  2803. * next beacon from our BSSID.
  2804. */
  2805. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  2806. priv->capture_beacon = true;
  2807. }
  2808. out:
  2809. mwl8k_fw_unlock(hw);
  2810. }
  2811. static void
  2812. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2813. struct ieee80211_bss_conf *info, u32 changed)
  2814. {
  2815. int rc;
  2816. if (mwl8k_fw_lock(hw))
  2817. return;
  2818. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2819. rc = mwl8k_set_radio_preamble(hw,
  2820. vif->bss_conf.use_short_preamble);
  2821. if (rc)
  2822. goto out;
  2823. }
  2824. if (changed & BSS_CHANGED_BASIC_RATES) {
  2825. int idx;
  2826. int rate;
  2827. /*
  2828. * Use lowest supported basic rate for multicasts
  2829. * and management frames (such as probe responses --
  2830. * beacons will always go out at 1 Mb/s).
  2831. */
  2832. idx = ffs(vif->bss_conf.basic_rates);
  2833. if (idx)
  2834. idx--;
  2835. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2836. rate = mwl8k_rates_24[idx].hw_value;
  2837. else
  2838. rate = mwl8k_rates_50[idx].hw_value;
  2839. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  2840. }
  2841. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  2842. struct sk_buff *skb;
  2843. skb = ieee80211_beacon_get(hw, vif);
  2844. if (skb != NULL) {
  2845. mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
  2846. kfree_skb(skb);
  2847. }
  2848. }
  2849. if (changed & BSS_CHANGED_BEACON_ENABLED)
  2850. mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
  2851. out:
  2852. mwl8k_fw_unlock(hw);
  2853. }
  2854. static void
  2855. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2856. struct ieee80211_bss_conf *info, u32 changed)
  2857. {
  2858. struct mwl8k_priv *priv = hw->priv;
  2859. if (!priv->ap_fw)
  2860. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  2861. else
  2862. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  2863. }
  2864. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  2865. int mc_count, struct dev_addr_list *mclist)
  2866. {
  2867. struct mwl8k_cmd_pkt *cmd;
  2868. /*
  2869. * Synthesize and return a command packet that programs the
  2870. * hardware multicast address filter. At this point we don't
  2871. * know whether FIF_ALLMULTI is being requested, but if it is,
  2872. * we'll end up throwing this packet away and creating a new
  2873. * one in mwl8k_configure_filter().
  2874. */
  2875. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
  2876. return (unsigned long)cmd;
  2877. }
  2878. static int
  2879. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  2880. unsigned int changed_flags,
  2881. unsigned int *total_flags)
  2882. {
  2883. struct mwl8k_priv *priv = hw->priv;
  2884. /*
  2885. * Hardware sniffer mode is mutually exclusive with STA
  2886. * operation, so refuse to enable sniffer mode if a STA
  2887. * interface is active.
  2888. */
  2889. if (!list_empty(&priv->vif_list)) {
  2890. if (net_ratelimit())
  2891. printk(KERN_INFO "%s: not enabling sniffer "
  2892. "mode because STA interface is active\n",
  2893. wiphy_name(hw->wiphy));
  2894. return 0;
  2895. }
  2896. if (!priv->sniffer_enabled) {
  2897. if (mwl8k_cmd_enable_sniffer(hw, 1))
  2898. return 0;
  2899. priv->sniffer_enabled = true;
  2900. }
  2901. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  2902. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  2903. FIF_OTHER_BSS;
  2904. return 1;
  2905. }
  2906. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  2907. {
  2908. if (!list_empty(&priv->vif_list))
  2909. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  2910. return NULL;
  2911. }
  2912. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  2913. unsigned int changed_flags,
  2914. unsigned int *total_flags,
  2915. u64 multicast)
  2916. {
  2917. struct mwl8k_priv *priv = hw->priv;
  2918. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  2919. /*
  2920. * AP firmware doesn't allow fine-grained control over
  2921. * the receive filter.
  2922. */
  2923. if (priv->ap_fw) {
  2924. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  2925. kfree(cmd);
  2926. return;
  2927. }
  2928. /*
  2929. * Enable hardware sniffer mode if FIF_CONTROL or
  2930. * FIF_OTHER_BSS is requested.
  2931. */
  2932. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  2933. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  2934. kfree(cmd);
  2935. return;
  2936. }
  2937. /* Clear unsupported feature flags */
  2938. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  2939. if (mwl8k_fw_lock(hw)) {
  2940. kfree(cmd);
  2941. return;
  2942. }
  2943. if (priv->sniffer_enabled) {
  2944. mwl8k_cmd_enable_sniffer(hw, 0);
  2945. priv->sniffer_enabled = false;
  2946. }
  2947. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  2948. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  2949. /*
  2950. * Disable the BSS filter.
  2951. */
  2952. mwl8k_cmd_set_pre_scan(hw);
  2953. } else {
  2954. struct mwl8k_vif *mwl8k_vif;
  2955. const u8 *bssid;
  2956. /*
  2957. * Enable the BSS filter.
  2958. *
  2959. * If there is an active STA interface, use that
  2960. * interface's BSSID, otherwise use a dummy one
  2961. * (where the OUI part needs to be nonzero for
  2962. * the BSSID to be accepted by POST_SCAN).
  2963. */
  2964. mwl8k_vif = mwl8k_first_vif(priv);
  2965. if (mwl8k_vif != NULL)
  2966. bssid = mwl8k_vif->vif->bss_conf.bssid;
  2967. else
  2968. bssid = "\x01\x00\x00\x00\x00\x00";
  2969. mwl8k_cmd_set_post_scan(hw, bssid);
  2970. }
  2971. }
  2972. /*
  2973. * If FIF_ALLMULTI is being requested, throw away the command
  2974. * packet that ->prepare_multicast() built and replace it with
  2975. * a command packet that enables reception of all multicast
  2976. * packets.
  2977. */
  2978. if (*total_flags & FIF_ALLMULTI) {
  2979. kfree(cmd);
  2980. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
  2981. }
  2982. if (cmd != NULL) {
  2983. mwl8k_post_cmd(hw, cmd);
  2984. kfree(cmd);
  2985. }
  2986. mwl8k_fw_unlock(hw);
  2987. }
  2988. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  2989. {
  2990. return mwl8k_cmd_set_rts_threshold(hw, value);
  2991. }
  2992. struct mwl8k_sta_notify_item
  2993. {
  2994. struct list_head list;
  2995. struct ieee80211_vif *vif;
  2996. enum sta_notify_cmd cmd;
  2997. struct ieee80211_sta sta;
  2998. };
  2999. static void
  3000. mwl8k_do_sta_notify(struct ieee80211_hw *hw, struct mwl8k_sta_notify_item *s)
  3001. {
  3002. struct mwl8k_priv *priv = hw->priv;
  3003. /*
  3004. * STA firmware uses UPDATE_STADB, AP firmware uses SET_NEW_STN.
  3005. */
  3006. if (!priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
  3007. int rc;
  3008. rc = mwl8k_cmd_update_stadb_add(hw, s->vif, &s->sta);
  3009. if (rc >= 0) {
  3010. struct ieee80211_sta *sta;
  3011. rcu_read_lock();
  3012. sta = ieee80211_find_sta(s->vif, s->sta.addr);
  3013. if (sta != NULL)
  3014. MWL8K_STA(sta)->peer_id = rc;
  3015. rcu_read_unlock();
  3016. }
  3017. } else if (!priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
  3018. mwl8k_cmd_update_stadb_del(hw, s->vif, s->sta.addr);
  3019. } else if (priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
  3020. mwl8k_cmd_set_new_stn_add(hw, s->vif, &s->sta);
  3021. } else if (priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
  3022. mwl8k_cmd_set_new_stn_del(hw, s->vif, s->sta.addr);
  3023. }
  3024. }
  3025. static void mwl8k_sta_notify_worker(struct work_struct *work)
  3026. {
  3027. struct mwl8k_priv *priv =
  3028. container_of(work, struct mwl8k_priv, sta_notify_worker);
  3029. struct ieee80211_hw *hw = priv->hw;
  3030. spin_lock_bh(&priv->sta_notify_list_lock);
  3031. while (!list_empty(&priv->sta_notify_list)) {
  3032. struct mwl8k_sta_notify_item *s;
  3033. s = list_entry(priv->sta_notify_list.next,
  3034. struct mwl8k_sta_notify_item, list);
  3035. list_del(&s->list);
  3036. spin_unlock_bh(&priv->sta_notify_list_lock);
  3037. mwl8k_do_sta_notify(hw, s);
  3038. kfree(s);
  3039. spin_lock_bh(&priv->sta_notify_list_lock);
  3040. }
  3041. spin_unlock_bh(&priv->sta_notify_list_lock);
  3042. }
  3043. static void
  3044. mwl8k_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3045. enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
  3046. {
  3047. struct mwl8k_priv *priv = hw->priv;
  3048. struct mwl8k_sta_notify_item *s;
  3049. if (cmd != STA_NOTIFY_ADD && cmd != STA_NOTIFY_REMOVE)
  3050. return;
  3051. s = kmalloc(sizeof(*s), GFP_ATOMIC);
  3052. if (s != NULL) {
  3053. s->vif = vif;
  3054. s->cmd = cmd;
  3055. s->sta = *sta;
  3056. spin_lock(&priv->sta_notify_list_lock);
  3057. list_add_tail(&s->list, &priv->sta_notify_list);
  3058. spin_unlock(&priv->sta_notify_list_lock);
  3059. ieee80211_queue_work(hw, &priv->sta_notify_worker);
  3060. }
  3061. }
  3062. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  3063. const struct ieee80211_tx_queue_params *params)
  3064. {
  3065. struct mwl8k_priv *priv = hw->priv;
  3066. int rc;
  3067. rc = mwl8k_fw_lock(hw);
  3068. if (!rc) {
  3069. if (!priv->wmm_enabled)
  3070. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  3071. if (!rc)
  3072. rc = mwl8k_cmd_set_edca_params(hw, queue,
  3073. params->cw_min,
  3074. params->cw_max,
  3075. params->aifs,
  3076. params->txop);
  3077. mwl8k_fw_unlock(hw);
  3078. }
  3079. return rc;
  3080. }
  3081. static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
  3082. struct ieee80211_tx_queue_stats *stats)
  3083. {
  3084. struct mwl8k_priv *priv = hw->priv;
  3085. struct mwl8k_tx_queue *txq;
  3086. int index;
  3087. spin_lock_bh(&priv->tx_lock);
  3088. for (index = 0; index < MWL8K_TX_QUEUES; index++) {
  3089. txq = priv->txq + index;
  3090. memcpy(&stats[index], &txq->stats,
  3091. sizeof(struct ieee80211_tx_queue_stats));
  3092. }
  3093. spin_unlock_bh(&priv->tx_lock);
  3094. return 0;
  3095. }
  3096. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  3097. struct ieee80211_low_level_stats *stats)
  3098. {
  3099. return mwl8k_cmd_get_stat(hw, stats);
  3100. }
  3101. static int
  3102. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3103. enum ieee80211_ampdu_mlme_action action,
  3104. struct ieee80211_sta *sta, u16 tid, u16 *ssn)
  3105. {
  3106. switch (action) {
  3107. case IEEE80211_AMPDU_RX_START:
  3108. case IEEE80211_AMPDU_RX_STOP:
  3109. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  3110. return -ENOTSUPP;
  3111. return 0;
  3112. default:
  3113. return -ENOTSUPP;
  3114. }
  3115. }
  3116. static const struct ieee80211_ops mwl8k_ops = {
  3117. .tx = mwl8k_tx,
  3118. .start = mwl8k_start,
  3119. .stop = mwl8k_stop,
  3120. .add_interface = mwl8k_add_interface,
  3121. .remove_interface = mwl8k_remove_interface,
  3122. .config = mwl8k_config,
  3123. .bss_info_changed = mwl8k_bss_info_changed,
  3124. .prepare_multicast = mwl8k_prepare_multicast,
  3125. .configure_filter = mwl8k_configure_filter,
  3126. .set_rts_threshold = mwl8k_set_rts_threshold,
  3127. .sta_notify = mwl8k_sta_notify,
  3128. .conf_tx = mwl8k_conf_tx,
  3129. .get_tx_stats = mwl8k_get_tx_stats,
  3130. .get_stats = mwl8k_get_stats,
  3131. .ampdu_action = mwl8k_ampdu_action,
  3132. };
  3133. static void mwl8k_finalize_join_worker(struct work_struct *work)
  3134. {
  3135. struct mwl8k_priv *priv =
  3136. container_of(work, struct mwl8k_priv, finalize_join_worker);
  3137. struct sk_buff *skb = priv->beacon_skb;
  3138. struct mwl8k_vif *mwl8k_vif;
  3139. mwl8k_vif = mwl8k_first_vif(priv);
  3140. if (mwl8k_vif != NULL)
  3141. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len,
  3142. mwl8k_vif->vif->bss_conf.dtim_period);
  3143. dev_kfree_skb(skb);
  3144. priv->beacon_skb = NULL;
  3145. }
  3146. enum {
  3147. MWL8363 = 0,
  3148. MWL8687,
  3149. MWL8366,
  3150. };
  3151. static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
  3152. [MWL8363] = {
  3153. .part_name = "88w8363",
  3154. .helper_image = "mwl8k/helper_8363.fw",
  3155. .fw_image = "mwl8k/fmimage_8363.fw",
  3156. },
  3157. [MWL8687] = {
  3158. .part_name = "88w8687",
  3159. .helper_image = "mwl8k/helper_8687.fw",
  3160. .fw_image = "mwl8k/fmimage_8687.fw",
  3161. },
  3162. [MWL8366] = {
  3163. .part_name = "88w8366",
  3164. .helper_image = "mwl8k/helper_8366.fw",
  3165. .fw_image = "mwl8k/fmimage_8366.fw",
  3166. .ap_rxd_ops = &rxd_8366_ap_ops,
  3167. },
  3168. };
  3169. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  3170. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  3171. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  3172. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  3173. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  3174. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  3175. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  3176. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  3177. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  3178. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  3179. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  3180. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  3181. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  3182. { },
  3183. };
  3184. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  3185. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  3186. const struct pci_device_id *id)
  3187. {
  3188. static int printed_version = 0;
  3189. struct ieee80211_hw *hw;
  3190. struct mwl8k_priv *priv;
  3191. int rc;
  3192. int i;
  3193. if (!printed_version) {
  3194. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  3195. printed_version = 1;
  3196. }
  3197. rc = pci_enable_device(pdev);
  3198. if (rc) {
  3199. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  3200. MWL8K_NAME);
  3201. return rc;
  3202. }
  3203. rc = pci_request_regions(pdev, MWL8K_NAME);
  3204. if (rc) {
  3205. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  3206. MWL8K_NAME);
  3207. goto err_disable_device;
  3208. }
  3209. pci_set_master(pdev);
  3210. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  3211. if (hw == NULL) {
  3212. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  3213. rc = -ENOMEM;
  3214. goto err_free_reg;
  3215. }
  3216. SET_IEEE80211_DEV(hw, &pdev->dev);
  3217. pci_set_drvdata(pdev, hw);
  3218. priv = hw->priv;
  3219. priv->hw = hw;
  3220. priv->pdev = pdev;
  3221. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  3222. priv->sram = pci_iomap(pdev, 0, 0x10000);
  3223. if (priv->sram == NULL) {
  3224. printk(KERN_ERR "%s: Cannot map device SRAM\n",
  3225. wiphy_name(hw->wiphy));
  3226. goto err_iounmap;
  3227. }
  3228. /*
  3229. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  3230. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  3231. */
  3232. priv->regs = pci_iomap(pdev, 1, 0x10000);
  3233. if (priv->regs == NULL) {
  3234. priv->regs = pci_iomap(pdev, 2, 0x10000);
  3235. if (priv->regs == NULL) {
  3236. printk(KERN_ERR "%s: Cannot map device registers\n",
  3237. wiphy_name(hw->wiphy));
  3238. goto err_iounmap;
  3239. }
  3240. }
  3241. /* Reset firmware and hardware */
  3242. mwl8k_hw_reset(priv);
  3243. /* Ask userland hotplug daemon for the device firmware */
  3244. rc = mwl8k_request_firmware(priv);
  3245. if (rc) {
  3246. printk(KERN_ERR "%s: Firmware files not found\n",
  3247. wiphy_name(hw->wiphy));
  3248. goto err_stop_firmware;
  3249. }
  3250. /* Load firmware into hardware */
  3251. rc = mwl8k_load_firmware(hw);
  3252. if (rc) {
  3253. printk(KERN_ERR "%s: Cannot start firmware\n",
  3254. wiphy_name(hw->wiphy));
  3255. goto err_stop_firmware;
  3256. }
  3257. /* Reclaim memory once firmware is successfully loaded */
  3258. mwl8k_release_firmware(priv);
  3259. if (priv->ap_fw) {
  3260. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  3261. if (priv->rxd_ops == NULL) {
  3262. printk(KERN_ERR "%s: Driver does not have AP "
  3263. "firmware image support for this hardware\n",
  3264. wiphy_name(hw->wiphy));
  3265. goto err_stop_firmware;
  3266. }
  3267. } else {
  3268. priv->rxd_ops = &rxd_sta_ops;
  3269. }
  3270. priv->sniffer_enabled = false;
  3271. priv->wmm_enabled = false;
  3272. priv->pending_tx_pkts = 0;
  3273. /*
  3274. * Extra headroom is the size of the required DMA header
  3275. * minus the size of the smallest 802.11 frame (CTS frame).
  3276. */
  3277. hw->extra_tx_headroom =
  3278. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  3279. hw->channel_change_time = 10;
  3280. hw->queues = MWL8K_TX_QUEUES;
  3281. /* Set rssi and noise values to dBm */
  3282. hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
  3283. hw->vif_data_size = sizeof(struct mwl8k_vif);
  3284. hw->sta_data_size = sizeof(struct mwl8k_sta);
  3285. INIT_LIST_HEAD(&priv->vif_list);
  3286. /* Set default radio state and preamble */
  3287. priv->radio_on = 0;
  3288. priv->radio_short_preamble = 0;
  3289. /* Station database handling */
  3290. INIT_WORK(&priv->sta_notify_worker, mwl8k_sta_notify_worker);
  3291. spin_lock_init(&priv->sta_notify_list_lock);
  3292. INIT_LIST_HEAD(&priv->sta_notify_list);
  3293. /* Finalize join worker */
  3294. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  3295. /* TX reclaim and RX tasklets. */
  3296. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  3297. tasklet_disable(&priv->poll_tx_task);
  3298. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  3299. tasklet_disable(&priv->poll_rx_task);
  3300. /* Power management cookie */
  3301. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  3302. if (priv->cookie == NULL)
  3303. goto err_stop_firmware;
  3304. rc = mwl8k_rxq_init(hw, 0);
  3305. if (rc)
  3306. goto err_free_cookie;
  3307. rxq_refill(hw, 0, INT_MAX);
  3308. mutex_init(&priv->fw_mutex);
  3309. priv->fw_mutex_owner = NULL;
  3310. priv->fw_mutex_depth = 0;
  3311. priv->hostcmd_wait = NULL;
  3312. spin_lock_init(&priv->tx_lock);
  3313. priv->tx_wait = NULL;
  3314. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  3315. rc = mwl8k_txq_init(hw, i);
  3316. if (rc)
  3317. goto err_free_queues;
  3318. }
  3319. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3320. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3321. iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
  3322. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  3323. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3324. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3325. IRQF_SHARED, MWL8K_NAME, hw);
  3326. if (rc) {
  3327. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  3328. wiphy_name(hw->wiphy));
  3329. goto err_free_queues;
  3330. }
  3331. /*
  3332. * Temporarily enable interrupts. Initial firmware host
  3333. * commands use interrupts and avoid polling. Disable
  3334. * interrupts when done.
  3335. */
  3336. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3337. /* Get config data, mac addrs etc */
  3338. if (priv->ap_fw) {
  3339. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  3340. if (!rc)
  3341. rc = mwl8k_cmd_set_hw_spec(hw);
  3342. hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_AP);
  3343. } else {
  3344. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  3345. hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
  3346. }
  3347. if (rc) {
  3348. printk(KERN_ERR "%s: Cannot initialise firmware\n",
  3349. wiphy_name(hw->wiphy));
  3350. goto err_free_irq;
  3351. }
  3352. /* Turn radio off */
  3353. rc = mwl8k_cmd_radio_disable(hw);
  3354. if (rc) {
  3355. printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
  3356. goto err_free_irq;
  3357. }
  3358. /* Clear MAC address */
  3359. rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
  3360. if (rc) {
  3361. printk(KERN_ERR "%s: Cannot clear MAC address\n",
  3362. wiphy_name(hw->wiphy));
  3363. goto err_free_irq;
  3364. }
  3365. /* Disable interrupts */
  3366. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3367. free_irq(priv->pdev->irq, hw);
  3368. rc = ieee80211_register_hw(hw);
  3369. if (rc) {
  3370. printk(KERN_ERR "%s: Cannot register device\n",
  3371. wiphy_name(hw->wiphy));
  3372. goto err_free_queues;
  3373. }
  3374. printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
  3375. wiphy_name(hw->wiphy), priv->device_info->part_name,
  3376. priv->hw_rev, hw->wiphy->perm_addr,
  3377. priv->ap_fw ? "AP" : "STA",
  3378. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  3379. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  3380. return 0;
  3381. err_free_irq:
  3382. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3383. free_irq(priv->pdev->irq, hw);
  3384. err_free_queues:
  3385. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3386. mwl8k_txq_deinit(hw, i);
  3387. mwl8k_rxq_deinit(hw, 0);
  3388. err_free_cookie:
  3389. if (priv->cookie != NULL)
  3390. pci_free_consistent(priv->pdev, 4,
  3391. priv->cookie, priv->cookie_dma);
  3392. err_stop_firmware:
  3393. mwl8k_hw_reset(priv);
  3394. mwl8k_release_firmware(priv);
  3395. err_iounmap:
  3396. if (priv->regs != NULL)
  3397. pci_iounmap(pdev, priv->regs);
  3398. if (priv->sram != NULL)
  3399. pci_iounmap(pdev, priv->sram);
  3400. pci_set_drvdata(pdev, NULL);
  3401. ieee80211_free_hw(hw);
  3402. err_free_reg:
  3403. pci_release_regions(pdev);
  3404. err_disable_device:
  3405. pci_disable_device(pdev);
  3406. return rc;
  3407. }
  3408. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  3409. {
  3410. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  3411. }
  3412. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  3413. {
  3414. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  3415. struct mwl8k_priv *priv;
  3416. int i;
  3417. if (hw == NULL)
  3418. return;
  3419. priv = hw->priv;
  3420. ieee80211_stop_queues(hw);
  3421. ieee80211_unregister_hw(hw);
  3422. /* Remove TX reclaim and RX tasklets. */
  3423. tasklet_kill(&priv->poll_tx_task);
  3424. tasklet_kill(&priv->poll_rx_task);
  3425. /* Stop hardware */
  3426. mwl8k_hw_reset(priv);
  3427. /* Return all skbs to mac80211 */
  3428. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3429. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3430. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3431. mwl8k_txq_deinit(hw, i);
  3432. mwl8k_rxq_deinit(hw, 0);
  3433. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  3434. pci_iounmap(pdev, priv->regs);
  3435. pci_iounmap(pdev, priv->sram);
  3436. pci_set_drvdata(pdev, NULL);
  3437. ieee80211_free_hw(hw);
  3438. pci_release_regions(pdev);
  3439. pci_disable_device(pdev);
  3440. }
  3441. static struct pci_driver mwl8k_driver = {
  3442. .name = MWL8K_NAME,
  3443. .id_table = mwl8k_pci_id_table,
  3444. .probe = mwl8k_probe,
  3445. .remove = __devexit_p(mwl8k_remove),
  3446. .shutdown = __devexit_p(mwl8k_shutdown),
  3447. };
  3448. static int __init mwl8k_init(void)
  3449. {
  3450. return pci_register_driver(&mwl8k_driver);
  3451. }
  3452. static void __exit mwl8k_exit(void)
  3453. {
  3454. pci_unregister_driver(&mwl8k_driver);
  3455. }
  3456. module_init(mwl8k_init);
  3457. module_exit(mwl8k_exit);
  3458. MODULE_DESCRIPTION(MWL8K_DESC);
  3459. MODULE_VERSION(MWL8K_VERSION);
  3460. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  3461. MODULE_LICENSE("GPL");