virtuoso.c 17 KB

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  1. /*
  2. * C-Media CMI8788 driver for Asus Xonar cards
  3. *
  4. * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5. *
  6. *
  7. * This driver is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License, version 2.
  9. *
  10. * This driver is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this driver; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. /*
  20. * Xonar D2/D2X
  21. * ------------
  22. *
  23. * CMI8788:
  24. *
  25. * SPI 0 -> 1st PCM1796 (front)
  26. * SPI 1 -> 2nd PCM1796 (surround)
  27. * SPI 2 -> 3rd PCM1796 (center/LFE)
  28. * SPI 4 -> 4th PCM1796 (back)
  29. *
  30. * GPIO 2 -> M0 of CS5381
  31. * GPIO 3 -> M1 of CS5381
  32. * GPIO 5 <- external power present (D2X only)
  33. * GPIO 7 -> ALT
  34. * GPIO 8 -> enable output to speakers
  35. */
  36. /*
  37. * Xonar DX
  38. * --------
  39. *
  40. * CMI8788:
  41. *
  42. * I²C <-> CS4398 (front)
  43. * <-> CS4362A (surround, center/LFE, back)
  44. *
  45. * GPI 0 <- external power present
  46. *
  47. * GPIO 0 -> enable output to speakers
  48. * GPIO 1 -> ALT?
  49. * GPIO 2 -> M0 of CS5361
  50. * GPIO 3 -> M1 of CS5361
  51. * GPIO 8 -> line-in/mic-in/digital-out switch?
  52. *
  53. * CS4398:
  54. *
  55. * AD0 <- 1
  56. * AD1 <- 1
  57. *
  58. * CS4362A:
  59. *
  60. * AD0 <- 0
  61. */
  62. #include <linux/pci.h>
  63. #include <linux/delay.h>
  64. #include <linux/mutex.h>
  65. #include <sound/ac97_codec.h>
  66. #include <sound/control.h>
  67. #include <sound/core.h>
  68. #include <sound/initval.h>
  69. #include <sound/pcm.h>
  70. #include <sound/tlv.h>
  71. #include "oxygen.h"
  72. #include "cm9780.h"
  73. #include "pcm1796.h"
  74. #include "cs4398.h"
  75. #include "cs4362a.h"
  76. MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
  77. MODULE_DESCRIPTION("Asus AVx00 driver");
  78. MODULE_LICENSE("GPL");
  79. MODULE_SUPPORTED_DEVICE("{{Asus,AV100},{Asus,AV200}}");
  80. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  81. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  82. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  83. module_param_array(index, int, NULL, 0444);
  84. MODULE_PARM_DESC(index, "card index");
  85. module_param_array(id, charp, NULL, 0444);
  86. MODULE_PARM_DESC(id, "ID string");
  87. module_param_array(enable, bool, NULL, 0444);
  88. MODULE_PARM_DESC(enable, "enable card");
  89. enum {
  90. MODEL_D2,
  91. MODEL_D2X,
  92. MODEL_DX,
  93. };
  94. static struct pci_device_id xonar_ids[] __devinitdata = {
  95. { OXYGEN_PCI_SUBID(0x1043, 0x8269), .driver_data = MODEL_D2 },
  96. { OXYGEN_PCI_SUBID(0x1043, 0x8275), .driver_data = MODEL_DX },
  97. { OXYGEN_PCI_SUBID(0x1043, 0x82b7), .driver_data = MODEL_D2X },
  98. { }
  99. };
  100. MODULE_DEVICE_TABLE(pci, xonar_ids);
  101. #define GPIO_CS53x1_M_MASK 0x000c
  102. #define GPIO_CS53x1_M_SINGLE 0x0000
  103. #define GPIO_CS53x1_M_DOUBLE 0x0004
  104. #define GPIO_CS53x1_M_QUAD 0x0008
  105. #define GPIO_D2X_EXT_POWER 0x0020
  106. #define GPIO_D2_ALT 0x0080
  107. #define GPIO_D2_OUTPUT_ENABLE 0x0100
  108. #define GPI_DX_EXT_POWER 0x01
  109. #define GPIO_DX_OUTPUT_ENABLE 0x0001
  110. #define GPIO_DX_UNKNOWN1 0x0002
  111. #define GPIO_DX_UNKNOWN2 0x0100
  112. #define I2C_DEVICE_CS4398 0x9e /* 10011, AD1=1, AD0=1, /W=0 */
  113. #define I2C_DEVICE_CS4362A 0x30 /* 001100, AD0=0, /W=0 */
  114. struct xonar_data {
  115. unsigned int anti_pop_delay;
  116. u16 output_enable_bit;
  117. u8 ext_power_reg;
  118. u8 ext_power_int_reg;
  119. u8 ext_power_bit;
  120. u8 has_power;
  121. };
  122. static void pcm1796_write(struct oxygen *chip, unsigned int codec,
  123. u8 reg, u8 value)
  124. {
  125. /* maps ALSA channel pair number to SPI output */
  126. static const u8 codec_map[4] = {
  127. 0, 1, 2, 4
  128. };
  129. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  130. OXYGEN_SPI_DATA_LENGTH_2 |
  131. OXYGEN_SPI_CLOCK_160 |
  132. (codec_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
  133. OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
  134. (reg << 8) | value);
  135. }
  136. static void cs4398_write(struct oxygen *chip, u8 reg, u8 value)
  137. {
  138. oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value);
  139. }
  140. static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value)
  141. {
  142. oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value);
  143. }
  144. static void xonar_common_init(struct oxygen *chip)
  145. {
  146. struct xonar_data *data = chip->model_data;
  147. if (data->ext_power_reg) {
  148. oxygen_set_bits8(chip, data->ext_power_int_reg,
  149. data->ext_power_bit);
  150. chip->interrupt_mask |= OXYGEN_INT_GPIO;
  151. data->has_power = !!(oxygen_read8(chip, data->ext_power_reg)
  152. & data->ext_power_bit);
  153. }
  154. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CS53x1_M_MASK);
  155. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  156. GPIO_CS53x1_M_SINGLE, GPIO_CS53x1_M_MASK);
  157. oxygen_ac97_set_bits(chip, 0, CM9780_JACK, CM9780_FMIC2MIC);
  158. msleep(data->anti_pop_delay);
  159. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, data->output_enable_bit);
  160. oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit);
  161. }
  162. static void xonar_d2_init(struct oxygen *chip)
  163. {
  164. struct xonar_data *data = chip->model_data;
  165. unsigned int i;
  166. data->anti_pop_delay = 300;
  167. data->output_enable_bit = GPIO_D2_OUTPUT_ENABLE;
  168. for (i = 0; i < 4; ++i) {
  169. pcm1796_write(chip, i, 18, PCM1796_FMT_24_LJUST | PCM1796_ATLD);
  170. pcm1796_write(chip, i, 19, PCM1796_FLT_SHARP | PCM1796_ATS_1);
  171. pcm1796_write(chip, i, 20, PCM1796_OS_64);
  172. pcm1796_write(chip, i, 21, 0);
  173. pcm1796_write(chip, i, 16, 0xff); /* set ATL/ATR after ATLD */
  174. pcm1796_write(chip, i, 17, 0xff);
  175. }
  176. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2_ALT);
  177. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_D2_ALT);
  178. xonar_common_init(chip);
  179. snd_component_add(chip->card, "PCM1796");
  180. snd_component_add(chip->card, "CS5381");
  181. }
  182. static void xonar_d2x_init(struct oxygen *chip)
  183. {
  184. struct xonar_data *data = chip->model_data;
  185. data->ext_power_reg = OXYGEN_GPIO_DATA;
  186. data->ext_power_int_reg = OXYGEN_GPIO_INTERRUPT_MASK;
  187. data->ext_power_bit = GPIO_D2X_EXT_POWER;
  188. oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2X_EXT_POWER);
  189. xonar_d2_init(chip);
  190. }
  191. static void xonar_dx_init(struct oxygen *chip)
  192. {
  193. struct xonar_data *data = chip->model_data;
  194. unsigned int i;
  195. for (i = 0; i < 8; ++i)
  196. chip->dac_volume[i] = 127;
  197. data->anti_pop_delay = 800;
  198. data->output_enable_bit = GPIO_DX_OUTPUT_ENABLE;
  199. data->ext_power_reg = OXYGEN_GPI_DATA;
  200. data->ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
  201. data->ext_power_bit = GPI_DX_EXT_POWER;
  202. /* XXX the DACs' datasheets say fast mode is not allowed */
  203. oxygen_set_bits16(chip, OXYGEN_2WIRE_BUS_STATUS,
  204. OXYGEN_2WIRE_SPEED_FAST);
  205. /* set CPEN (control port mode) and power down */
  206. cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
  207. cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
  208. /* configure */
  209. cs4398_write(chip, 2, CS4398_FM_SINGLE |
  210. CS4398_DEM_NONE | CS4398_DIF_LJUST);
  211. cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
  212. cs4398_write(chip, 4, CS4398_MUTEP_LOW | CS4398_PAMUTE);
  213. cs4398_write(chip, 5, 0);
  214. cs4398_write(chip, 6, 0);
  215. cs4398_write(chip, 7, CS4398_RMP_DN | CS4398_RMP_UP |
  216. CS4398_ZERO_CROSS | CS4398_SOFT_RAMP);
  217. cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
  218. cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE |
  219. CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
  220. cs4362a_write(chip, 0x04, CS4362A_RMP_DN | CS4362A_DEM_NONE);
  221. cs4362a_write(chip, 0x05, 0);
  222. cs4362a_write(chip, 0x06, CS4362A_FM_SINGLE |
  223. CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
  224. cs4362a_write(chip, 0x09, CS4362A_FM_SINGLE |
  225. CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
  226. cs4362a_write(chip, 0x0c, CS4362A_FM_SINGLE |
  227. CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
  228. cs4362a_write(chip, 0x07, 0);
  229. cs4362a_write(chip, 0x08, 0);
  230. cs4362a_write(chip, 0x0a, 0);
  231. cs4362a_write(chip, 0x0b, 0);
  232. cs4362a_write(chip, 0x0d, 0);
  233. cs4362a_write(chip, 0x0e, 0);
  234. /* clear power down */
  235. cs4398_write(chip, 8, CS4398_CPEN);
  236. cs4362a_write(chip, 0x01, CS4362A_CPEN);
  237. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
  238. GPIO_DX_UNKNOWN1 | GPIO_DX_UNKNOWN2);
  239. xonar_common_init(chip);
  240. snd_component_add(chip->card, "CS4398");
  241. snd_component_add(chip->card, "CS4362A");
  242. snd_component_add(chip->card, "CS5361");
  243. }
  244. static void xonar_cleanup(struct oxygen *chip)
  245. {
  246. struct xonar_data *data = chip->model_data;
  247. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit);
  248. }
  249. static void xonar_dx_cleanup(struct oxygen *chip)
  250. {
  251. xonar_cleanup(chip);
  252. cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
  253. oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
  254. }
  255. static void set_pcm1796_params(struct oxygen *chip,
  256. struct snd_pcm_hw_params *params)
  257. {
  258. unsigned int i;
  259. u8 value;
  260. value = params_rate(params) >= 96000 ? PCM1796_OS_32 : PCM1796_OS_64;
  261. for (i = 0; i < 4; ++i)
  262. pcm1796_write(chip, i, 20, value);
  263. }
  264. static void update_pcm1796_volume(struct oxygen *chip)
  265. {
  266. unsigned int i;
  267. for (i = 0; i < 4; ++i) {
  268. pcm1796_write(chip, i, 16, chip->dac_volume[i * 2]);
  269. pcm1796_write(chip, i, 17, chip->dac_volume[i * 2 + 1]);
  270. }
  271. }
  272. static void update_pcm1796_mute(struct oxygen *chip)
  273. {
  274. unsigned int i;
  275. u8 value;
  276. value = PCM1796_FMT_24_LJUST | PCM1796_ATLD;
  277. if (chip->dac_mute)
  278. value |= PCM1796_MUTE;
  279. for (i = 0; i < 4; ++i)
  280. pcm1796_write(chip, i, 18, value);
  281. }
  282. static void set_cs53x1_params(struct oxygen *chip,
  283. struct snd_pcm_hw_params *params)
  284. {
  285. unsigned int value;
  286. if (params_rate(params) <= 54000)
  287. value = GPIO_CS53x1_M_SINGLE;
  288. else if (params_rate(params) <= 108000)
  289. value = GPIO_CS53x1_M_DOUBLE;
  290. else
  291. value = GPIO_CS53x1_M_QUAD;
  292. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  293. value, GPIO_CS53x1_M_MASK);
  294. }
  295. static void set_cs43xx_params(struct oxygen *chip,
  296. struct snd_pcm_hw_params *params)
  297. {
  298. u8 fm_cs4398, fm_cs4362a;
  299. fm_cs4398 = CS4398_DEM_NONE | CS4398_DIF_LJUST;
  300. fm_cs4362a = CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
  301. if (params_rate(params) <= 50000) {
  302. fm_cs4398 |= CS4398_FM_SINGLE;
  303. fm_cs4362a |= CS4362A_FM_SINGLE;
  304. } else if (params_rate(params) <= 100000) {
  305. fm_cs4398 |= CS4398_FM_DOUBLE;
  306. fm_cs4362a |= CS4362A_FM_DOUBLE;
  307. } else {
  308. fm_cs4398 |= CS4398_FM_QUAD;
  309. fm_cs4362a |= CS4362A_FM_QUAD;
  310. }
  311. cs4398_write(chip, 2, fm_cs4398);
  312. cs4362a_write(chip, 0x06, fm_cs4362a);
  313. cs4362a_write(chip, 0x09, fm_cs4362a);
  314. cs4362a_write(chip, 0x0c, fm_cs4362a);
  315. }
  316. static void update_cs4362a_volumes(struct oxygen *chip)
  317. {
  318. u8 mute;
  319. mute = chip->dac_mute ? CS4362A_MUTE : 0;
  320. cs4362a_write(chip, 7, (127 - chip->dac_volume[2]) | mute);
  321. cs4362a_write(chip, 8, (127 - chip->dac_volume[3]) | mute);
  322. cs4362a_write(chip, 10, (127 - chip->dac_volume[4]) | mute);
  323. cs4362a_write(chip, 11, (127 - chip->dac_volume[5]) | mute);
  324. cs4362a_write(chip, 13, (127 - chip->dac_volume[6]) | mute);
  325. cs4362a_write(chip, 14, (127 - chip->dac_volume[7]) | mute);
  326. }
  327. static void update_cs43xx_volume(struct oxygen *chip)
  328. {
  329. cs4398_write(chip, 5, (127 - chip->dac_volume[0]) * 2);
  330. cs4398_write(chip, 6, (127 - chip->dac_volume[1]) * 2);
  331. update_cs4362a_volumes(chip);
  332. }
  333. static void update_cs43xx_mute(struct oxygen *chip)
  334. {
  335. u8 reg;
  336. reg = CS4398_MUTEP_LOW | CS4398_PAMUTE;
  337. if (chip->dac_mute)
  338. reg |= CS4398_MUTE_B | CS4398_MUTE_A;
  339. cs4398_write(chip, 4, reg);
  340. update_cs4362a_volumes(chip);
  341. }
  342. static void xonar_gpio_changed(struct oxygen *chip)
  343. {
  344. struct xonar_data *data = chip->model_data;
  345. u8 has_power;
  346. has_power = !!(oxygen_read8(chip, data->ext_power_reg)
  347. & data->ext_power_bit);
  348. if (has_power != data->has_power) {
  349. data->has_power = has_power;
  350. if (has_power) {
  351. snd_printk(KERN_NOTICE "power restored\n");
  352. } else {
  353. snd_printk(KERN_CRIT
  354. "Hey! Don't unplug the power cable!\n");
  355. /* TODO: stop PCMs */
  356. }
  357. }
  358. }
  359. static int pcm1796_volume_info(struct snd_kcontrol *ctl,
  360. struct snd_ctl_elem_info *info)
  361. {
  362. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  363. info->count = 8;
  364. info->value.integer.min = 0x0f;
  365. info->value.integer.max = 0xff;
  366. return 0;
  367. }
  368. static int cs4362a_volume_info(struct snd_kcontrol *ctl,
  369. struct snd_ctl_elem_info *info)
  370. {
  371. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  372. info->count = 8;
  373. info->value.integer.min = 0;
  374. info->value.integer.max = 127;
  375. return 0;
  376. }
  377. static int alt_switch_get(struct snd_kcontrol *ctl,
  378. struct snd_ctl_elem_value *value)
  379. {
  380. struct oxygen *chip = ctl->private_data;
  381. value->value.integer.value[0] =
  382. !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) & GPIO_D2_ALT);
  383. return 0;
  384. }
  385. static int alt_switch_put(struct snd_kcontrol *ctl,
  386. struct snd_ctl_elem_value *value)
  387. {
  388. struct oxygen *chip = ctl->private_data;
  389. u16 old_bits, new_bits;
  390. int changed;
  391. spin_lock_irq(&chip->reg_lock);
  392. old_bits = oxygen_read16(chip, OXYGEN_GPIO_DATA);
  393. if (value->value.integer.value[0])
  394. new_bits = old_bits | GPIO_D2_ALT;
  395. else
  396. new_bits = old_bits & ~GPIO_D2_ALT;
  397. changed = new_bits != old_bits;
  398. if (changed)
  399. oxygen_write16(chip, OXYGEN_GPIO_DATA, new_bits);
  400. spin_unlock_irq(&chip->reg_lock);
  401. return changed;
  402. }
  403. static const struct snd_kcontrol_new alt_switch = {
  404. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  405. .name = "Analog Loopback Switch",
  406. .info = snd_ctl_boolean_mono_info,
  407. .get = alt_switch_get,
  408. .put = alt_switch_put,
  409. };
  410. static const DECLARE_TLV_DB_SCALE(pcm1796_db_scale, -12000, 50, 0);
  411. static const DECLARE_TLV_DB_SCALE(cs4362a_db_scale, -12700, 100, 0);
  412. static int xonar_d2_control_filter(struct snd_kcontrol_new *template)
  413. {
  414. if (!strcmp(template->name, "Master Playback Volume")) {
  415. template->access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
  416. template->info = pcm1796_volume_info;
  417. template->tlv.p = pcm1796_db_scale;
  418. } else if (!strncmp(template->name, "CD Capture ", 11)) {
  419. /* CD in is actually connected to the video in pin */
  420. template->private_value ^= AC97_CD ^ AC97_VIDEO;
  421. }
  422. return 0;
  423. }
  424. static int xonar_dx_control_filter(struct snd_kcontrol_new *template)
  425. {
  426. if (!strcmp(template->name, "Master Playback Volume")) {
  427. template->access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
  428. template->info = cs4362a_volume_info;
  429. template->tlv.p = cs4362a_db_scale;
  430. } else if (!strncmp(template->name, "CD Capture ", 11)) {
  431. return 1; /* no CD input */
  432. } else if (!strcmp(template->name,
  433. SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK)) ||
  434. !strcmp(template->name,
  435. SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT))) {
  436. return 1; /* no digital input */
  437. }
  438. return 0;
  439. }
  440. static int xonar_mixer_init(struct oxygen *chip)
  441. {
  442. return snd_ctl_add(chip->card, snd_ctl_new1(&alt_switch, chip));
  443. }
  444. static const struct oxygen_model xonar_models[] = {
  445. [MODEL_D2] = {
  446. .shortname = "Xonar D2",
  447. .longname = "Asus Virtuoso 200",
  448. .chip = "AV200",
  449. .owner = THIS_MODULE,
  450. .init = xonar_d2_init,
  451. .control_filter = xonar_d2_control_filter,
  452. .mixer_init = xonar_mixer_init,
  453. .cleanup = xonar_cleanup,
  454. .set_dac_params = set_pcm1796_params,
  455. .set_adc_params = set_cs53x1_params,
  456. .update_dac_volume = update_pcm1796_volume,
  457. .update_dac_mute = update_pcm1796_mute,
  458. .model_data_size = sizeof(struct xonar_data),
  459. .pcm_dev_cfg = PLAYBACK_0_TO_I2S |
  460. PLAYBACK_1_TO_SPDIF |
  461. CAPTURE_0_FROM_I2S_2 |
  462. CAPTURE_1_FROM_SPDIF,
  463. .dac_channels = 8,
  464. .misc_flags = OXYGEN_MISC_MIDI,
  465. .function_flags = OXYGEN_FUNCTION_SPI |
  466. OXYGEN_FUNCTION_ENABLE_SPI_4_5,
  467. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  468. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  469. },
  470. [MODEL_D2X] = {
  471. .shortname = "Xonar D2X",
  472. .longname = "Asus Virtuoso 200",
  473. .chip = "AV200",
  474. .owner = THIS_MODULE,
  475. .init = xonar_d2x_init,
  476. .control_filter = xonar_d2_control_filter,
  477. .mixer_init = xonar_mixer_init,
  478. .cleanup = xonar_cleanup,
  479. .set_dac_params = set_pcm1796_params,
  480. .set_adc_params = set_cs53x1_params,
  481. .update_dac_volume = update_pcm1796_volume,
  482. .update_dac_mute = update_pcm1796_mute,
  483. .gpio_changed = xonar_gpio_changed,
  484. .model_data_size = sizeof(struct xonar_data),
  485. .pcm_dev_cfg = PLAYBACK_0_TO_I2S |
  486. PLAYBACK_1_TO_SPDIF |
  487. CAPTURE_0_FROM_I2S_2 |
  488. CAPTURE_1_FROM_SPDIF,
  489. .dac_channels = 8,
  490. .misc_flags = OXYGEN_MISC_MIDI,
  491. .function_flags = OXYGEN_FUNCTION_SPI |
  492. OXYGEN_FUNCTION_ENABLE_SPI_4_5,
  493. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  494. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  495. },
  496. [MODEL_DX] = {
  497. .shortname = "Xonar DX",
  498. .longname = "Asus Virtuoso 100",
  499. .chip = "AV200",
  500. .owner = THIS_MODULE,
  501. .init = xonar_dx_init,
  502. .control_filter = xonar_dx_control_filter,
  503. .cleanup = xonar_dx_cleanup,
  504. .set_dac_params = set_cs43xx_params,
  505. .set_adc_params = set_cs53x1_params,
  506. .update_dac_volume = update_cs43xx_volume,
  507. .update_dac_mute = update_cs43xx_mute,
  508. .gpio_changed = xonar_gpio_changed,
  509. .model_data_size = sizeof(struct xonar_data),
  510. .pcm_dev_cfg = PLAYBACK_0_TO_I2S |
  511. PLAYBACK_1_TO_SPDIF |
  512. CAPTURE_0_FROM_I2S_2,
  513. .dac_channels = 8,
  514. .function_flags = OXYGEN_FUNCTION_2WIRE,
  515. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  516. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  517. },
  518. };
  519. static int __devinit xonar_probe(struct pci_dev *pci,
  520. const struct pci_device_id *pci_id)
  521. {
  522. static int dev;
  523. int err;
  524. if (dev >= SNDRV_CARDS)
  525. return -ENODEV;
  526. if (!enable[dev]) {
  527. ++dev;
  528. return -ENOENT;
  529. }
  530. err = oxygen_pci_probe(pci, index[dev], id[dev],
  531. &xonar_models[pci_id->driver_data]);
  532. if (err >= 0)
  533. ++dev;
  534. return err;
  535. }
  536. static struct pci_driver xonar_driver = {
  537. .name = "AV200",
  538. .id_table = xonar_ids,
  539. .probe = xonar_probe,
  540. .remove = __devexit_p(oxygen_pci_remove),
  541. };
  542. static int __init alsa_card_xonar_init(void)
  543. {
  544. return pci_register_driver(&xonar_driver);
  545. }
  546. static void __exit alsa_card_xonar_exit(void)
  547. {
  548. pci_unregister_driver(&xonar_driver);
  549. }
  550. module_init(alsa_card_xonar_init)
  551. module_exit(alsa_card_xonar_exit)