kprobes-thumb.c 6.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215
  1. /*
  2. * arch/arm/kernel/kprobes-thumb.c
  3. *
  4. * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/kprobes.h>
  12. #include "kprobes.h"
  13. /*
  14. * True if current instruction is in an IT block.
  15. */
  16. #define in_it_block(cpsr) ((cpsr & 0x06000c00) != 0x00000000)
  17. /*
  18. * Return the condition code to check for the currently executing instruction.
  19. * This is in ITSTATE<7:4> which is in CPSR<15:12> but is only valid if
  20. * in_it_block returns true.
  21. */
  22. #define current_cond(cpsr) ((cpsr >> 12) & 0xf)
  23. /*
  24. * Return the PC value for a probe in thumb code.
  25. * This is the address of the probed instruction plus 4.
  26. * We subtract one because the address will have bit zero set to indicate
  27. * a pointer to thumb code.
  28. */
  29. static inline unsigned long __kprobes thumb_probe_pc(struct kprobe *p)
  30. {
  31. return (unsigned long)p->addr - 1 + 4;
  32. }
  33. static void __kprobes
  34. t16_simulate_bxblx(struct kprobe *p, struct pt_regs *regs)
  35. {
  36. kprobe_opcode_t insn = p->opcode;
  37. unsigned long pc = thumb_probe_pc(p);
  38. int rm = (insn >> 3) & 0xf;
  39. unsigned long rmv = (rm == 15) ? pc : regs->uregs[rm];
  40. if (insn & (1 << 7)) /* BLX ? */
  41. regs->ARM_lr = (unsigned long)p->addr + 2;
  42. bx_write_pc(rmv, regs);
  43. }
  44. static unsigned long __kprobes
  45. t16_emulate_loregs(struct kprobe *p, struct pt_regs *regs)
  46. {
  47. unsigned long oldcpsr = regs->ARM_cpsr;
  48. unsigned long newcpsr;
  49. __asm__ __volatile__ (
  50. "msr cpsr_fs, %[oldcpsr] \n\t"
  51. "ldmia %[regs], {r0-r7} \n\t"
  52. "blx %[fn] \n\t"
  53. "stmia %[regs], {r0-r7} \n\t"
  54. "mrs %[newcpsr], cpsr \n\t"
  55. : [newcpsr] "=r" (newcpsr)
  56. : [oldcpsr] "r" (oldcpsr), [regs] "r" (regs),
  57. [fn] "r" (p->ainsn.insn_fn)
  58. : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
  59. "lr", "memory", "cc"
  60. );
  61. return (oldcpsr & ~APSR_MASK) | (newcpsr & APSR_MASK);
  62. }
  63. static void __kprobes
  64. t16_emulate_loregs_rwflags(struct kprobe *p, struct pt_regs *regs)
  65. {
  66. regs->ARM_cpsr = t16_emulate_loregs(p, regs);
  67. }
  68. static void __kprobes
  69. t16_emulate_loregs_noitrwflags(struct kprobe *p, struct pt_regs *regs)
  70. {
  71. unsigned long cpsr = t16_emulate_loregs(p, regs);
  72. if (!in_it_block(cpsr))
  73. regs->ARM_cpsr = cpsr;
  74. }
  75. static const union decode_item t16_table_1011[] = {
  76. /* Miscellaneous 16-bit instructions */
  77. /*
  78. * If-Then, and hints
  79. * 1011 1111 xxxx xxxx
  80. */
  81. /* YIELD 1011 1111 0001 0000 */
  82. DECODE_OR (0xffff, 0xbf10),
  83. /* SEV 1011 1111 0100 0000 */
  84. DECODE_EMULATE (0xffff, 0xbf40, kprobe_emulate_none),
  85. /* NOP 1011 1111 0000 0000 */
  86. /* WFE 1011 1111 0010 0000 */
  87. /* WFI 1011 1111 0011 0000 */
  88. DECODE_SIMULATE (0xffcf, 0xbf00, kprobe_simulate_nop),
  89. /* Unassigned hints 1011 1111 xxxx 0000 */
  90. DECODE_REJECT (0xff0f, 0xbf00),
  91. DECODE_END
  92. };
  93. const union decode_item kprobe_decode_thumb16_table[] = {
  94. /*
  95. * Shift (immediate), add, subtract, move, and compare
  96. * 00xx xxxx xxxx xxxx
  97. */
  98. /* CMP (immediate) 0010 1xxx xxxx xxxx */
  99. DECODE_EMULATE (0xf800, 0x2800, t16_emulate_loregs_rwflags),
  100. /* ADD (register) 0001 100x xxxx xxxx */
  101. /* SUB (register) 0001 101x xxxx xxxx */
  102. /* LSL (immediate) 0000 0xxx xxxx xxxx */
  103. /* LSR (immediate) 0000 1xxx xxxx xxxx */
  104. /* ASR (immediate) 0001 0xxx xxxx xxxx */
  105. /* ADD (immediate, Thumb) 0001 110x xxxx xxxx */
  106. /* SUB (immediate, Thumb) 0001 111x xxxx xxxx */
  107. /* MOV (immediate) 0010 0xxx xxxx xxxx */
  108. /* ADD (immediate, Thumb) 0011 0xxx xxxx xxxx */
  109. /* SUB (immediate, Thumb) 0011 1xxx xxxx xxxx */
  110. DECODE_EMULATE (0xc000, 0x0000, t16_emulate_loregs_noitrwflags),
  111. /*
  112. * 16-bit Thumb data-processing instructions
  113. * 0100 00xx xxxx xxxx
  114. */
  115. /* TST (register) 0100 0010 00xx xxxx */
  116. DECODE_EMULATE (0xffc0, 0x4200, t16_emulate_loregs_rwflags),
  117. /* CMP (register) 0100 0010 10xx xxxx */
  118. /* CMN (register) 0100 0010 11xx xxxx */
  119. DECODE_EMULATE (0xff80, 0x4280, t16_emulate_loregs_rwflags),
  120. /* AND (register) 0100 0000 00xx xxxx */
  121. /* EOR (register) 0100 0000 01xx xxxx */
  122. /* LSL (register) 0100 0000 10xx xxxx */
  123. /* LSR (register) 0100 0000 11xx xxxx */
  124. /* ASR (register) 0100 0001 00xx xxxx */
  125. /* ADC (register) 0100 0001 01xx xxxx */
  126. /* SBC (register) 0100 0001 10xx xxxx */
  127. /* ROR (register) 0100 0001 11xx xxxx */
  128. /* RSB (immediate) 0100 0010 01xx xxxx */
  129. /* ORR (register) 0100 0011 00xx xxxx */
  130. /* MUL 0100 0011 00xx xxxx */
  131. /* BIC (register) 0100 0011 10xx xxxx */
  132. /* MVN (register) 0100 0011 10xx xxxx */
  133. DECODE_EMULATE (0xfc00, 0x4000, t16_emulate_loregs_noitrwflags),
  134. /*
  135. * Special data instructions and branch and exchange
  136. * 0100 01xx xxxx xxxx
  137. */
  138. /* BLX pc 0100 0111 1111 1xxx */
  139. DECODE_REJECT (0xfff8, 0x47f8),
  140. /* BX (register) 0100 0111 0xxx xxxx */
  141. /* BLX (register) 0100 0111 1xxx xxxx */
  142. DECODE_SIMULATE (0xff00, 0x4700, t16_simulate_bxblx),
  143. /*
  144. * Miscellaneous 16-bit instructions
  145. * 1011 xxxx xxxx xxxx
  146. */
  147. DECODE_TABLE (0xf000, 0xb000, t16_table_1011),
  148. DECODE_END
  149. };
  150. static unsigned long __kprobes thumb_check_cc(unsigned long cpsr)
  151. {
  152. if (unlikely(in_it_block(cpsr)))
  153. return kprobe_condition_checks[current_cond(cpsr)](cpsr);
  154. return true;
  155. }
  156. static void __kprobes thumb16_singlestep(struct kprobe *p, struct pt_regs *regs)
  157. {
  158. regs->ARM_pc += 2;
  159. p->ainsn.insn_handler(p, regs);
  160. regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
  161. }
  162. static void __kprobes thumb32_singlestep(struct kprobe *p, struct pt_regs *regs)
  163. {
  164. regs->ARM_pc += 4;
  165. p->ainsn.insn_handler(p, regs);
  166. regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
  167. }
  168. enum kprobe_insn __kprobes
  169. thumb16_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
  170. {
  171. asi->insn_singlestep = thumb16_singlestep;
  172. asi->insn_check_cc = thumb_check_cc;
  173. return kprobe_decode_insn(insn, asi, kprobe_decode_thumb16_table, true);
  174. }
  175. enum kprobe_insn __kprobes
  176. thumb32_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
  177. {
  178. asi->insn_singlestep = thumb32_singlestep;
  179. asi->insn_check_cc = thumb_check_cc;
  180. return INSN_REJECTED;
  181. }