x2apic_phys.c 5.2 KB

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  1. #include <linux/threads.h>
  2. #include <linux/cpumask.h>
  3. #include <linux/string.h>
  4. #include <linux/kernel.h>
  5. #include <linux/ctype.h>
  6. #include <linux/init.h>
  7. #include <linux/dmar.h>
  8. #include <asm/smp.h>
  9. #include <asm/apic.h>
  10. #include <asm/ipi.h>
  11. int x2apic_phys;
  12. static int set_x2apic_phys_mode(char *arg)
  13. {
  14. x2apic_phys = 1;
  15. return 0;
  16. }
  17. early_param("x2apic_phys", set_x2apic_phys_mode);
  18. static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
  19. {
  20. if (x2apic_phys)
  21. return x2apic_enabled();
  22. else
  23. return 0;
  24. }
  25. /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */
  26. static const struct cpumask *x2apic_target_cpus(void)
  27. {
  28. return cpumask_of(0);
  29. }
  30. static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
  31. {
  32. cpumask_clear(retmask);
  33. cpumask_set_cpu(cpu, retmask);
  34. }
  35. static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
  36. unsigned int dest)
  37. {
  38. unsigned long cfg;
  39. cfg = __prepare_ICR(0, vector, dest);
  40. /*
  41. * send the IPI.
  42. */
  43. native_x2apic_icr_write(cfg, apicid);
  44. }
  45. static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
  46. {
  47. unsigned long query_cpu;
  48. unsigned long flags;
  49. local_irq_save(flags);
  50. for_each_cpu(query_cpu, mask) {
  51. __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
  52. vector, APIC_DEST_PHYSICAL);
  53. }
  54. local_irq_restore(flags);
  55. }
  56. static void
  57. x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
  58. {
  59. unsigned long this_cpu = smp_processor_id();
  60. unsigned long query_cpu;
  61. unsigned long flags;
  62. local_irq_save(flags);
  63. for_each_cpu(query_cpu, mask) {
  64. if (query_cpu != this_cpu)
  65. __x2apic_send_IPI_dest(
  66. per_cpu(x86_cpu_to_apicid, query_cpu),
  67. vector, APIC_DEST_PHYSICAL);
  68. }
  69. local_irq_restore(flags);
  70. }
  71. static void x2apic_send_IPI_allbutself(int vector)
  72. {
  73. unsigned long this_cpu = smp_processor_id();
  74. unsigned long query_cpu;
  75. unsigned long flags;
  76. local_irq_save(flags);
  77. for_each_online_cpu(query_cpu) {
  78. if (query_cpu == this_cpu)
  79. continue;
  80. __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
  81. vector, APIC_DEST_PHYSICAL);
  82. }
  83. local_irq_restore(flags);
  84. }
  85. static void x2apic_send_IPI_all(int vector)
  86. {
  87. x2apic_send_IPI_mask(cpu_online_mask, vector);
  88. }
  89. static int x2apic_apic_id_registered(void)
  90. {
  91. return 1;
  92. }
  93. static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
  94. {
  95. /*
  96. * We're using fixed IRQ delivery, can only return one phys APIC ID.
  97. * May as well be the first.
  98. */
  99. int cpu = cpumask_first(cpumask);
  100. if ((unsigned)cpu < nr_cpu_ids)
  101. return per_cpu(x86_cpu_to_apicid, cpu);
  102. else
  103. return BAD_APICID;
  104. }
  105. static unsigned int
  106. x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
  107. const struct cpumask *andmask)
  108. {
  109. int cpu;
  110. /*
  111. * We're using fixed IRQ delivery, can only return one phys APIC ID.
  112. * May as well be the first.
  113. */
  114. for_each_cpu_and(cpu, cpumask, andmask) {
  115. if (cpumask_test_cpu(cpu, cpu_online_mask))
  116. break;
  117. }
  118. if (cpu < nr_cpu_ids)
  119. return per_cpu(x86_cpu_to_apicid, cpu);
  120. return BAD_APICID;
  121. }
  122. static unsigned int x2apic_phys_get_apic_id(unsigned long x)
  123. {
  124. return x;
  125. }
  126. static unsigned long set_apic_id(unsigned int id)
  127. {
  128. return id;
  129. }
  130. static int x2apic_phys_pkg_id(int initial_apicid, int index_msb)
  131. {
  132. return current_cpu_data.initial_apicid >> index_msb;
  133. }
  134. static void x2apic_send_IPI_self(int vector)
  135. {
  136. apic_write(APIC_SELF_IPI, vector);
  137. }
  138. static void init_x2apic_ldr(void)
  139. {
  140. }
  141. struct apic apic_x2apic_phys = {
  142. .name = "physical x2apic",
  143. .probe = NULL,
  144. .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
  145. .apic_id_registered = x2apic_apic_id_registered,
  146. .irq_delivery_mode = dest_Fixed,
  147. .irq_dest_mode = 0, /* physical */
  148. .target_cpus = x2apic_target_cpus,
  149. .disable_esr = 0,
  150. .dest_logical = 0,
  151. .check_apicid_used = NULL,
  152. .check_apicid_present = NULL,
  153. .vector_allocation_domain = x2apic_vector_allocation_domain,
  154. .init_apic_ldr = init_x2apic_ldr,
  155. .ioapic_phys_id_map = NULL,
  156. .setup_apic_routing = NULL,
  157. .multi_timer_check = NULL,
  158. .apicid_to_node = NULL,
  159. .cpu_to_logical_apicid = NULL,
  160. .cpu_present_to_apicid = default_cpu_present_to_apicid,
  161. .apicid_to_cpu_present = NULL,
  162. .setup_portio_remap = NULL,
  163. .check_phys_apicid_present = default_check_phys_apicid_present,
  164. .enable_apic_mode = NULL,
  165. .phys_pkg_id = x2apic_phys_pkg_id,
  166. .mps_oem_check = NULL,
  167. .get_apic_id = x2apic_phys_get_apic_id,
  168. .set_apic_id = set_apic_id,
  169. .apic_id_mask = 0xFFFFFFFFu,
  170. .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
  171. .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,
  172. .send_IPI_mask = x2apic_send_IPI_mask,
  173. .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
  174. .send_IPI_allbutself = x2apic_send_IPI_allbutself,
  175. .send_IPI_all = x2apic_send_IPI_all,
  176. .send_IPI_self = x2apic_send_IPI_self,
  177. .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
  178. .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
  179. .wait_for_init_deassert = NULL,
  180. .smp_callin_clear_local_apic = NULL,
  181. .inquire_remote_apic = NULL,
  182. .read = native_apic_msr_read,
  183. .write = native_apic_msr_write,
  184. .icr_read = native_x2apic_icr_read,
  185. .icr_write = native_x2apic_icr_write,
  186. .wait_icr_idle = native_x2apic_wait_icr_idle,
  187. .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
  188. };