mach-mxs.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428
  1. /*
  2. * Copyright 2012 Freescale Semiconductor, Inc.
  3. * Copyright 2012 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/clkdev.h>
  14. #include <linux/can/platform/flexcan.h>
  15. #include <linux/delay.h>
  16. #include <linux/err.h>
  17. #include <linux/gpio.h>
  18. #include <linux/init.h>
  19. #include <linux/micrel_phy.h>
  20. #include <linux/mxsfb.h>
  21. #include <linux/of_platform.h>
  22. #include <linux/phy.h>
  23. #include <linux/pinctrl/consumer.h>
  24. #include <asm/mach/arch.h>
  25. #include <asm/mach/time.h>
  26. #include <mach/common.h>
  27. #include <mach/digctl.h>
  28. #include <mach/mxs.h>
  29. static struct fb_videomode mx23evk_video_modes[] = {
  30. {
  31. .name = "Samsung-LMS430HF02",
  32. .refresh = 60,
  33. .xres = 480,
  34. .yres = 272,
  35. .pixclock = 108096, /* picosecond (9.2 MHz) */
  36. .left_margin = 15,
  37. .right_margin = 8,
  38. .upper_margin = 12,
  39. .lower_margin = 4,
  40. .hsync_len = 1,
  41. .vsync_len = 1,
  42. .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
  43. FB_SYNC_DOTCLK_FAILING_ACT,
  44. },
  45. };
  46. static struct fb_videomode mx28evk_video_modes[] = {
  47. {
  48. .name = "Seiko-43WVF1G",
  49. .refresh = 60,
  50. .xres = 800,
  51. .yres = 480,
  52. .pixclock = 29851, /* picosecond (33.5 MHz) */
  53. .left_margin = 89,
  54. .right_margin = 164,
  55. .upper_margin = 23,
  56. .lower_margin = 10,
  57. .hsync_len = 10,
  58. .vsync_len = 10,
  59. .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
  60. FB_SYNC_DOTCLK_FAILING_ACT,
  61. },
  62. };
  63. static struct fb_videomode m28evk_video_modes[] = {
  64. {
  65. .name = "Ampire AM-800480R2TMQW-T01H",
  66. .refresh = 60,
  67. .xres = 800,
  68. .yres = 480,
  69. .pixclock = 30066, /* picosecond (33.26 MHz) */
  70. .left_margin = 0,
  71. .right_margin = 256,
  72. .upper_margin = 0,
  73. .lower_margin = 45,
  74. .hsync_len = 1,
  75. .vsync_len = 1,
  76. .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
  77. },
  78. };
  79. static struct fb_videomode apx4devkit_video_modes[] = {
  80. {
  81. .name = "HannStar PJ70112A",
  82. .refresh = 60,
  83. .xres = 800,
  84. .yres = 480,
  85. .pixclock = 33333, /* picosecond (30.00 MHz) */
  86. .left_margin = 88,
  87. .right_margin = 40,
  88. .upper_margin = 32,
  89. .lower_margin = 13,
  90. .hsync_len = 48,
  91. .vsync_len = 3,
  92. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT |
  93. FB_SYNC_DATA_ENABLE_HIGH_ACT |
  94. FB_SYNC_DOTCLK_FAILING_ACT,
  95. },
  96. };
  97. static struct mxsfb_platform_data mxsfb_pdata __initdata;
  98. /*
  99. * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
  100. */
  101. #define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
  102. static int flexcan0_en, flexcan1_en;
  103. static void mx28evk_flexcan_switch(void)
  104. {
  105. if (flexcan0_en || flexcan1_en)
  106. gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1);
  107. else
  108. gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0);
  109. }
  110. static void mx28evk_flexcan0_switch(int enable)
  111. {
  112. flexcan0_en = enable;
  113. mx28evk_flexcan_switch();
  114. }
  115. static void mx28evk_flexcan1_switch(int enable)
  116. {
  117. flexcan1_en = enable;
  118. mx28evk_flexcan_switch();
  119. }
  120. static struct flexcan_platform_data flexcan_pdata[2];
  121. static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = {
  122. OF_DEV_AUXDATA("fsl,imx23-lcdif", 0x80030000, NULL, &mxsfb_pdata),
  123. OF_DEV_AUXDATA("fsl,imx28-lcdif", 0x80030000, NULL, &mxsfb_pdata),
  124. OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80032000, NULL, &flexcan_pdata[0]),
  125. OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80034000, NULL, &flexcan_pdata[1]),
  126. { /* sentinel */ }
  127. };
  128. static void __init imx23_timer_init(void)
  129. {
  130. mx23_clocks_init();
  131. }
  132. static struct sys_timer imx23_timer = {
  133. .init = imx23_timer_init,
  134. };
  135. static void __init imx28_timer_init(void)
  136. {
  137. mx28_clocks_init();
  138. }
  139. static struct sys_timer imx28_timer = {
  140. .init = imx28_timer_init,
  141. };
  142. enum mac_oui {
  143. OUI_FSL,
  144. OUI_DENX,
  145. OUI_CRYSTALFONTZ,
  146. };
  147. static void __init update_fec_mac_prop(enum mac_oui oui)
  148. {
  149. struct device_node *np, *from = NULL;
  150. struct property *newmac;
  151. const u32 *ocotp = mxs_get_ocotp();
  152. u8 *macaddr;
  153. u32 val;
  154. int i;
  155. for (i = 0; i < 2; i++) {
  156. np = of_find_compatible_node(from, NULL, "fsl,imx28-fec");
  157. if (!np)
  158. return;
  159. from = np;
  160. newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL);
  161. if (!newmac)
  162. return;
  163. newmac->value = newmac + 1;
  164. newmac->length = 6;
  165. newmac->name = kstrdup("local-mac-address", GFP_KERNEL);
  166. if (!newmac->name) {
  167. kfree(newmac);
  168. return;
  169. }
  170. /*
  171. * OCOTP only stores the last 4 octets for each mac address,
  172. * so hard-code OUI here.
  173. */
  174. macaddr = newmac->value;
  175. switch (oui) {
  176. case OUI_FSL:
  177. macaddr[0] = 0x00;
  178. macaddr[1] = 0x04;
  179. macaddr[2] = 0x9f;
  180. break;
  181. case OUI_DENX:
  182. macaddr[0] = 0xc0;
  183. macaddr[1] = 0xe5;
  184. macaddr[2] = 0x4e;
  185. break;
  186. case OUI_CRYSTALFONTZ:
  187. macaddr[0] = 0x58;
  188. macaddr[1] = 0xb9;
  189. macaddr[2] = 0xe1;
  190. break;
  191. }
  192. val = ocotp[i];
  193. macaddr[3] = (val >> 16) & 0xff;
  194. macaddr[4] = (val >> 8) & 0xff;
  195. macaddr[5] = (val >> 0) & 0xff;
  196. prom_update_property(np, newmac);
  197. }
  198. }
  199. static void __init imx23_evk_init(void)
  200. {
  201. mxsfb_pdata.mode_list = mx23evk_video_modes;
  202. mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes);
  203. mxsfb_pdata.default_bpp = 32;
  204. mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
  205. }
  206. static inline void enable_clk_enet_out(void)
  207. {
  208. struct clk *clk = clk_get_sys("enet_out", NULL);
  209. if (!IS_ERR(clk))
  210. clk_prepare_enable(clk);
  211. }
  212. static void __init imx28_evk_init(void)
  213. {
  214. enable_clk_enet_out();
  215. update_fec_mac_prop(OUI_FSL);
  216. mxsfb_pdata.mode_list = mx28evk_video_modes;
  217. mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes);
  218. mxsfb_pdata.default_bpp = 32;
  219. mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
  220. mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
  221. }
  222. static void __init imx28_evk_post_init(void)
  223. {
  224. if (!gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT,
  225. "flexcan-switch")) {
  226. flexcan_pdata[0].transceiver_switch = mx28evk_flexcan0_switch;
  227. flexcan_pdata[1].transceiver_switch = mx28evk_flexcan1_switch;
  228. }
  229. }
  230. static void __init m28evk_init(void)
  231. {
  232. mxsfb_pdata.mode_list = m28evk_video_modes;
  233. mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes);
  234. mxsfb_pdata.default_bpp = 16;
  235. mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
  236. }
  237. static int apx4devkit_phy_fixup(struct phy_device *phy)
  238. {
  239. phy->dev_flags |= MICREL_PHY_50MHZ_CLK;
  240. return 0;
  241. }
  242. static void __init apx4devkit_init(void)
  243. {
  244. enable_clk_enet_out();
  245. if (IS_BUILTIN(CONFIG_PHYLIB))
  246. phy_register_fixup_for_uid(PHY_ID_KSZ8051, MICREL_PHY_ID_MASK,
  247. apx4devkit_phy_fixup);
  248. mxsfb_pdata.mode_list = apx4devkit_video_modes;
  249. mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes);
  250. mxsfb_pdata.default_bpp = 32;
  251. mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
  252. }
  253. #define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0)
  254. #define ENET0_MDIO__GPIO_4_1 MXS_GPIO_NR(4, 1)
  255. #define ENET0_RX_EN__GPIO_4_2 MXS_GPIO_NR(4, 2)
  256. #define ENET0_RXD0__GPIO_4_3 MXS_GPIO_NR(4, 3)
  257. #define ENET0_RXD1__GPIO_4_4 MXS_GPIO_NR(4, 4)
  258. #define ENET0_TX_EN__GPIO_4_6 MXS_GPIO_NR(4, 6)
  259. #define ENET0_TXD0__GPIO_4_7 MXS_GPIO_NR(4, 7)
  260. #define ENET0_TXD1__GPIO_4_8 MXS_GPIO_NR(4, 8)
  261. #define ENET_CLK__GPIO_4_16 MXS_GPIO_NR(4, 16)
  262. #define TX28_FEC_PHY_POWER MXS_GPIO_NR(3, 29)
  263. #define TX28_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
  264. #define TX28_FEC_nINT MXS_GPIO_NR(4, 5)
  265. static const struct gpio tx28_gpios[] __initconst = {
  266. { ENET0_MDC__GPIO_4_0, GPIOF_OUT_INIT_LOW, "GPIO_4_0" },
  267. { ENET0_MDIO__GPIO_4_1, GPIOF_OUT_INIT_LOW, "GPIO_4_1" },
  268. { ENET0_RX_EN__GPIO_4_2, GPIOF_OUT_INIT_LOW, "GPIO_4_2" },
  269. { ENET0_RXD0__GPIO_4_3, GPIOF_OUT_INIT_LOW, "GPIO_4_3" },
  270. { ENET0_RXD1__GPIO_4_4, GPIOF_OUT_INIT_LOW, "GPIO_4_4" },
  271. { ENET0_TX_EN__GPIO_4_6, GPIOF_OUT_INIT_LOW, "GPIO_4_6" },
  272. { ENET0_TXD0__GPIO_4_7, GPIOF_OUT_INIT_LOW, "GPIO_4_7" },
  273. { ENET0_TXD1__GPIO_4_8, GPIOF_OUT_INIT_LOW, "GPIO_4_8" },
  274. { ENET_CLK__GPIO_4_16, GPIOF_OUT_INIT_LOW, "GPIO_4_16" },
  275. { TX28_FEC_PHY_POWER, GPIOF_OUT_INIT_LOW, "fec-phy-power" },
  276. { TX28_FEC_PHY_RESET, GPIOF_OUT_INIT_LOW, "fec-phy-reset" },
  277. { TX28_FEC_nINT, GPIOF_DIR_IN, "fec-int" },
  278. };
  279. static void __init tx28_post_init(void)
  280. {
  281. struct device_node *np;
  282. struct platform_device *pdev;
  283. struct pinctrl *pctl;
  284. int ret;
  285. enable_clk_enet_out();
  286. np = of_find_compatible_node(NULL, NULL, "fsl,imx28-fec");
  287. pdev = of_find_device_by_node(np);
  288. if (!pdev) {
  289. pr_err("%s: failed to find fec device\n", __func__);
  290. return;
  291. }
  292. pctl = pinctrl_get_select(&pdev->dev, "gpio_mode");
  293. if (IS_ERR(pctl)) {
  294. pr_err("%s: failed to get pinctrl state\n", __func__);
  295. return;
  296. }
  297. ret = gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
  298. if (ret) {
  299. pr_err("%s: failed to request gpios: %d\n", __func__, ret);
  300. return;
  301. }
  302. /* Power up fec phy */
  303. gpio_set_value(TX28_FEC_PHY_POWER, 1);
  304. msleep(26); /* 25ms according to data sheet */
  305. /* Mode strap pins */
  306. gpio_set_value(ENET0_RX_EN__GPIO_4_2, 1);
  307. gpio_set_value(ENET0_RXD0__GPIO_4_3, 1);
  308. gpio_set_value(ENET0_RXD1__GPIO_4_4, 1);
  309. udelay(100); /* minimum assertion time for nRST */
  310. /* Deasserting FEC PHY RESET */
  311. gpio_set_value(TX28_FEC_PHY_RESET, 1);
  312. pinctrl_put(pctl);
  313. }
  314. static void __init cfa10049_init(void)
  315. {
  316. enable_clk_enet_out();
  317. update_fec_mac_prop(OUI_CRYSTALFONTZ);
  318. }
  319. static void __init apf28_init(void)
  320. {
  321. enable_clk_enet_out();
  322. }
  323. static void __init mxs_machine_init(void)
  324. {
  325. if (of_machine_is_compatible("fsl,imx28-evk"))
  326. imx28_evk_init();
  327. else if (of_machine_is_compatible("fsl,imx23-evk"))
  328. imx23_evk_init();
  329. else if (of_machine_is_compatible("denx,m28evk"))
  330. m28evk_init();
  331. else if (of_machine_is_compatible("bluegiga,apx4devkit"))
  332. apx4devkit_init();
  333. else if (of_machine_is_compatible("crystalfontz,cfa10049"))
  334. cfa10049_init();
  335. else if (of_machine_is_compatible("armadeus,imx28-apf28"))
  336. apf28_init();
  337. of_platform_populate(NULL, of_default_bus_match_table,
  338. mxs_auxdata_lookup, NULL);
  339. if (of_machine_is_compatible("karo,tx28"))
  340. tx28_post_init();
  341. if (of_machine_is_compatible("fsl,imx28-evk"))
  342. imx28_evk_post_init();
  343. }
  344. static const char *imx23_dt_compat[] __initdata = {
  345. "fsl,imx23",
  346. NULL,
  347. };
  348. static const char *imx28_dt_compat[] __initdata = {
  349. "fsl,imx28",
  350. NULL,
  351. };
  352. DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)")
  353. .map_io = mx23_map_io,
  354. .init_irq = icoll_init_irq,
  355. .handle_irq = icoll_handle_irq,
  356. .timer = &imx23_timer,
  357. .init_machine = mxs_machine_init,
  358. .dt_compat = imx23_dt_compat,
  359. .restart = mxs_restart,
  360. MACHINE_END
  361. DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)")
  362. .map_io = mx28_map_io,
  363. .init_irq = icoll_init_irq,
  364. .handle_irq = icoll_handle_irq,
  365. .timer = &imx28_timer,
  366. .init_machine = mxs_machine_init,
  367. .dt_compat = imx28_dt_compat,
  368. .restart = mxs_restart,
  369. MACHINE_END