mwl8k.c 90 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785
  1. /*
  2. * drivers/net/wireless/mwl8k.c driver for Marvell TOPDOG 802.11 Wireless cards
  3. *
  4. * Copyright (C) 2008 Marvell Semiconductor Inc.
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/list.h>
  15. #include <linux/pci.h>
  16. #include <linux/delay.h>
  17. #include <linux/completion.h>
  18. #include <linux/etherdevice.h>
  19. #include <net/mac80211.h>
  20. #include <linux/moduleparam.h>
  21. #include <linux/firmware.h>
  22. #include <linux/workqueue.h>
  23. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  24. #define MWL8K_NAME KBUILD_MODNAME
  25. #define MWL8K_VERSION "0.9.1"
  26. MODULE_DESCRIPTION(MWL8K_DESC);
  27. MODULE_VERSION(MWL8K_VERSION);
  28. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  29. MODULE_LICENSE("GPL");
  30. static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
  31. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
  32. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
  33. { }
  34. };
  35. MODULE_DEVICE_TABLE(pci, mwl8k_table);
  36. #define IEEE80211_ADDR_LEN ETH_ALEN
  37. /* Register definitions */
  38. #define MWL8K_HIU_GEN_PTR 0x00000c10
  39. #define MWL8K_MODE_STA 0x0000005a
  40. #define MWL8K_MODE_AP 0x000000a5
  41. #define MWL8K_HIU_INT_CODE 0x00000c14
  42. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  43. #define MWL8K_FWAP_READY 0xf1f2f4a5
  44. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  45. #define MWL8K_HIU_SCRATCH 0x00000c40
  46. /* Host->device communications */
  47. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  48. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  49. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  50. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  51. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  52. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  53. #define MWL8K_H2A_INT_RESET (1 << 15)
  54. #define MWL8K_H2A_INT_PS (1 << 2)
  55. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  56. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  57. /* Device->host communications */
  58. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  59. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  60. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  61. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  62. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  63. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  64. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  65. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  66. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  67. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  68. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  69. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  70. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  71. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  72. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  73. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  74. MWL8K_A2H_INT_CHNL_SWITCHED | \
  75. MWL8K_A2H_INT_QUEUE_EMPTY | \
  76. MWL8K_A2H_INT_RADAR_DETECT | \
  77. MWL8K_A2H_INT_RADIO_ON | \
  78. MWL8K_A2H_INT_RADIO_OFF | \
  79. MWL8K_A2H_INT_MAC_EVENT | \
  80. MWL8K_A2H_INT_OPC_DONE | \
  81. MWL8K_A2H_INT_RX_READY | \
  82. MWL8K_A2H_INT_TX_DONE)
  83. /* WME stream classes */
  84. #define WME_AC_BE 0 /* best effort */
  85. #define WME_AC_BK 1 /* background */
  86. #define WME_AC_VI 2 /* video */
  87. #define WME_AC_VO 3 /* voice */
  88. #define MWL8K_RX_QUEUES 1
  89. #define MWL8K_TX_QUEUES 4
  90. struct mwl8k_rx_queue {
  91. int rx_desc_count;
  92. /* hw receives here */
  93. int rx_head;
  94. /* refill descs here */
  95. int rx_tail;
  96. struct mwl8k_rx_desc *rx_desc_area;
  97. dma_addr_t rx_desc_dma;
  98. struct sk_buff **rx_skb;
  99. };
  100. struct mwl8k_skb {
  101. /*
  102. * The DMA engine requires a modification to the payload.
  103. * If the skbuff is shared/cloned, it needs to be unshared.
  104. * This method is used to ensure the stack always gets back
  105. * the skbuff it sent for transmission.
  106. */
  107. struct sk_buff *clone;
  108. struct sk_buff *skb;
  109. };
  110. struct mwl8k_tx_queue {
  111. /* hw transmits here */
  112. int tx_head;
  113. /* sw appends here */
  114. int tx_tail;
  115. struct ieee80211_tx_queue_stats tx_stats;
  116. struct mwl8k_tx_desc *tx_desc_area;
  117. dma_addr_t tx_desc_dma;
  118. struct mwl8k_skb *tx_skb;
  119. };
  120. /* Pointers to the firmware data and meta information about it. */
  121. struct mwl8k_firmware {
  122. /* Microcode */
  123. struct firmware *ucode;
  124. /* Boot helper code */
  125. struct firmware *helper;
  126. };
  127. struct mwl8k_priv {
  128. void __iomem *regs;
  129. struct ieee80211_hw *hw;
  130. struct pci_dev *pdev;
  131. u8 name[16];
  132. /* firmware access lock */
  133. spinlock_t fw_lock;
  134. /* firmware files and meta data */
  135. struct mwl8k_firmware fw;
  136. u32 part_num;
  137. /* lock held over TX and TX reap */
  138. spinlock_t tx_lock;
  139. u32 int_mask;
  140. struct ieee80211_vif *vif;
  141. struct list_head vif_list;
  142. struct ieee80211_channel *current_channel;
  143. /* power management status cookie from firmware */
  144. u32 *cookie;
  145. dma_addr_t cookie_dma;
  146. u16 num_mcaddrs;
  147. u16 region_code;
  148. u8 hw_rev;
  149. __le32 fw_rev;
  150. u32 wep_enabled;
  151. /*
  152. * Running count of TX packets in flight, to avoid
  153. * iterating over the transmit rings each time.
  154. */
  155. int pending_tx_pkts;
  156. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  157. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  158. /* PHY parameters */
  159. struct ieee80211_supported_band band;
  160. struct ieee80211_channel channels[14];
  161. struct ieee80211_rate rates[12];
  162. /* RF preamble: Short, Long or Auto */
  163. u8 radio_preamble;
  164. u8 radio_state;
  165. /* WMM MODE 1 for enabled; 0 for disabled */
  166. bool wmm_mode;
  167. /* Set if PHY config is in progress */
  168. bool inconfig;
  169. /* XXX need to convert this to handle multiple interfaces */
  170. bool capture_beacon;
  171. u8 capture_bssid[IEEE80211_ADDR_LEN];
  172. struct sk_buff *beacon_skb;
  173. /*
  174. * This FJ worker has to be global as it is scheduled from the
  175. * RX handler. At this point we don't know which interface it
  176. * belongs to until the list of bssids waiting to complete join
  177. * is checked.
  178. */
  179. struct work_struct finalize_join_worker;
  180. /* Tasklet to reclaim TX descriptors and buffers after tx */
  181. struct tasklet_struct tx_reclaim_task;
  182. /* Work thread to serialize configuration requests */
  183. struct workqueue_struct *config_wq;
  184. struct completion *hostcmd_wait;
  185. struct completion *tx_wait;
  186. };
  187. /* Per interface specific private data */
  188. struct mwl8k_vif {
  189. struct list_head node;
  190. /* backpointer to parent config block */
  191. struct mwl8k_priv *priv;
  192. /* BSS config of AP or IBSS from mac80211*/
  193. struct ieee80211_bss_conf bss_info;
  194. /* BSSID of AP or IBSS */
  195. u8 bssid[IEEE80211_ADDR_LEN];
  196. u8 mac_addr[IEEE80211_ADDR_LEN];
  197. /*
  198. * Subset of supported legacy rates.
  199. * Intersection of AP and STA supported rates.
  200. */
  201. struct ieee80211_rate legacy_rates[12];
  202. /* number of supported legacy rates */
  203. u8 legacy_nrates;
  204. /* Number of supported MCS rates. Work in progress */
  205. u8 mcs_nrates;
  206. /* Index into station database.Returned by update_sta_db call */
  207. u8 peer_id;
  208. /* Non AMPDU sequence number assigned by driver */
  209. u16 seqno;
  210. /* Note:There is no channel info,
  211. * refer to the master channel info in priv
  212. */
  213. };
  214. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  215. static const struct ieee80211_channel mwl8k_channels[] = {
  216. { .center_freq = 2412, .hw_value = 1, },
  217. { .center_freq = 2417, .hw_value = 2, },
  218. { .center_freq = 2422, .hw_value = 3, },
  219. { .center_freq = 2427, .hw_value = 4, },
  220. { .center_freq = 2432, .hw_value = 5, },
  221. { .center_freq = 2437, .hw_value = 6, },
  222. { .center_freq = 2442, .hw_value = 7, },
  223. { .center_freq = 2447, .hw_value = 8, },
  224. { .center_freq = 2452, .hw_value = 9, },
  225. { .center_freq = 2457, .hw_value = 10, },
  226. { .center_freq = 2462, .hw_value = 11, },
  227. };
  228. static const struct ieee80211_rate mwl8k_rates[] = {
  229. { .bitrate = 10, .hw_value = 2, },
  230. { .bitrate = 20, .hw_value = 4, },
  231. { .bitrate = 55, .hw_value = 11, },
  232. { .bitrate = 60, .hw_value = 12, },
  233. { .bitrate = 90, .hw_value = 18, },
  234. { .bitrate = 110, .hw_value = 22, },
  235. { .bitrate = 120, .hw_value = 24, },
  236. { .bitrate = 180, .hw_value = 36, },
  237. { .bitrate = 240, .hw_value = 48, },
  238. { .bitrate = 360, .hw_value = 72, },
  239. { .bitrate = 480, .hw_value = 96, },
  240. { .bitrate = 540, .hw_value = 108, },
  241. };
  242. /* Radio settings */
  243. #define MWL8K_RADIO_FORCE 0x2
  244. #define MWL8K_RADIO_ENABLE 0x1
  245. #define MWL8K_RADIO_DISABLE 0x0
  246. #define MWL8K_RADIO_AUTO_PREAMBLE 0x0005
  247. #define MWL8K_RADIO_SHORT_PREAMBLE 0x0003
  248. #define MWL8K_RADIO_LONG_PREAMBLE 0x0001
  249. /* WMM */
  250. #define MWL8K_WMM_ENABLE 1
  251. #define MWL8K_WMM_DISABLE 0
  252. #define MWL8K_RADIO_DEFAULT_PREAMBLE MWL8K_RADIO_LONG_PREAMBLE
  253. /* Slot time */
  254. /* Short Slot: 9us slot time */
  255. #define MWL8K_SHORT_SLOTTIME 1
  256. /* Long slot: 20us slot time */
  257. #define MWL8K_LONG_SLOTTIME 0
  258. /* Set or get info from Firmware */
  259. #define MWL8K_CMD_SET 0x0001
  260. #define MWL8K_CMD_GET 0x0000
  261. /* Firmware command codes */
  262. #define MWL8K_CMD_CODE_DNLD 0x0001
  263. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  264. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  265. #define MWL8K_CMD_GET_STAT 0x0014
  266. #define MWL8K_CMD_RADIO_CONTROL 0x001C
  267. #define MWL8K_CMD_RF_TX_POWER 0x001E
  268. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  269. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  270. #define MWL8K_CMD_SET_RF_CHANNEL 0x010A
  271. #define MWL8K_CMD_SET_SLOT 0x0114
  272. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  273. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  274. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  275. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  276. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  277. #define MWL8K_CMD_UPDATE_STADB 0x1123
  278. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  279. #define MWL8K_CMD_SET_LINKADAPT_MODE 0x0129
  280. #define MWL8K_CMD_SET_AID 0x010d
  281. #define MWL8K_CMD_SET_RATE 0x0110
  282. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  283. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  284. #define MWL8K_CMD_ENCRYPTION 0x1122
  285. static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
  286. {
  287. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  288. snprintf(buf, bufsize, "%s", #x);\
  289. return buf;\
  290. } while (0)
  291. switch (cmd & (~0x8000)) {
  292. MWL8K_CMDNAME(CODE_DNLD);
  293. MWL8K_CMDNAME(GET_HW_SPEC);
  294. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  295. MWL8K_CMDNAME(GET_STAT);
  296. MWL8K_CMDNAME(RADIO_CONTROL);
  297. MWL8K_CMDNAME(RF_TX_POWER);
  298. MWL8K_CMDNAME(SET_PRE_SCAN);
  299. MWL8K_CMDNAME(SET_POST_SCAN);
  300. MWL8K_CMDNAME(SET_RF_CHANNEL);
  301. MWL8K_CMDNAME(SET_SLOT);
  302. MWL8K_CMDNAME(MIMO_CONFIG);
  303. MWL8K_CMDNAME(ENABLE_SNIFFER);
  304. MWL8K_CMDNAME(SET_WMM_MODE);
  305. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  306. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  307. MWL8K_CMDNAME(UPDATE_STADB);
  308. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  309. MWL8K_CMDNAME(SET_LINKADAPT_MODE);
  310. MWL8K_CMDNAME(SET_AID);
  311. MWL8K_CMDNAME(SET_RATE);
  312. MWL8K_CMDNAME(USE_FIXED_RATE);
  313. MWL8K_CMDNAME(RTS_THRESHOLD);
  314. MWL8K_CMDNAME(ENCRYPTION);
  315. default:
  316. snprintf(buf, bufsize, "0x%x", cmd);
  317. }
  318. #undef MWL8K_CMDNAME
  319. return buf;
  320. }
  321. /* Hardware and firmware reset */
  322. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  323. {
  324. iowrite32(MWL8K_H2A_INT_RESET,
  325. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  326. iowrite32(MWL8K_H2A_INT_RESET,
  327. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  328. msleep(20);
  329. }
  330. /* Release fw image */
  331. static void mwl8k_release_fw(struct firmware **fw)
  332. {
  333. if (*fw == NULL)
  334. return;
  335. release_firmware(*fw);
  336. *fw = NULL;
  337. }
  338. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  339. {
  340. mwl8k_release_fw(&priv->fw.ucode);
  341. mwl8k_release_fw(&priv->fw.helper);
  342. }
  343. /* Request fw image */
  344. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  345. const char *fname, struct firmware **fw)
  346. {
  347. /* release current image */
  348. if (*fw != NULL)
  349. mwl8k_release_fw(fw);
  350. return request_firmware((const struct firmware **)fw,
  351. fname, &priv->pdev->dev);
  352. }
  353. static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
  354. {
  355. u8 filename[64];
  356. int rc;
  357. priv->part_num = part_num;
  358. snprintf(filename, sizeof(filename),
  359. "mwl8k/helper_%u.fw", priv->part_num);
  360. rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
  361. if (rc) {
  362. printk(KERN_ERR
  363. "%s Error requesting helper firmware file %s\n",
  364. pci_name(priv->pdev), filename);
  365. return rc;
  366. }
  367. snprintf(filename, sizeof(filename),
  368. "mwl8k/fmimage_%u.fw", priv->part_num);
  369. rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
  370. if (rc) {
  371. printk(KERN_ERR "%s Error requesting firmware file %s\n",
  372. pci_name(priv->pdev), filename);
  373. mwl8k_release_fw(&priv->fw.helper);
  374. return rc;
  375. }
  376. return 0;
  377. }
  378. struct mwl8k_cmd_pkt {
  379. __le16 code;
  380. __le16 length;
  381. __le16 seq_num;
  382. __le16 result;
  383. char payload[0];
  384. } __attribute__((packed));
  385. /*
  386. * Firmware loading.
  387. */
  388. static int
  389. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  390. {
  391. void __iomem *regs = priv->regs;
  392. dma_addr_t dma_addr;
  393. int rc;
  394. int loops;
  395. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  396. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  397. return -ENOMEM;
  398. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  399. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  400. iowrite32(MWL8K_H2A_INT_DOORBELL,
  401. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  402. iowrite32(MWL8K_H2A_INT_DUMMY,
  403. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  404. rc = -ETIMEDOUT;
  405. loops = 1000;
  406. do {
  407. u32 int_code;
  408. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  409. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  410. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  411. rc = 0;
  412. break;
  413. }
  414. udelay(1);
  415. } while (--loops);
  416. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  417. /*
  418. * Clear 'command done' interrupt bit.
  419. */
  420. loops = 1000;
  421. do {
  422. u32 status;
  423. status = ioread32(priv->regs +
  424. MWL8K_HIU_A2H_INTERRUPT_STATUS);
  425. if (status & MWL8K_A2H_INT_OPC_DONE) {
  426. iowrite32(~MWL8K_A2H_INT_OPC_DONE,
  427. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  428. ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  429. break;
  430. }
  431. udelay(1);
  432. } while (--loops);
  433. return rc;
  434. }
  435. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  436. const u8 *data, size_t length)
  437. {
  438. struct mwl8k_cmd_pkt *cmd;
  439. int done;
  440. int rc = 0;
  441. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  442. if (cmd == NULL)
  443. return -ENOMEM;
  444. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  445. cmd->seq_num = 0;
  446. cmd->result = 0;
  447. done = 0;
  448. while (length) {
  449. int block_size = length > 256 ? 256 : length;
  450. memcpy(cmd->payload, data + done, block_size);
  451. cmd->length = cpu_to_le16(block_size);
  452. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  453. sizeof(*cmd) + block_size);
  454. if (rc)
  455. break;
  456. done += block_size;
  457. length -= block_size;
  458. }
  459. if (!rc) {
  460. cmd->length = 0;
  461. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  462. }
  463. kfree(cmd);
  464. return rc;
  465. }
  466. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  467. const u8 *data, size_t length)
  468. {
  469. unsigned char *buffer;
  470. int may_continue, rc = 0;
  471. u32 done, prev_block_size;
  472. buffer = kmalloc(1024, GFP_KERNEL);
  473. if (buffer == NULL)
  474. return -ENOMEM;
  475. done = 0;
  476. prev_block_size = 0;
  477. may_continue = 1000;
  478. while (may_continue > 0) {
  479. u32 block_size;
  480. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  481. if (block_size & 1) {
  482. block_size &= ~1;
  483. may_continue--;
  484. } else {
  485. done += prev_block_size;
  486. length -= prev_block_size;
  487. }
  488. if (block_size > 1024 || block_size > length) {
  489. rc = -EOVERFLOW;
  490. break;
  491. }
  492. if (length == 0) {
  493. rc = 0;
  494. break;
  495. }
  496. if (block_size == 0) {
  497. rc = -EPROTO;
  498. may_continue--;
  499. udelay(1);
  500. continue;
  501. }
  502. prev_block_size = block_size;
  503. memcpy(buffer, data + done, block_size);
  504. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  505. if (rc)
  506. break;
  507. }
  508. if (!rc && length != 0)
  509. rc = -EREMOTEIO;
  510. kfree(buffer);
  511. return rc;
  512. }
  513. static int mwl8k_load_firmware(struct mwl8k_priv *priv)
  514. {
  515. int loops, rc;
  516. const u8 *ucode = priv->fw.ucode->data;
  517. size_t ucode_len = priv->fw.ucode->size;
  518. const u8 *helper = priv->fw.helper->data;
  519. size_t helper_len = priv->fw.helper->size;
  520. if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
  521. rc = mwl8k_load_fw_image(priv, helper, helper_len);
  522. if (rc) {
  523. printk(KERN_ERR "%s: unable to load firmware "
  524. "helper image\n", pci_name(priv->pdev));
  525. return rc;
  526. }
  527. msleep(1);
  528. rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
  529. } else {
  530. rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
  531. }
  532. if (rc) {
  533. printk(KERN_ERR "%s: unable to load firmware data\n",
  534. pci_name(priv->pdev));
  535. return rc;
  536. }
  537. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  538. msleep(1);
  539. loops = 200000;
  540. do {
  541. if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
  542. == MWL8K_FWSTA_READY)
  543. break;
  544. udelay(1);
  545. } while (--loops);
  546. return loops ? 0 : -ETIMEDOUT;
  547. }
  548. /*
  549. * Defines shared between transmission and reception.
  550. */
  551. /* HT control fields for firmware */
  552. struct ewc_ht_info {
  553. __le16 control1;
  554. __le16 control2;
  555. __le16 control3;
  556. } __attribute__((packed));
  557. /* Firmware Station database operations */
  558. #define MWL8K_STA_DB_ADD_ENTRY 0
  559. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  560. #define MWL8K_STA_DB_DEL_ENTRY 2
  561. #define MWL8K_STA_DB_FLUSH 3
  562. /* Peer Entry flags - used to define the type of the peer node */
  563. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  564. #define MWL8K_PEER_TYPE_ADHOC_STATION 4
  565. #define MWL8K_IEEE_LEGACY_DATA_RATES 12
  566. #define MWL8K_MCS_BITMAP_SIZE 16
  567. #define pad_size 16
  568. struct peer_capability_info {
  569. /* Peer type - AP vs. STA. */
  570. __u8 peer_type;
  571. /* Basic 802.11 capabilities from assoc resp. */
  572. __le16 basic_caps;
  573. /* Set if peer supports 802.11n high throughput (HT). */
  574. __u8 ht_support;
  575. /* Valid if HT is supported. */
  576. __le16 ht_caps;
  577. __u8 extended_ht_caps;
  578. struct ewc_ht_info ewc_info;
  579. /* Legacy rate table. Intersection of our rates and peer rates. */
  580. __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
  581. /* HT rate table. Intersection of our rates and peer rates. */
  582. __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
  583. __u8 pad[pad_size];
  584. /* If set, interoperability mode, no proprietary extensions. */
  585. __u8 interop;
  586. __u8 pad2;
  587. __u8 station_id;
  588. __le16 amsdu_enabled;
  589. } __attribute__((packed));
  590. /* Inline functions to manipulate QoS field in data descriptor. */
  591. static inline u16 mwl8k_qos_setbit_tid(u16 qos, u8 tid)
  592. {
  593. u16 val_mask = 0x000f;
  594. u16 qos_mask = ~val_mask;
  595. /* TID bits 0-3 */
  596. return (qos & qos_mask) | (tid & val_mask);
  597. }
  598. static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
  599. {
  600. u16 val_mask = 1 << 4;
  601. /* End of Service Period Bit 4 */
  602. return qos | val_mask;
  603. }
  604. static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
  605. {
  606. u16 val_mask = 0x3;
  607. u8 shift = 5;
  608. u16 qos_mask = ~(val_mask << shift);
  609. /* Ack Policy Bit 5-6 */
  610. return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
  611. }
  612. static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
  613. {
  614. u16 val_mask = 1 << 7;
  615. /* AMSDU present Bit 7 */
  616. return qos | val_mask;
  617. }
  618. static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
  619. {
  620. u16 val_mask = 0xff;
  621. u8 shift = 8;
  622. u16 qos_mask = ~(val_mask << shift);
  623. /* Queue Length Bits 8-15 */
  624. return (qos & qos_mask) | ((len & val_mask) << shift);
  625. }
  626. /* DMA header used by firmware and hardware. */
  627. struct mwl8k_dma_data {
  628. __le16 fwlen;
  629. struct ieee80211_hdr wh;
  630. } __attribute__((packed));
  631. /* Routines to add/remove DMA header from skb. */
  632. static inline int mwl8k_remove_dma_header(struct sk_buff *skb)
  633. {
  634. struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)(skb->data);
  635. void *dst, *src = &tr->wh;
  636. __le16 fc = tr->wh.frame_control;
  637. int hdrlen = ieee80211_hdrlen(fc);
  638. u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
  639. dst = (void *)tr + space;
  640. if (dst != src) {
  641. memmove(dst, src, hdrlen);
  642. skb_pull(skb, space);
  643. }
  644. return 0;
  645. }
  646. static inline struct sk_buff *mwl8k_add_dma_header(struct sk_buff *skb)
  647. {
  648. struct ieee80211_hdr *wh;
  649. u32 hdrlen, pktlen;
  650. struct mwl8k_dma_data *tr;
  651. wh = (struct ieee80211_hdr *)skb->data;
  652. hdrlen = ieee80211_hdrlen(wh->frame_control);
  653. pktlen = skb->len;
  654. /*
  655. * Copy up/down the 802.11 header; the firmware requires
  656. * we present a 2-byte payload length followed by a
  657. * 4-address header (w/o QoS), followed (optionally) by
  658. * any WEP/ExtIV header (but only filled in for CCMP).
  659. */
  660. if (hdrlen != sizeof(struct mwl8k_dma_data))
  661. skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
  662. tr = (struct mwl8k_dma_data *)skb->data;
  663. if (wh != &tr->wh)
  664. memmove(&tr->wh, wh, hdrlen);
  665. /* Clear addr4 */
  666. memset(tr->wh.addr4, 0, IEEE80211_ADDR_LEN);
  667. /*
  668. * Firmware length is the length of the fully formed "802.11
  669. * payload". That is, everything except for the 802.11 header.
  670. * This includes all crypto material including the MIC.
  671. */
  672. tr->fwlen = cpu_to_le16(pktlen - hdrlen);
  673. return skb;
  674. }
  675. /*
  676. * Packet reception.
  677. */
  678. #define MWL8K_RX_CTRL_KEY_INDEX_MASK 0x30
  679. #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
  680. #define MWL8K_RX_CTRL_AMPDU 0x01
  681. struct mwl8k_rx_desc {
  682. __le16 pkt_len;
  683. __u8 link_quality;
  684. __u8 noise_level;
  685. __le32 pkt_phys_addr;
  686. __le32 next_rx_desc_phys_addr;
  687. __le16 qos_control;
  688. __le16 rate_info;
  689. __le32 pad0[4];
  690. __u8 rssi;
  691. __u8 channel;
  692. __le16 pad1;
  693. __u8 rx_ctrl;
  694. __u8 rx_status;
  695. __u8 pad2[2];
  696. } __attribute__((packed));
  697. #define MWL8K_RX_DESCS 256
  698. #define MWL8K_RX_MAXSZ 3800
  699. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  700. {
  701. struct mwl8k_priv *priv = hw->priv;
  702. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  703. int size;
  704. int i;
  705. rxq->rx_desc_count = 0;
  706. rxq->rx_head = 0;
  707. rxq->rx_tail = 0;
  708. size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
  709. rxq->rx_desc_area =
  710. pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
  711. if (rxq->rx_desc_area == NULL) {
  712. printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
  713. priv->name);
  714. return -ENOMEM;
  715. }
  716. memset(rxq->rx_desc_area, 0, size);
  717. rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
  718. sizeof(*rxq->rx_skb), GFP_KERNEL);
  719. if (rxq->rx_skb == NULL) {
  720. printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
  721. priv->name);
  722. pci_free_consistent(priv->pdev, size,
  723. rxq->rx_desc_area, rxq->rx_desc_dma);
  724. return -ENOMEM;
  725. }
  726. memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
  727. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  728. struct mwl8k_rx_desc *rx_desc;
  729. int nexti;
  730. rx_desc = rxq->rx_desc_area + i;
  731. nexti = (i + 1) % MWL8K_RX_DESCS;
  732. rx_desc->next_rx_desc_phys_addr =
  733. cpu_to_le32(rxq->rx_desc_dma
  734. + nexti * sizeof(*rx_desc));
  735. rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
  736. }
  737. return 0;
  738. }
  739. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  740. {
  741. struct mwl8k_priv *priv = hw->priv;
  742. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  743. int refilled;
  744. refilled = 0;
  745. while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
  746. struct sk_buff *skb;
  747. int rx;
  748. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  749. if (skb == NULL)
  750. break;
  751. rxq->rx_desc_count++;
  752. rx = rxq->rx_tail;
  753. rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
  754. rxq->rx_desc_area[rx].pkt_phys_addr =
  755. cpu_to_le32(pci_map_single(priv->pdev, skb->data,
  756. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
  757. rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
  758. rxq->rx_skb[rx] = skb;
  759. wmb();
  760. rxq->rx_desc_area[rx].rx_ctrl = 0;
  761. refilled++;
  762. }
  763. return refilled;
  764. }
  765. /* Must be called only when the card's reception is completely halted */
  766. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  767. {
  768. struct mwl8k_priv *priv = hw->priv;
  769. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  770. int i;
  771. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  772. if (rxq->rx_skb[i] != NULL) {
  773. unsigned long addr;
  774. addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
  775. pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
  776. PCI_DMA_FROMDEVICE);
  777. kfree_skb(rxq->rx_skb[i]);
  778. rxq->rx_skb[i] = NULL;
  779. }
  780. }
  781. kfree(rxq->rx_skb);
  782. rxq->rx_skb = NULL;
  783. pci_free_consistent(priv->pdev,
  784. MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
  785. rxq->rx_desc_area, rxq->rx_desc_dma);
  786. rxq->rx_desc_area = NULL;
  787. }
  788. /*
  789. * Scan a list of BSSIDs to process for finalize join.
  790. * Allows for extension to process multiple BSSIDs.
  791. */
  792. static inline int
  793. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  794. {
  795. return priv->capture_beacon &&
  796. ieee80211_is_beacon(wh->frame_control) &&
  797. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  798. }
  799. static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
  800. struct sk_buff *skb)
  801. {
  802. priv->capture_beacon = false;
  803. memset(priv->capture_bssid, 0, IEEE80211_ADDR_LEN);
  804. /*
  805. * Use GFP_ATOMIC as rxq_process is called from
  806. * the primary interrupt handler, memory allocation call
  807. * must not sleep.
  808. */
  809. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  810. if (priv->beacon_skb != NULL)
  811. queue_work(priv->config_wq,
  812. &priv->finalize_join_worker);
  813. }
  814. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  815. {
  816. struct mwl8k_priv *priv = hw->priv;
  817. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  818. int processed;
  819. processed = 0;
  820. while (rxq->rx_desc_count && limit--) {
  821. struct mwl8k_rx_desc *rx_desc;
  822. struct sk_buff *skb;
  823. struct ieee80211_rx_status status;
  824. unsigned long addr;
  825. struct ieee80211_hdr *wh;
  826. rx_desc = rxq->rx_desc_area + rxq->rx_head;
  827. if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
  828. break;
  829. rmb();
  830. skb = rxq->rx_skb[rxq->rx_head];
  831. if (skb == NULL)
  832. break;
  833. rxq->rx_skb[rxq->rx_head] = NULL;
  834. rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
  835. rxq->rx_desc_count--;
  836. addr = le32_to_cpu(rx_desc->pkt_phys_addr);
  837. pci_unmap_single(priv->pdev, addr,
  838. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  839. skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
  840. if (mwl8k_remove_dma_header(skb)) {
  841. dev_kfree_skb(skb);
  842. continue;
  843. }
  844. wh = (struct ieee80211_hdr *)skb->data;
  845. /*
  846. * Check for pending join operation. save a copy of
  847. * the beacon and schedule a tasklet to send finalize
  848. * join command to the firmware.
  849. */
  850. if (mwl8k_capture_bssid(priv, wh))
  851. mwl8k_save_beacon(priv, skb);
  852. memset(&status, 0, sizeof(status));
  853. status.mactime = 0;
  854. status.signal = -rx_desc->rssi;
  855. status.noise = -rx_desc->noise_level;
  856. status.qual = rx_desc->link_quality;
  857. status.antenna = 1;
  858. status.rate_idx = 1;
  859. status.flag = 0;
  860. status.band = IEEE80211_BAND_2GHZ;
  861. status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
  862. ieee80211_rx_irqsafe(hw, skb, &status);
  863. processed++;
  864. }
  865. return processed;
  866. }
  867. /*
  868. * Packet transmission.
  869. */
  870. /* Transmit queue assignment. */
  871. enum {
  872. MWL8K_WME_AC_BK = 0, /* background access */
  873. MWL8K_WME_AC_BE = 1, /* best effort access */
  874. MWL8K_WME_AC_VI = 2, /* video access */
  875. MWL8K_WME_AC_VO = 3, /* voice access */
  876. };
  877. /* Transmit packet ACK policy */
  878. #define MWL8K_TXD_ACK_POLICY_NORMAL 0
  879. #define MWL8K_TXD_ACK_POLICY_NONE 1
  880. #define MWL8K_TXD_ACK_POLICY_NO_EXPLICIT 2
  881. #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
  882. #define GET_TXQ(_ac) (\
  883. ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
  884. ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
  885. ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
  886. MWL8K_WME_AC_BE)
  887. #define MWL8K_TXD_STATUS_IDLE 0x00000000
  888. #define MWL8K_TXD_STATUS_USED 0x00000001
  889. #define MWL8K_TXD_STATUS_OK 0x00000001
  890. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  891. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  892. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  893. #define MWL8K_TXD_STATUS_BROADCAST_TX 0x00000010
  894. #define MWL8K_TXD_STATUS_FAILED_LINK_ERROR 0x00000020
  895. #define MWL8K_TXD_STATUS_FAILED_EXCEED_LIMIT 0x00000040
  896. #define MWL8K_TXD_STATUS_FAILED_AGING 0x00000080
  897. #define MWL8K_TXD_STATUS_HOST_CMD 0x40000000
  898. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  899. #define MWL8K_TXD_SOFTSTALE 0x80
  900. #define MWL8K_TXD_SOFTSTALE_MGMT_RETRY 0x01
  901. struct mwl8k_tx_desc {
  902. __le32 status;
  903. __u8 data_rate;
  904. __u8 tx_priority;
  905. __le16 qos_control;
  906. __le32 pkt_phys_addr;
  907. __le16 pkt_len;
  908. __u8 dest_MAC_addr[IEEE80211_ADDR_LEN];
  909. __le32 next_tx_desc_phys_addr;
  910. __le32 reserved;
  911. __le16 rate_info;
  912. __u8 peer_id;
  913. __u8 tx_frag_cnt;
  914. } __attribute__((packed));
  915. #define MWL8K_TX_DESCS 128
  916. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  917. {
  918. struct mwl8k_priv *priv = hw->priv;
  919. struct mwl8k_tx_queue *txq = priv->txq + index;
  920. int size;
  921. int i;
  922. memset(&txq->tx_stats, 0,
  923. sizeof(struct ieee80211_tx_queue_stats));
  924. txq->tx_stats.limit = MWL8K_TX_DESCS;
  925. txq->tx_head = 0;
  926. txq->tx_tail = 0;
  927. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  928. txq->tx_desc_area =
  929. pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
  930. if (txq->tx_desc_area == NULL) {
  931. printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
  932. priv->name);
  933. return -ENOMEM;
  934. }
  935. memset(txq->tx_desc_area, 0, size);
  936. txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
  937. GFP_KERNEL);
  938. if (txq->tx_skb == NULL) {
  939. printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
  940. priv->name);
  941. pci_free_consistent(priv->pdev, size,
  942. txq->tx_desc_area, txq->tx_desc_dma);
  943. return -ENOMEM;
  944. }
  945. memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
  946. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  947. struct mwl8k_tx_desc *tx_desc;
  948. int nexti;
  949. tx_desc = txq->tx_desc_area + i;
  950. nexti = (i + 1) % MWL8K_TX_DESCS;
  951. tx_desc->status = 0;
  952. tx_desc->next_tx_desc_phys_addr =
  953. cpu_to_le32(txq->tx_desc_dma +
  954. nexti * sizeof(*tx_desc));
  955. }
  956. return 0;
  957. }
  958. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  959. {
  960. iowrite32(MWL8K_H2A_INT_PPA_READY,
  961. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  962. iowrite32(MWL8K_H2A_INT_DUMMY,
  963. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  964. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  965. }
  966. static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
  967. {
  968. return priv->pending_tx_pkts;
  969. }
  970. struct mwl8k_txq_info {
  971. u32 fw_owned;
  972. u32 drv_owned;
  973. u32 unused;
  974. u32 len;
  975. u32 head;
  976. u32 tail;
  977. };
  978. static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
  979. struct mwl8k_txq_info txinfo[],
  980. u32 num_queues)
  981. {
  982. int count, desc, status;
  983. struct mwl8k_tx_queue *txq;
  984. struct mwl8k_tx_desc *tx_desc;
  985. int ndescs = 0;
  986. memset(txinfo, 0, num_queues * sizeof(struct mwl8k_txq_info));
  987. spin_lock_bh(&priv->tx_lock);
  988. for (count = 0; count < num_queues; count++) {
  989. txq = priv->txq + count;
  990. txinfo[count].len = txq->tx_stats.len;
  991. txinfo[count].head = txq->tx_head;
  992. txinfo[count].tail = txq->tx_tail;
  993. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  994. tx_desc = txq->tx_desc_area + desc;
  995. status = le32_to_cpu(tx_desc->status);
  996. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  997. txinfo[count].fw_owned++;
  998. else
  999. txinfo[count].drv_owned++;
  1000. if (tx_desc->pkt_len == 0)
  1001. txinfo[count].unused++;
  1002. }
  1003. }
  1004. spin_unlock_bh(&priv->tx_lock);
  1005. return ndescs;
  1006. }
  1007. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms)
  1008. {
  1009. u32 count = 0;
  1010. unsigned long timeout = 0;
  1011. struct mwl8k_priv *priv = hw->priv;
  1012. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1013. might_sleep();
  1014. if (priv->tx_wait != NULL)
  1015. printk(KERN_ERR "WARNING Previous TXWaitEmpty instance\n");
  1016. spin_lock_bh(&priv->tx_lock);
  1017. count = mwl8k_txq_busy(priv);
  1018. if (count) {
  1019. priv->tx_wait = &cmd_wait;
  1020. if (priv->radio_state)
  1021. mwl8k_tx_start(priv);
  1022. }
  1023. spin_unlock_bh(&priv->tx_lock);
  1024. if (count) {
  1025. struct mwl8k_txq_info txinfo[4];
  1026. int index;
  1027. int newcount;
  1028. timeout = wait_for_completion_timeout(&cmd_wait,
  1029. msecs_to_jiffies(delay_ms));
  1030. if (timeout)
  1031. return 0;
  1032. spin_lock_bh(&priv->tx_lock);
  1033. priv->tx_wait = NULL;
  1034. newcount = mwl8k_txq_busy(priv);
  1035. spin_unlock_bh(&priv->tx_lock);
  1036. printk(KERN_ERR "%s(%u) TIMEDOUT:%ums Pend:%u-->%u\n",
  1037. __func__, __LINE__, delay_ms, count, newcount);
  1038. mwl8k_scan_tx_ring(priv, txinfo, 4);
  1039. for (index = 0 ; index < 4; index++)
  1040. printk(KERN_ERR
  1041. "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
  1042. index,
  1043. txinfo[index].len,
  1044. txinfo[index].head,
  1045. txinfo[index].tail,
  1046. txinfo[index].fw_owned,
  1047. txinfo[index].drv_owned,
  1048. txinfo[index].unused);
  1049. return -ETIMEDOUT;
  1050. }
  1051. return 0;
  1052. }
  1053. #define MWL8K_TXD_OK (MWL8K_TXD_STATUS_OK | \
  1054. MWL8K_TXD_STATUS_OK_RETRY | \
  1055. MWL8K_TXD_STATUS_OK_MORE_RETRY)
  1056. #define MWL8K_TXD_SUCCESS(stat) ((stat) & MWL8K_TXD_OK)
  1057. #define MWL8K_TXD_FAIL_RETRY(stat) \
  1058. ((stat) & (MWL8K_TXD_STATUS_FAILED_EXCEED_LIMIT))
  1059. static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
  1060. {
  1061. struct mwl8k_priv *priv = hw->priv;
  1062. struct mwl8k_tx_queue *txq = priv->txq + index;
  1063. int wake = 0;
  1064. while (txq->tx_stats.len > 0) {
  1065. int tx;
  1066. int rc;
  1067. struct mwl8k_tx_desc *tx_desc;
  1068. unsigned long addr;
  1069. size_t size;
  1070. struct sk_buff *skb;
  1071. struct ieee80211_tx_info *info;
  1072. u32 status;
  1073. rc = 0;
  1074. tx = txq->tx_head;
  1075. tx_desc = txq->tx_desc_area + tx;
  1076. status = le32_to_cpu(tx_desc->status);
  1077. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1078. if (!force)
  1079. break;
  1080. tx_desc->status &=
  1081. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1082. }
  1083. txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
  1084. BUG_ON(txq->tx_stats.len == 0);
  1085. txq->tx_stats.len--;
  1086. priv->pending_tx_pkts--;
  1087. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1088. size = (u32)(le16_to_cpu(tx_desc->pkt_len));
  1089. skb = txq->tx_skb[tx].skb;
  1090. txq->tx_skb[tx].skb = NULL;
  1091. BUG_ON(skb == NULL);
  1092. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1093. rc = mwl8k_remove_dma_header(skb);
  1094. /* Mark descriptor as unused */
  1095. tx_desc->pkt_phys_addr = 0;
  1096. tx_desc->pkt_len = 0;
  1097. if (txq->tx_skb[tx].clone) {
  1098. /* Replace with original skb
  1099. * before returning to stack
  1100. * as buffer has been cloned
  1101. */
  1102. dev_kfree_skb(skb);
  1103. skb = txq->tx_skb[tx].clone;
  1104. txq->tx_skb[tx].clone = NULL;
  1105. }
  1106. if (rc) {
  1107. /* Something has gone wrong here.
  1108. * Failed to remove DMA header.
  1109. * Print error message and drop packet.
  1110. */
  1111. printk(KERN_ERR "%s: Error removing DMA header from "
  1112. "tx skb 0x%p.\n", priv->name, skb);
  1113. dev_kfree_skb(skb);
  1114. continue;
  1115. }
  1116. info = IEEE80211_SKB_CB(skb);
  1117. ieee80211_tx_info_clear_status(info);
  1118. /* Convert firmware status stuff into tx_status */
  1119. if (MWL8K_TXD_SUCCESS(status)) {
  1120. /* Transmit OK */
  1121. info->flags |= IEEE80211_TX_STAT_ACK;
  1122. }
  1123. ieee80211_tx_status_irqsafe(hw, skb);
  1124. wake = !priv->inconfig && priv->radio_state;
  1125. }
  1126. if (wake)
  1127. ieee80211_wake_queue(hw, index);
  1128. }
  1129. /* must be called only when the card's transmit is completely halted */
  1130. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1131. {
  1132. struct mwl8k_priv *priv = hw->priv;
  1133. struct mwl8k_tx_queue *txq = priv->txq + index;
  1134. mwl8k_txq_reclaim(hw, index, 1);
  1135. kfree(txq->tx_skb);
  1136. txq->tx_skb = NULL;
  1137. pci_free_consistent(priv->pdev,
  1138. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1139. txq->tx_desc_area, txq->tx_desc_dma);
  1140. txq->tx_desc_area = NULL;
  1141. }
  1142. static int
  1143. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1144. {
  1145. struct mwl8k_priv *priv = hw->priv;
  1146. struct ieee80211_tx_info *tx_info;
  1147. struct ieee80211_hdr *wh;
  1148. struct mwl8k_tx_queue *txq;
  1149. struct mwl8k_tx_desc *tx;
  1150. struct mwl8k_dma_data *tr;
  1151. struct mwl8k_vif *mwl8k_vif;
  1152. struct sk_buff *org_skb = skb;
  1153. dma_addr_t dma;
  1154. u16 qos = 0;
  1155. bool qosframe = false, ampduframe = false;
  1156. bool mcframe = false, eapolframe = false;
  1157. bool amsduframe = false;
  1158. __le16 fc;
  1159. txq = priv->txq + index;
  1160. tx = txq->tx_desc_area + txq->tx_tail;
  1161. BUG_ON(txq->tx_skb[txq->tx_tail].skb != NULL);
  1162. /*
  1163. * Append HW DMA header to start of packet. Drop packet if
  1164. * there is not enough space or a failure to unshare/unclone
  1165. * the skb.
  1166. */
  1167. skb = mwl8k_add_dma_header(skb);
  1168. if (skb == NULL) {
  1169. printk(KERN_DEBUG "%s: failed to prepend HW DMA "
  1170. "header, dropping TX frame.\n", priv->name);
  1171. dev_kfree_skb(org_skb);
  1172. return NETDEV_TX_OK;
  1173. }
  1174. tx_info = IEEE80211_SKB_CB(skb);
  1175. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1176. tr = (struct mwl8k_dma_data *)skb->data;
  1177. wh = &tr->wh;
  1178. fc = wh->frame_control;
  1179. qosframe = ieee80211_is_data_qos(fc);
  1180. mcframe = is_multicast_ether_addr(wh->addr1);
  1181. ampduframe = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
  1182. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1183. u16 seqno = mwl8k_vif->seqno;
  1184. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1185. wh->seq_ctrl |= cpu_to_le16(seqno << 4);
  1186. mwl8k_vif->seqno = seqno++ % 4096;
  1187. }
  1188. if (qosframe)
  1189. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1190. dma = pci_map_single(priv->pdev, skb->data,
  1191. skb->len, PCI_DMA_TODEVICE);
  1192. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1193. printk(KERN_DEBUG "%s: failed to dma map skb, "
  1194. "dropping TX frame.\n", priv->name);
  1195. if (org_skb != NULL)
  1196. dev_kfree_skb(org_skb);
  1197. if (skb != NULL)
  1198. dev_kfree_skb(skb);
  1199. return NETDEV_TX_OK;
  1200. }
  1201. /* Set desc header, cpu bit order. */
  1202. tx->status = 0;
  1203. tx->data_rate = 0;
  1204. tx->tx_priority = index;
  1205. tx->qos_control = 0;
  1206. tx->rate_info = 0;
  1207. tx->peer_id = mwl8k_vif->peer_id;
  1208. amsduframe = !!(qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT);
  1209. /* Setup firmware control bit fields for each frame type. */
  1210. if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
  1211. tx->data_rate = 0;
  1212. qos = mwl8k_qos_setbit_eosp(qos);
  1213. /* Set Queue size to unspecified */
  1214. qos = mwl8k_qos_setbit_qlen(qos, 0xff);
  1215. } else if (ieee80211_is_data(fc)) {
  1216. tx->data_rate = 1;
  1217. if (mcframe)
  1218. tx->status |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1219. /*
  1220. * Tell firmware to not send EAPOL pkts in an
  1221. * aggregate. Verify against mac80211 tx path. If
  1222. * stack turns off AMPDU for an EAPOL frame this
  1223. * check will be removed.
  1224. */
  1225. if (eapolframe) {
  1226. qos = mwl8k_qos_setbit_ack(qos,
  1227. MWL8K_TXD_ACK_POLICY_NORMAL);
  1228. } else {
  1229. /* Send pkt in an aggregate if AMPDU frame. */
  1230. if (ampduframe)
  1231. qos = mwl8k_qos_setbit_ack(qos,
  1232. MWL8K_TXD_ACK_POLICY_BLOCKACK);
  1233. else
  1234. qos = mwl8k_qos_setbit_ack(qos,
  1235. MWL8K_TXD_ACK_POLICY_NORMAL);
  1236. if (amsduframe)
  1237. qos = mwl8k_qos_setbit_amsdu(qos);
  1238. }
  1239. }
  1240. /* Convert to little endian */
  1241. tx->qos_control = cpu_to_le16(qos);
  1242. tx->status = cpu_to_le32(tx->status);
  1243. tx->pkt_phys_addr = cpu_to_le32(dma);
  1244. tx->pkt_len = cpu_to_le16(skb->len);
  1245. txq->tx_skb[txq->tx_tail].skb = skb;
  1246. txq->tx_skb[txq->tx_tail].clone =
  1247. skb == org_skb ? NULL : org_skb;
  1248. spin_lock_bh(&priv->tx_lock);
  1249. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_OK |
  1250. MWL8K_TXD_STATUS_FW_OWNED);
  1251. wmb();
  1252. txq->tx_stats.len++;
  1253. priv->pending_tx_pkts++;
  1254. txq->tx_stats.count++;
  1255. txq->tx_tail++;
  1256. if (txq->tx_tail == MWL8K_TX_DESCS)
  1257. txq->tx_tail = 0;
  1258. if (txq->tx_head == txq->tx_tail)
  1259. ieee80211_stop_queue(hw, index);
  1260. if (priv->inconfig) {
  1261. /*
  1262. * Silently queue packet when we are in the middle of
  1263. * a config cycle. Notify firmware only if we are
  1264. * waiting for TXQs to empty. If a packet is sent
  1265. * before .config() is complete, perhaps it is better
  1266. * to drop the packet, as the channel is being changed
  1267. * and the packet will end up on the wrong channel.
  1268. */
  1269. printk(KERN_ERR "%s(): WARNING TX activity while "
  1270. "in config\n", __func__);
  1271. if (priv->tx_wait != NULL)
  1272. mwl8k_tx_start(priv);
  1273. } else
  1274. mwl8k_tx_start(priv);
  1275. spin_unlock_bh(&priv->tx_lock);
  1276. return NETDEV_TX_OK;
  1277. }
  1278. /*
  1279. * Command processing.
  1280. */
  1281. /* Timeout firmware commands after 2000ms */
  1282. #define MWL8K_CMD_TIMEOUT_MS 2000
  1283. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1284. {
  1285. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1286. struct mwl8k_priv *priv = hw->priv;
  1287. void __iomem *regs = priv->regs;
  1288. dma_addr_t dma_addr;
  1289. unsigned int dma_size;
  1290. int rc;
  1291. u16 __iomem *result;
  1292. unsigned long timeout = 0;
  1293. u8 buf[32];
  1294. cmd->result = 0xFFFF;
  1295. dma_size = le16_to_cpu(cmd->length);
  1296. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1297. PCI_DMA_BIDIRECTIONAL);
  1298. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1299. return -ENOMEM;
  1300. if (priv->hostcmd_wait != NULL)
  1301. printk(KERN_ERR "WARNING host command in progress\n");
  1302. spin_lock_irq(&priv->fw_lock);
  1303. priv->hostcmd_wait = &cmd_wait;
  1304. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1305. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1306. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1307. iowrite32(MWL8K_H2A_INT_DUMMY,
  1308. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1309. spin_unlock_irq(&priv->fw_lock);
  1310. timeout = wait_for_completion_timeout(&cmd_wait,
  1311. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1312. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1313. PCI_DMA_BIDIRECTIONAL);
  1314. result = &cmd->result;
  1315. if (!timeout) {
  1316. spin_lock_irq(&priv->fw_lock);
  1317. priv->hostcmd_wait = NULL;
  1318. spin_unlock_irq(&priv->fw_lock);
  1319. printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
  1320. priv->name,
  1321. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1322. MWL8K_CMD_TIMEOUT_MS);
  1323. rc = -ETIMEDOUT;
  1324. } else {
  1325. rc = *result ? -EINVAL : 0;
  1326. if (rc)
  1327. printk(KERN_ERR "%s: Command %s error 0x%x\n",
  1328. priv->name,
  1329. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1330. *result);
  1331. }
  1332. return rc;
  1333. }
  1334. /*
  1335. * GET_HW_SPEC.
  1336. */
  1337. struct mwl8k_cmd_get_hw_spec {
  1338. struct mwl8k_cmd_pkt header;
  1339. __u8 hw_rev;
  1340. __u8 host_interface;
  1341. __le16 num_mcaddrs;
  1342. __u8 perm_addr[IEEE80211_ADDR_LEN];
  1343. __le16 region_code;
  1344. __le32 fw_rev;
  1345. __le32 ps_cookie;
  1346. __le32 caps;
  1347. __u8 mcs_bitmap[16];
  1348. __le32 rx_queue_ptr;
  1349. __le32 num_tx_queues;
  1350. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1351. __le32 caps2;
  1352. __le32 num_tx_desc_per_queue;
  1353. __le32 total_rx_desc;
  1354. } __attribute__((packed));
  1355. static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
  1356. {
  1357. struct mwl8k_priv *priv = hw->priv;
  1358. struct mwl8k_cmd_get_hw_spec *cmd;
  1359. int rc;
  1360. int i;
  1361. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1362. if (cmd == NULL)
  1363. return -ENOMEM;
  1364. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1365. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1366. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1367. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1368. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
  1369. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1370. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1371. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
  1372. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1373. cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS);
  1374. rc = mwl8k_post_cmd(hw, &cmd->header);
  1375. if (!rc) {
  1376. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1377. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1378. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1379. priv->hw_rev = cmd->hw_rev;
  1380. priv->region_code = le16_to_cpu(cmd->region_code);
  1381. }
  1382. kfree(cmd);
  1383. return rc;
  1384. }
  1385. /*
  1386. * CMD_MAC_MULTICAST_ADR.
  1387. */
  1388. struct mwl8k_cmd_mac_multicast_adr {
  1389. struct mwl8k_cmd_pkt header;
  1390. __le16 action;
  1391. __le16 numaddr;
  1392. __u8 addr[1][IEEE80211_ADDR_LEN];
  1393. };
  1394. #define MWL8K_ENABLE_RX_MULTICAST 0x000F
  1395. static int mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
  1396. int mc_count,
  1397. struct dev_addr_list *mclist)
  1398. {
  1399. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1400. int index = 0;
  1401. int rc;
  1402. int size = sizeof(*cmd) + ((mc_count - 1) * IEEE80211_ADDR_LEN);
  1403. cmd = kzalloc(size, GFP_KERNEL);
  1404. if (cmd == NULL)
  1405. return -ENOMEM;
  1406. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1407. cmd->header.length = cpu_to_le16(size);
  1408. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1409. cmd->numaddr = cpu_to_le16(mc_count);
  1410. while ((index < mc_count) && mclist) {
  1411. if (mclist->da_addrlen != IEEE80211_ADDR_LEN) {
  1412. rc = -EINVAL;
  1413. goto mwl8k_cmd_mac_multicast_adr_exit;
  1414. }
  1415. memcpy(cmd->addr[index], mclist->da_addr, IEEE80211_ADDR_LEN);
  1416. index++;
  1417. mclist = mclist->next;
  1418. }
  1419. rc = mwl8k_post_cmd(hw, &cmd->header);
  1420. mwl8k_cmd_mac_multicast_adr_exit:
  1421. kfree(cmd);
  1422. return rc;
  1423. }
  1424. /*
  1425. * CMD_802_11_GET_STAT.
  1426. */
  1427. struct mwl8k_cmd_802_11_get_stat {
  1428. struct mwl8k_cmd_pkt header;
  1429. __le16 action;
  1430. __le32 stats[64];
  1431. } __attribute__((packed));
  1432. #define MWL8K_STAT_ACK_FAILURE 9
  1433. #define MWL8K_STAT_RTS_FAILURE 12
  1434. #define MWL8K_STAT_FCS_ERROR 24
  1435. #define MWL8K_STAT_RTS_SUCCESS 11
  1436. static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
  1437. struct ieee80211_low_level_stats *stats)
  1438. {
  1439. struct mwl8k_cmd_802_11_get_stat *cmd;
  1440. int rc;
  1441. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1442. if (cmd == NULL)
  1443. return -ENOMEM;
  1444. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1445. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1446. cmd->action = cpu_to_le16(MWL8K_CMD_GET);
  1447. rc = mwl8k_post_cmd(hw, &cmd->header);
  1448. if (!rc) {
  1449. stats->dot11ACKFailureCount =
  1450. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1451. stats->dot11RTSFailureCount =
  1452. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1453. stats->dot11FCSErrorCount =
  1454. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1455. stats->dot11RTSSuccessCount =
  1456. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1457. }
  1458. kfree(cmd);
  1459. return rc;
  1460. }
  1461. /*
  1462. * CMD_802_11_RADIO_CONTROL.
  1463. */
  1464. struct mwl8k_cmd_802_11_radio_control {
  1465. struct mwl8k_cmd_pkt header;
  1466. __le16 action;
  1467. __le16 control;
  1468. __le16 radio_on;
  1469. } __attribute__((packed));
  1470. static int mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, int enable)
  1471. {
  1472. struct mwl8k_priv *priv = hw->priv;
  1473. struct mwl8k_cmd_802_11_radio_control *cmd;
  1474. int rc;
  1475. if (((enable & MWL8K_RADIO_ENABLE) == priv->radio_state) &&
  1476. !(enable & MWL8K_RADIO_FORCE))
  1477. return 0;
  1478. enable &= MWL8K_RADIO_ENABLE;
  1479. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1480. if (cmd == NULL)
  1481. return -ENOMEM;
  1482. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1483. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1484. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1485. cmd->control = cpu_to_le16(priv->radio_preamble);
  1486. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1487. rc = mwl8k_post_cmd(hw, &cmd->header);
  1488. kfree(cmd);
  1489. if (!rc)
  1490. priv->radio_state = enable;
  1491. return rc;
  1492. }
  1493. static int
  1494. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1495. {
  1496. struct mwl8k_priv *priv;
  1497. if (hw == NULL || hw->priv == NULL)
  1498. return -EINVAL;
  1499. priv = hw->priv;
  1500. priv->radio_preamble = (short_preamble ?
  1501. MWL8K_RADIO_SHORT_PREAMBLE :
  1502. MWL8K_RADIO_LONG_PREAMBLE);
  1503. return mwl8k_cmd_802_11_radio_control(hw,
  1504. MWL8K_RADIO_ENABLE | MWL8K_RADIO_FORCE);
  1505. }
  1506. /*
  1507. * CMD_802_11_RF_TX_POWER.
  1508. */
  1509. #define MWL8K_TX_POWER_LEVEL_TOTAL 8
  1510. struct mwl8k_cmd_802_11_rf_tx_power {
  1511. struct mwl8k_cmd_pkt header;
  1512. __le16 action;
  1513. __le16 support_level;
  1514. __le16 current_level;
  1515. __le16 reserved;
  1516. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1517. } __attribute__((packed));
  1518. static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1519. {
  1520. struct mwl8k_cmd_802_11_rf_tx_power *cmd;
  1521. int rc;
  1522. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1523. if (cmd == NULL)
  1524. return -ENOMEM;
  1525. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1526. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1527. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1528. cmd->support_level = cpu_to_le16(dBm);
  1529. rc = mwl8k_post_cmd(hw, &cmd->header);
  1530. kfree(cmd);
  1531. return rc;
  1532. }
  1533. /*
  1534. * CMD_SET_PRE_SCAN.
  1535. */
  1536. struct mwl8k_cmd_set_pre_scan {
  1537. struct mwl8k_cmd_pkt header;
  1538. } __attribute__((packed));
  1539. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1540. {
  1541. struct mwl8k_cmd_set_pre_scan *cmd;
  1542. int rc;
  1543. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1544. if (cmd == NULL)
  1545. return -ENOMEM;
  1546. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1547. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1548. rc = mwl8k_post_cmd(hw, &cmd->header);
  1549. kfree(cmd);
  1550. return rc;
  1551. }
  1552. /*
  1553. * CMD_SET_POST_SCAN.
  1554. */
  1555. struct mwl8k_cmd_set_post_scan {
  1556. struct mwl8k_cmd_pkt header;
  1557. __le32 isibss;
  1558. __u8 bssid[IEEE80211_ADDR_LEN];
  1559. } __attribute__((packed));
  1560. static int
  1561. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 mac[IEEE80211_ADDR_LEN])
  1562. {
  1563. struct mwl8k_cmd_set_post_scan *cmd;
  1564. int rc;
  1565. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1566. if (cmd == NULL)
  1567. return -ENOMEM;
  1568. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1569. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1570. cmd->isibss = 0;
  1571. memcpy(cmd->bssid, mac, IEEE80211_ADDR_LEN);
  1572. rc = mwl8k_post_cmd(hw, &cmd->header);
  1573. kfree(cmd);
  1574. return rc;
  1575. }
  1576. /*
  1577. * CMD_SET_RF_CHANNEL.
  1578. */
  1579. struct mwl8k_cmd_set_rf_channel {
  1580. struct mwl8k_cmd_pkt header;
  1581. __le16 action;
  1582. __u8 current_channel;
  1583. __le32 channel_flags;
  1584. } __attribute__((packed));
  1585. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1586. struct ieee80211_channel *channel)
  1587. {
  1588. struct mwl8k_cmd_set_rf_channel *cmd;
  1589. int rc;
  1590. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1591. if (cmd == NULL)
  1592. return -ENOMEM;
  1593. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1594. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1595. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1596. cmd->current_channel = channel->hw_value;
  1597. if (channel->band == IEEE80211_BAND_2GHZ)
  1598. cmd->channel_flags = cpu_to_le32(0x00000081);
  1599. else
  1600. cmd->channel_flags = cpu_to_le32(0x00000000);
  1601. rc = mwl8k_post_cmd(hw, &cmd->header);
  1602. kfree(cmd);
  1603. return rc;
  1604. }
  1605. /*
  1606. * CMD_SET_SLOT.
  1607. */
  1608. struct mwl8k_cmd_set_slot {
  1609. struct mwl8k_cmd_pkt header;
  1610. __le16 action;
  1611. __u8 short_slot;
  1612. } __attribute__((packed));
  1613. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, int slot_time)
  1614. {
  1615. struct mwl8k_cmd_set_slot *cmd;
  1616. int rc;
  1617. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1618. if (cmd == NULL)
  1619. return -ENOMEM;
  1620. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  1621. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1622. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1623. cmd->short_slot = slot_time == MWL8K_SHORT_SLOTTIME ? 1 : 0;
  1624. rc = mwl8k_post_cmd(hw, &cmd->header);
  1625. kfree(cmd);
  1626. return rc;
  1627. }
  1628. /*
  1629. * CMD_MIMO_CONFIG.
  1630. */
  1631. struct mwl8k_cmd_mimo_config {
  1632. struct mwl8k_cmd_pkt header;
  1633. __le32 action;
  1634. __u8 rx_antenna_map;
  1635. __u8 tx_antenna_map;
  1636. } __attribute__((packed));
  1637. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  1638. {
  1639. struct mwl8k_cmd_mimo_config *cmd;
  1640. int rc;
  1641. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1642. if (cmd == NULL)
  1643. return -ENOMEM;
  1644. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  1645. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1646. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  1647. cmd->rx_antenna_map = rx;
  1648. cmd->tx_antenna_map = tx;
  1649. rc = mwl8k_post_cmd(hw, &cmd->header);
  1650. kfree(cmd);
  1651. return rc;
  1652. }
  1653. /*
  1654. * CMD_ENABLE_SNIFFER.
  1655. */
  1656. struct mwl8k_cmd_enable_sniffer {
  1657. struct mwl8k_cmd_pkt header;
  1658. __le32 action;
  1659. } __attribute__((packed));
  1660. static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  1661. {
  1662. struct mwl8k_cmd_enable_sniffer *cmd;
  1663. int rc;
  1664. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1665. if (cmd == NULL)
  1666. return -ENOMEM;
  1667. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  1668. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1669. cmd->action = enable ? cpu_to_le32((u32)MWL8K_CMD_SET) : 0;
  1670. rc = mwl8k_post_cmd(hw, &cmd->header);
  1671. kfree(cmd);
  1672. return rc;
  1673. }
  1674. /*
  1675. * CMD_SET_RATE_ADAPT_MODE.
  1676. */
  1677. struct mwl8k_cmd_set_rate_adapt_mode {
  1678. struct mwl8k_cmd_pkt header;
  1679. __le16 action;
  1680. __le16 mode;
  1681. } __attribute__((packed));
  1682. static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
  1683. {
  1684. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  1685. int rc;
  1686. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1687. if (cmd == NULL)
  1688. return -ENOMEM;
  1689. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  1690. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1691. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1692. cmd->mode = cpu_to_le16(mode);
  1693. rc = mwl8k_post_cmd(hw, &cmd->header);
  1694. kfree(cmd);
  1695. return rc;
  1696. }
  1697. /*
  1698. * CMD_SET_WMM_MODE.
  1699. */
  1700. struct mwl8k_cmd_set_wmm {
  1701. struct mwl8k_cmd_pkt header;
  1702. __le16 action;
  1703. } __attribute__((packed));
  1704. static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
  1705. {
  1706. struct mwl8k_priv *priv = hw->priv;
  1707. struct mwl8k_cmd_set_wmm *cmd;
  1708. int rc;
  1709. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1710. if (cmd == NULL)
  1711. return -ENOMEM;
  1712. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  1713. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1714. cmd->action = enable ? cpu_to_le16(MWL8K_CMD_SET) : 0;
  1715. rc = mwl8k_post_cmd(hw, &cmd->header);
  1716. kfree(cmd);
  1717. if (!rc)
  1718. priv->wmm_mode = enable;
  1719. return rc;
  1720. }
  1721. /*
  1722. * CMD_SET_RTS_THRESHOLD.
  1723. */
  1724. struct mwl8k_cmd_rts_threshold {
  1725. struct mwl8k_cmd_pkt header;
  1726. __le16 action;
  1727. __le16 threshold;
  1728. } __attribute__((packed));
  1729. static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
  1730. u16 action, u16 *threshold)
  1731. {
  1732. struct mwl8k_cmd_rts_threshold *cmd;
  1733. int rc;
  1734. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1735. if (cmd == NULL)
  1736. return -ENOMEM;
  1737. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  1738. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1739. cmd->action = cpu_to_le16(action);
  1740. cmd->threshold = cpu_to_le16(*threshold);
  1741. rc = mwl8k_post_cmd(hw, &cmd->header);
  1742. kfree(cmd);
  1743. return rc;
  1744. }
  1745. /*
  1746. * CMD_SET_EDCA_PARAMS.
  1747. */
  1748. struct mwl8k_cmd_set_edca_params {
  1749. struct mwl8k_cmd_pkt header;
  1750. /* See MWL8K_SET_EDCA_XXX below */
  1751. __le16 action;
  1752. /* TX opportunity in units of 32 us */
  1753. __le16 txop;
  1754. /* Log exponent of max contention period: 0...15*/
  1755. __u8 log_cw_max;
  1756. /* Log exponent of min contention period: 0...15 */
  1757. __u8 log_cw_min;
  1758. /* Adaptive interframe spacing in units of 32us */
  1759. __u8 aifs;
  1760. /* TX queue to configure */
  1761. __u8 txq;
  1762. } __attribute__((packed));
  1763. #define MWL8K_GET_EDCA_ALL 0
  1764. #define MWL8K_SET_EDCA_CW 0x01
  1765. #define MWL8K_SET_EDCA_TXOP 0x02
  1766. #define MWL8K_SET_EDCA_AIFS 0x04
  1767. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  1768. MWL8K_SET_EDCA_TXOP | \
  1769. MWL8K_SET_EDCA_AIFS)
  1770. static int
  1771. mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  1772. __u16 cw_min, __u16 cw_max,
  1773. __u8 aifs, __u16 txop)
  1774. {
  1775. struct mwl8k_cmd_set_edca_params *cmd;
  1776. u32 log_cw_min, log_cw_max;
  1777. int rc;
  1778. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1779. if (cmd == NULL)
  1780. return -ENOMEM;
  1781. log_cw_min = ilog2(cw_min+1);
  1782. log_cw_max = ilog2(cw_max+1);
  1783. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  1784. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1785. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  1786. cmd->txop = cpu_to_le16(txop);
  1787. cmd->log_cw_max = (u8)log_cw_max;
  1788. cmd->log_cw_min = (u8)log_cw_min;
  1789. cmd->aifs = aifs;
  1790. cmd->txq = qnum;
  1791. rc = mwl8k_post_cmd(hw, &cmd->header);
  1792. kfree(cmd);
  1793. return rc;
  1794. }
  1795. /*
  1796. * CMD_FINALIZE_JOIN.
  1797. */
  1798. /* FJ beacon buffer size is compiled into the firmware. */
  1799. #define MWL8K_FJ_BEACON_MAXLEN 128
  1800. struct mwl8k_cmd_finalize_join {
  1801. struct mwl8k_cmd_pkt header;
  1802. __le32 sleep_interval; /* Number of beacon periods to sleep */
  1803. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  1804. } __attribute__((packed));
  1805. static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
  1806. __u16 framelen, __u16 dtim)
  1807. {
  1808. struct mwl8k_cmd_finalize_join *cmd;
  1809. struct ieee80211_mgmt *payload = frame;
  1810. u16 hdrlen;
  1811. u32 payload_len;
  1812. int rc;
  1813. if (frame == NULL)
  1814. return -EINVAL;
  1815. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1816. if (cmd == NULL)
  1817. return -ENOMEM;
  1818. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  1819. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1820. if (dtim)
  1821. cmd->sleep_interval = cpu_to_le32(dtim);
  1822. else
  1823. cmd->sleep_interval = cpu_to_le32(1);
  1824. hdrlen = ieee80211_hdrlen(payload->frame_control);
  1825. payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
  1826. /* XXX TBD Might just have to abort and return an error */
  1827. if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  1828. printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
  1829. "sent to firmware. Sz=%u MAX=%u\n", __func__,
  1830. payload_len, MWL8K_FJ_BEACON_MAXLEN);
  1831. payload_len = payload_len > MWL8K_FJ_BEACON_MAXLEN ?
  1832. MWL8K_FJ_BEACON_MAXLEN : payload_len;
  1833. if (payload && payload_len)
  1834. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  1835. rc = mwl8k_post_cmd(hw, &cmd->header);
  1836. kfree(cmd);
  1837. return rc;
  1838. }
  1839. /*
  1840. * CMD_UPDATE_STADB.
  1841. */
  1842. struct mwl8k_cmd_update_sta_db {
  1843. struct mwl8k_cmd_pkt header;
  1844. /* See STADB_ACTION_TYPE */
  1845. __le32 action;
  1846. /* Peer MAC address */
  1847. __u8 peer_addr[IEEE80211_ADDR_LEN];
  1848. __le32 reserved;
  1849. /* Peer info - valid during add/update. */
  1850. struct peer_capability_info peer_info;
  1851. } __attribute__((packed));
  1852. static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
  1853. struct ieee80211_vif *vif, __u32 action)
  1854. {
  1855. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1856. struct ieee80211_bss_conf *info = &mv_vif->bss_info;
  1857. struct mwl8k_cmd_update_sta_db *cmd;
  1858. struct peer_capability_info *peer_info;
  1859. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1860. DECLARE_MAC_BUF(mac);
  1861. int rc;
  1862. __u8 count, *rates;
  1863. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1864. if (cmd == NULL)
  1865. return -ENOMEM;
  1866. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  1867. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1868. cmd->action = cpu_to_le32(action);
  1869. peer_info = &cmd->peer_info;
  1870. memcpy(cmd->peer_addr, mv_vif->bssid, IEEE80211_ADDR_LEN);
  1871. switch (action) {
  1872. case MWL8K_STA_DB_ADD_ENTRY:
  1873. case MWL8K_STA_DB_MODIFY_ENTRY:
  1874. /* Build peer_info block */
  1875. peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  1876. peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
  1877. peer_info->interop = 1;
  1878. peer_info->amsdu_enabled = 0;
  1879. rates = peer_info->legacy_rates;
  1880. for (count = 0 ; count < mv_vif->legacy_nrates; count++)
  1881. rates[count] = bitrates[count].hw_value;
  1882. rc = mwl8k_post_cmd(hw, &cmd->header);
  1883. if (rc == 0)
  1884. mv_vif->peer_id = peer_info->station_id;
  1885. break;
  1886. case MWL8K_STA_DB_DEL_ENTRY:
  1887. case MWL8K_STA_DB_FLUSH:
  1888. default:
  1889. rc = mwl8k_post_cmd(hw, &cmd->header);
  1890. if (rc == 0)
  1891. mv_vif->peer_id = 0;
  1892. break;
  1893. }
  1894. kfree(cmd);
  1895. return rc;
  1896. }
  1897. /*
  1898. * CMD_SET_AID.
  1899. */
  1900. #define IEEE80211_OPMODE_DISABLED 0x00
  1901. #define IEEE80211_OPMODE_NON_MEMBER_PROT_MODE 0x01
  1902. #define IEEE80211_OPMODE_ONE_20MHZ_STA_PROT_MODE 0x02
  1903. #define IEEE80211_OPMODE_HTMIXED_PROT_MODE 0x03
  1904. #define MWL8K_RATE_INDEX_MAX_ARRAY 14
  1905. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1906. #define MWL8K_FRAME_PROT_11G 0x07
  1907. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1908. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1909. #define MWL8K_FRAME_PROT_MASK 0x07
  1910. struct mwl8k_cmd_update_set_aid {
  1911. struct mwl8k_cmd_pkt header;
  1912. __le16 aid;
  1913. /* AP's MAC address (BSSID) */
  1914. __u8 bssid[IEEE80211_ADDR_LEN];
  1915. __le16 protection_mode;
  1916. __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
  1917. } __attribute__((packed));
  1918. static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  1919. struct ieee80211_vif *vif)
  1920. {
  1921. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1922. struct ieee80211_bss_conf *info = &mv_vif->bss_info;
  1923. struct mwl8k_cmd_update_set_aid *cmd;
  1924. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1925. int count;
  1926. u16 prot_mode;
  1927. int rc;
  1928. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1929. if (cmd == NULL)
  1930. return -ENOMEM;
  1931. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  1932. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1933. cmd->aid = cpu_to_le16(info->aid);
  1934. memcpy(cmd->bssid, mv_vif->bssid, IEEE80211_ADDR_LEN);
  1935. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1936. if (info->use_cts_prot) {
  1937. prot_mode = MWL8K_FRAME_PROT_11G;
  1938. } else {
  1939. switch (info->ht_operation_mode &
  1940. IEEE80211_HT_OP_MODE_PROTECTION) {
  1941. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  1942. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  1943. break;
  1944. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  1945. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  1946. break;
  1947. default:
  1948. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1949. break;
  1950. }
  1951. }
  1952. cmd->protection_mode = cpu_to_le16(prot_mode);
  1953. for (count = 0; count < mv_vif->legacy_nrates; count++)
  1954. cmd->supp_rates[count] = bitrates[count].hw_value;
  1955. rc = mwl8k_post_cmd(hw, &cmd->header);
  1956. kfree(cmd);
  1957. return rc;
  1958. }
  1959. /*
  1960. * CMD_SET_RATE.
  1961. */
  1962. struct mwl8k_cmd_update_rateset {
  1963. struct mwl8k_cmd_pkt header;
  1964. __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
  1965. /* Bitmap for supported MCS codes. */
  1966. __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
  1967. __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
  1968. } __attribute__((packed));
  1969. static int mwl8k_update_rateset(struct ieee80211_hw *hw,
  1970. struct ieee80211_vif *vif)
  1971. {
  1972. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1973. struct mwl8k_cmd_update_rateset *cmd;
  1974. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1975. int count;
  1976. int rc;
  1977. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1978. if (cmd == NULL)
  1979. return -ENOMEM;
  1980. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  1981. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1982. for (count = 0; count < mv_vif->legacy_nrates; count++)
  1983. cmd->legacy_rates[count] = bitrates[count].hw_value;
  1984. rc = mwl8k_post_cmd(hw, &cmd->header);
  1985. kfree(cmd);
  1986. return rc;
  1987. }
  1988. /*
  1989. * CMD_USE_FIXED_RATE.
  1990. */
  1991. #define MWL8K_RATE_TABLE_SIZE 8
  1992. #define MWL8K_UCAST_RATE 0
  1993. #define MWL8K_MCAST_RATE 1
  1994. #define MWL8K_BCAST_RATE 2
  1995. #define MWL8K_USE_FIXED_RATE 0x0001
  1996. #define MWL8K_USE_AUTO_RATE 0x0002
  1997. struct mwl8k_rate_entry {
  1998. /* Set to 1 if HT rate, 0 if legacy. */
  1999. __le32 is_ht_rate;
  2000. /* Set to 1 to use retry_count field. */
  2001. __le32 enable_retry;
  2002. /* Specified legacy rate or MCS. */
  2003. __le32 rate;
  2004. /* Number of allowed retries. */
  2005. __le32 retry_count;
  2006. } __attribute__((packed));
  2007. struct mwl8k_rate_table {
  2008. /* 1 to allow specified rate and below */
  2009. __le32 allow_rate_drop;
  2010. __le32 num_rates;
  2011. struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
  2012. } __attribute__((packed));
  2013. struct mwl8k_cmd_use_fixed_rate {
  2014. struct mwl8k_cmd_pkt header;
  2015. __le32 action;
  2016. struct mwl8k_rate_table rate_table;
  2017. /* Unicast, Broadcast or Multicast */
  2018. __le32 rate_type;
  2019. __le32 reserved1;
  2020. __le32 reserved2;
  2021. } __attribute__((packed));
  2022. static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
  2023. u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
  2024. {
  2025. struct mwl8k_cmd_use_fixed_rate *cmd;
  2026. int count;
  2027. int rc;
  2028. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2029. if (cmd == NULL)
  2030. return -ENOMEM;
  2031. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2032. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2033. cmd->action = cpu_to_le32(action);
  2034. cmd->rate_type = cpu_to_le32(rate_type);
  2035. if (rate_table != NULL) {
  2036. /* Copy over each field manually so
  2037. * that bitflipping can be done
  2038. */
  2039. cmd->rate_table.allow_rate_drop =
  2040. cpu_to_le32(rate_table->allow_rate_drop);
  2041. cmd->rate_table.num_rates =
  2042. cpu_to_le32(rate_table->num_rates);
  2043. for (count = 0; count < rate_table->num_rates; count++) {
  2044. struct mwl8k_rate_entry *dst =
  2045. &cmd->rate_table.rate_entry[count];
  2046. struct mwl8k_rate_entry *src =
  2047. &rate_table->rate_entry[count];
  2048. dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
  2049. dst->enable_retry = cpu_to_le32(src->enable_retry);
  2050. dst->rate = cpu_to_le32(src->rate);
  2051. dst->retry_count = cpu_to_le32(src->retry_count);
  2052. }
  2053. }
  2054. rc = mwl8k_post_cmd(hw, &cmd->header);
  2055. kfree(cmd);
  2056. return rc;
  2057. }
  2058. /*
  2059. * Interrupt handling.
  2060. */
  2061. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  2062. {
  2063. struct ieee80211_hw *hw = dev_id;
  2064. struct mwl8k_priv *priv = hw->priv;
  2065. u32 status;
  2066. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2067. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2068. status &= priv->int_mask;
  2069. if (!status)
  2070. return IRQ_NONE;
  2071. if (status & MWL8K_A2H_INT_TX_DONE)
  2072. tasklet_schedule(&priv->tx_reclaim_task);
  2073. if (status & MWL8K_A2H_INT_RX_READY) {
  2074. while (rxq_process(hw, 0, 1))
  2075. rxq_refill(hw, 0, 1);
  2076. }
  2077. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2078. if (priv->hostcmd_wait != NULL) {
  2079. complete(priv->hostcmd_wait);
  2080. priv->hostcmd_wait = NULL;
  2081. }
  2082. }
  2083. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2084. if (!priv->inconfig &&
  2085. priv->radio_state &&
  2086. mwl8k_txq_busy(priv))
  2087. mwl8k_tx_start(priv);
  2088. }
  2089. return IRQ_HANDLED;
  2090. }
  2091. /*
  2092. * Core driver operations.
  2093. */
  2094. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2095. {
  2096. struct mwl8k_priv *priv = hw->priv;
  2097. int index = skb_get_queue_mapping(skb);
  2098. int rc;
  2099. if (priv->current_channel == NULL) {
  2100. printk(KERN_DEBUG "%s: dropped TX frame since radio "
  2101. "disabled\n", priv->name);
  2102. dev_kfree_skb(skb);
  2103. return NETDEV_TX_OK;
  2104. }
  2105. rc = mwl8k_txq_xmit(hw, index, skb);
  2106. return rc;
  2107. }
  2108. struct mwl8k_work_struct {
  2109. /* Initialized by mwl8k_queue_work(). */
  2110. struct work_struct wt;
  2111. /* Required field passed in to mwl8k_queue_work(). */
  2112. struct ieee80211_hw *hw;
  2113. /* Required field passed in to mwl8k_queue_work(). */
  2114. int (*wfunc)(struct work_struct *w);
  2115. /* Initialized by mwl8k_queue_work(). */
  2116. struct completion *cmd_wait;
  2117. /* Result code. */
  2118. int rc;
  2119. /*
  2120. * Optional field. Refer to explanation of MWL8K_WQ_XXX_XXX
  2121. * flags for explanation. Defaults to MWL8K_WQ_DEFAULT_OPTIONS.
  2122. */
  2123. u32 options;
  2124. /* Optional field. Defaults to MWL8K_CONFIG_TIMEOUT_MS. */
  2125. unsigned long timeout_ms;
  2126. /* Optional field. Defaults to MWL8K_WQ_TXWAIT_ATTEMPTS. */
  2127. u32 txwait_attempts;
  2128. /* Optional field. Defaults to MWL8K_TXWAIT_MS. */
  2129. u32 tx_timeout_ms;
  2130. u32 step;
  2131. };
  2132. /* Flags controlling behavior of config queue requests */
  2133. /* Caller spins while waiting for completion. */
  2134. #define MWL8K_WQ_SPIN 0x00000001
  2135. /* Wait for TX queues to empty before proceeding with configuration. */
  2136. #define MWL8K_WQ_TX_WAIT_EMPTY 0x00000002
  2137. /* Queue request and return immediately. */
  2138. #define MWL8K_WQ_POST_REQUEST 0x00000004
  2139. /*
  2140. * Caller sleeps and waits for task complete notification.
  2141. * Do not use in atomic context.
  2142. */
  2143. #define MWL8K_WQ_SLEEP 0x00000008
  2144. /* Free work struct when task is done. */
  2145. #define MWL8K_WQ_FREE_WORKSTRUCT 0x00000010
  2146. /*
  2147. * Config request is queued and returns to caller imediately. Use
  2148. * this in atomic context. Work struct is freed by mwl8k_queue_work()
  2149. * when this flag is set.
  2150. */
  2151. #define MWL8K_WQ_QUEUE_ONLY (MWL8K_WQ_POST_REQUEST | \
  2152. MWL8K_WQ_FREE_WORKSTRUCT)
  2153. /* Default work queue behavior is to sleep and wait for tx completion. */
  2154. #define MWL8K_WQ_DEFAULT_OPTIONS (MWL8K_WQ_SLEEP | MWL8K_WQ_TX_WAIT_EMPTY)
  2155. /*
  2156. * Default config request timeout. Add adjustments to make sure the
  2157. * config thread waits long enough for both tx wait and cmd wait before
  2158. * timing out.
  2159. */
  2160. /* Time to wait for all TXQs to drain. TX Doorbell is pressed each time. */
  2161. #define MWL8K_TXWAIT_TIMEOUT_MS 1000
  2162. /* Default number of TX wait attempts. */
  2163. #define MWL8K_WQ_TXWAIT_ATTEMPTS 4
  2164. /* Total time to wait for TXQ to drain. */
  2165. #define MWL8K_TXWAIT_MS (MWL8K_TXWAIT_TIMEOUT_MS * \
  2166. MWL8K_WQ_TXWAIT_ATTEMPTS)
  2167. /* Scheduling slop. */
  2168. #define MWL8K_OS_SCHEDULE_OVERHEAD_MS 200
  2169. #define MWL8K_CONFIG_TIMEOUT_MS (MWL8K_CMD_TIMEOUT_MS + \
  2170. MWL8K_TXWAIT_MS + \
  2171. MWL8K_OS_SCHEDULE_OVERHEAD_MS)
  2172. static void mwl8k_config_thread(struct work_struct *wt)
  2173. {
  2174. struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
  2175. struct ieee80211_hw *hw = worker->hw;
  2176. struct mwl8k_priv *priv = hw->priv;
  2177. int rc = 0;
  2178. spin_lock_irq(&priv->tx_lock);
  2179. priv->inconfig = true;
  2180. spin_unlock_irq(&priv->tx_lock);
  2181. ieee80211_stop_queues(hw);
  2182. /*
  2183. * Wait for host queues to drain before doing PHY
  2184. * reconfiguration. This avoids interrupting any in-flight
  2185. * DMA transfers to the hardware.
  2186. */
  2187. if (worker->options & MWL8K_WQ_TX_WAIT_EMPTY) {
  2188. u32 timeout;
  2189. u32 time_remaining;
  2190. u32 iter;
  2191. u32 tx_wait_attempts = worker->txwait_attempts;
  2192. time_remaining = worker->tx_timeout_ms;
  2193. if (!tx_wait_attempts)
  2194. tx_wait_attempts = 1;
  2195. timeout = worker->tx_timeout_ms/tx_wait_attempts;
  2196. if (!timeout)
  2197. timeout = 1;
  2198. iter = tx_wait_attempts;
  2199. do {
  2200. int wait_time;
  2201. if (time_remaining > timeout) {
  2202. time_remaining -= timeout;
  2203. wait_time = timeout;
  2204. } else
  2205. wait_time = time_remaining;
  2206. if (!wait_time)
  2207. wait_time = 1;
  2208. rc = mwl8k_tx_wait_empty(hw, wait_time);
  2209. if (rc)
  2210. printk(KERN_ERR "%s() txwait timeout=%ums "
  2211. "Retry:%u/%u\n", __func__, timeout,
  2212. tx_wait_attempts - iter + 1,
  2213. tx_wait_attempts);
  2214. } while (rc && --iter);
  2215. rc = iter ? 0 : -ETIMEDOUT;
  2216. }
  2217. if (!rc)
  2218. rc = worker->wfunc(wt);
  2219. spin_lock_irq(&priv->tx_lock);
  2220. priv->inconfig = false;
  2221. if (priv->pending_tx_pkts && priv->radio_state)
  2222. mwl8k_tx_start(priv);
  2223. spin_unlock_irq(&priv->tx_lock);
  2224. ieee80211_wake_queues(hw);
  2225. worker->rc = rc;
  2226. if (worker->options & MWL8K_WQ_SLEEP)
  2227. complete(worker->cmd_wait);
  2228. if (worker->options & MWL8K_WQ_FREE_WORKSTRUCT)
  2229. kfree(wt);
  2230. }
  2231. static int mwl8k_queue_work(struct ieee80211_hw *hw,
  2232. struct mwl8k_work_struct *worker,
  2233. struct workqueue_struct *wqueue,
  2234. int (*wfunc)(struct work_struct *w))
  2235. {
  2236. unsigned long timeout = 0;
  2237. int rc = 0;
  2238. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  2239. if (!worker->timeout_ms)
  2240. worker->timeout_ms = MWL8K_CONFIG_TIMEOUT_MS;
  2241. if (!worker->options)
  2242. worker->options = MWL8K_WQ_DEFAULT_OPTIONS;
  2243. if (!worker->txwait_attempts)
  2244. worker->txwait_attempts = MWL8K_WQ_TXWAIT_ATTEMPTS;
  2245. if (!worker->tx_timeout_ms)
  2246. worker->tx_timeout_ms = MWL8K_TXWAIT_MS;
  2247. worker->hw = hw;
  2248. worker->cmd_wait = &cmd_wait;
  2249. worker->rc = 1;
  2250. worker->wfunc = wfunc;
  2251. INIT_WORK(&worker->wt, mwl8k_config_thread);
  2252. queue_work(wqueue, &worker->wt);
  2253. if (worker->options & MWL8K_WQ_POST_REQUEST) {
  2254. rc = 0;
  2255. } else {
  2256. if (worker->options & MWL8K_WQ_SPIN) {
  2257. timeout = worker->timeout_ms;
  2258. while (timeout && (worker->rc > 0)) {
  2259. mdelay(1);
  2260. timeout--;
  2261. }
  2262. } else if (worker->options & MWL8K_WQ_SLEEP)
  2263. timeout = wait_for_completion_timeout(&cmd_wait,
  2264. msecs_to_jiffies(worker->timeout_ms));
  2265. if (timeout)
  2266. rc = worker->rc;
  2267. else {
  2268. cancel_work_sync(&worker->wt);
  2269. rc = -ETIMEDOUT;
  2270. }
  2271. }
  2272. return rc;
  2273. }
  2274. struct mwl8k_start_worker {
  2275. struct mwl8k_work_struct header;
  2276. };
  2277. static int mwl8k_start_wt(struct work_struct *wt)
  2278. {
  2279. struct mwl8k_start_worker *worker = (struct mwl8k_start_worker *)wt;
  2280. struct ieee80211_hw *hw = worker->header.hw;
  2281. struct mwl8k_priv *priv = hw->priv;
  2282. int rc = 0;
  2283. if (priv->vif != NULL) {
  2284. rc = -EIO;
  2285. goto mwl8k_start_exit;
  2286. }
  2287. /* Turn on radio */
  2288. if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
  2289. rc = -EIO;
  2290. goto mwl8k_start_exit;
  2291. }
  2292. /* Purge TX/RX HW queues */
  2293. if (mwl8k_cmd_set_pre_scan(hw)) {
  2294. rc = -EIO;
  2295. goto mwl8k_start_exit;
  2296. }
  2297. if (mwl8k_cmd_set_post_scan(hw, "\x00\x00\x00\x00\x00\x00")) {
  2298. rc = -EIO;
  2299. goto mwl8k_start_exit;
  2300. }
  2301. /* Enable firmware rate adaptation */
  2302. if (mwl8k_cmd_setrateadaptmode(hw, 0)) {
  2303. rc = -EIO;
  2304. goto mwl8k_start_exit;
  2305. }
  2306. /* Disable WMM. WMM gets enabled when stack sends WMM parms */
  2307. if (mwl8k_set_wmm(hw, MWL8K_WMM_DISABLE)) {
  2308. rc = -EIO;
  2309. goto mwl8k_start_exit;
  2310. }
  2311. /* Disable sniffer mode */
  2312. if (mwl8k_enable_sniffer(hw, 0))
  2313. rc = -EIO;
  2314. mwl8k_start_exit:
  2315. return rc;
  2316. }
  2317. static int mwl8k_start(struct ieee80211_hw *hw)
  2318. {
  2319. struct mwl8k_start_worker *worker;
  2320. struct mwl8k_priv *priv = hw->priv;
  2321. int rc;
  2322. /* Enable tx reclaim tasklet */
  2323. tasklet_enable(&priv->tx_reclaim_task);
  2324. rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
  2325. IRQF_SHARED, MWL8K_NAME, hw);
  2326. if (rc) {
  2327. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2328. priv->name);
  2329. rc = -EIO;
  2330. goto mwl8k_start_disable_tasklet;
  2331. }
  2332. /* Enable interrupts */
  2333. iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2334. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2335. if (worker == NULL) {
  2336. rc = -ENOMEM;
  2337. goto mwl8k_start_disable_irq;
  2338. }
  2339. rc = mwl8k_queue_work(hw, &worker->header,
  2340. priv->config_wq, mwl8k_start_wt);
  2341. kfree(worker);
  2342. if (!rc)
  2343. return rc;
  2344. if (rc == -ETIMEDOUT)
  2345. printk(KERN_ERR "%s() timed out\n", __func__);
  2346. rc = -EIO;
  2347. mwl8k_start_disable_irq:
  2348. spin_lock_irq(&priv->tx_lock);
  2349. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2350. spin_unlock_irq(&priv->tx_lock);
  2351. free_irq(priv->pdev->irq, hw);
  2352. mwl8k_start_disable_tasklet:
  2353. tasklet_disable(&priv->tx_reclaim_task);
  2354. return rc;
  2355. }
  2356. struct mwl8k_stop_worker {
  2357. struct mwl8k_work_struct header;
  2358. };
  2359. static int mwl8k_stop_wt(struct work_struct *wt)
  2360. {
  2361. struct mwl8k_stop_worker *worker = (struct mwl8k_stop_worker *)wt;
  2362. struct ieee80211_hw *hw = worker->header.hw;
  2363. int rc;
  2364. rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
  2365. return rc;
  2366. }
  2367. static void mwl8k_stop(struct ieee80211_hw *hw)
  2368. {
  2369. int rc;
  2370. struct mwl8k_stop_worker *worker;
  2371. struct mwl8k_priv *priv = hw->priv;
  2372. int i;
  2373. if (priv->vif != NULL)
  2374. return;
  2375. ieee80211_stop_queues(hw);
  2376. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2377. if (worker == NULL)
  2378. return;
  2379. rc = mwl8k_queue_work(hw, &worker->header,
  2380. priv->config_wq, mwl8k_stop_wt);
  2381. kfree(worker);
  2382. if (rc == -ETIMEDOUT)
  2383. printk(KERN_ERR "%s() timed out\n", __func__);
  2384. /* Disable interrupts */
  2385. spin_lock_irq(&priv->tx_lock);
  2386. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2387. spin_unlock_irq(&priv->tx_lock);
  2388. free_irq(priv->pdev->irq, hw);
  2389. /* Stop finalize join worker */
  2390. cancel_work_sync(&priv->finalize_join_worker);
  2391. if (priv->beacon_skb != NULL)
  2392. dev_kfree_skb(priv->beacon_skb);
  2393. /* Stop tx reclaim tasklet */
  2394. tasklet_disable(&priv->tx_reclaim_task);
  2395. /* Stop config thread */
  2396. flush_workqueue(priv->config_wq);
  2397. /* Return all skbs to mac80211 */
  2398. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2399. mwl8k_txq_reclaim(hw, i, 1);
  2400. }
  2401. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2402. struct ieee80211_if_init_conf *conf)
  2403. {
  2404. struct mwl8k_priv *priv = hw->priv;
  2405. struct mwl8k_vif *mwl8k_vif;
  2406. /*
  2407. * We only support one active interface at a time.
  2408. */
  2409. if (priv->vif != NULL)
  2410. return -EBUSY;
  2411. /*
  2412. * We only support managed interfaces for now.
  2413. */
  2414. if (conf->type != NL80211_IFTYPE_STATION &&
  2415. conf->type != NL80211_IFTYPE_MONITOR)
  2416. return -EINVAL;
  2417. /* Clean out driver private area */
  2418. mwl8k_vif = MWL8K_VIF(conf->vif);
  2419. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2420. /* Save the mac address */
  2421. memcpy(mwl8k_vif->mac_addr, conf->mac_addr, IEEE80211_ADDR_LEN);
  2422. /* Back pointer to parent config block */
  2423. mwl8k_vif->priv = priv;
  2424. /* Setup initial PHY parameters */
  2425. memcpy(mwl8k_vif->legacy_rates ,
  2426. priv->rates, sizeof(mwl8k_vif->legacy_rates));
  2427. mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
  2428. /* Set Initial sequence number to zero */
  2429. mwl8k_vif->seqno = 0;
  2430. priv->vif = conf->vif;
  2431. priv->current_channel = NULL;
  2432. return 0;
  2433. }
  2434. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2435. struct ieee80211_if_init_conf *conf)
  2436. {
  2437. struct mwl8k_priv *priv = hw->priv;
  2438. if (priv->vif == NULL)
  2439. return;
  2440. priv->vif = NULL;
  2441. }
  2442. struct mwl8k_config_worker {
  2443. struct mwl8k_work_struct header;
  2444. u32 changed;
  2445. };
  2446. static int mwl8k_config_wt(struct work_struct *wt)
  2447. {
  2448. struct mwl8k_config_worker *worker =
  2449. (struct mwl8k_config_worker *)wt;
  2450. struct ieee80211_hw *hw = worker->header.hw;
  2451. struct ieee80211_conf *conf = &hw->conf;
  2452. struct mwl8k_priv *priv = hw->priv;
  2453. int rc = 0;
  2454. if (!conf->radio_enabled) {
  2455. mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
  2456. priv->current_channel = NULL;
  2457. rc = 0;
  2458. goto mwl8k_config_exit;
  2459. }
  2460. if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
  2461. rc = -EINVAL;
  2462. goto mwl8k_config_exit;
  2463. }
  2464. priv->current_channel = conf->channel;
  2465. if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
  2466. rc = -EINVAL;
  2467. goto mwl8k_config_exit;
  2468. }
  2469. if (conf->power_level > 18)
  2470. conf->power_level = 18;
  2471. if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
  2472. rc = -EINVAL;
  2473. goto mwl8k_config_exit;
  2474. }
  2475. if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
  2476. rc = -EINVAL;
  2477. mwl8k_config_exit:
  2478. return rc;
  2479. }
  2480. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2481. {
  2482. int rc = 0;
  2483. struct mwl8k_config_worker *worker;
  2484. struct mwl8k_priv *priv = hw->priv;
  2485. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2486. if (worker == NULL)
  2487. return -ENOMEM;
  2488. worker->changed = changed;
  2489. rc = mwl8k_queue_work(hw, &worker->header,
  2490. priv->config_wq, mwl8k_config_wt);
  2491. if (rc == -ETIMEDOUT) {
  2492. printk(KERN_ERR "%s() timed out.\n", __func__);
  2493. rc = -EINVAL;
  2494. }
  2495. kfree(worker);
  2496. /*
  2497. * mac80211 will crash on anything other than -EINVAL on
  2498. * error. Looks like wireless extensions which calls mac80211
  2499. * may be the actual culprit...
  2500. */
  2501. return rc ? -EINVAL : 0;
  2502. }
  2503. struct mwl8k_bss_info_changed_worker {
  2504. struct mwl8k_work_struct header;
  2505. struct ieee80211_vif *vif;
  2506. struct ieee80211_bss_conf *info;
  2507. u32 changed;
  2508. };
  2509. static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
  2510. {
  2511. struct mwl8k_bss_info_changed_worker *worker =
  2512. (struct mwl8k_bss_info_changed_worker *)wt;
  2513. struct ieee80211_hw *hw = worker->header.hw;
  2514. struct ieee80211_vif *vif = worker->vif;
  2515. struct ieee80211_bss_conf *info = worker->info;
  2516. u32 changed;
  2517. int rc;
  2518. struct mwl8k_priv *priv = hw->priv;
  2519. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2520. changed = worker->changed;
  2521. priv->capture_beacon = false;
  2522. if (info->assoc) {
  2523. memcpy(&mwl8k_vif->bss_info, info,
  2524. sizeof(struct ieee80211_bss_conf));
  2525. /* Install rates */
  2526. if (mwl8k_update_rateset(hw, vif))
  2527. goto mwl8k_bss_info_changed_exit;
  2528. /* Turn on rate adaptation */
  2529. if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
  2530. MWL8K_UCAST_RATE, NULL))
  2531. goto mwl8k_bss_info_changed_exit;
  2532. /* Set radio preamble */
  2533. if (mwl8k_set_radio_preamble(hw,
  2534. info->use_short_preamble))
  2535. goto mwl8k_bss_info_changed_exit;
  2536. /* Set slot time */
  2537. if (mwl8k_cmd_set_slot(hw, info->use_short_slot ?
  2538. MWL8K_SHORT_SLOTTIME : MWL8K_LONG_SLOTTIME))
  2539. goto mwl8k_bss_info_changed_exit;
  2540. /* Update peer rate info */
  2541. if (mwl8k_cmd_update_sta_db(hw, vif,
  2542. MWL8K_STA_DB_MODIFY_ENTRY))
  2543. goto mwl8k_bss_info_changed_exit;
  2544. /* Set AID */
  2545. if (mwl8k_cmd_set_aid(hw, vif))
  2546. goto mwl8k_bss_info_changed_exit;
  2547. /*
  2548. * Finalize the join. Tell rx handler to process
  2549. * next beacon from our BSSID.
  2550. */
  2551. memcpy(priv->capture_bssid,
  2552. mwl8k_vif->bssid, IEEE80211_ADDR_LEN);
  2553. priv->capture_beacon = true;
  2554. } else {
  2555. mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
  2556. memset(&mwl8k_vif->bss_info, 0,
  2557. sizeof(struct ieee80211_bss_conf));
  2558. memset(mwl8k_vif->bssid, 0, IEEE80211_ADDR_LEN);
  2559. }
  2560. mwl8k_bss_info_changed_exit:
  2561. rc = 0;
  2562. return rc;
  2563. }
  2564. static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
  2565. struct ieee80211_vif *vif,
  2566. struct ieee80211_bss_conf *info,
  2567. u32 changed)
  2568. {
  2569. struct mwl8k_bss_info_changed_worker *worker;
  2570. struct mwl8k_priv *priv = hw->priv;
  2571. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  2572. int rc;
  2573. if (changed & BSS_CHANGED_BSSID)
  2574. memcpy(mv_vif->bssid, info->bssid, IEEE80211_ADDR_LEN);
  2575. if ((changed & BSS_CHANGED_ASSOC) == 0)
  2576. return;
  2577. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2578. if (worker == NULL)
  2579. return;
  2580. worker->vif = vif;
  2581. worker->info = info;
  2582. worker->changed = changed;
  2583. rc = mwl8k_queue_work(hw, &worker->header,
  2584. priv->config_wq,
  2585. mwl8k_bss_info_changed_wt);
  2586. kfree(worker);
  2587. if (rc == -ETIMEDOUT)
  2588. printk(KERN_ERR "%s() timed out\n", __func__);
  2589. }
  2590. struct mwl8k_configure_filter_worker {
  2591. struct mwl8k_work_struct header;
  2592. unsigned int changed_flags;
  2593. unsigned int *total_flags;
  2594. int mc_count;
  2595. struct dev_addr_list *mclist;
  2596. };
  2597. #define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
  2598. static int mwl8k_configure_filter_wt(struct work_struct *wt)
  2599. {
  2600. struct mwl8k_configure_filter_worker *worker =
  2601. (struct mwl8k_configure_filter_worker *)wt;
  2602. struct ieee80211_hw *hw = worker->header.hw;
  2603. unsigned int changed_flags = worker->changed_flags;
  2604. unsigned int *total_flags = worker->total_flags;
  2605. int mc_count = worker->mc_count;
  2606. struct dev_addr_list *mclist = worker->mclist;
  2607. struct mwl8k_priv *priv = hw->priv;
  2608. int rc = 0;
  2609. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  2610. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  2611. rc = mwl8k_cmd_set_pre_scan(hw);
  2612. else {
  2613. u8 *bssid;
  2614. bssid = "\x00\x00\x00\x00\x00\x00";
  2615. if (priv->vif != NULL)
  2616. bssid = MWL8K_VIF(priv->vif)->bssid;
  2617. rc = mwl8k_cmd_set_post_scan(hw, bssid);
  2618. }
  2619. }
  2620. if (rc)
  2621. goto mwl8k_configure_filter_exit;
  2622. if (mc_count) {
  2623. mc_count = mc_count < priv->num_mcaddrs ?
  2624. mc_count : priv->num_mcaddrs;
  2625. rc = mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
  2626. if (rc)
  2627. printk(KERN_ERR
  2628. "%s()Error setting multicast addresses\n",
  2629. __func__);
  2630. }
  2631. mwl8k_configure_filter_exit:
  2632. return rc;
  2633. }
  2634. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  2635. unsigned int changed_flags,
  2636. unsigned int *total_flags,
  2637. int mc_count,
  2638. struct dev_addr_list *mclist)
  2639. {
  2640. struct mwl8k_configure_filter_worker *worker;
  2641. struct mwl8k_priv *priv = hw->priv;
  2642. /* Clear unsupported feature flags */
  2643. *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
  2644. if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS) && !mc_count)
  2645. return;
  2646. worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
  2647. if (worker == NULL)
  2648. return;
  2649. worker->header.options = MWL8K_WQ_QUEUE_ONLY | MWL8K_WQ_TX_WAIT_EMPTY;
  2650. worker->changed_flags = changed_flags;
  2651. worker->total_flags = total_flags;
  2652. worker->mc_count = mc_count;
  2653. worker->mclist = mclist;
  2654. mwl8k_queue_work(hw, &worker->header, priv->config_wq,
  2655. mwl8k_configure_filter_wt);
  2656. }
  2657. struct mwl8k_set_rts_threshold_worker {
  2658. struct mwl8k_work_struct header;
  2659. u32 value;
  2660. };
  2661. static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
  2662. {
  2663. struct mwl8k_set_rts_threshold_worker *worker =
  2664. (struct mwl8k_set_rts_threshold_worker *)wt;
  2665. struct ieee80211_hw *hw = worker->header.hw;
  2666. u16 threshold = (u16)(worker->value);
  2667. int rc;
  2668. rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
  2669. return rc;
  2670. }
  2671. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  2672. {
  2673. int rc;
  2674. struct mwl8k_set_rts_threshold_worker *worker;
  2675. struct mwl8k_priv *priv = hw->priv;
  2676. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2677. if (worker == NULL)
  2678. return -ENOMEM;
  2679. worker->value = value;
  2680. rc = mwl8k_queue_work(hw, &worker->header,
  2681. priv->config_wq,
  2682. mwl8k_set_rts_threshold_wt);
  2683. kfree(worker);
  2684. if (rc == -ETIMEDOUT) {
  2685. printk(KERN_ERR "%s() timed out\n", __func__);
  2686. rc = -EINVAL;
  2687. }
  2688. return rc;
  2689. }
  2690. struct mwl8k_conf_tx_worker {
  2691. struct mwl8k_work_struct header;
  2692. u16 queue;
  2693. const struct ieee80211_tx_queue_params *params;
  2694. };
  2695. static int mwl8k_conf_tx_wt(struct work_struct *wt)
  2696. {
  2697. struct mwl8k_conf_tx_worker *worker =
  2698. (struct mwl8k_conf_tx_worker *)wt;
  2699. struct ieee80211_hw *hw = worker->header.hw;
  2700. u16 queue = worker->queue;
  2701. const struct ieee80211_tx_queue_params *params = worker->params;
  2702. struct mwl8k_priv *priv = hw->priv;
  2703. int rc = 0;
  2704. if (priv->wmm_mode == MWL8K_WMM_DISABLE)
  2705. if (mwl8k_set_wmm(hw, MWL8K_WMM_ENABLE)) {
  2706. rc = -EINVAL;
  2707. goto mwl8k_conf_tx_exit;
  2708. }
  2709. if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
  2710. params->cw_max, params->aifs, params->txop))
  2711. rc = -EINVAL;
  2712. mwl8k_conf_tx_exit:
  2713. return rc;
  2714. }
  2715. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  2716. const struct ieee80211_tx_queue_params *params)
  2717. {
  2718. int rc;
  2719. struct mwl8k_conf_tx_worker *worker;
  2720. struct mwl8k_priv *priv = hw->priv;
  2721. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2722. if (worker == NULL)
  2723. return -ENOMEM;
  2724. worker->queue = queue;
  2725. worker->params = params;
  2726. rc = mwl8k_queue_work(hw, &worker->header,
  2727. priv->config_wq, mwl8k_conf_tx_wt);
  2728. kfree(worker);
  2729. if (rc == -ETIMEDOUT) {
  2730. printk(KERN_ERR "%s() timed out\n", __func__);
  2731. rc = -EINVAL;
  2732. }
  2733. return rc;
  2734. }
  2735. static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
  2736. struct ieee80211_tx_queue_stats *stats)
  2737. {
  2738. struct mwl8k_priv *priv = hw->priv;
  2739. struct mwl8k_tx_queue *txq;
  2740. int index;
  2741. spin_lock_bh(&priv->tx_lock);
  2742. for (index = 0; index < MWL8K_TX_QUEUES; index++) {
  2743. txq = priv->txq + index;
  2744. memcpy(&stats[index], &txq->tx_stats,
  2745. sizeof(struct ieee80211_tx_queue_stats));
  2746. }
  2747. spin_unlock_bh(&priv->tx_lock);
  2748. return 0;
  2749. }
  2750. struct mwl8k_get_stats_worker {
  2751. struct mwl8k_work_struct header;
  2752. struct ieee80211_low_level_stats *stats;
  2753. };
  2754. static int mwl8k_get_stats_wt(struct work_struct *wt)
  2755. {
  2756. struct mwl8k_get_stats_worker *worker =
  2757. (struct mwl8k_get_stats_worker *)wt;
  2758. return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
  2759. }
  2760. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  2761. struct ieee80211_low_level_stats *stats)
  2762. {
  2763. int rc;
  2764. struct mwl8k_get_stats_worker *worker;
  2765. struct mwl8k_priv *priv = hw->priv;
  2766. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2767. if (worker == NULL)
  2768. return -ENOMEM;
  2769. worker->stats = stats;
  2770. rc = mwl8k_queue_work(hw, &worker->header,
  2771. priv->config_wq, mwl8k_get_stats_wt);
  2772. kfree(worker);
  2773. if (rc == -ETIMEDOUT) {
  2774. printk(KERN_ERR "%s() timed out\n", __func__);
  2775. rc = -EINVAL;
  2776. }
  2777. return rc;
  2778. }
  2779. static const struct ieee80211_ops mwl8k_ops = {
  2780. .tx = mwl8k_tx,
  2781. .start = mwl8k_start,
  2782. .stop = mwl8k_stop,
  2783. .add_interface = mwl8k_add_interface,
  2784. .remove_interface = mwl8k_remove_interface,
  2785. .config = mwl8k_config,
  2786. .bss_info_changed = mwl8k_bss_info_changed,
  2787. .configure_filter = mwl8k_configure_filter,
  2788. .set_rts_threshold = mwl8k_set_rts_threshold,
  2789. .conf_tx = mwl8k_conf_tx,
  2790. .get_tx_stats = mwl8k_get_tx_stats,
  2791. .get_stats = mwl8k_get_stats,
  2792. };
  2793. static void mwl8k_tx_reclaim_handler(unsigned long data)
  2794. {
  2795. int i;
  2796. struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
  2797. struct mwl8k_priv *priv = hw->priv;
  2798. spin_lock_bh(&priv->tx_lock);
  2799. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2800. mwl8k_txq_reclaim(hw, i, 0);
  2801. if (priv->tx_wait != NULL) {
  2802. int count = mwl8k_txq_busy(priv);
  2803. if (count == 0) {
  2804. complete(priv->tx_wait);
  2805. priv->tx_wait = NULL;
  2806. }
  2807. }
  2808. spin_unlock_bh(&priv->tx_lock);
  2809. }
  2810. static void mwl8k_finalize_join_worker(struct work_struct *work)
  2811. {
  2812. struct mwl8k_priv *priv =
  2813. container_of(work, struct mwl8k_priv, finalize_join_worker);
  2814. struct sk_buff *skb = priv->beacon_skb;
  2815. u8 dtim = (MWL8K_VIF(priv->vif))->bss_info.dtim_period;
  2816. mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
  2817. dev_kfree_skb(skb);
  2818. priv->beacon_skb = NULL;
  2819. }
  2820. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  2821. const struct pci_device_id *id)
  2822. {
  2823. struct ieee80211_hw *hw;
  2824. struct mwl8k_priv *priv;
  2825. DECLARE_MAC_BUF(mac);
  2826. int rc;
  2827. int i;
  2828. u8 *fw;
  2829. rc = pci_enable_device(pdev);
  2830. if (rc) {
  2831. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  2832. MWL8K_NAME);
  2833. return rc;
  2834. }
  2835. rc = pci_request_regions(pdev, MWL8K_NAME);
  2836. if (rc) {
  2837. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  2838. MWL8K_NAME);
  2839. return rc;
  2840. }
  2841. pci_set_master(pdev);
  2842. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  2843. if (hw == NULL) {
  2844. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  2845. rc = -ENOMEM;
  2846. goto err_free_reg;
  2847. }
  2848. priv = hw->priv;
  2849. priv->hw = hw;
  2850. priv->pdev = pdev;
  2851. priv->hostcmd_wait = NULL;
  2852. priv->tx_wait = NULL;
  2853. priv->inconfig = false;
  2854. priv->wep_enabled = 0;
  2855. priv->wmm_mode = false;
  2856. priv->pending_tx_pkts = 0;
  2857. strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
  2858. spin_lock_init(&priv->fw_lock);
  2859. SET_IEEE80211_DEV(hw, &pdev->dev);
  2860. pci_set_drvdata(pdev, hw);
  2861. priv->regs = pci_iomap(pdev, 1, 0x10000);
  2862. if (priv->regs == NULL) {
  2863. printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
  2864. goto err_iounmap;
  2865. }
  2866. memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
  2867. priv->band.band = IEEE80211_BAND_2GHZ;
  2868. priv->band.channels = priv->channels;
  2869. priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
  2870. priv->band.bitrates = priv->rates;
  2871. priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
  2872. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
  2873. BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
  2874. memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
  2875. /*
  2876. * Extra headroom is the size of the required DMA header
  2877. * minus the size of the smallest 802.11 frame (CTS frame).
  2878. */
  2879. hw->extra_tx_headroom =
  2880. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  2881. hw->channel_change_time = 10;
  2882. hw->queues = MWL8K_TX_QUEUES;
  2883. hw->wiphy->interface_modes =
  2884. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_MONITOR);
  2885. /* Set rssi and noise values to dBm */
  2886. hw->flags |= (IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM);
  2887. hw->vif_data_size = sizeof(struct mwl8k_vif);
  2888. priv->vif = NULL;
  2889. /* Set default radio state and preamble */
  2890. priv->radio_preamble = MWL8K_RADIO_DEFAULT_PREAMBLE;
  2891. priv->radio_state = MWL8K_RADIO_DISABLE;
  2892. /* Finalize join worker */
  2893. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  2894. /* TX reclaim tasklet */
  2895. tasklet_init(&priv->tx_reclaim_task,
  2896. mwl8k_tx_reclaim_handler, (unsigned long)hw);
  2897. tasklet_disable(&priv->tx_reclaim_task);
  2898. /* Config workthread */
  2899. priv->config_wq = create_singlethread_workqueue("mwl8k_config");
  2900. if (priv->config_wq == NULL)
  2901. goto err_iounmap;
  2902. /* Power management cookie */
  2903. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  2904. if (priv->cookie == NULL)
  2905. goto err_iounmap;
  2906. rc = mwl8k_rxq_init(hw, 0);
  2907. if (rc)
  2908. goto err_iounmap;
  2909. rxq_refill(hw, 0, INT_MAX);
  2910. spin_lock_init(&priv->tx_lock);
  2911. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  2912. rc = mwl8k_txq_init(hw, i);
  2913. if (rc)
  2914. goto err_free_queues;
  2915. }
  2916. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2917. priv->int_mask = 0;
  2918. iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2919. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  2920. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  2921. rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
  2922. IRQF_SHARED, MWL8K_NAME, hw);
  2923. if (rc) {
  2924. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2925. priv->name);
  2926. goto err_free_queues;
  2927. }
  2928. /* Reset firmware and hardware */
  2929. mwl8k_hw_reset(priv);
  2930. /* Ask userland hotplug daemon for the device firmware */
  2931. rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
  2932. if (rc) {
  2933. printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
  2934. goto err_free_irq;
  2935. }
  2936. /* Load firmware into hardware */
  2937. rc = mwl8k_load_firmware(priv);
  2938. if (rc) {
  2939. printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
  2940. goto err_stop_firmware;
  2941. }
  2942. /* Reclaim memory once firmware is successfully loaded */
  2943. mwl8k_release_firmware(priv);
  2944. /*
  2945. * Temporarily enable interrupts. Initial firmware host
  2946. * commands use interrupts and avoids polling. Disable
  2947. * interrupts when done.
  2948. */
  2949. priv->int_mask |= MWL8K_A2H_EVENTS;
  2950. iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2951. /* Get config data, mac addrs etc */
  2952. rc = mwl8k_cmd_get_hw_spec(hw);
  2953. if (rc) {
  2954. printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
  2955. goto err_stop_firmware;
  2956. }
  2957. /* Turn radio off */
  2958. rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
  2959. if (rc) {
  2960. printk(KERN_ERR "%s: Cannot disable\n", priv->name);
  2961. goto err_stop_firmware;
  2962. }
  2963. /* Disable interrupts */
  2964. spin_lock_irq(&priv->tx_lock);
  2965. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2966. spin_unlock_irq(&priv->tx_lock);
  2967. free_irq(priv->pdev->irq, hw);
  2968. rc = ieee80211_register_hw(hw);
  2969. if (rc) {
  2970. printk(KERN_ERR "%s: Cannot register device\n", priv->name);
  2971. goto err_stop_firmware;
  2972. }
  2973. fw = (u8 *)&priv->fw_rev;
  2974. printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
  2975. MWL8K_DESC);
  2976. printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
  2977. priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
  2978. printk(KERN_INFO "%s: MAC Address: %s\n", priv->name,
  2979. print_mac(mac, hw->wiphy->perm_addr));
  2980. return 0;
  2981. err_stop_firmware:
  2982. mwl8k_hw_reset(priv);
  2983. mwl8k_release_firmware(priv);
  2984. err_free_irq:
  2985. spin_lock_irq(&priv->tx_lock);
  2986. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2987. spin_unlock_irq(&priv->tx_lock);
  2988. free_irq(priv->pdev->irq, hw);
  2989. err_free_queues:
  2990. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2991. mwl8k_txq_deinit(hw, i);
  2992. mwl8k_rxq_deinit(hw, 0);
  2993. err_iounmap:
  2994. if (priv->cookie != NULL)
  2995. pci_free_consistent(priv->pdev, 4,
  2996. priv->cookie, priv->cookie_dma);
  2997. if (priv->regs != NULL)
  2998. pci_iounmap(pdev, priv->regs);
  2999. if (priv->config_wq != NULL)
  3000. destroy_workqueue(priv->config_wq);
  3001. pci_set_drvdata(pdev, NULL);
  3002. ieee80211_free_hw(hw);
  3003. err_free_reg:
  3004. pci_release_regions(pdev);
  3005. pci_disable_device(pdev);
  3006. return rc;
  3007. }
  3008. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  3009. {
  3010. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  3011. }
  3012. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  3013. {
  3014. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  3015. struct mwl8k_priv *priv;
  3016. int i;
  3017. if (hw == NULL)
  3018. return;
  3019. priv = hw->priv;
  3020. ieee80211_stop_queues(hw);
  3021. /* Remove tx reclaim tasklet */
  3022. tasklet_kill(&priv->tx_reclaim_task);
  3023. /* Stop config thread */
  3024. destroy_workqueue(priv->config_wq);
  3025. /* Stop hardware */
  3026. mwl8k_hw_reset(priv);
  3027. /* Return all skbs to mac80211 */
  3028. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3029. mwl8k_txq_reclaim(hw, i, 1);
  3030. ieee80211_unregister_hw(hw);
  3031. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3032. mwl8k_txq_deinit(hw, i);
  3033. mwl8k_rxq_deinit(hw, 0);
  3034. pci_free_consistent(priv->pdev, 4,
  3035. priv->cookie, priv->cookie_dma);
  3036. pci_iounmap(pdev, priv->regs);
  3037. pci_set_drvdata(pdev, NULL);
  3038. ieee80211_free_hw(hw);
  3039. pci_release_regions(pdev);
  3040. pci_disable_device(pdev);
  3041. }
  3042. static struct pci_driver mwl8k_driver = {
  3043. .name = MWL8K_NAME,
  3044. .id_table = mwl8k_table,
  3045. .probe = mwl8k_probe,
  3046. .remove = __devexit_p(mwl8k_remove),
  3047. .shutdown = __devexit_p(mwl8k_shutdown),
  3048. };
  3049. static int __init mwl8k_init(void)
  3050. {
  3051. return pci_register_driver(&mwl8k_driver);
  3052. }
  3053. static void __exit mwl8k_exit(void)
  3054. {
  3055. pci_unregister_driver(&mwl8k_driver);
  3056. }
  3057. module_init(mwl8k_init);
  3058. module_exit(mwl8k_exit);