s390mach.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525
  1. /*
  2. * drivers/s390/s390mach.c
  3. * S/390 machine check handler
  4. *
  5. * S390 version
  6. * Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
  7. * Author(s): Ingo Adlung (adlung@de.ibm.com)
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com)
  9. */
  10. #include <linux/init.h>
  11. #include <linux/sched.h>
  12. #include <linux/errno.h>
  13. #include <linux/workqueue.h>
  14. #include <linux/time.h>
  15. #include <linux/kthread.h>
  16. #include <asm/lowcore.h>
  17. #include "s390mach.h"
  18. #define DBG printk
  19. // #define DBG(args,...) do {} while (0);
  20. static struct semaphore m_sem;
  21. extern int css_process_crw(int, int);
  22. extern int chsc_process_crw(void);
  23. extern int chp_process_crw(int, int);
  24. extern void css_reiterate_subchannels(void);
  25. extern struct workqueue_struct *slow_path_wq;
  26. extern struct work_struct slow_path_work;
  27. static NORET_TYPE void
  28. s390_handle_damage(char *msg)
  29. {
  30. #ifdef CONFIG_SMP
  31. smp_send_stop();
  32. #endif
  33. disabled_wait((unsigned long) __builtin_return_address(0));
  34. for(;;);
  35. }
  36. /*
  37. * Retrieve CRWs and call function to handle event.
  38. *
  39. * Note : we currently process CRWs for io and chsc subchannels only
  40. */
  41. static int
  42. s390_collect_crw_info(void *param)
  43. {
  44. struct crw crw[2];
  45. int ccode, ret, slow;
  46. struct semaphore *sem;
  47. unsigned int chain;
  48. sem = (struct semaphore *)param;
  49. repeat:
  50. down_interruptible(sem);
  51. slow = 0;
  52. chain = 0;
  53. while (1) {
  54. if (unlikely(chain > 1)) {
  55. struct crw tmp_crw;
  56. printk(KERN_WARNING"%s: Code does not support more "
  57. "than two chained crws; please report to "
  58. "linux390@de.ibm.com!\n", __FUNCTION__);
  59. ccode = stcrw(&tmp_crw);
  60. printk(KERN_WARNING"%s: crw reports slct=%d, oflw=%d, "
  61. "chn=%d, rsc=%X, anc=%d, erc=%X, rsid=%X\n",
  62. __FUNCTION__, tmp_crw.slct, tmp_crw.oflw,
  63. tmp_crw.chn, tmp_crw.rsc, tmp_crw.anc,
  64. tmp_crw.erc, tmp_crw.rsid);
  65. printk(KERN_WARNING"%s: This was crw number %x in the "
  66. "chain\n", __FUNCTION__, chain);
  67. if (ccode != 0)
  68. break;
  69. chain = tmp_crw.chn ? chain + 1 : 0;
  70. continue;
  71. }
  72. ccode = stcrw(&crw[chain]);
  73. if (ccode != 0)
  74. break;
  75. DBG(KERN_DEBUG "crw_info : CRW reports slct=%d, oflw=%d, "
  76. "chn=%d, rsc=%X, anc=%d, erc=%X, rsid=%X\n",
  77. crw[chain].slct, crw[chain].oflw, crw[chain].chn,
  78. crw[chain].rsc, crw[chain].anc, crw[chain].erc,
  79. crw[chain].rsid);
  80. /* Check for overflows. */
  81. if (crw[chain].oflw) {
  82. pr_debug("%s: crw overflow detected!\n", __FUNCTION__);
  83. css_reiterate_subchannels();
  84. chain = 0;
  85. slow = 1;
  86. continue;
  87. }
  88. switch (crw[chain].rsc) {
  89. case CRW_RSC_SCH:
  90. if (crw[0].chn && !chain)
  91. break;
  92. pr_debug("source is subchannel %04X\n", crw[0].rsid);
  93. ret = css_process_crw (crw[0].rsid,
  94. chain ? crw[1].rsid : 0);
  95. if (ret == -EAGAIN)
  96. slow = 1;
  97. break;
  98. case CRW_RSC_MONITOR:
  99. pr_debug("source is monitoring facility\n");
  100. break;
  101. case CRW_RSC_CPATH:
  102. pr_debug("source is channel path %02X\n", crw[0].rsid);
  103. switch (crw[0].erc) {
  104. case CRW_ERC_IPARM: /* Path has come. */
  105. ret = chp_process_crw(crw[0].rsid, 1);
  106. break;
  107. case CRW_ERC_PERRI: /* Path has gone. */
  108. case CRW_ERC_PERRN:
  109. ret = chp_process_crw(crw[0].rsid, 0);
  110. break;
  111. default:
  112. pr_debug("Don't know how to handle erc=%x\n",
  113. crw[0].erc);
  114. ret = 0;
  115. }
  116. if (ret == -EAGAIN)
  117. slow = 1;
  118. break;
  119. case CRW_RSC_CONFIG:
  120. pr_debug("source is configuration-alert facility\n");
  121. break;
  122. case CRW_RSC_CSS:
  123. pr_debug("source is channel subsystem\n");
  124. ret = chsc_process_crw();
  125. if (ret == -EAGAIN)
  126. slow = 1;
  127. break;
  128. default:
  129. pr_debug("unknown source\n");
  130. break;
  131. }
  132. /* chain is always 0 or 1 here. */
  133. chain = crw[chain].chn ? chain + 1 : 0;
  134. }
  135. if (slow)
  136. queue_work(slow_path_wq, &slow_path_work);
  137. goto repeat;
  138. return 0;
  139. }
  140. struct mcck_struct {
  141. int kill_task;
  142. int channel_report;
  143. int warning;
  144. unsigned long long mcck_code;
  145. };
  146. static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck);
  147. /*
  148. * Main machine check handler function. Will be called with interrupts enabled
  149. * or disabled and machine checks enabled or disabled.
  150. */
  151. void
  152. s390_handle_mcck(void)
  153. {
  154. unsigned long flags;
  155. struct mcck_struct mcck;
  156. /*
  157. * Disable machine checks and get the current state of accumulated
  158. * machine checks. Afterwards delete the old state and enable machine
  159. * checks again.
  160. */
  161. local_irq_save(flags);
  162. local_mcck_disable();
  163. mcck = __get_cpu_var(cpu_mcck);
  164. memset(&__get_cpu_var(cpu_mcck), 0, sizeof(struct mcck_struct));
  165. clear_thread_flag(TIF_MCCK_PENDING);
  166. local_mcck_enable();
  167. local_irq_restore(flags);
  168. if (mcck.channel_report)
  169. up(&m_sem);
  170. #ifdef CONFIG_MACHCHK_WARNING
  171. /*
  172. * The warning may remain for a prolonged period on the bare iron.
  173. * (actually till the machine is powered off, or until the problem is gone)
  174. * So we just stop listening for the WARNING MCH and prevent continuously
  175. * being interrupted. One caveat is however, that we must do this per
  176. * processor and cannot use the smp version of ctl_clear_bit().
  177. * On VM we only get one interrupt per virtally presented machinecheck.
  178. * Though one suffices, we may get one interrupt per (virtual) processor.
  179. */
  180. if (mcck.warning) { /* WARNING pending ? */
  181. static int mchchk_wng_posted = 0;
  182. /*
  183. * Use single machine clear, as we cannot handle smp right now
  184. */
  185. __ctl_clear_bit(14, 24); /* Disable WARNING MCH */
  186. if (xchg(&mchchk_wng_posted, 1) == 0)
  187. kill_proc(1, SIGPWR, 1);
  188. }
  189. #endif
  190. if (mcck.kill_task) {
  191. local_irq_enable();
  192. printk(KERN_EMERG "mcck: Terminating task because of machine "
  193. "malfunction (code 0x%016llx).\n", mcck.mcck_code);
  194. printk(KERN_EMERG "mcck: task: %s, pid: %d.\n",
  195. current->comm, current->pid);
  196. do_exit(SIGSEGV);
  197. }
  198. }
  199. /*
  200. * returns 0 if all registers could be validated
  201. * returns 1 otherwise
  202. */
  203. static int
  204. s390_revalidate_registers(struct mci *mci)
  205. {
  206. int kill_task;
  207. u64 tmpclock;
  208. u64 zero;
  209. void *fpt_save_area, *fpt_creg_save_area;
  210. kill_task = 0;
  211. zero = 0;
  212. /* General purpose registers */
  213. if (!mci->gr)
  214. /*
  215. * General purpose registers couldn't be restored and have
  216. * unknown contents. Process needs to be terminated.
  217. */
  218. kill_task = 1;
  219. /* Revalidate floating point registers */
  220. if (!mci->fp)
  221. /*
  222. * Floating point registers can't be restored and
  223. * therefore the process needs to be terminated.
  224. */
  225. kill_task = 1;
  226. #ifndef CONFIG_64BIT
  227. asm volatile("ld 0,0(%0)\n"
  228. "ld 2,8(%0)\n"
  229. "ld 4,16(%0)\n"
  230. "ld 6,24(%0)"
  231. : : "a" (&S390_lowcore.floating_pt_save_area));
  232. #endif
  233. if (MACHINE_HAS_IEEE) {
  234. #ifdef CONFIG_64BIT
  235. fpt_save_area = &S390_lowcore.floating_pt_save_area;
  236. fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area;
  237. #else
  238. fpt_save_area = (void *) S390_lowcore.extended_save_area_addr;
  239. fpt_creg_save_area = fpt_save_area+128;
  240. #endif
  241. /* Floating point control register */
  242. if (!mci->fc) {
  243. /*
  244. * Floating point control register can't be restored.
  245. * Task will be terminated.
  246. */
  247. asm volatile ("lfpc 0(%0)" : : "a" (&zero), "m" (zero));
  248. kill_task = 1;
  249. }
  250. else
  251. asm volatile (
  252. "lfpc 0(%0)"
  253. : : "a" (fpt_creg_save_area));
  254. asm volatile("ld 0,0(%0)\n"
  255. "ld 1,8(%0)\n"
  256. "ld 2,16(%0)\n"
  257. "ld 3,24(%0)\n"
  258. "ld 4,32(%0)\n"
  259. "ld 5,40(%0)\n"
  260. "ld 6,48(%0)\n"
  261. "ld 7,56(%0)\n"
  262. "ld 8,64(%0)\n"
  263. "ld 9,72(%0)\n"
  264. "ld 10,80(%0)\n"
  265. "ld 11,88(%0)\n"
  266. "ld 12,96(%0)\n"
  267. "ld 13,104(%0)\n"
  268. "ld 14,112(%0)\n"
  269. "ld 15,120(%0)\n"
  270. : : "a" (fpt_save_area));
  271. }
  272. /* Revalidate access registers */
  273. asm volatile("lam 0,15,0(%0)"
  274. : : "a" (&S390_lowcore.access_regs_save_area));
  275. if (!mci->ar)
  276. /*
  277. * Access registers have unknown contents.
  278. * Terminating task.
  279. */
  280. kill_task = 1;
  281. /* Revalidate control registers */
  282. if (!mci->cr)
  283. /*
  284. * Control registers have unknown contents.
  285. * Can't recover and therefore stopping machine.
  286. */
  287. s390_handle_damage("invalid control registers.");
  288. else
  289. #ifdef CONFIG_64BIT
  290. asm volatile("lctlg 0,15,0(%0)"
  291. : : "a" (&S390_lowcore.cregs_save_area));
  292. #else
  293. asm volatile("lctl 0,15,0(%0)"
  294. : : "a" (&S390_lowcore.cregs_save_area));
  295. #endif
  296. /*
  297. * We don't even try to revalidate the TOD register, since we simply
  298. * can't write something sensible into that register.
  299. */
  300. #ifdef CONFIG_64BIT
  301. /*
  302. * See if we can revalidate the TOD programmable register with its
  303. * old contents (should be zero) otherwise set it to zero.
  304. */
  305. if (!mci->pr)
  306. asm volatile("sr 0,0\n"
  307. "sckpf"
  308. : : : "0", "cc");
  309. else
  310. asm volatile(
  311. "l 0,0(%0)\n"
  312. "sckpf"
  313. : : "a" (&S390_lowcore.tod_progreg_save_area) : "0", "cc");
  314. #endif
  315. /* Revalidate clock comparator register */
  316. asm volatile ("stck 0(%1)\n"
  317. "sckc 0(%1)"
  318. : "=m" (tmpclock) : "a" (&(tmpclock)) : "cc", "memory");
  319. /* Check if old PSW is valid */
  320. if (!mci->wp)
  321. /*
  322. * Can't tell if we come from user or kernel mode
  323. * -> stopping machine.
  324. */
  325. s390_handle_damage("old psw invalid.");
  326. if (!mci->ms || !mci->pm || !mci->ia)
  327. kill_task = 1;
  328. return kill_task;
  329. }
  330. #define MAX_IPD_COUNT 29
  331. #define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */
  332. /*
  333. * machine check handler.
  334. */
  335. void
  336. s390_do_machine_check(struct pt_regs *regs)
  337. {
  338. static DEFINE_SPINLOCK(ipd_lock);
  339. static unsigned long long last_ipd;
  340. static int ipd_count;
  341. unsigned long long tmp;
  342. struct mci *mci;
  343. struct mcck_struct *mcck;
  344. int umode;
  345. lockdep_off();
  346. mci = (struct mci *) &S390_lowcore.mcck_interruption_code;
  347. mcck = &__get_cpu_var(cpu_mcck);
  348. umode = user_mode(regs);
  349. if (mci->sd)
  350. /* System damage -> stopping machine */
  351. s390_handle_damage("received system damage machine check.");
  352. if (mci->pd) {
  353. if (mci->b) {
  354. /* Processing backup -> verify if we can survive this */
  355. u64 z_mcic, o_mcic, t_mcic;
  356. #ifdef CONFIG_64BIT
  357. z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29);
  358. o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 |
  359. 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 |
  360. 1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 |
  361. 1ULL<<16);
  362. #else
  363. z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<57 | 1ULL<<50 |
  364. 1ULL<<29);
  365. o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 |
  366. 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 |
  367. 1ULL<<30 | 1ULL<<20 | 1ULL<<17 | 1ULL<<16);
  368. #endif
  369. t_mcic = *(u64 *)mci;
  370. if (((t_mcic & z_mcic) != 0) ||
  371. ((t_mcic & o_mcic) != o_mcic)) {
  372. s390_handle_damage("processing backup machine "
  373. "check with damage.");
  374. }
  375. /*
  376. * Nullifying exigent condition, therefore we might
  377. * retry this instruction.
  378. */
  379. spin_lock(&ipd_lock);
  380. tmp = get_clock();
  381. if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME)
  382. ipd_count++;
  383. else
  384. ipd_count = 1;
  385. last_ipd = tmp;
  386. if (ipd_count == MAX_IPD_COUNT)
  387. s390_handle_damage("too many ipd retries.");
  388. spin_unlock(&ipd_lock);
  389. }
  390. else {
  391. /* Processing damage -> stopping machine */
  392. s390_handle_damage("received instruction processing "
  393. "damage machine check.");
  394. }
  395. }
  396. if (s390_revalidate_registers(mci)) {
  397. if (umode) {
  398. /*
  399. * Couldn't restore all register contents while in
  400. * user mode -> mark task for termination.
  401. */
  402. mcck->kill_task = 1;
  403. mcck->mcck_code = *(unsigned long long *) mci;
  404. set_thread_flag(TIF_MCCK_PENDING);
  405. }
  406. else
  407. /*
  408. * Couldn't restore all register contents while in
  409. * kernel mode -> stopping machine.
  410. */
  411. s390_handle_damage("unable to revalidate registers.");
  412. }
  413. if (mci->se)
  414. /* Storage error uncorrected */
  415. s390_handle_damage("received storage error uncorrected "
  416. "machine check.");
  417. if (mci->ke)
  418. /* Storage key-error uncorrected */
  419. s390_handle_damage("received storage key-error uncorrected "
  420. "machine check.");
  421. if (mci->ds && mci->fa)
  422. /* Storage degradation */
  423. s390_handle_damage("received storage degradation machine "
  424. "check.");
  425. if (mci->cp) {
  426. /* Channel report word pending */
  427. mcck->channel_report = 1;
  428. set_thread_flag(TIF_MCCK_PENDING);
  429. }
  430. if (mci->w) {
  431. /* Warning pending */
  432. mcck->warning = 1;
  433. set_thread_flag(TIF_MCCK_PENDING);
  434. }
  435. lockdep_on();
  436. }
  437. /*
  438. * s390_init_machine_check
  439. *
  440. * initialize machine check handling
  441. */
  442. static int
  443. machine_check_init(void)
  444. {
  445. init_MUTEX_LOCKED(&m_sem);
  446. ctl_clear_bit(14, 25); /* disable external damage MCH */
  447. ctl_set_bit(14, 27); /* enable system recovery MCH */
  448. #ifdef CONFIG_MACHCHK_WARNING
  449. ctl_set_bit(14, 24); /* enable warning MCH */
  450. #endif
  451. return 0;
  452. }
  453. /*
  454. * Initialize the machine check handler really early to be able to
  455. * catch all machine checks that happen during boot
  456. */
  457. arch_initcall(machine_check_init);
  458. /*
  459. * Machine checks for the channel subsystem must be enabled
  460. * after the channel subsystem is initialized
  461. */
  462. static int __init
  463. machine_check_crw_init (void)
  464. {
  465. kthread_run(s390_collect_crw_info, &m_sem, "kmcheck");
  466. ctl_set_bit(14, 28); /* enable channel report MCH */
  467. return 0;
  468. }
  469. device_initcall (machine_check_crw_init);