smc911x.c 60 KB

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  1. /*
  2. * smc911x.c
  3. * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
  4. *
  5. * Copyright (C) 2005 Sensoria Corp
  6. * Derived from the unified SMC91x driver by Nicolas Pitre
  7. * and the smsc911x.c reference driver by SMSC
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. * Arguments:
  24. * watchdog = TX watchdog timeout
  25. * tx_fifo_kb = Size of TX FIFO in KB
  26. *
  27. * History:
  28. * 04/16/05 Dustin McIntire Initial version
  29. */
  30. static const char version[] =
  31. "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
  32. /* Debugging options */
  33. #define ENABLE_SMC_DEBUG_RX 0
  34. #define ENABLE_SMC_DEBUG_TX 0
  35. #define ENABLE_SMC_DEBUG_DMA 0
  36. #define ENABLE_SMC_DEBUG_PKTS 0
  37. #define ENABLE_SMC_DEBUG_MISC 0
  38. #define ENABLE_SMC_DEBUG_FUNC 0
  39. #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
  40. #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
  41. #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
  42. #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
  43. #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
  44. #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
  45. #ifndef SMC_DEBUG
  46. #define SMC_DEBUG ( SMC_DEBUG_RX | \
  47. SMC_DEBUG_TX | \
  48. SMC_DEBUG_DMA | \
  49. SMC_DEBUG_PKTS | \
  50. SMC_DEBUG_MISC | \
  51. SMC_DEBUG_FUNC \
  52. )
  53. #endif
  54. #include <linux/config.h>
  55. #include <linux/init.h>
  56. #include <linux/module.h>
  57. #include <linux/kernel.h>
  58. #include <linux/sched.h>
  59. #include <linux/slab.h>
  60. #include <linux/delay.h>
  61. #include <linux/interrupt.h>
  62. #include <linux/errno.h>
  63. #include <linux/ioport.h>
  64. #include <linux/crc32.h>
  65. #include <linux/device.h>
  66. #include <linux/platform_device.h>
  67. #include <linux/spinlock.h>
  68. #include <linux/ethtool.h>
  69. #include <linux/mii.h>
  70. #include <linux/workqueue.h>
  71. #include <linux/netdevice.h>
  72. #include <linux/etherdevice.h>
  73. #include <linux/skbuff.h>
  74. #include <asm/io.h>
  75. #include <asm/irq.h>
  76. #include "smc911x.h"
  77. /*
  78. * Transmit timeout, default 5 seconds.
  79. */
  80. static int watchdog = 5000;
  81. module_param(watchdog, int, 0400);
  82. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  83. static int tx_fifo_kb=8;
  84. module_param(tx_fifo_kb, int, 0400);
  85. MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
  86. MODULE_LICENSE("GPL");
  87. /*
  88. * The internal workings of the driver. If you are changing anything
  89. * here with the SMC stuff, you should have the datasheet and know
  90. * what you are doing.
  91. */
  92. #define CARDNAME "smc911x"
  93. /*
  94. * Use power-down feature of the chip
  95. */
  96. #define POWER_DOWN 1
  97. /* store this information for the driver.. */
  98. struct smc911x_local {
  99. /*
  100. * If I have to wait until the DMA is finished and ready to reload a
  101. * packet, I will store the skbuff here. Then, the DMA will send it
  102. * out and free it.
  103. */
  104. struct sk_buff *pending_tx_skb;
  105. /*
  106. * these are things that the kernel wants me to keep, so users
  107. * can find out semi-useless statistics of how well the card is
  108. * performing
  109. */
  110. struct net_device_stats stats;
  111. /* version/revision of the SMC911x chip */
  112. u16 version;
  113. u16 revision;
  114. /* FIFO sizes */
  115. int tx_fifo_kb;
  116. int tx_fifo_size;
  117. int rx_fifo_size;
  118. int afc_cfg;
  119. /* Contains the current active receive/phy mode */
  120. int ctl_rfduplx;
  121. int ctl_rspeed;
  122. u32 msg_enable;
  123. u32 phy_type;
  124. struct mii_if_info mii;
  125. /* work queue */
  126. struct work_struct phy_configure;
  127. int work_pending;
  128. int tx_throttle;
  129. spinlock_t lock;
  130. #ifdef SMC_USE_DMA
  131. /* DMA needs the physical address of the chip */
  132. u_long physaddr;
  133. int rxdma;
  134. int txdma;
  135. int rxdma_active;
  136. int txdma_active;
  137. struct sk_buff *current_rx_skb;
  138. struct sk_buff *current_tx_skb;
  139. struct device *dev;
  140. #endif
  141. };
  142. #if SMC_DEBUG > 0
  143. #define DBG(n, args...) \
  144. do { \
  145. if (SMC_DEBUG & (n)) \
  146. printk(args); \
  147. } while (0)
  148. #define PRINTK(args...) printk(args)
  149. #else
  150. #define DBG(n, args...) do { } while (0)
  151. #define PRINTK(args...) printk(KERN_DEBUG args)
  152. #endif
  153. #if SMC_DEBUG_PKTS > 0
  154. static void PRINT_PKT(u_char *buf, int length)
  155. {
  156. int i;
  157. int remainder;
  158. int lines;
  159. lines = length / 16;
  160. remainder = length % 16;
  161. for (i = 0; i < lines ; i ++) {
  162. int cur;
  163. for (cur = 0; cur < 8; cur++) {
  164. u_char a, b;
  165. a = *buf++;
  166. b = *buf++;
  167. printk("%02x%02x ", a, b);
  168. }
  169. printk("\n");
  170. }
  171. for (i = 0; i < remainder/2 ; i++) {
  172. u_char a, b;
  173. a = *buf++;
  174. b = *buf++;
  175. printk("%02x%02x ", a, b);
  176. }
  177. printk("\n");
  178. }
  179. #else
  180. #define PRINT_PKT(x...) do { } while (0)
  181. #endif
  182. /* this enables an interrupt in the interrupt mask register */
  183. #define SMC_ENABLE_INT(x) do { \
  184. unsigned int __mask; \
  185. unsigned long __flags; \
  186. spin_lock_irqsave(&lp->lock, __flags); \
  187. __mask = SMC_GET_INT_EN(); \
  188. __mask |= (x); \
  189. SMC_SET_INT_EN(__mask); \
  190. spin_unlock_irqrestore(&lp->lock, __flags); \
  191. } while (0)
  192. /* this disables an interrupt from the interrupt mask register */
  193. #define SMC_DISABLE_INT(x) do { \
  194. unsigned int __mask; \
  195. unsigned long __flags; \
  196. spin_lock_irqsave(&lp->lock, __flags); \
  197. __mask = SMC_GET_INT_EN(); \
  198. __mask &= ~(x); \
  199. SMC_SET_INT_EN(__mask); \
  200. spin_unlock_irqrestore(&lp->lock, __flags); \
  201. } while (0)
  202. /*
  203. * this does a soft reset on the device
  204. */
  205. static void smc911x_reset(struct net_device *dev)
  206. {
  207. unsigned long ioaddr = dev->base_addr;
  208. struct smc911x_local *lp = netdev_priv(dev);
  209. unsigned int reg, timeout=0, resets=1;
  210. unsigned long flags;
  211. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  212. /* Take out of PM setting first */
  213. if ((SMC_GET_PMT_CTRL() & PMT_CTRL_READY_) == 0) {
  214. /* Write to the bytetest will take out of powerdown */
  215. SMC_SET_BYTE_TEST(0);
  216. timeout=10;
  217. do {
  218. udelay(10);
  219. reg = SMC_GET_PMT_CTRL() & PMT_CTRL_READY_;
  220. } while ( timeout-- && !reg);
  221. if (timeout == 0) {
  222. PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
  223. return;
  224. }
  225. }
  226. /* Disable all interrupts */
  227. spin_lock_irqsave(&lp->lock, flags);
  228. SMC_SET_INT_EN(0);
  229. spin_unlock_irqrestore(&lp->lock, flags);
  230. while (resets--) {
  231. SMC_SET_HW_CFG(HW_CFG_SRST_);
  232. timeout=10;
  233. do {
  234. udelay(10);
  235. reg = SMC_GET_HW_CFG();
  236. /* If chip indicates reset timeout then try again */
  237. if (reg & HW_CFG_SRST_TO_) {
  238. PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
  239. resets++;
  240. break;
  241. }
  242. } while ( timeout-- && (reg & HW_CFG_SRST_));
  243. }
  244. if (timeout == 0) {
  245. PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
  246. return;
  247. }
  248. /* make sure EEPROM has finished loading before setting GPIO_CFG */
  249. timeout=1000;
  250. while ( timeout-- && (SMC_GET_E2P_CMD() & E2P_CMD_EPC_BUSY_)) {
  251. udelay(10);
  252. }
  253. if (timeout == 0){
  254. PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
  255. return;
  256. }
  257. /* Initialize interrupts */
  258. SMC_SET_INT_EN(0);
  259. SMC_ACK_INT(-1);
  260. /* Reset the FIFO level and flow control settings */
  261. SMC_SET_HW_CFG((lp->tx_fifo_kb & 0xF) << 16);
  262. //TODO: Figure out what appropriate pause time is
  263. SMC_SET_FLOW(FLOW_FCPT_ | FLOW_FCEN_);
  264. SMC_SET_AFC_CFG(lp->afc_cfg);
  265. /* Set to LED outputs */
  266. SMC_SET_GPIO_CFG(0x70070000);
  267. /*
  268. * Deassert IRQ for 1*10us for edge type interrupts
  269. * and drive IRQ pin push-pull
  270. */
  271. SMC_SET_IRQ_CFG( (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_ );
  272. /* clear anything saved */
  273. if (lp->pending_tx_skb != NULL) {
  274. dev_kfree_skb (lp->pending_tx_skb);
  275. lp->pending_tx_skb = NULL;
  276. lp->stats.tx_errors++;
  277. lp->stats.tx_aborted_errors++;
  278. }
  279. }
  280. /*
  281. * Enable Interrupts, Receive, and Transmit
  282. */
  283. static void smc911x_enable(struct net_device *dev)
  284. {
  285. unsigned long ioaddr = dev->base_addr;
  286. struct smc911x_local *lp = netdev_priv(dev);
  287. unsigned mask, cfg, cr;
  288. unsigned long flags;
  289. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  290. SMC_SET_MAC_ADDR(dev->dev_addr);
  291. /* Enable TX */
  292. cfg = SMC_GET_HW_CFG();
  293. cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
  294. cfg |= HW_CFG_SF_;
  295. SMC_SET_HW_CFG(cfg);
  296. SMC_SET_FIFO_TDA(0xFF);
  297. /* Update TX stats on every 64 packets received or every 1 sec */
  298. SMC_SET_FIFO_TSL(64);
  299. SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
  300. spin_lock_irqsave(&lp->lock, flags);
  301. SMC_GET_MAC_CR(cr);
  302. cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
  303. SMC_SET_MAC_CR(cr);
  304. SMC_SET_TX_CFG(TX_CFG_TX_ON_);
  305. spin_unlock_irqrestore(&lp->lock, flags);
  306. /* Add 2 byte padding to start of packets */
  307. SMC_SET_RX_CFG((2<<8) & RX_CFG_RXDOFF_);
  308. /* Turn on receiver and enable RX */
  309. if (cr & MAC_CR_RXEN_)
  310. DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
  311. spin_lock_irqsave(&lp->lock, flags);
  312. SMC_SET_MAC_CR( cr | MAC_CR_RXEN_ );
  313. spin_unlock_irqrestore(&lp->lock, flags);
  314. /* Interrupt on every received packet */
  315. SMC_SET_FIFO_RSA(0x01);
  316. SMC_SET_FIFO_RSL(0x00);
  317. /* now, enable interrupts */
  318. mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
  319. INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
  320. INT_EN_PHY_INT_EN_;
  321. if (IS_REV_A(lp->revision))
  322. mask|=INT_EN_RDFL_EN_;
  323. else {
  324. mask|=INT_EN_RDFO_EN_;
  325. }
  326. SMC_ENABLE_INT(mask);
  327. }
  328. /*
  329. * this puts the device in an inactive state
  330. */
  331. static void smc911x_shutdown(struct net_device *dev)
  332. {
  333. unsigned long ioaddr = dev->base_addr;
  334. struct smc911x_local *lp = netdev_priv(dev);
  335. unsigned cr;
  336. unsigned long flags;
  337. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__);
  338. /* Disable IRQ's */
  339. SMC_SET_INT_EN(0);
  340. /* Turn of Rx and TX */
  341. spin_lock_irqsave(&lp->lock, flags);
  342. SMC_GET_MAC_CR(cr);
  343. cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
  344. SMC_SET_MAC_CR(cr);
  345. SMC_SET_TX_CFG(TX_CFG_STOP_TX_);
  346. spin_unlock_irqrestore(&lp->lock, flags);
  347. }
  348. static inline void smc911x_drop_pkt(struct net_device *dev)
  349. {
  350. unsigned long ioaddr = dev->base_addr;
  351. unsigned int fifo_count, timeout, reg;
  352. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__);
  353. fifo_count = SMC_GET_RX_FIFO_INF() & 0xFFFF;
  354. if (fifo_count <= 4) {
  355. /* Manually dump the packet data */
  356. while (fifo_count--)
  357. SMC_GET_RX_FIFO();
  358. } else {
  359. /* Fast forward through the bad packet */
  360. SMC_SET_RX_DP_CTRL(RX_DP_CTRL_FFWD_BUSY_);
  361. timeout=50;
  362. do {
  363. udelay(10);
  364. reg = SMC_GET_RX_DP_CTRL() & RX_DP_CTRL_FFWD_BUSY_;
  365. } while ( timeout-- && reg);
  366. if (timeout == 0) {
  367. PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
  368. }
  369. }
  370. }
  371. /*
  372. * This is the procedure to handle the receipt of a packet.
  373. * It should be called after checking for packet presence in
  374. * the RX status FIFO. It must be called with the spin lock
  375. * already held.
  376. */
  377. static inline void smc911x_rcv(struct net_device *dev)
  378. {
  379. struct smc911x_local *lp = netdev_priv(dev);
  380. unsigned long ioaddr = dev->base_addr;
  381. unsigned int pkt_len, status;
  382. struct sk_buff *skb;
  383. unsigned char *data;
  384. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
  385. dev->name, __FUNCTION__);
  386. status = SMC_GET_RX_STS_FIFO();
  387. DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
  388. dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
  389. pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
  390. if (status & RX_STS_ES_) {
  391. /* Deal with a bad packet */
  392. lp->stats.rx_errors++;
  393. if (status & RX_STS_CRC_ERR_)
  394. lp->stats.rx_crc_errors++;
  395. else {
  396. if (status & RX_STS_LEN_ERR_)
  397. lp->stats.rx_length_errors++;
  398. if (status & RX_STS_MCAST_)
  399. lp->stats.multicast++;
  400. }
  401. /* Remove the bad packet data from the RX FIFO */
  402. smc911x_drop_pkt(dev);
  403. } else {
  404. /* Receive a valid packet */
  405. /* Alloc a buffer with extra room for DMA alignment */
  406. skb=dev_alloc_skb(pkt_len+32);
  407. if (unlikely(skb == NULL)) {
  408. PRINTK( "%s: Low memory, rcvd packet dropped.\n",
  409. dev->name);
  410. lp->stats.rx_dropped++;
  411. smc911x_drop_pkt(dev);
  412. return;
  413. }
  414. /* Align IP header to 32 bits
  415. * Note that the device is configured to add a 2
  416. * byte padding to the packet start, so we really
  417. * want to write to the orignal data pointer */
  418. data = skb->data;
  419. skb_reserve(skb, 2);
  420. skb_put(skb,pkt_len-4);
  421. #ifdef SMC_USE_DMA
  422. {
  423. unsigned int fifo;
  424. /* Lower the FIFO threshold if possible */
  425. fifo = SMC_GET_FIFO_INT();
  426. if (fifo & 0xFF) fifo--;
  427. DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
  428. dev->name, fifo & 0xff);
  429. SMC_SET_FIFO_INT(fifo);
  430. /* Setup RX DMA */
  431. SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
  432. lp->rxdma_active = 1;
  433. lp->current_rx_skb = skb;
  434. SMC_PULL_DATA(data, (pkt_len+2+15) & ~15);
  435. /* Packet processing deferred to DMA RX interrupt */
  436. }
  437. #else
  438. SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
  439. SMC_PULL_DATA(data, pkt_len+2+3);
  440. DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name,);
  441. PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
  442. dev->last_rx = jiffies;
  443. skb->dev = dev;
  444. skb->protocol = eth_type_trans(skb, dev);
  445. netif_rx(skb);
  446. lp->stats.rx_packets++;
  447. lp->stats.rx_bytes += pkt_len-4;
  448. #endif
  449. }
  450. }
  451. /*
  452. * This is called to actually send a packet to the chip.
  453. */
  454. static void smc911x_hardware_send_pkt(struct net_device *dev)
  455. {
  456. struct smc911x_local *lp = netdev_priv(dev);
  457. unsigned long ioaddr = dev->base_addr;
  458. struct sk_buff *skb;
  459. unsigned int cmdA, cmdB, len;
  460. unsigned char *buf;
  461. unsigned long flags;
  462. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__);
  463. BUG_ON(lp->pending_tx_skb == NULL);
  464. skb = lp->pending_tx_skb;
  465. lp->pending_tx_skb = NULL;
  466. /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
  467. /* cmdB {31:16] pkt tag [10:0] length */
  468. #ifdef SMC_USE_DMA
  469. /* 16 byte buffer alignment mode */
  470. buf = (char*)((u32)(skb->data) & ~0xF);
  471. len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
  472. cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
  473. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  474. skb->len;
  475. #else
  476. buf = (char*)((u32)skb->data & ~0x3);
  477. len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
  478. cmdA = (((u32)skb->data & 0x3) << 16) |
  479. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  480. skb->len;
  481. #endif
  482. /* tag is packet length so we can use this in stats update later */
  483. cmdB = (skb->len << 16) | (skb->len & 0x7FF);
  484. DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
  485. dev->name, len, len, buf, cmdA, cmdB);
  486. SMC_SET_TX_FIFO(cmdA);
  487. SMC_SET_TX_FIFO(cmdB);
  488. DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
  489. PRINT_PKT(buf, len <= 64 ? len : 64);
  490. /* Send pkt via PIO or DMA */
  491. #ifdef SMC_USE_DMA
  492. lp->current_tx_skb = skb;
  493. SMC_PUSH_DATA(buf, len);
  494. /* DMA complete IRQ will free buffer and set jiffies */
  495. #else
  496. SMC_PUSH_DATA(buf, len);
  497. dev->trans_start = jiffies;
  498. dev_kfree_skb(skb);
  499. #endif
  500. spin_lock_irqsave(&lp->lock, flags);
  501. if (!lp->tx_throttle) {
  502. netif_wake_queue(dev);
  503. }
  504. spin_unlock_irqrestore(&lp->lock, flags);
  505. SMC_ENABLE_INT(INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
  506. }
  507. /*
  508. * Since I am not sure if I will have enough room in the chip's ram
  509. * to store the packet, I call this routine which either sends it
  510. * now, or set the card to generates an interrupt when ready
  511. * for the packet.
  512. */
  513. static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  514. {
  515. struct smc911x_local *lp = netdev_priv(dev);
  516. unsigned long ioaddr = dev->base_addr;
  517. unsigned int free;
  518. unsigned long flags;
  519. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  520. dev->name, __FUNCTION__);
  521. BUG_ON(lp->pending_tx_skb != NULL);
  522. free = SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TDFREE_;
  523. DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
  524. /* Turn off the flow when running out of space in FIFO */
  525. if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
  526. DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
  527. dev->name, free);
  528. spin_lock_irqsave(&lp->lock, flags);
  529. /* Reenable when at least 1 packet of size MTU present */
  530. SMC_SET_FIFO_TDA((SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
  531. lp->tx_throttle = 1;
  532. netif_stop_queue(dev);
  533. spin_unlock_irqrestore(&lp->lock, flags);
  534. }
  535. /* Drop packets when we run out of space in TX FIFO
  536. * Account for overhead required for:
  537. *
  538. * Tx command words 8 bytes
  539. * Start offset 15 bytes
  540. * End padding 15 bytes
  541. */
  542. if (unlikely(free < (skb->len + 8 + 15 + 15))) {
  543. printk("%s: No Tx free space %d < %d\n",
  544. dev->name, free, skb->len);
  545. lp->pending_tx_skb = NULL;
  546. lp->stats.tx_errors++;
  547. lp->stats.tx_dropped++;
  548. dev_kfree_skb(skb);
  549. return 0;
  550. }
  551. #ifdef SMC_USE_DMA
  552. {
  553. /* If the DMA is already running then defer this packet Tx until
  554. * the DMA IRQ starts it
  555. */
  556. spin_lock_irqsave(&lp->lock, flags);
  557. if (lp->txdma_active) {
  558. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
  559. lp->pending_tx_skb = skb;
  560. netif_stop_queue(dev);
  561. spin_unlock_irqrestore(&lp->lock, flags);
  562. return 0;
  563. } else {
  564. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
  565. lp->txdma_active = 1;
  566. }
  567. spin_unlock_irqrestore(&lp->lock, flags);
  568. }
  569. #endif
  570. lp->pending_tx_skb = skb;
  571. smc911x_hardware_send_pkt(dev);
  572. return 0;
  573. }
  574. /*
  575. * This handles a TX status interrupt, which is only called when:
  576. * - a TX error occurred, or
  577. * - TX of a packet completed.
  578. */
  579. static void smc911x_tx(struct net_device *dev)
  580. {
  581. unsigned long ioaddr = dev->base_addr;
  582. struct smc911x_local *lp = netdev_priv(dev);
  583. unsigned int tx_status;
  584. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  585. dev->name, __FUNCTION__);
  586. /* Collect the TX status */
  587. while (((SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
  588. DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
  589. dev->name,
  590. (SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16);
  591. tx_status = SMC_GET_TX_STS_FIFO();
  592. lp->stats.tx_packets++;
  593. lp->stats.tx_bytes+=tx_status>>16;
  594. DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
  595. dev->name, (tx_status & 0xffff0000) >> 16,
  596. tx_status & 0x0000ffff);
  597. /* count Tx errors, but ignore lost carrier errors when in
  598. * full-duplex mode */
  599. if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
  600. !(tx_status & 0x00000306))) {
  601. lp->stats.tx_errors++;
  602. }
  603. if (tx_status & TX_STS_MANY_COLL_) {
  604. lp->stats.collisions+=16;
  605. lp->stats.tx_aborted_errors++;
  606. } else {
  607. lp->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
  608. }
  609. /* carrier error only has meaning for half-duplex communication */
  610. if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
  611. !lp->ctl_rfduplx) {
  612. lp->stats.tx_carrier_errors++;
  613. }
  614. if (tx_status & TX_STS_LATE_COLL_) {
  615. lp->stats.collisions++;
  616. lp->stats.tx_aborted_errors++;
  617. }
  618. }
  619. }
  620. /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
  621. /*
  622. * Reads a register from the MII Management serial interface
  623. */
  624. static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
  625. {
  626. unsigned long ioaddr = dev->base_addr;
  627. unsigned int phydata;
  628. SMC_GET_MII(phyreg, phyaddr, phydata);
  629. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
  630. __FUNCTION__, phyaddr, phyreg, phydata);
  631. return phydata;
  632. }
  633. /*
  634. * Writes a register to the MII Management serial interface
  635. */
  636. static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
  637. int phydata)
  638. {
  639. unsigned long ioaddr = dev->base_addr;
  640. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
  641. __FUNCTION__, phyaddr, phyreg, phydata);
  642. SMC_SET_MII(phyreg, phyaddr, phydata);
  643. }
  644. /*
  645. * Finds and reports the PHY address (115 and 117 have external
  646. * PHY interface 118 has internal only
  647. */
  648. static void smc911x_phy_detect(struct net_device *dev)
  649. {
  650. unsigned long ioaddr = dev->base_addr;
  651. struct smc911x_local *lp = netdev_priv(dev);
  652. int phyaddr;
  653. unsigned int cfg, id1, id2;
  654. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  655. lp->phy_type = 0;
  656. /*
  657. * Scan all 32 PHY addresses if necessary, starting at
  658. * PHY#1 to PHY#31, and then PHY#0 last.
  659. */
  660. switch(lp->version) {
  661. case 0x115:
  662. case 0x117:
  663. cfg = SMC_GET_HW_CFG();
  664. if (cfg & HW_CFG_EXT_PHY_DET_) {
  665. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  666. cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
  667. SMC_SET_HW_CFG(cfg);
  668. udelay(10); /* Wait for clocks to stop */
  669. cfg |= HW_CFG_EXT_PHY_EN_;
  670. SMC_SET_HW_CFG(cfg);
  671. udelay(10); /* Wait for clocks to stop */
  672. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  673. cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
  674. SMC_SET_HW_CFG(cfg);
  675. udelay(10); /* Wait for clocks to stop */
  676. cfg |= HW_CFG_SMI_SEL_;
  677. SMC_SET_HW_CFG(cfg);
  678. for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
  679. /* Read the PHY identifiers */
  680. SMC_GET_PHY_ID1(phyaddr & 31, id1);
  681. SMC_GET_PHY_ID2(phyaddr & 31, id2);
  682. /* Make sure it is a valid identifier */
  683. if (id1 != 0x0000 && id1 != 0xffff &&
  684. id1 != 0x8000 && id2 != 0x0000 &&
  685. id2 != 0xffff && id2 != 0x8000) {
  686. /* Save the PHY's address */
  687. lp->mii.phy_id = phyaddr & 31;
  688. lp->phy_type = id1 << 16 | id2;
  689. break;
  690. }
  691. }
  692. }
  693. default:
  694. /* Internal media only */
  695. SMC_GET_PHY_ID1(1, id1);
  696. SMC_GET_PHY_ID2(1, id2);
  697. /* Save the PHY's address */
  698. lp->mii.phy_id = 1;
  699. lp->phy_type = id1 << 16 | id2;
  700. }
  701. DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
  702. dev->name, id1, id2, lp->mii.phy_id);
  703. }
  704. /*
  705. * Sets the PHY to a configuration as determined by the user.
  706. * Called with spin_lock held.
  707. */
  708. static int smc911x_phy_fixed(struct net_device *dev)
  709. {
  710. struct smc911x_local *lp = netdev_priv(dev);
  711. unsigned long ioaddr = dev->base_addr;
  712. int phyaddr = lp->mii.phy_id;
  713. int bmcr;
  714. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  715. /* Enter Link Disable state */
  716. SMC_GET_PHY_BMCR(phyaddr, bmcr);
  717. bmcr |= BMCR_PDOWN;
  718. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  719. /*
  720. * Set our fixed capabilities
  721. * Disable auto-negotiation
  722. */
  723. bmcr &= ~BMCR_ANENABLE;
  724. if (lp->ctl_rfduplx)
  725. bmcr |= BMCR_FULLDPLX;
  726. if (lp->ctl_rspeed == 100)
  727. bmcr |= BMCR_SPEED100;
  728. /* Write our capabilities to the phy control register */
  729. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  730. /* Re-Configure the Receive/Phy Control register */
  731. bmcr &= ~BMCR_PDOWN;
  732. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  733. return 1;
  734. }
  735. /*
  736. * smc911x_phy_reset - reset the phy
  737. * @dev: net device
  738. * @phy: phy address
  739. *
  740. * Issue a software reset for the specified PHY and
  741. * wait up to 100ms for the reset to complete. We should
  742. * not access the PHY for 50ms after issuing the reset.
  743. *
  744. * The time to wait appears to be dependent on the PHY.
  745. *
  746. */
  747. static int smc911x_phy_reset(struct net_device *dev, int phy)
  748. {
  749. struct smc911x_local *lp = netdev_priv(dev);
  750. unsigned long ioaddr = dev->base_addr;
  751. int timeout;
  752. unsigned long flags;
  753. unsigned int reg;
  754. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
  755. spin_lock_irqsave(&lp->lock, flags);
  756. reg = SMC_GET_PMT_CTRL();
  757. reg &= ~0xfffff030;
  758. reg |= PMT_CTRL_PHY_RST_;
  759. SMC_SET_PMT_CTRL(reg);
  760. spin_unlock_irqrestore(&lp->lock, flags);
  761. for (timeout = 2; timeout; timeout--) {
  762. msleep(50);
  763. spin_lock_irqsave(&lp->lock, flags);
  764. reg = SMC_GET_PMT_CTRL();
  765. spin_unlock_irqrestore(&lp->lock, flags);
  766. if (!(reg & PMT_CTRL_PHY_RST_)) {
  767. /* extra delay required because the phy may
  768. * not be completed with its reset
  769. * when PHY_BCR_RESET_ is cleared. 256us
  770. * should suffice, but use 500us to be safe
  771. */
  772. udelay(500);
  773. break;
  774. }
  775. }
  776. return reg & PMT_CTRL_PHY_RST_;
  777. }
  778. /*
  779. * smc911x_phy_powerdown - powerdown phy
  780. * @dev: net device
  781. * @phy: phy address
  782. *
  783. * Power down the specified PHY
  784. */
  785. static void smc911x_phy_powerdown(struct net_device *dev, int phy)
  786. {
  787. unsigned long ioaddr = dev->base_addr;
  788. unsigned int bmcr;
  789. /* Enter Link Disable state */
  790. SMC_GET_PHY_BMCR(phy, bmcr);
  791. bmcr |= BMCR_PDOWN;
  792. SMC_SET_PHY_BMCR(phy, bmcr);
  793. }
  794. /*
  795. * smc911x_phy_check_media - check the media status and adjust BMCR
  796. * @dev: net device
  797. * @init: set true for initialisation
  798. *
  799. * Select duplex mode depending on negotiation state. This
  800. * also updates our carrier state.
  801. */
  802. static void smc911x_phy_check_media(struct net_device *dev, int init)
  803. {
  804. struct smc911x_local *lp = netdev_priv(dev);
  805. unsigned long ioaddr = dev->base_addr;
  806. int phyaddr = lp->mii.phy_id;
  807. unsigned int bmcr, cr;
  808. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  809. if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
  810. /* duplex state has changed */
  811. SMC_GET_PHY_BMCR(phyaddr, bmcr);
  812. SMC_GET_MAC_CR(cr);
  813. if (lp->mii.full_duplex) {
  814. DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
  815. bmcr |= BMCR_FULLDPLX;
  816. cr |= MAC_CR_RCVOWN_;
  817. } else {
  818. DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
  819. bmcr &= ~BMCR_FULLDPLX;
  820. cr &= ~MAC_CR_RCVOWN_;
  821. }
  822. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  823. SMC_SET_MAC_CR(cr);
  824. }
  825. }
  826. /*
  827. * Configures the specified PHY through the MII management interface
  828. * using Autonegotiation.
  829. * Calls smc911x_phy_fixed() if the user has requested a certain config.
  830. * If RPC ANEG bit is set, the media selection is dependent purely on
  831. * the selection by the MII (either in the MII BMCR reg or the result
  832. * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
  833. * is controlled by the RPC SPEED and RPC DPLX bits.
  834. */
  835. static void smc911x_phy_configure(void *data)
  836. {
  837. struct net_device *dev = data;
  838. struct smc911x_local *lp = netdev_priv(dev);
  839. unsigned long ioaddr = dev->base_addr;
  840. int phyaddr = lp->mii.phy_id;
  841. int my_phy_caps; /* My PHY capabilities */
  842. int my_ad_caps; /* My Advertised capabilities */
  843. int status;
  844. unsigned long flags;
  845. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
  846. /*
  847. * We should not be called if phy_type is zero.
  848. */
  849. if (lp->phy_type == 0)
  850. goto smc911x_phy_configure_exit;
  851. if (smc911x_phy_reset(dev, phyaddr)) {
  852. printk("%s: PHY reset timed out\n", dev->name);
  853. goto smc911x_phy_configure_exit;
  854. }
  855. spin_lock_irqsave(&lp->lock, flags);
  856. /*
  857. * Enable PHY Interrupts (for register 18)
  858. * Interrupts listed here are enabled
  859. */
  860. SMC_SET_PHY_INT_MASK(phyaddr, PHY_INT_MASK_ENERGY_ON_ |
  861. PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
  862. PHY_INT_MASK_LINK_DOWN_);
  863. /* If the user requested no auto neg, then go set his request */
  864. if (lp->mii.force_media) {
  865. smc911x_phy_fixed(dev);
  866. goto smc911x_phy_configure_exit;
  867. }
  868. /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
  869. SMC_GET_PHY_BMSR(phyaddr, my_phy_caps);
  870. if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
  871. printk(KERN_INFO "Auto negotiation NOT supported\n");
  872. smc911x_phy_fixed(dev);
  873. goto smc911x_phy_configure_exit;
  874. }
  875. /* CSMA capable w/ both pauses */
  876. my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
  877. if (my_phy_caps & BMSR_100BASE4)
  878. my_ad_caps |= ADVERTISE_100BASE4;
  879. if (my_phy_caps & BMSR_100FULL)
  880. my_ad_caps |= ADVERTISE_100FULL;
  881. if (my_phy_caps & BMSR_100HALF)
  882. my_ad_caps |= ADVERTISE_100HALF;
  883. if (my_phy_caps & BMSR_10FULL)
  884. my_ad_caps |= ADVERTISE_10FULL;
  885. if (my_phy_caps & BMSR_10HALF)
  886. my_ad_caps |= ADVERTISE_10HALF;
  887. /* Disable capabilities not selected by our user */
  888. if (lp->ctl_rspeed != 100)
  889. my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
  890. if (!lp->ctl_rfduplx)
  891. my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
  892. /* Update our Auto-Neg Advertisement Register */
  893. SMC_SET_PHY_MII_ADV(phyaddr, my_ad_caps);
  894. lp->mii.advertising = my_ad_caps;
  895. /*
  896. * Read the register back. Without this, it appears that when
  897. * auto-negotiation is restarted, sometimes it isn't ready and
  898. * the link does not come up.
  899. */
  900. udelay(10);
  901. SMC_GET_PHY_MII_ADV(phyaddr, status);
  902. DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
  903. DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
  904. /* Restart auto-negotiation process in order to advertise my caps */
  905. SMC_SET_PHY_BMCR(phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
  906. smc911x_phy_check_media(dev, 1);
  907. smc911x_phy_configure_exit:
  908. spin_unlock_irqrestore(&lp->lock, flags);
  909. lp->work_pending = 0;
  910. }
  911. /*
  912. * smc911x_phy_interrupt
  913. *
  914. * Purpose: Handle interrupts relating to PHY register 18. This is
  915. * called from the "hard" interrupt handler under our private spinlock.
  916. */
  917. static void smc911x_phy_interrupt(struct net_device *dev)
  918. {
  919. struct smc911x_local *lp = netdev_priv(dev);
  920. unsigned long ioaddr = dev->base_addr;
  921. int phyaddr = lp->mii.phy_id;
  922. int status;
  923. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  924. if (lp->phy_type == 0)
  925. return;
  926. smc911x_phy_check_media(dev, 0);
  927. /* read to clear status bits */
  928. SMC_GET_PHY_INT_SRC(phyaddr,status);
  929. DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
  930. dev->name, status & 0xffff);
  931. DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
  932. dev->name, SMC_GET_AFC_CFG());
  933. }
  934. /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
  935. /*
  936. * This is the main routine of the driver, to handle the device when
  937. * it needs some attention.
  938. */
  939. static irqreturn_t smc911x_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  940. {
  941. struct net_device *dev = dev_id;
  942. unsigned long ioaddr = dev->base_addr;
  943. struct smc911x_local *lp = netdev_priv(dev);
  944. unsigned int status, mask, timeout;
  945. unsigned int rx_overrun=0, cr, pkts;
  946. unsigned long flags;
  947. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  948. spin_lock_irqsave(&lp->lock, flags);
  949. /* Spurious interrupt check */
  950. if ((SMC_GET_IRQ_CFG() & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
  951. (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
  952. return IRQ_NONE;
  953. }
  954. mask = SMC_GET_INT_EN();
  955. SMC_SET_INT_EN(0);
  956. /* set a timeout value, so I don't stay here forever */
  957. timeout = 8;
  958. do {
  959. status = SMC_GET_INT();
  960. DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
  961. dev->name, status, mask, status & ~mask);
  962. status &= mask;
  963. if (!status)
  964. break;
  965. /* Handle SW interrupt condition */
  966. if (status & INT_STS_SW_INT_) {
  967. SMC_ACK_INT(INT_STS_SW_INT_);
  968. mask &= ~INT_EN_SW_INT_EN_;
  969. }
  970. /* Handle various error conditions */
  971. if (status & INT_STS_RXE_) {
  972. SMC_ACK_INT(INT_STS_RXE_);
  973. lp->stats.rx_errors++;
  974. }
  975. if (status & INT_STS_RXDFH_INT_) {
  976. SMC_ACK_INT(INT_STS_RXDFH_INT_);
  977. lp->stats.rx_dropped+=SMC_GET_RX_DROP();
  978. }
  979. /* Undocumented interrupt-what is the right thing to do here? */
  980. if (status & INT_STS_RXDF_INT_) {
  981. SMC_ACK_INT(INT_STS_RXDF_INT_);
  982. }
  983. /* Rx Data FIFO exceeds set level */
  984. if (status & INT_STS_RDFL_) {
  985. if (IS_REV_A(lp->revision)) {
  986. rx_overrun=1;
  987. SMC_GET_MAC_CR(cr);
  988. cr &= ~MAC_CR_RXEN_;
  989. SMC_SET_MAC_CR(cr);
  990. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  991. lp->stats.rx_errors++;
  992. lp->stats.rx_fifo_errors++;
  993. }
  994. SMC_ACK_INT(INT_STS_RDFL_);
  995. }
  996. if (status & INT_STS_RDFO_) {
  997. if (!IS_REV_A(lp->revision)) {
  998. SMC_GET_MAC_CR(cr);
  999. cr &= ~MAC_CR_RXEN_;
  1000. SMC_SET_MAC_CR(cr);
  1001. rx_overrun=1;
  1002. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  1003. lp->stats.rx_errors++;
  1004. lp->stats.rx_fifo_errors++;
  1005. }
  1006. SMC_ACK_INT(INT_STS_RDFO_);
  1007. }
  1008. /* Handle receive condition */
  1009. if ((status & INT_STS_RSFL_) || rx_overrun) {
  1010. unsigned int fifo;
  1011. DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
  1012. fifo = SMC_GET_RX_FIFO_INF();
  1013. pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
  1014. DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
  1015. dev->name, pkts, fifo & 0xFFFF );
  1016. if (pkts != 0) {
  1017. #ifdef SMC_USE_DMA
  1018. unsigned int fifo;
  1019. if (lp->rxdma_active){
  1020. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  1021. "%s: RX DMA active\n", dev->name);
  1022. /* The DMA is already running so up the IRQ threshold */
  1023. fifo = SMC_GET_FIFO_INT() & ~0xFF;
  1024. fifo |= pkts & 0xFF;
  1025. DBG(SMC_DEBUG_RX,
  1026. "%s: Setting RX stat FIFO threshold to %d\n",
  1027. dev->name, fifo & 0xff);
  1028. SMC_SET_FIFO_INT(fifo);
  1029. } else
  1030. #endif
  1031. smc911x_rcv(dev);
  1032. }
  1033. SMC_ACK_INT(INT_STS_RSFL_);
  1034. }
  1035. /* Handle transmit FIFO available */
  1036. if (status & INT_STS_TDFA_) {
  1037. DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
  1038. SMC_SET_FIFO_TDA(0xFF);
  1039. lp->tx_throttle = 0;
  1040. #ifdef SMC_USE_DMA
  1041. if (!lp->txdma_active)
  1042. #endif
  1043. netif_wake_queue(dev);
  1044. SMC_ACK_INT(INT_STS_TDFA_);
  1045. }
  1046. /* Handle transmit done condition */
  1047. #if 1
  1048. if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
  1049. DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
  1050. "%s: Tx stat FIFO limit (%d) /GPT irq\n",
  1051. dev->name, (SMC_GET_FIFO_INT() & 0x00ff0000) >> 16);
  1052. smc911x_tx(dev);
  1053. SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
  1054. SMC_ACK_INT(INT_STS_TSFL_);
  1055. SMC_ACK_INT(INT_STS_TSFL_ | INT_STS_GPT_INT_);
  1056. }
  1057. #else
  1058. if (status & INT_STS_TSFL_) {
  1059. DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
  1060. smc911x_tx(dev);
  1061. SMC_ACK_INT(INT_STS_TSFL_);
  1062. }
  1063. if (status & INT_STS_GPT_INT_) {
  1064. DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
  1065. dev->name,
  1066. SMC_GET_IRQ_CFG(),
  1067. SMC_GET_FIFO_INT(),
  1068. SMC_GET_RX_CFG());
  1069. DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
  1070. "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
  1071. dev->name,
  1072. (SMC_GET_RX_FIFO_INF() & 0x00ff0000) >> 16,
  1073. SMC_GET_RX_FIFO_INF() & 0xffff,
  1074. SMC_GET_RX_STS_FIFO_PEEK());
  1075. SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
  1076. SMC_ACK_INT(INT_STS_GPT_INT_);
  1077. }
  1078. #endif
  1079. /* Handle PHY interupt condition */
  1080. if (status & INT_STS_PHY_INT_) {
  1081. DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
  1082. smc911x_phy_interrupt(dev);
  1083. SMC_ACK_INT(INT_STS_PHY_INT_);
  1084. }
  1085. } while (--timeout);
  1086. /* restore mask state */
  1087. SMC_SET_INT_EN(mask);
  1088. DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
  1089. dev->name, 8-timeout);
  1090. spin_unlock_irqrestore(&lp->lock, flags);
  1091. DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
  1092. return IRQ_HANDLED;
  1093. }
  1094. #ifdef SMC_USE_DMA
  1095. static void
  1096. smc911x_tx_dma_irq(int dma, void *data, struct pt_regs *regs)
  1097. {
  1098. struct net_device *dev = (struct net_device *)data;
  1099. struct smc911x_local *lp = netdev_priv(dev);
  1100. struct sk_buff *skb = lp->current_tx_skb;
  1101. unsigned long flags;
  1102. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1103. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
  1104. /* Clear the DMA interrupt sources */
  1105. SMC_DMA_ACK_IRQ(dev, dma);
  1106. BUG_ON(skb == NULL);
  1107. dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
  1108. dev->trans_start = jiffies;
  1109. dev_kfree_skb_irq(skb);
  1110. lp->current_tx_skb = NULL;
  1111. if (lp->pending_tx_skb != NULL)
  1112. smc911x_hardware_send_pkt(dev);
  1113. else {
  1114. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1115. "%s: No pending Tx packets. DMA disabled\n", dev->name);
  1116. spin_lock_irqsave(&lp->lock, flags);
  1117. lp->txdma_active = 0;
  1118. if (!lp->tx_throttle) {
  1119. netif_wake_queue(dev);
  1120. }
  1121. spin_unlock_irqrestore(&lp->lock, flags);
  1122. }
  1123. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1124. "%s: TX DMA irq completed\n", dev->name);
  1125. }
  1126. static void
  1127. smc911x_rx_dma_irq(int dma, void *data, struct pt_regs *regs)
  1128. {
  1129. struct net_device *dev = (struct net_device *)data;
  1130. unsigned long ioaddr = dev->base_addr;
  1131. struct smc911x_local *lp = netdev_priv(dev);
  1132. struct sk_buff *skb = lp->current_rx_skb;
  1133. unsigned long flags;
  1134. unsigned int pkts;
  1135. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1136. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
  1137. /* Clear the DMA interrupt sources */
  1138. SMC_DMA_ACK_IRQ(dev, dma);
  1139. dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
  1140. BUG_ON(skb == NULL);
  1141. lp->current_rx_skb = NULL;
  1142. PRINT_PKT(skb->data, skb->len);
  1143. dev->last_rx = jiffies;
  1144. skb->dev = dev;
  1145. skb->protocol = eth_type_trans(skb, dev);
  1146. netif_rx(skb);
  1147. lp->stats.rx_packets++;
  1148. lp->stats.rx_bytes += skb->len;
  1149. spin_lock_irqsave(&lp->lock, flags);
  1150. pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
  1151. if (pkts != 0) {
  1152. smc911x_rcv(dev);
  1153. }else {
  1154. lp->rxdma_active = 0;
  1155. }
  1156. spin_unlock_irqrestore(&lp->lock, flags);
  1157. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  1158. "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
  1159. dev->name, pkts);
  1160. }
  1161. #endif /* SMC_USE_DMA */
  1162. #ifdef CONFIG_NET_POLL_CONTROLLER
  1163. /*
  1164. * Polling receive - used by netconsole and other diagnostic tools
  1165. * to allow network i/o with interrupts disabled.
  1166. */
  1167. static void smc911x_poll_controller(struct net_device *dev)
  1168. {
  1169. disable_irq(dev->irq);
  1170. smc911x_interrupt(dev->irq, dev, NULL);
  1171. enable_irq(dev->irq);
  1172. }
  1173. #endif
  1174. /* Our watchdog timed out. Called by the networking layer */
  1175. static void smc911x_timeout(struct net_device *dev)
  1176. {
  1177. struct smc911x_local *lp = netdev_priv(dev);
  1178. unsigned long ioaddr = dev->base_addr;
  1179. int status, mask;
  1180. unsigned long flags;
  1181. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1182. spin_lock_irqsave(&lp->lock, flags);
  1183. status = SMC_GET_INT();
  1184. mask = SMC_GET_INT_EN();
  1185. spin_unlock_irqrestore(&lp->lock, flags);
  1186. DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
  1187. dev->name, status, mask);
  1188. /* Dump the current TX FIFO contents and restart */
  1189. mask = SMC_GET_TX_CFG();
  1190. SMC_SET_TX_CFG(mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
  1191. /*
  1192. * Reconfiguring the PHY doesn't seem like a bad idea here, but
  1193. * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
  1194. * which calls schedule(). Hence we use a work queue.
  1195. */
  1196. if (lp->phy_type != 0) {
  1197. if (schedule_work(&lp->phy_configure)) {
  1198. lp->work_pending = 1;
  1199. }
  1200. }
  1201. /* We can accept TX packets again */
  1202. dev->trans_start = jiffies;
  1203. netif_wake_queue(dev);
  1204. }
  1205. /*
  1206. * This routine will, depending on the values passed to it,
  1207. * either make it accept multicast packets, go into
  1208. * promiscuous mode (for TCPDUMP and cousins) or accept
  1209. * a select set of multicast packets
  1210. */
  1211. static void smc911x_set_multicast_list(struct net_device *dev)
  1212. {
  1213. struct smc911x_local *lp = netdev_priv(dev);
  1214. unsigned long ioaddr = dev->base_addr;
  1215. unsigned int multicast_table[2];
  1216. unsigned int mcr, update_multicast = 0;
  1217. unsigned long flags;
  1218. /* table for flipping the order of 5 bits */
  1219. static const unsigned char invert5[] =
  1220. {0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0C, 0x1C,
  1221. 0x02, 0x12, 0x0A, 0x1A, 0x06, 0x16, 0x0E, 0x1E,
  1222. 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0D, 0x1D,
  1223. 0x03, 0x13, 0x0B, 0x1B, 0x07, 0x17, 0x0F, 0x1F};
  1224. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1225. spin_lock_irqsave(&lp->lock, flags);
  1226. SMC_GET_MAC_CR(mcr);
  1227. spin_unlock_irqrestore(&lp->lock, flags);
  1228. if (dev->flags & IFF_PROMISC) {
  1229. DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
  1230. mcr |= MAC_CR_PRMS_;
  1231. }
  1232. /*
  1233. * Here, I am setting this to accept all multicast packets.
  1234. * I don't need to zero the multicast table, because the flag is
  1235. * checked before the table is
  1236. */
  1237. else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
  1238. DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
  1239. mcr |= MAC_CR_MCPAS_;
  1240. }
  1241. /*
  1242. * This sets the internal hardware table to filter out unwanted
  1243. * multicast packets before they take up memory.
  1244. *
  1245. * The SMC chip uses a hash table where the high 6 bits of the CRC of
  1246. * address are the offset into the table. If that bit is 1, then the
  1247. * multicast packet is accepted. Otherwise, it's dropped silently.
  1248. *
  1249. * To use the 6 bits as an offset into the table, the high 1 bit is
  1250. * the number of the 32 bit register, while the low 5 bits are the bit
  1251. * within that register.
  1252. */
  1253. else if (dev->mc_count) {
  1254. int i;
  1255. struct dev_mc_list *cur_addr;
  1256. /* Set the Hash perfec mode */
  1257. mcr |= MAC_CR_HPFILT_;
  1258. /* start with a table of all zeros: reject all */
  1259. memset(multicast_table, 0, sizeof(multicast_table));
  1260. cur_addr = dev->mc_list;
  1261. for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
  1262. int position;
  1263. /* do we have a pointer here? */
  1264. if (!cur_addr)
  1265. break;
  1266. /* make sure this is a multicast address -
  1267. shouldn't this be a given if we have it here ? */
  1268. if (!(*cur_addr->dmi_addr & 1))
  1269. continue;
  1270. /* only use the low order bits */
  1271. position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
  1272. /* do some messy swapping to put the bit in the right spot */
  1273. multicast_table[invert5[position&0x1F]&0x1] |=
  1274. (1<<invert5[(position>>1)&0x1F]);
  1275. }
  1276. /* be sure I get rid of flags I might have set */
  1277. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1278. /* now, the table can be loaded into the chipset */
  1279. update_multicast = 1;
  1280. } else {
  1281. DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
  1282. dev->name);
  1283. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1284. /*
  1285. * since I'm disabling all multicast entirely, I need to
  1286. * clear the multicast list
  1287. */
  1288. memset(multicast_table, 0, sizeof(multicast_table));
  1289. update_multicast = 1;
  1290. }
  1291. spin_lock_irqsave(&lp->lock, flags);
  1292. SMC_SET_MAC_CR(mcr);
  1293. if (update_multicast) {
  1294. DBG(SMC_DEBUG_MISC,
  1295. "%s: update mcast hash table 0x%08x 0x%08x\n",
  1296. dev->name, multicast_table[0], multicast_table[1]);
  1297. SMC_SET_HASHL(multicast_table[0]);
  1298. SMC_SET_HASHH(multicast_table[1]);
  1299. }
  1300. spin_unlock_irqrestore(&lp->lock, flags);
  1301. }
  1302. /*
  1303. * Open and Initialize the board
  1304. *
  1305. * Set up everything, reset the card, etc..
  1306. */
  1307. static int
  1308. smc911x_open(struct net_device *dev)
  1309. {
  1310. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1311. /*
  1312. * Check that the address is valid. If its not, refuse
  1313. * to bring the device up. The user must specify an
  1314. * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
  1315. */
  1316. if (!is_valid_ether_addr(dev->dev_addr)) {
  1317. PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
  1318. return -EINVAL;
  1319. }
  1320. /* reset the hardware */
  1321. smc911x_reset(dev);
  1322. /* Configure the PHY, initialize the link state */
  1323. smc911x_phy_configure(dev);
  1324. /* Turn on Tx + Rx */
  1325. smc911x_enable(dev);
  1326. netif_start_queue(dev);
  1327. return 0;
  1328. }
  1329. /*
  1330. * smc911x_close
  1331. *
  1332. * this makes the board clean up everything that it can
  1333. * and not talk to the outside world. Caused by
  1334. * an 'ifconfig ethX down'
  1335. */
  1336. static int smc911x_close(struct net_device *dev)
  1337. {
  1338. struct smc911x_local *lp = netdev_priv(dev);
  1339. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1340. netif_stop_queue(dev);
  1341. netif_carrier_off(dev);
  1342. /* clear everything */
  1343. smc911x_shutdown(dev);
  1344. if (lp->phy_type != 0) {
  1345. /* We need to ensure that no calls to
  1346. * smc911x_phy_configure are pending.
  1347. * flush_scheduled_work() cannot be called because we
  1348. * are running with the netlink semaphore held (from
  1349. * devinet_ioctl()) and the pending work queue
  1350. * contains linkwatch_event() (scheduled by
  1351. * netif_carrier_off() above). linkwatch_event() also
  1352. * wants the netlink semaphore.
  1353. */
  1354. while (lp->work_pending)
  1355. schedule();
  1356. smc911x_phy_powerdown(dev, lp->mii.phy_id);
  1357. }
  1358. if (lp->pending_tx_skb) {
  1359. dev_kfree_skb(lp->pending_tx_skb);
  1360. lp->pending_tx_skb = NULL;
  1361. }
  1362. return 0;
  1363. }
  1364. /*
  1365. * Get the current statistics.
  1366. * This may be called with the card open or closed.
  1367. */
  1368. static struct net_device_stats *smc911x_query_statistics(struct net_device *dev)
  1369. {
  1370. struct smc911x_local *lp = netdev_priv(dev);
  1371. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1372. return &lp->stats;
  1373. }
  1374. /*
  1375. * Ethtool support
  1376. */
  1377. static int
  1378. smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1379. {
  1380. struct smc911x_local *lp = netdev_priv(dev);
  1381. unsigned long ioaddr = dev->base_addr;
  1382. int ret, status;
  1383. unsigned long flags;
  1384. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1385. cmd->maxtxpkt = 1;
  1386. cmd->maxrxpkt = 1;
  1387. if (lp->phy_type != 0) {
  1388. spin_lock_irqsave(&lp->lock, flags);
  1389. ret = mii_ethtool_gset(&lp->mii, cmd);
  1390. spin_unlock_irqrestore(&lp->lock, flags);
  1391. } else {
  1392. cmd->supported = SUPPORTED_10baseT_Half |
  1393. SUPPORTED_10baseT_Full |
  1394. SUPPORTED_TP | SUPPORTED_AUI;
  1395. if (lp->ctl_rspeed == 10)
  1396. cmd->speed = SPEED_10;
  1397. else if (lp->ctl_rspeed == 100)
  1398. cmd->speed = SPEED_100;
  1399. cmd->autoneg = AUTONEG_DISABLE;
  1400. if (lp->mii.phy_id==1)
  1401. cmd->transceiver = XCVR_INTERNAL;
  1402. else
  1403. cmd->transceiver = XCVR_EXTERNAL;
  1404. cmd->port = 0;
  1405. SMC_GET_PHY_SPECIAL(lp->mii.phy_id, status);
  1406. cmd->duplex =
  1407. (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
  1408. DUPLEX_FULL : DUPLEX_HALF;
  1409. ret = 0;
  1410. }
  1411. return ret;
  1412. }
  1413. static int
  1414. smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1415. {
  1416. struct smc911x_local *lp = netdev_priv(dev);
  1417. int ret;
  1418. unsigned long flags;
  1419. if (lp->phy_type != 0) {
  1420. spin_lock_irqsave(&lp->lock, flags);
  1421. ret = mii_ethtool_sset(&lp->mii, cmd);
  1422. spin_unlock_irqrestore(&lp->lock, flags);
  1423. } else {
  1424. if (cmd->autoneg != AUTONEG_DISABLE ||
  1425. cmd->speed != SPEED_10 ||
  1426. (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
  1427. (cmd->port != PORT_TP && cmd->port != PORT_AUI))
  1428. return -EINVAL;
  1429. lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
  1430. ret = 0;
  1431. }
  1432. return ret;
  1433. }
  1434. static void
  1435. smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1436. {
  1437. strncpy(info->driver, CARDNAME, sizeof(info->driver));
  1438. strncpy(info->version, version, sizeof(info->version));
  1439. strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info));
  1440. }
  1441. static int smc911x_ethtool_nwayreset(struct net_device *dev)
  1442. {
  1443. struct smc911x_local *lp = netdev_priv(dev);
  1444. int ret = -EINVAL;
  1445. unsigned long flags;
  1446. if (lp->phy_type != 0) {
  1447. spin_lock_irqsave(&lp->lock, flags);
  1448. ret = mii_nway_restart(&lp->mii);
  1449. spin_unlock_irqrestore(&lp->lock, flags);
  1450. }
  1451. return ret;
  1452. }
  1453. static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
  1454. {
  1455. struct smc911x_local *lp = netdev_priv(dev);
  1456. return lp->msg_enable;
  1457. }
  1458. static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
  1459. {
  1460. struct smc911x_local *lp = netdev_priv(dev);
  1461. lp->msg_enable = level;
  1462. }
  1463. static int smc911x_ethtool_getregslen(struct net_device *dev)
  1464. {
  1465. /* System regs + MAC regs + PHY regs */
  1466. return (((E2P_CMD - ID_REV)/4 + 1) +
  1467. (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
  1468. }
  1469. static void smc911x_ethtool_getregs(struct net_device *dev,
  1470. struct ethtool_regs* regs, void *buf)
  1471. {
  1472. unsigned long ioaddr = dev->base_addr;
  1473. struct smc911x_local *lp = netdev_priv(dev);
  1474. unsigned long flags;
  1475. u32 reg,i,j=0;
  1476. u32 *data = (u32*)buf;
  1477. regs->version = lp->version;
  1478. for(i=ID_REV;i<=E2P_CMD;i+=4) {
  1479. data[j++] = SMC_inl(ioaddr,i);
  1480. }
  1481. for(i=MAC_CR;i<=WUCSR;i++) {
  1482. spin_lock_irqsave(&lp->lock, flags);
  1483. SMC_GET_MAC_CSR(i, reg);
  1484. spin_unlock_irqrestore(&lp->lock, flags);
  1485. data[j++] = reg;
  1486. }
  1487. for(i=0;i<=31;i++) {
  1488. spin_lock_irqsave(&lp->lock, flags);
  1489. SMC_GET_MII(i, lp->mii.phy_id, reg);
  1490. spin_unlock_irqrestore(&lp->lock, flags);
  1491. data[j++] = reg & 0xFFFF;
  1492. }
  1493. }
  1494. static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
  1495. {
  1496. unsigned long ioaddr = dev->base_addr;
  1497. unsigned int timeout;
  1498. int e2p_cmd;
  1499. e2p_cmd = SMC_GET_E2P_CMD();
  1500. for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
  1501. if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
  1502. PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
  1503. dev->name, __FUNCTION__);
  1504. return -EFAULT;
  1505. }
  1506. mdelay(1);
  1507. e2p_cmd = SMC_GET_E2P_CMD();
  1508. }
  1509. if (timeout == 0) {
  1510. PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
  1511. dev->name, __FUNCTION__);
  1512. return -ETIMEDOUT;
  1513. }
  1514. return 0;
  1515. }
  1516. static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
  1517. int cmd, int addr)
  1518. {
  1519. unsigned long ioaddr = dev->base_addr;
  1520. int ret;
  1521. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1522. return ret;
  1523. SMC_SET_E2P_CMD(E2P_CMD_EPC_BUSY_ |
  1524. ((cmd) & (0x7<<28)) |
  1525. ((addr) & 0xFF));
  1526. return 0;
  1527. }
  1528. static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
  1529. u8 *data)
  1530. {
  1531. unsigned long ioaddr = dev->base_addr;
  1532. int ret;
  1533. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1534. return ret;
  1535. *data = SMC_GET_E2P_DATA();
  1536. return 0;
  1537. }
  1538. static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
  1539. u8 data)
  1540. {
  1541. unsigned long ioaddr = dev->base_addr;
  1542. int ret;
  1543. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1544. return ret;
  1545. SMC_SET_E2P_DATA(data);
  1546. return 0;
  1547. }
  1548. static int smc911x_ethtool_geteeprom(struct net_device *dev,
  1549. struct ethtool_eeprom *eeprom, u8 *data)
  1550. {
  1551. u8 eebuf[SMC911X_EEPROM_LEN];
  1552. int i, ret;
  1553. for(i=0;i<SMC911X_EEPROM_LEN;i++) {
  1554. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
  1555. return ret;
  1556. if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
  1557. return ret;
  1558. }
  1559. memcpy(data, eebuf+eeprom->offset, eeprom->len);
  1560. return 0;
  1561. }
  1562. static int smc911x_ethtool_seteeprom(struct net_device *dev,
  1563. struct ethtool_eeprom *eeprom, u8 *data)
  1564. {
  1565. int i, ret;
  1566. /* Enable erase */
  1567. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
  1568. return ret;
  1569. for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
  1570. /* erase byte */
  1571. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
  1572. return ret;
  1573. /* write byte */
  1574. if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
  1575. return ret;
  1576. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
  1577. return ret;
  1578. }
  1579. return 0;
  1580. }
  1581. static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
  1582. {
  1583. return SMC911X_EEPROM_LEN;
  1584. }
  1585. static struct ethtool_ops smc911x_ethtool_ops = {
  1586. .get_settings = smc911x_ethtool_getsettings,
  1587. .set_settings = smc911x_ethtool_setsettings,
  1588. .get_drvinfo = smc911x_ethtool_getdrvinfo,
  1589. .get_msglevel = smc911x_ethtool_getmsglevel,
  1590. .set_msglevel = smc911x_ethtool_setmsglevel,
  1591. .nway_reset = smc911x_ethtool_nwayreset,
  1592. .get_link = ethtool_op_get_link,
  1593. .get_regs_len = smc911x_ethtool_getregslen,
  1594. .get_regs = smc911x_ethtool_getregs,
  1595. .get_eeprom_len = smc911x_ethtool_geteeprom_len,
  1596. .get_eeprom = smc911x_ethtool_geteeprom,
  1597. .set_eeprom = smc911x_ethtool_seteeprom,
  1598. };
  1599. /*
  1600. * smc911x_findirq
  1601. *
  1602. * This routine has a simple purpose -- make the SMC chip generate an
  1603. * interrupt, so an auto-detect routine can detect it, and find the IRQ,
  1604. */
  1605. static int __init smc911x_findirq(unsigned long ioaddr)
  1606. {
  1607. int timeout = 20;
  1608. unsigned long cookie;
  1609. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1610. cookie = probe_irq_on();
  1611. /*
  1612. * Force a SW interrupt
  1613. */
  1614. SMC_SET_INT_EN(INT_EN_SW_INT_EN_);
  1615. /*
  1616. * Wait until positive that the interrupt has been generated
  1617. */
  1618. do {
  1619. int int_status;
  1620. udelay(10);
  1621. int_status = SMC_GET_INT_EN();
  1622. if (int_status & INT_EN_SW_INT_EN_)
  1623. break; /* got the interrupt */
  1624. } while (--timeout);
  1625. /*
  1626. * there is really nothing that I can do here if timeout fails,
  1627. * as autoirq_report will return a 0 anyway, which is what I
  1628. * want in this case. Plus, the clean up is needed in both
  1629. * cases.
  1630. */
  1631. /* and disable all interrupts again */
  1632. SMC_SET_INT_EN(0);
  1633. /* and return what I found */
  1634. return probe_irq_off(cookie);
  1635. }
  1636. /*
  1637. * Function: smc911x_probe(unsigned long ioaddr)
  1638. *
  1639. * Purpose:
  1640. * Tests to see if a given ioaddr points to an SMC911x chip.
  1641. * Returns a 0 on success
  1642. *
  1643. * Algorithm:
  1644. * (1) see if the endian word is OK
  1645. * (1) see if I recognize the chip ID in the appropriate register
  1646. *
  1647. * Here I do typical initialization tasks.
  1648. *
  1649. * o Initialize the structure if needed
  1650. * o print out my vanity message if not done so already
  1651. * o print out what type of hardware is detected
  1652. * o print out the ethernet address
  1653. * o find the IRQ
  1654. * o set up my private data
  1655. * o configure the dev structure with my subroutines
  1656. * o actually GRAB the irq.
  1657. * o GRAB the region
  1658. */
  1659. static int __init smc911x_probe(struct net_device *dev, unsigned long ioaddr)
  1660. {
  1661. struct smc911x_local *lp = netdev_priv(dev);
  1662. int i, retval;
  1663. unsigned int val, chip_id, revision;
  1664. const char *version_string;
  1665. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1666. /* First, see if the endian word is recognized */
  1667. val = SMC_GET_BYTE_TEST();
  1668. DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
  1669. if (val != 0x87654321) {
  1670. printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
  1671. retval = -ENODEV;
  1672. goto err_out;
  1673. }
  1674. /*
  1675. * check if the revision register is something that I
  1676. * recognize. These might need to be added to later,
  1677. * as future revisions could be added.
  1678. */
  1679. chip_id = SMC_GET_PN();
  1680. DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
  1681. for(i=0;chip_ids[i].id != 0; i++) {
  1682. if (chip_ids[i].id == chip_id) break;
  1683. }
  1684. if (!chip_ids[i].id) {
  1685. printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
  1686. retval = -ENODEV;
  1687. goto err_out;
  1688. }
  1689. version_string = chip_ids[i].name;
  1690. revision = SMC_GET_REV();
  1691. DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
  1692. /* At this point I'll assume that the chip is an SMC911x. */
  1693. DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
  1694. /* Validate the TX FIFO size requested */
  1695. if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
  1696. printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
  1697. retval = -EINVAL;
  1698. goto err_out;
  1699. }
  1700. /* fill in some of the fields */
  1701. dev->base_addr = ioaddr;
  1702. lp->version = chip_ids[i].id;
  1703. lp->revision = revision;
  1704. lp->tx_fifo_kb = tx_fifo_kb;
  1705. /* Reverse calculate the RX FIFO size from the TX */
  1706. lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
  1707. lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
  1708. /* Set the automatic flow control values */
  1709. switch(lp->tx_fifo_kb) {
  1710. /*
  1711. * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
  1712. * AFC_LO is AFC_HI/2
  1713. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1714. */
  1715. case 2:/* 13440 Rx Data Fifo Size */
  1716. lp->afc_cfg=0x008C46AF;break;
  1717. case 3:/* 12480 Rx Data Fifo Size */
  1718. lp->afc_cfg=0x0082419F;break;
  1719. case 4:/* 11520 Rx Data Fifo Size */
  1720. lp->afc_cfg=0x00783C9F;break;
  1721. case 5:/* 10560 Rx Data Fifo Size */
  1722. lp->afc_cfg=0x006E374F;break;
  1723. case 6:/* 9600 Rx Data Fifo Size */
  1724. lp->afc_cfg=0x0064328F;break;
  1725. case 7:/* 8640 Rx Data Fifo Size */
  1726. lp->afc_cfg=0x005A2D7F;break;
  1727. case 8:/* 7680 Rx Data Fifo Size */
  1728. lp->afc_cfg=0x0050287F;break;
  1729. case 9:/* 6720 Rx Data Fifo Size */
  1730. lp->afc_cfg=0x0046236F;break;
  1731. case 10:/* 5760 Rx Data Fifo Size */
  1732. lp->afc_cfg=0x003C1E6F;break;
  1733. case 11:/* 4800 Rx Data Fifo Size */
  1734. lp->afc_cfg=0x0032195F;break;
  1735. /*
  1736. * AFC_HI is ~1520 bytes less than RX Data Fifo Size
  1737. * AFC_LO is AFC_HI/2
  1738. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1739. */
  1740. case 12:/* 3840 Rx Data Fifo Size */
  1741. lp->afc_cfg=0x0024124F;break;
  1742. case 13:/* 2880 Rx Data Fifo Size */
  1743. lp->afc_cfg=0x0015073F;break;
  1744. case 14:/* 1920 Rx Data Fifo Size */
  1745. lp->afc_cfg=0x0006032F;break;
  1746. default:
  1747. PRINTK("%s: ERROR -- no AFC_CFG setting found",
  1748. dev->name);
  1749. break;
  1750. }
  1751. DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
  1752. "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
  1753. lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
  1754. spin_lock_init(&lp->lock);
  1755. /* Get the MAC address */
  1756. SMC_GET_MAC_ADDR(dev->dev_addr);
  1757. /* now, reset the chip, and put it into a known state */
  1758. smc911x_reset(dev);
  1759. /*
  1760. * If dev->irq is 0, then the device has to be banged on to see
  1761. * what the IRQ is.
  1762. *
  1763. * Specifying an IRQ is done with the assumption that the user knows
  1764. * what (s)he is doing. No checking is done!!!!
  1765. */
  1766. if (dev->irq < 1) {
  1767. int trials;
  1768. trials = 3;
  1769. while (trials--) {
  1770. dev->irq = smc911x_findirq(ioaddr);
  1771. if (dev->irq)
  1772. break;
  1773. /* kick the card and try again */
  1774. smc911x_reset(dev);
  1775. }
  1776. }
  1777. if (dev->irq == 0) {
  1778. printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
  1779. dev->name);
  1780. retval = -ENODEV;
  1781. goto err_out;
  1782. }
  1783. dev->irq = irq_canonicalize(dev->irq);
  1784. /* Fill in the fields of the device structure with ethernet values. */
  1785. ether_setup(dev);
  1786. dev->open = smc911x_open;
  1787. dev->stop = smc911x_close;
  1788. dev->hard_start_xmit = smc911x_hard_start_xmit;
  1789. dev->tx_timeout = smc911x_timeout;
  1790. dev->watchdog_timeo = msecs_to_jiffies(watchdog);
  1791. dev->get_stats = smc911x_query_statistics;
  1792. dev->set_multicast_list = smc911x_set_multicast_list;
  1793. dev->ethtool_ops = &smc911x_ethtool_ops;
  1794. #ifdef CONFIG_NET_POLL_CONTROLLER
  1795. dev->poll_controller = smc911x_poll_controller;
  1796. #endif
  1797. INIT_WORK(&lp->phy_configure, smc911x_phy_configure, dev);
  1798. lp->mii.phy_id_mask = 0x1f;
  1799. lp->mii.reg_num_mask = 0x1f;
  1800. lp->mii.force_media = 0;
  1801. lp->mii.full_duplex = 0;
  1802. lp->mii.dev = dev;
  1803. lp->mii.mdio_read = smc911x_phy_read;
  1804. lp->mii.mdio_write = smc911x_phy_write;
  1805. /*
  1806. * Locate the phy, if any.
  1807. */
  1808. smc911x_phy_detect(dev);
  1809. /* Set default parameters */
  1810. lp->msg_enable = NETIF_MSG_LINK;
  1811. lp->ctl_rfduplx = 1;
  1812. lp->ctl_rspeed = 100;
  1813. /* Grab the IRQ */
  1814. retval = request_irq(dev->irq, &smc911x_interrupt, IRQF_SHARED, dev->name, dev);
  1815. if (retval)
  1816. goto err_out;
  1817. set_irq_type(dev->irq, IRQT_FALLING);
  1818. #ifdef SMC_USE_DMA
  1819. lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
  1820. lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
  1821. lp->rxdma_active = 0;
  1822. lp->txdma_active = 0;
  1823. dev->dma = lp->rxdma;
  1824. #endif
  1825. retval = register_netdev(dev);
  1826. if (retval == 0) {
  1827. /* now, print out the card info, in a short format.. */
  1828. printk("%s: %s (rev %d) at %#lx IRQ %d",
  1829. dev->name, version_string, lp->revision,
  1830. dev->base_addr, dev->irq);
  1831. #ifdef SMC_USE_DMA
  1832. if (lp->rxdma != -1)
  1833. printk(" RXDMA %d ", lp->rxdma);
  1834. if (lp->txdma != -1)
  1835. printk("TXDMA %d", lp->txdma);
  1836. #endif
  1837. printk("\n");
  1838. if (!is_valid_ether_addr(dev->dev_addr)) {
  1839. printk("%s: Invalid ethernet MAC address. Please "
  1840. "set using ifconfig\n", dev->name);
  1841. } else {
  1842. /* Print the Ethernet address */
  1843. printk("%s: Ethernet addr: ", dev->name);
  1844. for (i = 0; i < 5; i++)
  1845. printk("%2.2x:", dev->dev_addr[i]);
  1846. printk("%2.2x\n", dev->dev_addr[5]);
  1847. }
  1848. if (lp->phy_type == 0) {
  1849. PRINTK("%s: No PHY found\n", dev->name);
  1850. } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
  1851. PRINTK("%s: LAN911x Internal PHY\n", dev->name);
  1852. } else {
  1853. PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
  1854. }
  1855. }
  1856. err_out:
  1857. #ifdef SMC_USE_DMA
  1858. if (retval) {
  1859. if (lp->rxdma != -1) {
  1860. SMC_DMA_FREE(dev, lp->rxdma);
  1861. }
  1862. if (lp->txdma != -1) {
  1863. SMC_DMA_FREE(dev, lp->txdma);
  1864. }
  1865. }
  1866. #endif
  1867. return retval;
  1868. }
  1869. /*
  1870. * smc911x_init(void)
  1871. *
  1872. * Output:
  1873. * 0 --> there is a device
  1874. * anything else, error
  1875. */
  1876. static int smc911x_drv_probe(struct platform_device *pdev)
  1877. {
  1878. struct net_device *ndev;
  1879. struct resource *res;
  1880. unsigned int *addr;
  1881. int ret;
  1882. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1883. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1884. if (!res) {
  1885. ret = -ENODEV;
  1886. goto out;
  1887. }
  1888. /*
  1889. * Request the regions.
  1890. */
  1891. if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
  1892. ret = -EBUSY;
  1893. goto out;
  1894. }
  1895. ndev = alloc_etherdev(sizeof(struct smc911x_local));
  1896. if (!ndev) {
  1897. printk("%s: could not allocate device.\n", CARDNAME);
  1898. ret = -ENOMEM;
  1899. goto release_1;
  1900. }
  1901. SET_MODULE_OWNER(ndev);
  1902. SET_NETDEV_DEV(ndev, &pdev->dev);
  1903. ndev->dma = (unsigned char)-1;
  1904. ndev->irq = platform_get_irq(pdev, 0);
  1905. addr = ioremap(res->start, SMC911X_IO_EXTENT);
  1906. if (!addr) {
  1907. ret = -ENOMEM;
  1908. goto release_both;
  1909. }
  1910. platform_set_drvdata(pdev, ndev);
  1911. ret = smc911x_probe(ndev, (unsigned long)addr);
  1912. if (ret != 0) {
  1913. platform_set_drvdata(pdev, NULL);
  1914. iounmap(addr);
  1915. release_both:
  1916. free_netdev(ndev);
  1917. release_1:
  1918. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1919. out:
  1920. printk("%s: not found (%d).\n", CARDNAME, ret);
  1921. }
  1922. #ifdef SMC_USE_DMA
  1923. else {
  1924. struct smc911x_local *lp = netdev_priv(ndev);
  1925. lp->physaddr = res->start;
  1926. lp->dev = &pdev->dev;
  1927. }
  1928. #endif
  1929. return ret;
  1930. }
  1931. static int smc911x_drv_remove(struct platform_device *pdev)
  1932. {
  1933. struct net_device *ndev = platform_get_drvdata(pdev);
  1934. struct resource *res;
  1935. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1936. platform_set_drvdata(pdev, NULL);
  1937. unregister_netdev(ndev);
  1938. free_irq(ndev->irq, ndev);
  1939. #ifdef SMC_USE_DMA
  1940. {
  1941. struct smc911x_local *lp = netdev_priv(ndev);
  1942. if (lp->rxdma != -1) {
  1943. SMC_DMA_FREE(dev, lp->rxdma);
  1944. }
  1945. if (lp->txdma != -1) {
  1946. SMC_DMA_FREE(dev, lp->txdma);
  1947. }
  1948. }
  1949. #endif
  1950. iounmap((void *)ndev->base_addr);
  1951. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1952. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1953. free_netdev(ndev);
  1954. return 0;
  1955. }
  1956. static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
  1957. {
  1958. struct net_device *ndev = platform_get_drvdata(dev);
  1959. unsigned long ioaddr = ndev->base_addr;
  1960. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1961. if (ndev) {
  1962. if (netif_running(ndev)) {
  1963. netif_device_detach(ndev);
  1964. smc911x_shutdown(ndev);
  1965. #if POWER_DOWN
  1966. /* Set D2 - Energy detect only setting */
  1967. SMC_SET_PMT_CTRL(2<<12);
  1968. #endif
  1969. }
  1970. }
  1971. return 0;
  1972. }
  1973. static int smc911x_drv_resume(struct platform_device *dev)
  1974. {
  1975. struct net_device *ndev = platform_get_drvdata(dev);
  1976. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1977. if (ndev) {
  1978. struct smc911x_local *lp = netdev_priv(ndev);
  1979. if (netif_running(ndev)) {
  1980. smc911x_reset(ndev);
  1981. smc911x_enable(ndev);
  1982. if (lp->phy_type != 0)
  1983. smc911x_phy_configure(ndev);
  1984. netif_device_attach(ndev);
  1985. }
  1986. }
  1987. return 0;
  1988. }
  1989. static struct platform_driver smc911x_driver = {
  1990. .probe = smc911x_drv_probe,
  1991. .remove = smc911x_drv_remove,
  1992. .suspend = smc911x_drv_suspend,
  1993. .resume = smc911x_drv_resume,
  1994. .driver = {
  1995. .name = CARDNAME,
  1996. },
  1997. };
  1998. static int __init smc911x_init(void)
  1999. {
  2000. return platform_driver_register(&smc911x_driver);
  2001. }
  2002. static void __exit smc911x_cleanup(void)
  2003. {
  2004. platform_driver_unregister(&smc911x_driver);
  2005. }
  2006. module_init(smc911x_init);
  2007. module_exit(smc911x_cleanup);