ixgb_main.c 58 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "ixgb.h"
  21. char ixgb_driver_name[] = "ixgb";
  22. static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
  23. #ifndef CONFIG_IXGB_NAPI
  24. #define DRIVERNAPI
  25. #else
  26. #define DRIVERNAPI "-NAPI"
  27. #endif
  28. #define DRV_VERSION "1.0.109-k2"DRIVERNAPI
  29. char ixgb_driver_version[] = DRV_VERSION;
  30. static char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  31. /* ixgb_pci_tbl - PCI Device ID Table
  32. *
  33. * Wildcard entries (PCI_ANY_ID) should come last
  34. * Last entry must be all 0s
  35. *
  36. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  37. * Class, Class Mask, private data (not used) }
  38. */
  39. static struct pci_device_id ixgb_pci_tbl[] = {
  40. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
  41. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  42. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
  43. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  44. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
  45. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  46. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
  47. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  48. /* required last entry */
  49. {0,}
  50. };
  51. MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
  52. /* Local Function Prototypes */
  53. int ixgb_up(struct ixgb_adapter *adapter);
  54. void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
  55. void ixgb_reset(struct ixgb_adapter *adapter);
  56. int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
  57. int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
  58. void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
  59. void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
  60. void ixgb_update_stats(struct ixgb_adapter *adapter);
  61. static int ixgb_init_module(void);
  62. static void ixgb_exit_module(void);
  63. static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  64. static void __devexit ixgb_remove(struct pci_dev *pdev);
  65. static int ixgb_sw_init(struct ixgb_adapter *adapter);
  66. static int ixgb_open(struct net_device *netdev);
  67. static int ixgb_close(struct net_device *netdev);
  68. static void ixgb_configure_tx(struct ixgb_adapter *adapter);
  69. static void ixgb_configure_rx(struct ixgb_adapter *adapter);
  70. static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
  71. static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
  72. static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
  73. static void ixgb_set_multi(struct net_device *netdev);
  74. static void ixgb_watchdog(unsigned long data);
  75. static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  76. static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
  77. static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
  78. static int ixgb_set_mac(struct net_device *netdev, void *p);
  79. static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
  80. static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
  81. #ifdef CONFIG_IXGB_NAPI
  82. static int ixgb_clean(struct net_device *netdev, int *budget);
  83. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
  84. int *work_done, int work_to_do);
  85. #else
  86. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
  87. #endif
  88. static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
  89. void ixgb_set_ethtool_ops(struct net_device *netdev);
  90. static void ixgb_tx_timeout(struct net_device *dev);
  91. static void ixgb_tx_timeout_task(struct net_device *dev);
  92. static void ixgb_vlan_rx_register(struct net_device *netdev,
  93. struct vlan_group *grp);
  94. static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  95. static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  96. static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
  97. #ifdef CONFIG_NET_POLL_CONTROLLER
  98. /* for netdump / net console */
  99. static void ixgb_netpoll(struct net_device *dev);
  100. #endif
  101. /* Exported from other modules */
  102. extern void ixgb_check_options(struct ixgb_adapter *adapter);
  103. static struct pci_driver ixgb_driver = {
  104. .name = ixgb_driver_name,
  105. .id_table = ixgb_pci_tbl,
  106. .probe = ixgb_probe,
  107. .remove = __devexit_p(ixgb_remove),
  108. };
  109. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  110. MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
  111. MODULE_LICENSE("GPL");
  112. MODULE_VERSION(DRV_VERSION);
  113. #define DEFAULT_DEBUG_LEVEL_SHIFT 3
  114. static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
  115. module_param(debug, int, 0);
  116. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  117. /* some defines for controlling descriptor fetches in h/w */
  118. #define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */
  119. #define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
  120. * this */
  121. #define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
  122. * is pushed this many descriptors
  123. * from head */
  124. /**
  125. * ixgb_init_module - Driver Registration Routine
  126. *
  127. * ixgb_init_module is the first routine called when the driver is
  128. * loaded. All it does is register with the PCI subsystem.
  129. **/
  130. static int __init
  131. ixgb_init_module(void)
  132. {
  133. printk(KERN_INFO "%s - version %s\n",
  134. ixgb_driver_string, ixgb_driver_version);
  135. printk(KERN_INFO "%s\n", ixgb_copyright);
  136. return pci_module_init(&ixgb_driver);
  137. }
  138. module_init(ixgb_init_module);
  139. /**
  140. * ixgb_exit_module - Driver Exit Cleanup Routine
  141. *
  142. * ixgb_exit_module is called just before the driver is removed
  143. * from memory.
  144. **/
  145. static void __exit
  146. ixgb_exit_module(void)
  147. {
  148. pci_unregister_driver(&ixgb_driver);
  149. }
  150. module_exit(ixgb_exit_module);
  151. /**
  152. * ixgb_irq_disable - Mask off interrupt generation on the NIC
  153. * @adapter: board private structure
  154. **/
  155. static void
  156. ixgb_irq_disable(struct ixgb_adapter *adapter)
  157. {
  158. atomic_inc(&adapter->irq_sem);
  159. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  160. IXGB_WRITE_FLUSH(&adapter->hw);
  161. synchronize_irq(adapter->pdev->irq);
  162. }
  163. /**
  164. * ixgb_irq_enable - Enable default interrupt generation settings
  165. * @adapter: board private structure
  166. **/
  167. static void
  168. ixgb_irq_enable(struct ixgb_adapter *adapter)
  169. {
  170. if(atomic_dec_and_test(&adapter->irq_sem)) {
  171. IXGB_WRITE_REG(&adapter->hw, IMS,
  172. IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
  173. IXGB_INT_LSC);
  174. IXGB_WRITE_FLUSH(&adapter->hw);
  175. }
  176. }
  177. int
  178. ixgb_up(struct ixgb_adapter *adapter)
  179. {
  180. struct net_device *netdev = adapter->netdev;
  181. int err;
  182. int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  183. struct ixgb_hw *hw = &adapter->hw;
  184. /* hardware has been reset, we need to reload some things */
  185. ixgb_rar_set(hw, netdev->dev_addr, 0);
  186. ixgb_set_multi(netdev);
  187. ixgb_restore_vlan(adapter);
  188. ixgb_configure_tx(adapter);
  189. ixgb_setup_rctl(adapter);
  190. ixgb_configure_rx(adapter);
  191. ixgb_alloc_rx_buffers(adapter);
  192. /* disable interrupts and get the hardware into a known state */
  193. IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
  194. #ifdef CONFIG_PCI_MSI
  195. {
  196. boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
  197. IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
  198. adapter->have_msi = TRUE;
  199. if (!pcix)
  200. adapter->have_msi = FALSE;
  201. else if((err = pci_enable_msi(adapter->pdev))) {
  202. DPRINTK(PROBE, ERR,
  203. "Unable to allocate MSI interrupt Error: %d\n", err);
  204. adapter->have_msi = FALSE;
  205. /* proceed to try to request regular interrupt */
  206. }
  207. }
  208. #endif
  209. if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
  210. IRQF_SHARED | IRQF_SAMPLE_RANDOM,
  211. netdev->name, netdev))) {
  212. DPRINTK(PROBE, ERR,
  213. "Unable to allocate interrupt Error: %d\n", err);
  214. return err;
  215. }
  216. if((hw->max_frame_size != max_frame) ||
  217. (hw->max_frame_size !=
  218. (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
  219. hw->max_frame_size = max_frame;
  220. IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
  221. if(hw->max_frame_size >
  222. IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
  223. uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
  224. if(!(ctrl0 & IXGB_CTRL0_JFE)) {
  225. ctrl0 |= IXGB_CTRL0_JFE;
  226. IXGB_WRITE_REG(hw, CTRL0, ctrl0);
  227. }
  228. }
  229. }
  230. mod_timer(&adapter->watchdog_timer, jiffies);
  231. #ifdef CONFIG_IXGB_NAPI
  232. netif_poll_enable(netdev);
  233. #endif
  234. ixgb_irq_enable(adapter);
  235. return 0;
  236. }
  237. void
  238. ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
  239. {
  240. struct net_device *netdev = adapter->netdev;
  241. ixgb_irq_disable(adapter);
  242. free_irq(adapter->pdev->irq, netdev);
  243. #ifdef CONFIG_PCI_MSI
  244. if(adapter->have_msi == TRUE)
  245. pci_disable_msi(adapter->pdev);
  246. #endif
  247. if(kill_watchdog)
  248. del_timer_sync(&adapter->watchdog_timer);
  249. #ifdef CONFIG_IXGB_NAPI
  250. netif_poll_disable(netdev);
  251. #endif
  252. adapter->link_speed = 0;
  253. adapter->link_duplex = 0;
  254. netif_carrier_off(netdev);
  255. netif_stop_queue(netdev);
  256. ixgb_reset(adapter);
  257. ixgb_clean_tx_ring(adapter);
  258. ixgb_clean_rx_ring(adapter);
  259. }
  260. void
  261. ixgb_reset(struct ixgb_adapter *adapter)
  262. {
  263. ixgb_adapter_stop(&adapter->hw);
  264. if(!ixgb_init_hw(&adapter->hw))
  265. DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
  266. }
  267. /**
  268. * ixgb_probe - Device Initialization Routine
  269. * @pdev: PCI device information struct
  270. * @ent: entry in ixgb_pci_tbl
  271. *
  272. * Returns 0 on success, negative on failure
  273. *
  274. * ixgb_probe initializes an adapter identified by a pci_dev structure.
  275. * The OS initialization, configuring of the adapter private structure,
  276. * and a hardware reset occur.
  277. **/
  278. static int __devinit
  279. ixgb_probe(struct pci_dev *pdev,
  280. const struct pci_device_id *ent)
  281. {
  282. struct net_device *netdev = NULL;
  283. struct ixgb_adapter *adapter;
  284. static int cards_found = 0;
  285. unsigned long mmio_start;
  286. int mmio_len;
  287. int pci_using_dac;
  288. int i;
  289. int err;
  290. if((err = pci_enable_device(pdev)))
  291. return err;
  292. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
  293. !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
  294. pci_using_dac = 1;
  295. } else {
  296. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
  297. (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
  298. printk(KERN_ERR
  299. "ixgb: No usable DMA configuration, aborting\n");
  300. goto err_dma_mask;
  301. }
  302. pci_using_dac = 0;
  303. }
  304. if((err = pci_request_regions(pdev, ixgb_driver_name)))
  305. goto err_request_regions;
  306. pci_set_master(pdev);
  307. netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
  308. if(!netdev) {
  309. err = -ENOMEM;
  310. goto err_alloc_etherdev;
  311. }
  312. SET_MODULE_OWNER(netdev);
  313. SET_NETDEV_DEV(netdev, &pdev->dev);
  314. pci_set_drvdata(pdev, netdev);
  315. adapter = netdev_priv(netdev);
  316. adapter->netdev = netdev;
  317. adapter->pdev = pdev;
  318. adapter->hw.back = adapter;
  319. adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
  320. mmio_start = pci_resource_start(pdev, BAR_0);
  321. mmio_len = pci_resource_len(pdev, BAR_0);
  322. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  323. if(!adapter->hw.hw_addr) {
  324. err = -EIO;
  325. goto err_ioremap;
  326. }
  327. for(i = BAR_1; i <= BAR_5; i++) {
  328. if(pci_resource_len(pdev, i) == 0)
  329. continue;
  330. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  331. adapter->hw.io_base = pci_resource_start(pdev, i);
  332. break;
  333. }
  334. }
  335. netdev->open = &ixgb_open;
  336. netdev->stop = &ixgb_close;
  337. netdev->hard_start_xmit = &ixgb_xmit_frame;
  338. netdev->get_stats = &ixgb_get_stats;
  339. netdev->set_multicast_list = &ixgb_set_multi;
  340. netdev->set_mac_address = &ixgb_set_mac;
  341. netdev->change_mtu = &ixgb_change_mtu;
  342. ixgb_set_ethtool_ops(netdev);
  343. netdev->tx_timeout = &ixgb_tx_timeout;
  344. netdev->watchdog_timeo = 5 * HZ;
  345. #ifdef CONFIG_IXGB_NAPI
  346. netdev->poll = &ixgb_clean;
  347. netdev->weight = 64;
  348. #endif
  349. netdev->vlan_rx_register = ixgb_vlan_rx_register;
  350. netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
  351. netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
  352. #ifdef CONFIG_NET_POLL_CONTROLLER
  353. netdev->poll_controller = ixgb_netpoll;
  354. #endif
  355. strcpy(netdev->name, pci_name(pdev));
  356. netdev->mem_start = mmio_start;
  357. netdev->mem_end = mmio_start + mmio_len;
  358. netdev->base_addr = adapter->hw.io_base;
  359. adapter->bd_number = cards_found;
  360. adapter->link_speed = 0;
  361. adapter->link_duplex = 0;
  362. /* setup the private structure */
  363. if((err = ixgb_sw_init(adapter)))
  364. goto err_sw_init;
  365. netdev->features = NETIF_F_SG |
  366. NETIF_F_HW_CSUM |
  367. NETIF_F_HW_VLAN_TX |
  368. NETIF_F_HW_VLAN_RX |
  369. NETIF_F_HW_VLAN_FILTER;
  370. #ifdef NETIF_F_TSO
  371. netdev->features |= NETIF_F_TSO;
  372. #endif
  373. #ifdef NETIF_F_LLTX
  374. netdev->features |= NETIF_F_LLTX;
  375. #endif
  376. if(pci_using_dac)
  377. netdev->features |= NETIF_F_HIGHDMA;
  378. /* make sure the EEPROM is good */
  379. if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
  380. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  381. err = -EIO;
  382. goto err_eeprom;
  383. }
  384. ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
  385. memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
  386. if(!is_valid_ether_addr(netdev->perm_addr)) {
  387. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  388. err = -EIO;
  389. goto err_eeprom;
  390. }
  391. adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
  392. init_timer(&adapter->watchdog_timer);
  393. adapter->watchdog_timer.function = &ixgb_watchdog;
  394. adapter->watchdog_timer.data = (unsigned long)adapter;
  395. INIT_WORK(&adapter->tx_timeout_task,
  396. (void (*)(void *))ixgb_tx_timeout_task, netdev);
  397. strcpy(netdev->name, "eth%d");
  398. if((err = register_netdev(netdev)))
  399. goto err_register;
  400. /* we're going to reset, so assume we have no link for now */
  401. netif_carrier_off(netdev);
  402. netif_stop_queue(netdev);
  403. DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
  404. ixgb_check_options(adapter);
  405. /* reset the hardware with the new settings */
  406. ixgb_reset(adapter);
  407. cards_found++;
  408. return 0;
  409. err_register:
  410. err_sw_init:
  411. err_eeprom:
  412. iounmap(adapter->hw.hw_addr);
  413. err_ioremap:
  414. free_netdev(netdev);
  415. err_alloc_etherdev:
  416. pci_release_regions(pdev);
  417. err_request_regions:
  418. err_dma_mask:
  419. pci_disable_device(pdev);
  420. return err;
  421. }
  422. /**
  423. * ixgb_remove - Device Removal Routine
  424. * @pdev: PCI device information struct
  425. *
  426. * ixgb_remove is called by the PCI subsystem to alert the driver
  427. * that it should release a PCI device. The could be caused by a
  428. * Hot-Plug event, or because the driver is going to be removed from
  429. * memory.
  430. **/
  431. static void __devexit
  432. ixgb_remove(struct pci_dev *pdev)
  433. {
  434. struct net_device *netdev = pci_get_drvdata(pdev);
  435. struct ixgb_adapter *adapter = netdev_priv(netdev);
  436. unregister_netdev(netdev);
  437. iounmap(adapter->hw.hw_addr);
  438. pci_release_regions(pdev);
  439. free_netdev(netdev);
  440. }
  441. /**
  442. * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
  443. * @adapter: board private structure to initialize
  444. *
  445. * ixgb_sw_init initializes the Adapter private data structure.
  446. * Fields are initialized based on PCI device information and
  447. * OS network device settings (MTU size).
  448. **/
  449. static int __devinit
  450. ixgb_sw_init(struct ixgb_adapter *adapter)
  451. {
  452. struct ixgb_hw *hw = &adapter->hw;
  453. struct net_device *netdev = adapter->netdev;
  454. struct pci_dev *pdev = adapter->pdev;
  455. /* PCI config space info */
  456. hw->vendor_id = pdev->vendor;
  457. hw->device_id = pdev->device;
  458. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  459. hw->subsystem_id = pdev->subsystem_device;
  460. hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  461. adapter->rx_buffer_len = hw->max_frame_size;
  462. if((hw->device_id == IXGB_DEVICE_ID_82597EX)
  463. || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
  464. || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
  465. || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
  466. hw->mac_type = ixgb_82597;
  467. else {
  468. /* should never have loaded on this device */
  469. DPRINTK(PROBE, ERR, "unsupported device id\n");
  470. }
  471. /* enable flow control to be programmed */
  472. hw->fc.send_xon = 1;
  473. atomic_set(&adapter->irq_sem, 1);
  474. spin_lock_init(&adapter->tx_lock);
  475. return 0;
  476. }
  477. /**
  478. * ixgb_open - Called when a network interface is made active
  479. * @netdev: network interface device structure
  480. *
  481. * Returns 0 on success, negative value on failure
  482. *
  483. * The open entry point is called when a network interface is made
  484. * active by the system (IFF_UP). At this point all resources needed
  485. * for transmit and receive operations are allocated, the interrupt
  486. * handler is registered with the OS, the watchdog timer is started,
  487. * and the stack is notified that the interface is ready.
  488. **/
  489. static int
  490. ixgb_open(struct net_device *netdev)
  491. {
  492. struct ixgb_adapter *adapter = netdev_priv(netdev);
  493. int err;
  494. /* allocate transmit descriptors */
  495. if((err = ixgb_setup_tx_resources(adapter)))
  496. goto err_setup_tx;
  497. /* allocate receive descriptors */
  498. if((err = ixgb_setup_rx_resources(adapter)))
  499. goto err_setup_rx;
  500. if((err = ixgb_up(adapter)))
  501. goto err_up;
  502. return 0;
  503. err_up:
  504. ixgb_free_rx_resources(adapter);
  505. err_setup_rx:
  506. ixgb_free_tx_resources(adapter);
  507. err_setup_tx:
  508. ixgb_reset(adapter);
  509. return err;
  510. }
  511. /**
  512. * ixgb_close - Disables a network interface
  513. * @netdev: network interface device structure
  514. *
  515. * Returns 0, this is not allowed to fail
  516. *
  517. * The close entry point is called when an interface is de-activated
  518. * by the OS. The hardware is still under the drivers control, but
  519. * needs to be disabled. A global MAC reset is issued to stop the
  520. * hardware, and all transmit and receive resources are freed.
  521. **/
  522. static int
  523. ixgb_close(struct net_device *netdev)
  524. {
  525. struct ixgb_adapter *adapter = netdev_priv(netdev);
  526. ixgb_down(adapter, TRUE);
  527. ixgb_free_tx_resources(adapter);
  528. ixgb_free_rx_resources(adapter);
  529. return 0;
  530. }
  531. /**
  532. * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
  533. * @adapter: board private structure
  534. *
  535. * Return 0 on success, negative on failure
  536. **/
  537. int
  538. ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
  539. {
  540. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  541. struct pci_dev *pdev = adapter->pdev;
  542. int size;
  543. size = sizeof(struct ixgb_buffer) * txdr->count;
  544. txdr->buffer_info = vmalloc(size);
  545. if(!txdr->buffer_info) {
  546. DPRINTK(PROBE, ERR,
  547. "Unable to allocate transmit descriptor ring memory\n");
  548. return -ENOMEM;
  549. }
  550. memset(txdr->buffer_info, 0, size);
  551. /* round up to nearest 4K */
  552. txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
  553. IXGB_ROUNDUP(txdr->size, 4096);
  554. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  555. if(!txdr->desc) {
  556. vfree(txdr->buffer_info);
  557. DPRINTK(PROBE, ERR,
  558. "Unable to allocate transmit descriptor memory\n");
  559. return -ENOMEM;
  560. }
  561. memset(txdr->desc, 0, txdr->size);
  562. txdr->next_to_use = 0;
  563. txdr->next_to_clean = 0;
  564. return 0;
  565. }
  566. /**
  567. * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
  568. * @adapter: board private structure
  569. *
  570. * Configure the Tx unit of the MAC after a reset.
  571. **/
  572. static void
  573. ixgb_configure_tx(struct ixgb_adapter *adapter)
  574. {
  575. uint64_t tdba = adapter->tx_ring.dma;
  576. uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
  577. uint32_t tctl;
  578. struct ixgb_hw *hw = &adapter->hw;
  579. /* Setup the Base and Length of the Tx Descriptor Ring
  580. * tx_ring.dma can be either a 32 or 64 bit value
  581. */
  582. IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  583. IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
  584. IXGB_WRITE_REG(hw, TDLEN, tdlen);
  585. /* Setup the HW Tx Head and Tail descriptor pointers */
  586. IXGB_WRITE_REG(hw, TDH, 0);
  587. IXGB_WRITE_REG(hw, TDT, 0);
  588. /* don't set up txdctl, it induces performance problems if configured
  589. * incorrectly */
  590. /* Set the Tx Interrupt Delay register */
  591. IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  592. /* Program the Transmit Control Register */
  593. tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
  594. IXGB_WRITE_REG(hw, TCTL, tctl);
  595. /* Setup Transmit Descriptor Settings for this adapter */
  596. adapter->tx_cmd_type =
  597. IXGB_TX_DESC_TYPE
  598. | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
  599. }
  600. /**
  601. * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
  602. * @adapter: board private structure
  603. *
  604. * Returns 0 on success, negative on failure
  605. **/
  606. int
  607. ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
  608. {
  609. struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
  610. struct pci_dev *pdev = adapter->pdev;
  611. int size;
  612. size = sizeof(struct ixgb_buffer) * rxdr->count;
  613. rxdr->buffer_info = vmalloc(size);
  614. if(!rxdr->buffer_info) {
  615. DPRINTK(PROBE, ERR,
  616. "Unable to allocate receive descriptor ring\n");
  617. return -ENOMEM;
  618. }
  619. memset(rxdr->buffer_info, 0, size);
  620. /* Round up to nearest 4K */
  621. rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
  622. IXGB_ROUNDUP(rxdr->size, 4096);
  623. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  624. if(!rxdr->desc) {
  625. vfree(rxdr->buffer_info);
  626. DPRINTK(PROBE, ERR,
  627. "Unable to allocate receive descriptors\n");
  628. return -ENOMEM;
  629. }
  630. memset(rxdr->desc, 0, rxdr->size);
  631. rxdr->next_to_clean = 0;
  632. rxdr->next_to_use = 0;
  633. return 0;
  634. }
  635. /**
  636. * ixgb_setup_rctl - configure the receive control register
  637. * @adapter: Board private structure
  638. **/
  639. static void
  640. ixgb_setup_rctl(struct ixgb_adapter *adapter)
  641. {
  642. uint32_t rctl;
  643. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  644. rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
  645. rctl |=
  646. IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
  647. IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
  648. (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
  649. rctl |= IXGB_RCTL_SECRC;
  650. if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
  651. rctl |= IXGB_RCTL_BSIZE_2048;
  652. else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
  653. rctl |= IXGB_RCTL_BSIZE_4096;
  654. else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
  655. rctl |= IXGB_RCTL_BSIZE_8192;
  656. else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
  657. rctl |= IXGB_RCTL_BSIZE_16384;
  658. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  659. }
  660. /**
  661. * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
  662. * @adapter: board private structure
  663. *
  664. * Configure the Rx unit of the MAC after a reset.
  665. **/
  666. static void
  667. ixgb_configure_rx(struct ixgb_adapter *adapter)
  668. {
  669. uint64_t rdba = adapter->rx_ring.dma;
  670. uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
  671. struct ixgb_hw *hw = &adapter->hw;
  672. uint32_t rctl;
  673. uint32_t rxcsum;
  674. uint32_t rxdctl;
  675. /* make sure receives are disabled while setting up the descriptors */
  676. rctl = IXGB_READ_REG(hw, RCTL);
  677. IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
  678. /* set the Receive Delay Timer Register */
  679. IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  680. /* Setup the Base and Length of the Rx Descriptor Ring */
  681. IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  682. IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
  683. IXGB_WRITE_REG(hw, RDLEN, rdlen);
  684. /* Setup the HW Rx Head and Tail Descriptor Pointers */
  685. IXGB_WRITE_REG(hw, RDH, 0);
  686. IXGB_WRITE_REG(hw, RDT, 0);
  687. /* set up pre-fetching of receive buffers so we get some before we
  688. * run out (default hardware behavior is to run out before fetching
  689. * more). This sets up to fetch if HTHRESH rx descriptors are avail
  690. * and the descriptors in hw cache are below PTHRESH. This avoids
  691. * the hardware behavior of fetching <=512 descriptors in a single
  692. * burst that pre-empts all other activity, usually causing fifo
  693. * overflows. */
  694. /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
  695. rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
  696. RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
  697. RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
  698. IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
  699. /* Enable Receive Checksum Offload for TCP and UDP */
  700. if(adapter->rx_csum == TRUE) {
  701. rxcsum = IXGB_READ_REG(hw, RXCSUM);
  702. rxcsum |= IXGB_RXCSUM_TUOFL;
  703. IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
  704. }
  705. /* Enable Receives */
  706. IXGB_WRITE_REG(hw, RCTL, rctl);
  707. }
  708. /**
  709. * ixgb_free_tx_resources - Free Tx Resources
  710. * @adapter: board private structure
  711. *
  712. * Free all transmit software resources
  713. **/
  714. void
  715. ixgb_free_tx_resources(struct ixgb_adapter *adapter)
  716. {
  717. struct pci_dev *pdev = adapter->pdev;
  718. ixgb_clean_tx_ring(adapter);
  719. vfree(adapter->tx_ring.buffer_info);
  720. adapter->tx_ring.buffer_info = NULL;
  721. pci_free_consistent(pdev, adapter->tx_ring.size,
  722. adapter->tx_ring.desc, adapter->tx_ring.dma);
  723. adapter->tx_ring.desc = NULL;
  724. }
  725. static void
  726. ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
  727. struct ixgb_buffer *buffer_info)
  728. {
  729. struct pci_dev *pdev = adapter->pdev;
  730. if (buffer_info->dma)
  731. pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
  732. PCI_DMA_TODEVICE);
  733. if (buffer_info->skb)
  734. dev_kfree_skb_any(buffer_info->skb);
  735. buffer_info->skb = NULL;
  736. buffer_info->dma = 0;
  737. buffer_info->time_stamp = 0;
  738. /* these fields must always be initialized in tx
  739. * buffer_info->length = 0;
  740. * buffer_info->next_to_watch = 0; */
  741. }
  742. /**
  743. * ixgb_clean_tx_ring - Free Tx Buffers
  744. * @adapter: board private structure
  745. **/
  746. static void
  747. ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
  748. {
  749. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  750. struct ixgb_buffer *buffer_info;
  751. unsigned long size;
  752. unsigned int i;
  753. /* Free all the Tx ring sk_buffs */
  754. for(i = 0; i < tx_ring->count; i++) {
  755. buffer_info = &tx_ring->buffer_info[i];
  756. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  757. }
  758. size = sizeof(struct ixgb_buffer) * tx_ring->count;
  759. memset(tx_ring->buffer_info, 0, size);
  760. /* Zero out the descriptor ring */
  761. memset(tx_ring->desc, 0, tx_ring->size);
  762. tx_ring->next_to_use = 0;
  763. tx_ring->next_to_clean = 0;
  764. IXGB_WRITE_REG(&adapter->hw, TDH, 0);
  765. IXGB_WRITE_REG(&adapter->hw, TDT, 0);
  766. }
  767. /**
  768. * ixgb_free_rx_resources - Free Rx Resources
  769. * @adapter: board private structure
  770. *
  771. * Free all receive software resources
  772. **/
  773. void
  774. ixgb_free_rx_resources(struct ixgb_adapter *adapter)
  775. {
  776. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  777. struct pci_dev *pdev = adapter->pdev;
  778. ixgb_clean_rx_ring(adapter);
  779. vfree(rx_ring->buffer_info);
  780. rx_ring->buffer_info = NULL;
  781. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  782. rx_ring->desc = NULL;
  783. }
  784. /**
  785. * ixgb_clean_rx_ring - Free Rx Buffers
  786. * @adapter: board private structure
  787. **/
  788. static void
  789. ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
  790. {
  791. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  792. struct ixgb_buffer *buffer_info;
  793. struct pci_dev *pdev = adapter->pdev;
  794. unsigned long size;
  795. unsigned int i;
  796. /* Free all the Rx ring sk_buffs */
  797. for(i = 0; i < rx_ring->count; i++) {
  798. buffer_info = &rx_ring->buffer_info[i];
  799. if(buffer_info->skb) {
  800. pci_unmap_single(pdev,
  801. buffer_info->dma,
  802. buffer_info->length,
  803. PCI_DMA_FROMDEVICE);
  804. dev_kfree_skb(buffer_info->skb);
  805. buffer_info->skb = NULL;
  806. }
  807. }
  808. size = sizeof(struct ixgb_buffer) * rx_ring->count;
  809. memset(rx_ring->buffer_info, 0, size);
  810. /* Zero out the descriptor ring */
  811. memset(rx_ring->desc, 0, rx_ring->size);
  812. rx_ring->next_to_clean = 0;
  813. rx_ring->next_to_use = 0;
  814. IXGB_WRITE_REG(&adapter->hw, RDH, 0);
  815. IXGB_WRITE_REG(&adapter->hw, RDT, 0);
  816. }
  817. /**
  818. * ixgb_set_mac - Change the Ethernet Address of the NIC
  819. * @netdev: network interface device structure
  820. * @p: pointer to an address structure
  821. *
  822. * Returns 0 on success, negative on failure
  823. **/
  824. static int
  825. ixgb_set_mac(struct net_device *netdev, void *p)
  826. {
  827. struct ixgb_adapter *adapter = netdev_priv(netdev);
  828. struct sockaddr *addr = p;
  829. if(!is_valid_ether_addr(addr->sa_data))
  830. return -EADDRNOTAVAIL;
  831. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  832. ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
  833. return 0;
  834. }
  835. /**
  836. * ixgb_set_multi - Multicast and Promiscuous mode set
  837. * @netdev: network interface device structure
  838. *
  839. * The set_multi entry point is called whenever the multicast address
  840. * list or the network interface flags are updated. This routine is
  841. * responsible for configuring the hardware for proper multicast,
  842. * promiscuous mode, and all-multi behavior.
  843. **/
  844. static void
  845. ixgb_set_multi(struct net_device *netdev)
  846. {
  847. struct ixgb_adapter *adapter = netdev_priv(netdev);
  848. struct ixgb_hw *hw = &adapter->hw;
  849. struct dev_mc_list *mc_ptr;
  850. uint32_t rctl;
  851. int i;
  852. /* Check for Promiscuous and All Multicast modes */
  853. rctl = IXGB_READ_REG(hw, RCTL);
  854. if(netdev->flags & IFF_PROMISC) {
  855. rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  856. } else if(netdev->flags & IFF_ALLMULTI) {
  857. rctl |= IXGB_RCTL_MPE;
  858. rctl &= ~IXGB_RCTL_UPE;
  859. } else {
  860. rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  861. }
  862. if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
  863. rctl |= IXGB_RCTL_MPE;
  864. IXGB_WRITE_REG(hw, RCTL, rctl);
  865. } else {
  866. uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
  867. IXGB_WRITE_REG(hw, RCTL, rctl);
  868. for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
  869. i++, mc_ptr = mc_ptr->next)
  870. memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
  871. mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
  872. ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
  873. }
  874. }
  875. /**
  876. * ixgb_watchdog - Timer Call-back
  877. * @data: pointer to netdev cast into an unsigned long
  878. **/
  879. static void
  880. ixgb_watchdog(unsigned long data)
  881. {
  882. struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
  883. struct net_device *netdev = adapter->netdev;
  884. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  885. ixgb_check_for_link(&adapter->hw);
  886. if (ixgb_check_for_bad_link(&adapter->hw)) {
  887. /* force the reset path */
  888. netif_stop_queue(netdev);
  889. }
  890. if(adapter->hw.link_up) {
  891. if(!netif_carrier_ok(netdev)) {
  892. DPRINTK(LINK, INFO,
  893. "NIC Link is Up 10000 Mbps Full Duplex\n");
  894. adapter->link_speed = 10000;
  895. adapter->link_duplex = FULL_DUPLEX;
  896. netif_carrier_on(netdev);
  897. netif_wake_queue(netdev);
  898. }
  899. } else {
  900. if(netif_carrier_ok(netdev)) {
  901. adapter->link_speed = 0;
  902. adapter->link_duplex = 0;
  903. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  904. netif_carrier_off(netdev);
  905. netif_stop_queue(netdev);
  906. }
  907. }
  908. ixgb_update_stats(adapter);
  909. if(!netif_carrier_ok(netdev)) {
  910. if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
  911. /* We've lost link, so the controller stops DMA,
  912. * but we've got queued Tx work that's never going
  913. * to get done, so reset controller to flush Tx.
  914. * (Do the reset outside of interrupt context). */
  915. schedule_work(&adapter->tx_timeout_task);
  916. }
  917. }
  918. /* Force detection of hung controller every watchdog period */
  919. adapter->detect_tx_hung = TRUE;
  920. /* generate an interrupt to force clean up of any stragglers */
  921. IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
  922. /* Reset the timer */
  923. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  924. }
  925. #define IXGB_TX_FLAGS_CSUM 0x00000001
  926. #define IXGB_TX_FLAGS_VLAN 0x00000002
  927. #define IXGB_TX_FLAGS_TSO 0x00000004
  928. static int
  929. ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
  930. {
  931. #ifdef NETIF_F_TSO
  932. struct ixgb_context_desc *context_desc;
  933. unsigned int i;
  934. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  935. uint16_t ipcse, tucse, mss;
  936. int err;
  937. if(likely(skb_shinfo(skb)->gso_size)) {
  938. if (skb_header_cloned(skb)) {
  939. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  940. if (err)
  941. return err;
  942. }
  943. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  944. mss = skb_shinfo(skb)->gso_size;
  945. skb->nh.iph->tot_len = 0;
  946. skb->nh.iph->check = 0;
  947. skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
  948. skb->nh.iph->daddr,
  949. 0, IPPROTO_TCP, 0);
  950. ipcss = skb->nh.raw - skb->data;
  951. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  952. ipcse = skb->h.raw - skb->data - 1;
  953. tucss = skb->h.raw - skb->data;
  954. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  955. tucse = 0;
  956. i = adapter->tx_ring.next_to_use;
  957. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  958. context_desc->ipcss = ipcss;
  959. context_desc->ipcso = ipcso;
  960. context_desc->ipcse = cpu_to_le16(ipcse);
  961. context_desc->tucss = tucss;
  962. context_desc->tucso = tucso;
  963. context_desc->tucse = cpu_to_le16(tucse);
  964. context_desc->mss = cpu_to_le16(mss);
  965. context_desc->hdr_len = hdr_len;
  966. context_desc->status = 0;
  967. context_desc->cmd_type_len = cpu_to_le32(
  968. IXGB_CONTEXT_DESC_TYPE
  969. | IXGB_CONTEXT_DESC_CMD_TSE
  970. | IXGB_CONTEXT_DESC_CMD_IP
  971. | IXGB_CONTEXT_DESC_CMD_TCP
  972. | IXGB_CONTEXT_DESC_CMD_IDE
  973. | (skb->len - (hdr_len)));
  974. if(++i == adapter->tx_ring.count) i = 0;
  975. adapter->tx_ring.next_to_use = i;
  976. return 1;
  977. }
  978. #endif
  979. return 0;
  980. }
  981. static boolean_t
  982. ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
  983. {
  984. struct ixgb_context_desc *context_desc;
  985. unsigned int i;
  986. uint8_t css, cso;
  987. if(likely(skb->ip_summed == CHECKSUM_HW)) {
  988. css = skb->h.raw - skb->data;
  989. cso = (skb->h.raw + skb->csum) - skb->data;
  990. i = adapter->tx_ring.next_to_use;
  991. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  992. context_desc->tucss = css;
  993. context_desc->tucso = cso;
  994. context_desc->tucse = 0;
  995. /* zero out any previously existing data in one instruction */
  996. *(uint32_t *)&(context_desc->ipcss) = 0;
  997. context_desc->status = 0;
  998. context_desc->hdr_len = 0;
  999. context_desc->mss = 0;
  1000. context_desc->cmd_type_len =
  1001. cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
  1002. | IXGB_TX_DESC_CMD_IDE);
  1003. if(++i == adapter->tx_ring.count) i = 0;
  1004. adapter->tx_ring.next_to_use = i;
  1005. return TRUE;
  1006. }
  1007. return FALSE;
  1008. }
  1009. #define IXGB_MAX_TXD_PWR 14
  1010. #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
  1011. static int
  1012. ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
  1013. unsigned int first)
  1014. {
  1015. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1016. struct ixgb_buffer *buffer_info;
  1017. int len = skb->len;
  1018. unsigned int offset = 0, size, count = 0, i;
  1019. unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
  1020. unsigned int f;
  1021. len -= skb->data_len;
  1022. i = tx_ring->next_to_use;
  1023. while(len) {
  1024. buffer_info = &tx_ring->buffer_info[i];
  1025. size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
  1026. buffer_info->length = size;
  1027. buffer_info->dma =
  1028. pci_map_single(adapter->pdev,
  1029. skb->data + offset,
  1030. size,
  1031. PCI_DMA_TODEVICE);
  1032. buffer_info->time_stamp = jiffies;
  1033. buffer_info->next_to_watch = 0;
  1034. len -= size;
  1035. offset += size;
  1036. count++;
  1037. if(++i == tx_ring->count) i = 0;
  1038. }
  1039. for(f = 0; f < nr_frags; f++) {
  1040. struct skb_frag_struct *frag;
  1041. frag = &skb_shinfo(skb)->frags[f];
  1042. len = frag->size;
  1043. offset = 0;
  1044. while(len) {
  1045. buffer_info = &tx_ring->buffer_info[i];
  1046. size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
  1047. buffer_info->length = size;
  1048. buffer_info->dma =
  1049. pci_map_page(adapter->pdev,
  1050. frag->page,
  1051. frag->page_offset + offset,
  1052. size,
  1053. PCI_DMA_TODEVICE);
  1054. buffer_info->time_stamp = jiffies;
  1055. buffer_info->next_to_watch = 0;
  1056. len -= size;
  1057. offset += size;
  1058. count++;
  1059. if(++i == tx_ring->count) i = 0;
  1060. }
  1061. }
  1062. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  1063. tx_ring->buffer_info[i].skb = skb;
  1064. tx_ring->buffer_info[first].next_to_watch = i;
  1065. return count;
  1066. }
  1067. static void
  1068. ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
  1069. {
  1070. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1071. struct ixgb_tx_desc *tx_desc = NULL;
  1072. struct ixgb_buffer *buffer_info;
  1073. uint32_t cmd_type_len = adapter->tx_cmd_type;
  1074. uint8_t status = 0;
  1075. uint8_t popts = 0;
  1076. unsigned int i;
  1077. if(tx_flags & IXGB_TX_FLAGS_TSO) {
  1078. cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
  1079. popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
  1080. }
  1081. if(tx_flags & IXGB_TX_FLAGS_CSUM)
  1082. popts |= IXGB_TX_DESC_POPTS_TXSM;
  1083. if(tx_flags & IXGB_TX_FLAGS_VLAN) {
  1084. cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
  1085. }
  1086. i = tx_ring->next_to_use;
  1087. while(count--) {
  1088. buffer_info = &tx_ring->buffer_info[i];
  1089. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1090. tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1091. tx_desc->cmd_type_len =
  1092. cpu_to_le32(cmd_type_len | buffer_info->length);
  1093. tx_desc->status = status;
  1094. tx_desc->popts = popts;
  1095. tx_desc->vlan = cpu_to_le16(vlan_id);
  1096. if(++i == tx_ring->count) i = 0;
  1097. }
  1098. tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
  1099. | IXGB_TX_DESC_CMD_RS );
  1100. /* Force memory writes to complete before letting h/w
  1101. * know there are new descriptors to fetch. (Only
  1102. * applicable for weak-ordered memory model archs,
  1103. * such as IA-64). */
  1104. wmb();
  1105. tx_ring->next_to_use = i;
  1106. IXGB_WRITE_REG(&adapter->hw, TDT, i);
  1107. }
  1108. /* Tx Descriptors needed, worst case */
  1109. #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
  1110. (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
  1111. #define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
  1112. MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1
  1113. static int
  1114. ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1115. {
  1116. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1117. unsigned int first;
  1118. unsigned int tx_flags = 0;
  1119. unsigned long flags;
  1120. int vlan_id = 0;
  1121. int tso;
  1122. if(skb->len <= 0) {
  1123. dev_kfree_skb_any(skb);
  1124. return 0;
  1125. }
  1126. #ifdef NETIF_F_LLTX
  1127. local_irq_save(flags);
  1128. if (!spin_trylock(&adapter->tx_lock)) {
  1129. /* Collision - tell upper layer to requeue */
  1130. local_irq_restore(flags);
  1131. return NETDEV_TX_LOCKED;
  1132. }
  1133. #else
  1134. spin_lock_irqsave(&adapter->tx_lock, flags);
  1135. #endif
  1136. if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
  1137. netif_stop_queue(netdev);
  1138. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1139. return NETDEV_TX_BUSY;
  1140. }
  1141. #ifndef NETIF_F_LLTX
  1142. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1143. #endif
  1144. if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
  1145. tx_flags |= IXGB_TX_FLAGS_VLAN;
  1146. vlan_id = vlan_tx_tag_get(skb);
  1147. }
  1148. first = adapter->tx_ring.next_to_use;
  1149. tso = ixgb_tso(adapter, skb);
  1150. if (tso < 0) {
  1151. dev_kfree_skb_any(skb);
  1152. #ifdef NETIF_F_LLTX
  1153. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1154. #endif
  1155. return NETDEV_TX_OK;
  1156. }
  1157. if (likely(tso))
  1158. tx_flags |= IXGB_TX_FLAGS_TSO;
  1159. else if(ixgb_tx_csum(adapter, skb))
  1160. tx_flags |= IXGB_TX_FLAGS_CSUM;
  1161. ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
  1162. tx_flags);
  1163. netdev->trans_start = jiffies;
  1164. #ifdef NETIF_F_LLTX
  1165. /* Make sure there is space in the ring for the next send. */
  1166. if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED))
  1167. netif_stop_queue(netdev);
  1168. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1169. #endif
  1170. return NETDEV_TX_OK;
  1171. }
  1172. /**
  1173. * ixgb_tx_timeout - Respond to a Tx Hang
  1174. * @netdev: network interface device structure
  1175. **/
  1176. static void
  1177. ixgb_tx_timeout(struct net_device *netdev)
  1178. {
  1179. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1180. /* Do the reset outside of interrupt context */
  1181. schedule_work(&adapter->tx_timeout_task);
  1182. }
  1183. static void
  1184. ixgb_tx_timeout_task(struct net_device *netdev)
  1185. {
  1186. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1187. adapter->tx_timeout_count++;
  1188. ixgb_down(adapter, TRUE);
  1189. ixgb_up(adapter);
  1190. }
  1191. /**
  1192. * ixgb_get_stats - Get System Network Statistics
  1193. * @netdev: network interface device structure
  1194. *
  1195. * Returns the address of the device statistics structure.
  1196. * The statistics are actually updated from the timer callback.
  1197. **/
  1198. static struct net_device_stats *
  1199. ixgb_get_stats(struct net_device *netdev)
  1200. {
  1201. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1202. return &adapter->net_stats;
  1203. }
  1204. /**
  1205. * ixgb_change_mtu - Change the Maximum Transfer Unit
  1206. * @netdev: network interface device structure
  1207. * @new_mtu: new value for maximum frame size
  1208. *
  1209. * Returns 0 on success, negative on failure
  1210. **/
  1211. static int
  1212. ixgb_change_mtu(struct net_device *netdev, int new_mtu)
  1213. {
  1214. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1215. int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1216. int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1217. if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
  1218. || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
  1219. DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
  1220. return -EINVAL;
  1221. }
  1222. adapter->rx_buffer_len = max_frame;
  1223. netdev->mtu = new_mtu;
  1224. if ((old_max_frame != max_frame) && netif_running(netdev)) {
  1225. ixgb_down(adapter, TRUE);
  1226. ixgb_up(adapter);
  1227. }
  1228. return 0;
  1229. }
  1230. /**
  1231. * ixgb_update_stats - Update the board statistics counters.
  1232. * @adapter: board private structure
  1233. **/
  1234. void
  1235. ixgb_update_stats(struct ixgb_adapter *adapter)
  1236. {
  1237. struct net_device *netdev = adapter->netdev;
  1238. if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
  1239. (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
  1240. u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
  1241. u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
  1242. u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
  1243. u64 bcast = ((u64)bcast_h << 32) | bcast_l;
  1244. multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
  1245. /* fix up multicast stats by removing broadcasts */
  1246. if(multi >= bcast)
  1247. multi -= bcast;
  1248. adapter->stats.mprcl += (multi & 0xFFFFFFFF);
  1249. adapter->stats.mprch += (multi >> 32);
  1250. adapter->stats.bprcl += bcast_l;
  1251. adapter->stats.bprch += bcast_h;
  1252. } else {
  1253. adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
  1254. adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
  1255. adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
  1256. adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
  1257. }
  1258. adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
  1259. adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
  1260. adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
  1261. adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
  1262. adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
  1263. adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
  1264. adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
  1265. adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
  1266. adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
  1267. adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
  1268. adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
  1269. adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
  1270. adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
  1271. adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
  1272. adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
  1273. adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
  1274. adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
  1275. adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
  1276. adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
  1277. adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
  1278. adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
  1279. adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
  1280. adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
  1281. adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
  1282. adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
  1283. adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
  1284. adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
  1285. adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
  1286. adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
  1287. adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
  1288. adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
  1289. adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
  1290. adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
  1291. adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
  1292. adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
  1293. adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
  1294. adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
  1295. adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
  1296. adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
  1297. adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
  1298. adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
  1299. adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
  1300. adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
  1301. adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
  1302. adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
  1303. adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
  1304. adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
  1305. adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
  1306. adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
  1307. adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
  1308. adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
  1309. adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
  1310. adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
  1311. adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
  1312. adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
  1313. adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
  1314. /* Fill out the OS statistics structure */
  1315. adapter->net_stats.rx_packets = adapter->stats.gprcl;
  1316. adapter->net_stats.tx_packets = adapter->stats.gptcl;
  1317. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  1318. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  1319. adapter->net_stats.multicast = adapter->stats.mprcl;
  1320. adapter->net_stats.collisions = 0;
  1321. /* ignore RLEC as it reports errors for padded (<64bytes) frames
  1322. * with a length in the type/len field */
  1323. adapter->net_stats.rx_errors =
  1324. /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
  1325. adapter->stats.ruc +
  1326. adapter->stats.roc /*+ adapter->stats.rlec */ +
  1327. adapter->stats.icbc +
  1328. adapter->stats.ecbc + adapter->stats.mpc;
  1329. /* see above
  1330. * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  1331. */
  1332. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  1333. adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
  1334. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  1335. adapter->net_stats.rx_over_errors = adapter->stats.mpc;
  1336. adapter->net_stats.tx_errors = 0;
  1337. adapter->net_stats.rx_frame_errors = 0;
  1338. adapter->net_stats.tx_aborted_errors = 0;
  1339. adapter->net_stats.tx_carrier_errors = 0;
  1340. adapter->net_stats.tx_fifo_errors = 0;
  1341. adapter->net_stats.tx_heartbeat_errors = 0;
  1342. adapter->net_stats.tx_window_errors = 0;
  1343. }
  1344. #define IXGB_MAX_INTR 10
  1345. /**
  1346. * ixgb_intr - Interrupt Handler
  1347. * @irq: interrupt number
  1348. * @data: pointer to a network interface device structure
  1349. * @pt_regs: CPU registers structure
  1350. **/
  1351. static irqreturn_t
  1352. ixgb_intr(int irq, void *data, struct pt_regs *regs)
  1353. {
  1354. struct net_device *netdev = data;
  1355. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1356. struct ixgb_hw *hw = &adapter->hw;
  1357. uint32_t icr = IXGB_READ_REG(hw, ICR);
  1358. #ifndef CONFIG_IXGB_NAPI
  1359. unsigned int i;
  1360. #endif
  1361. if(unlikely(!icr))
  1362. return IRQ_NONE; /* Not our interrupt */
  1363. if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
  1364. mod_timer(&adapter->watchdog_timer, jiffies);
  1365. }
  1366. #ifdef CONFIG_IXGB_NAPI
  1367. if(netif_rx_schedule_prep(netdev)) {
  1368. /* Disable interrupts and register for poll. The flush
  1369. of the posted write is intentionally left out.
  1370. */
  1371. atomic_inc(&adapter->irq_sem);
  1372. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  1373. __netif_rx_schedule(netdev);
  1374. }
  1375. #else
  1376. /* yes, that is actually a & and it is meant to make sure that
  1377. * every pass through this for loop checks both receive and
  1378. * transmit queues for completed descriptors, intended to
  1379. * avoid starvation issues and assist tx/rx fairness. */
  1380. for(i = 0; i < IXGB_MAX_INTR; i++)
  1381. if(!ixgb_clean_rx_irq(adapter) &
  1382. !ixgb_clean_tx_irq(adapter))
  1383. break;
  1384. #endif
  1385. return IRQ_HANDLED;
  1386. }
  1387. #ifdef CONFIG_IXGB_NAPI
  1388. /**
  1389. * ixgb_clean - NAPI Rx polling callback
  1390. * @adapter: board private structure
  1391. **/
  1392. static int
  1393. ixgb_clean(struct net_device *netdev, int *budget)
  1394. {
  1395. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1396. int work_to_do = min(*budget, netdev->quota);
  1397. int tx_cleaned;
  1398. int work_done = 0;
  1399. tx_cleaned = ixgb_clean_tx_irq(adapter);
  1400. ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
  1401. *budget -= work_done;
  1402. netdev->quota -= work_done;
  1403. /* if no Tx and not enough Rx work done, exit the polling mode */
  1404. if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
  1405. netif_rx_complete(netdev);
  1406. ixgb_irq_enable(adapter);
  1407. return 0;
  1408. }
  1409. return 1;
  1410. }
  1411. #endif
  1412. /**
  1413. * ixgb_clean_tx_irq - Reclaim resources after transmit completes
  1414. * @adapter: board private structure
  1415. **/
  1416. static boolean_t
  1417. ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
  1418. {
  1419. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1420. struct net_device *netdev = adapter->netdev;
  1421. struct ixgb_tx_desc *tx_desc, *eop_desc;
  1422. struct ixgb_buffer *buffer_info;
  1423. unsigned int i, eop;
  1424. boolean_t cleaned = FALSE;
  1425. i = tx_ring->next_to_clean;
  1426. eop = tx_ring->buffer_info[i].next_to_watch;
  1427. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1428. while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
  1429. for(cleaned = FALSE; !cleaned; ) {
  1430. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1431. buffer_info = &tx_ring->buffer_info[i];
  1432. if (tx_desc->popts
  1433. & (IXGB_TX_DESC_POPTS_TXSM |
  1434. IXGB_TX_DESC_POPTS_IXSM))
  1435. adapter->hw_csum_tx_good++;
  1436. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  1437. *(uint32_t *)&(tx_desc->status) = 0;
  1438. cleaned = (i == eop);
  1439. if(++i == tx_ring->count) i = 0;
  1440. }
  1441. eop = tx_ring->buffer_info[i].next_to_watch;
  1442. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1443. }
  1444. tx_ring->next_to_clean = i;
  1445. if (unlikely(netif_queue_stopped(netdev))) {
  1446. spin_lock(&adapter->tx_lock);
  1447. if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
  1448. (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE))
  1449. netif_wake_queue(netdev);
  1450. spin_unlock(&adapter->tx_lock);
  1451. }
  1452. if(adapter->detect_tx_hung) {
  1453. /* detect a transmit hang in hardware, this serializes the
  1454. * check with the clearing of time_stamp and movement of i */
  1455. adapter->detect_tx_hung = FALSE;
  1456. if (tx_ring->buffer_info[eop].dma &&
  1457. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
  1458. && !(IXGB_READ_REG(&adapter->hw, STATUS) &
  1459. IXGB_STATUS_TXOFF)) {
  1460. /* detected Tx unit hang */
  1461. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  1462. " TDH <%x>\n"
  1463. " TDT <%x>\n"
  1464. " next_to_use <%x>\n"
  1465. " next_to_clean <%x>\n"
  1466. "buffer_info[next_to_clean]\n"
  1467. " time_stamp <%lx>\n"
  1468. " next_to_watch <%x>\n"
  1469. " jiffies <%lx>\n"
  1470. " next_to_watch.status <%x>\n",
  1471. IXGB_READ_REG(&adapter->hw, TDH),
  1472. IXGB_READ_REG(&adapter->hw, TDT),
  1473. tx_ring->next_to_use,
  1474. tx_ring->next_to_clean,
  1475. tx_ring->buffer_info[eop].time_stamp,
  1476. eop,
  1477. jiffies,
  1478. eop_desc->status);
  1479. netif_stop_queue(netdev);
  1480. }
  1481. }
  1482. return cleaned;
  1483. }
  1484. /**
  1485. * ixgb_rx_checksum - Receive Checksum Offload for 82597.
  1486. * @adapter: board private structure
  1487. * @rx_desc: receive descriptor
  1488. * @sk_buff: socket buffer with received data
  1489. **/
  1490. static void
  1491. ixgb_rx_checksum(struct ixgb_adapter *adapter,
  1492. struct ixgb_rx_desc *rx_desc,
  1493. struct sk_buff *skb)
  1494. {
  1495. /* Ignore Checksum bit is set OR
  1496. * TCP Checksum has not been calculated
  1497. */
  1498. if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
  1499. (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
  1500. skb->ip_summed = CHECKSUM_NONE;
  1501. return;
  1502. }
  1503. /* At this point we know the hardware did the TCP checksum */
  1504. /* now look at the TCP checksum error bit */
  1505. if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
  1506. /* let the stack verify checksum errors */
  1507. skb->ip_summed = CHECKSUM_NONE;
  1508. adapter->hw_csum_rx_error++;
  1509. } else {
  1510. /* TCP checksum is good */
  1511. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1512. adapter->hw_csum_rx_good++;
  1513. }
  1514. }
  1515. /**
  1516. * ixgb_clean_rx_irq - Send received data up the network stack,
  1517. * @adapter: board private structure
  1518. **/
  1519. static boolean_t
  1520. #ifdef CONFIG_IXGB_NAPI
  1521. ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
  1522. #else
  1523. ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
  1524. #endif
  1525. {
  1526. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1527. struct net_device *netdev = adapter->netdev;
  1528. struct pci_dev *pdev = adapter->pdev;
  1529. struct ixgb_rx_desc *rx_desc, *next_rxd;
  1530. struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
  1531. uint32_t length;
  1532. unsigned int i, j;
  1533. boolean_t cleaned = FALSE;
  1534. i = rx_ring->next_to_clean;
  1535. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1536. buffer_info = &rx_ring->buffer_info[i];
  1537. while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
  1538. struct sk_buff *skb, *next_skb;
  1539. u8 status;
  1540. #ifdef CONFIG_IXGB_NAPI
  1541. if(*work_done >= work_to_do)
  1542. break;
  1543. (*work_done)++;
  1544. #endif
  1545. status = rx_desc->status;
  1546. skb = buffer_info->skb;
  1547. buffer_info->skb = NULL;
  1548. prefetch(skb->data);
  1549. if(++i == rx_ring->count) i = 0;
  1550. next_rxd = IXGB_RX_DESC(*rx_ring, i);
  1551. prefetch(next_rxd);
  1552. if((j = i + 1) == rx_ring->count) j = 0;
  1553. next2_buffer = &rx_ring->buffer_info[j];
  1554. prefetch(next2_buffer);
  1555. next_buffer = &rx_ring->buffer_info[i];
  1556. next_skb = next_buffer->skb;
  1557. prefetch(next_skb);
  1558. cleaned = TRUE;
  1559. pci_unmap_single(pdev,
  1560. buffer_info->dma,
  1561. buffer_info->length,
  1562. PCI_DMA_FROMDEVICE);
  1563. length = le16_to_cpu(rx_desc->length);
  1564. if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
  1565. /* All receives must fit into a single buffer */
  1566. IXGB_DBG("Receive packet consumed multiple buffers "
  1567. "length<%x>\n", length);
  1568. dev_kfree_skb_irq(skb);
  1569. goto rxdesc_done;
  1570. }
  1571. if (unlikely(rx_desc->errors
  1572. & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
  1573. | IXGB_RX_DESC_ERRORS_P |
  1574. IXGB_RX_DESC_ERRORS_RXE))) {
  1575. dev_kfree_skb_irq(skb);
  1576. goto rxdesc_done;
  1577. }
  1578. /* code added for copybreak, this should improve
  1579. * performance for small packets with large amounts
  1580. * of reassembly being done in the stack */
  1581. #define IXGB_CB_LENGTH 256
  1582. if (length < IXGB_CB_LENGTH) {
  1583. struct sk_buff *new_skb =
  1584. dev_alloc_skb(length + NET_IP_ALIGN);
  1585. if (new_skb) {
  1586. skb_reserve(new_skb, NET_IP_ALIGN);
  1587. new_skb->dev = netdev;
  1588. memcpy(new_skb->data - NET_IP_ALIGN,
  1589. skb->data - NET_IP_ALIGN,
  1590. length + NET_IP_ALIGN);
  1591. /* save the skb in buffer_info as good */
  1592. buffer_info->skb = skb;
  1593. skb = new_skb;
  1594. }
  1595. }
  1596. /* end copybreak code */
  1597. /* Good Receive */
  1598. skb_put(skb, length);
  1599. /* Receive Checksum Offload */
  1600. ixgb_rx_checksum(adapter, rx_desc, skb);
  1601. skb->protocol = eth_type_trans(skb, netdev);
  1602. #ifdef CONFIG_IXGB_NAPI
  1603. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1604. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  1605. le16_to_cpu(rx_desc->special) &
  1606. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1607. } else {
  1608. netif_receive_skb(skb);
  1609. }
  1610. #else /* CONFIG_IXGB_NAPI */
  1611. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1612. vlan_hwaccel_rx(skb, adapter->vlgrp,
  1613. le16_to_cpu(rx_desc->special) &
  1614. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1615. } else {
  1616. netif_rx(skb);
  1617. }
  1618. #endif /* CONFIG_IXGB_NAPI */
  1619. netdev->last_rx = jiffies;
  1620. rxdesc_done:
  1621. /* clean up descriptor, might be written over by hw */
  1622. rx_desc->status = 0;
  1623. /* use prefetched values */
  1624. rx_desc = next_rxd;
  1625. buffer_info = next_buffer;
  1626. }
  1627. rx_ring->next_to_clean = i;
  1628. ixgb_alloc_rx_buffers(adapter);
  1629. return cleaned;
  1630. }
  1631. /**
  1632. * ixgb_alloc_rx_buffers - Replace used receive buffers
  1633. * @adapter: address of board private structure
  1634. **/
  1635. static void
  1636. ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
  1637. {
  1638. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1639. struct net_device *netdev = adapter->netdev;
  1640. struct pci_dev *pdev = adapter->pdev;
  1641. struct ixgb_rx_desc *rx_desc;
  1642. struct ixgb_buffer *buffer_info;
  1643. struct sk_buff *skb;
  1644. unsigned int i;
  1645. int num_group_tail_writes;
  1646. long cleancount;
  1647. i = rx_ring->next_to_use;
  1648. buffer_info = &rx_ring->buffer_info[i];
  1649. cleancount = IXGB_DESC_UNUSED(rx_ring);
  1650. num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
  1651. /* leave three descriptors unused */
  1652. while(--cleancount > 2) {
  1653. /* recycle! its good for you */
  1654. if (!(skb = buffer_info->skb))
  1655. skb = dev_alloc_skb(adapter->rx_buffer_len
  1656. + NET_IP_ALIGN);
  1657. else {
  1658. skb_trim(skb, 0);
  1659. goto map_skb;
  1660. }
  1661. if (unlikely(!skb)) {
  1662. /* Better luck next round */
  1663. adapter->alloc_rx_buff_failed++;
  1664. break;
  1665. }
  1666. /* Make buffer alignment 2 beyond a 16 byte boundary
  1667. * this will result in a 16 byte aligned IP header after
  1668. * the 14 byte MAC header is removed
  1669. */
  1670. skb_reserve(skb, NET_IP_ALIGN);
  1671. skb->dev = netdev;
  1672. buffer_info->skb = skb;
  1673. buffer_info->length = adapter->rx_buffer_len;
  1674. map_skb:
  1675. buffer_info->dma = pci_map_single(pdev,
  1676. skb->data,
  1677. adapter->rx_buffer_len,
  1678. PCI_DMA_FROMDEVICE);
  1679. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1680. rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1681. /* guarantee DD bit not set now before h/w gets descriptor
  1682. * this is the rest of the workaround for h/w double
  1683. * writeback. */
  1684. rx_desc->status = 0;
  1685. if(++i == rx_ring->count) i = 0;
  1686. buffer_info = &rx_ring->buffer_info[i];
  1687. }
  1688. if (likely(rx_ring->next_to_use != i)) {
  1689. rx_ring->next_to_use = i;
  1690. if (unlikely(i-- == 0))
  1691. i = (rx_ring->count - 1);
  1692. /* Force memory writes to complete before letting h/w
  1693. * know there are new descriptors to fetch. (Only
  1694. * applicable for weak-ordered memory model archs, such
  1695. * as IA-64). */
  1696. wmb();
  1697. IXGB_WRITE_REG(&adapter->hw, RDT, i);
  1698. }
  1699. }
  1700. /**
  1701. * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
  1702. *
  1703. * @param netdev network interface device structure
  1704. * @param grp indicates to enable or disable tagging/stripping
  1705. **/
  1706. static void
  1707. ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  1708. {
  1709. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1710. uint32_t ctrl, rctl;
  1711. ixgb_irq_disable(adapter);
  1712. adapter->vlgrp = grp;
  1713. if(grp) {
  1714. /* enable VLAN tag insert/strip */
  1715. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1716. ctrl |= IXGB_CTRL0_VME;
  1717. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1718. /* enable VLAN receive filtering */
  1719. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1720. rctl |= IXGB_RCTL_VFE;
  1721. rctl &= ~IXGB_RCTL_CFIEN;
  1722. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1723. } else {
  1724. /* disable VLAN tag insert/strip */
  1725. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1726. ctrl &= ~IXGB_CTRL0_VME;
  1727. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1728. /* disable VLAN filtering */
  1729. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1730. rctl &= ~IXGB_RCTL_VFE;
  1731. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1732. }
  1733. ixgb_irq_enable(adapter);
  1734. }
  1735. static void
  1736. ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  1737. {
  1738. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1739. uint32_t vfta, index;
  1740. /* add VID to filter table */
  1741. index = (vid >> 5) & 0x7F;
  1742. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1743. vfta |= (1 << (vid & 0x1F));
  1744. ixgb_write_vfta(&adapter->hw, index, vfta);
  1745. }
  1746. static void
  1747. ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  1748. {
  1749. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1750. uint32_t vfta, index;
  1751. ixgb_irq_disable(adapter);
  1752. if(adapter->vlgrp)
  1753. adapter->vlgrp->vlan_devices[vid] = NULL;
  1754. ixgb_irq_enable(adapter);
  1755. /* remove VID from filter table*/
  1756. index = (vid >> 5) & 0x7F;
  1757. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1758. vfta &= ~(1 << (vid & 0x1F));
  1759. ixgb_write_vfta(&adapter->hw, index, vfta);
  1760. }
  1761. static void
  1762. ixgb_restore_vlan(struct ixgb_adapter *adapter)
  1763. {
  1764. ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  1765. if(adapter->vlgrp) {
  1766. uint16_t vid;
  1767. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  1768. if(!adapter->vlgrp->vlan_devices[vid])
  1769. continue;
  1770. ixgb_vlan_rx_add_vid(adapter->netdev, vid);
  1771. }
  1772. }
  1773. }
  1774. #ifdef CONFIG_NET_POLL_CONTROLLER
  1775. /*
  1776. * Polling 'interrupt' - used by things like netconsole to send skbs
  1777. * without having to re-enable interrupts. It's not called while
  1778. * the interrupt routine is executing.
  1779. */
  1780. static void ixgb_netpoll(struct net_device *dev)
  1781. {
  1782. struct ixgb_adapter *adapter = dev->priv;
  1783. disable_irq(adapter->pdev->irq);
  1784. ixgb_intr(adapter->pdev->irq, dev, NULL);
  1785. enable_irq(adapter->pdev->irq);
  1786. }
  1787. #endif
  1788. /* ixgb_main.c */