dst.c 49 KB

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  1. /*
  2. Frontend/Card driver for TwinHan DST Frontend
  3. Copyright (C) 2003 Jamie Honan
  4. Copyright (C) 2004, 2005 Manu Abraham (manu@kromtek.com)
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/module.h>
  19. #include <linux/init.h>
  20. #include <linux/string.h>
  21. #include <linux/slab.h>
  22. #include <linux/vmalloc.h>
  23. #include <linux/delay.h>
  24. #include <asm/div64.h>
  25. #include "dvb_frontend.h"
  26. #include "dst_priv.h"
  27. #include "dst_common.h"
  28. static unsigned int verbose = 1;
  29. module_param(verbose, int, 0644);
  30. MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)");
  31. static unsigned int dst_addons;
  32. module_param(dst_addons, int, 0644);
  33. MODULE_PARM_DESC(dst_addons, "CA daughterboard, default is 0 (No addons)");
  34. static unsigned int dst_algo;
  35. module_param(dst_algo, int, 0644);
  36. MODULE_PARM_DESC(dst_algo, "tuning algo: default is 0=(SW), 1=(HW)");
  37. #define HAS_LOCK 1
  38. #define ATTEMPT_TUNE 2
  39. #define HAS_POWER 4
  40. #define DST_ERROR 0
  41. #define DST_NOTICE 1
  42. #define DST_INFO 2
  43. #define DST_DEBUG 3
  44. #define dprintk(x, y, z, format, arg...) do { \
  45. if (z) { \
  46. if ((x > DST_ERROR) && (x > y)) \
  47. printk(KERN_ERR "dst(%d) %s: " format "\n", \
  48. state->bt->nr, __func__ , ##arg); \
  49. else if ((x > DST_NOTICE) && (x > y)) \
  50. printk(KERN_NOTICE "dst(%d) %s: " format "\n", \
  51. state->bt->nr, __func__ , ##arg); \
  52. else if ((x > DST_INFO) && (x > y)) \
  53. printk(KERN_INFO "dst(%d) %s: " format "\n", \
  54. state->bt->nr, __func__ , ##arg); \
  55. else if ((x > DST_DEBUG) && (x > y)) \
  56. printk(KERN_DEBUG "dst(%d) %s: " format "\n", \
  57. state->bt->nr, __func__ , ##arg); \
  58. } else { \
  59. if (x > y) \
  60. printk(format, ##arg); \
  61. } \
  62. } while(0)
  63. static void dst_packsize(struct dst_state *state, int psize)
  64. {
  65. union dst_gpio_packet bits;
  66. bits.psize = psize;
  67. bt878_device_control(state->bt, DST_IG_TS, &bits);
  68. }
  69. int dst_gpio_outb(struct dst_state *state, u32 mask, u32 enbb, u32 outhigh, int delay)
  70. {
  71. union dst_gpio_packet enb;
  72. union dst_gpio_packet bits;
  73. int err;
  74. enb.enb.mask = mask;
  75. enb.enb.enable = enbb;
  76. dprintk(verbose, DST_INFO, 1, "mask=[%04x], enbb=[%04x], outhigh=[%04x]", mask, enbb, outhigh);
  77. if ((err = bt878_device_control(state->bt, DST_IG_ENABLE, &enb)) < 0) {
  78. dprintk(verbose, DST_INFO, 1, "dst_gpio_enb error (err == %i, mask == %02x, enb == %02x)", err, mask, enbb);
  79. return -EREMOTEIO;
  80. }
  81. udelay(1000);
  82. /* because complete disabling means no output, no need to do output packet */
  83. if (enbb == 0)
  84. return 0;
  85. if (delay)
  86. msleep(10);
  87. bits.outp.mask = enbb;
  88. bits.outp.highvals = outhigh;
  89. if ((err = bt878_device_control(state->bt, DST_IG_WRITE, &bits)) < 0) {
  90. dprintk(verbose, DST_INFO, 1, "dst_gpio_outb error (err == %i, enbb == %02x, outhigh == %02x)", err, enbb, outhigh);
  91. return -EREMOTEIO;
  92. }
  93. return 0;
  94. }
  95. EXPORT_SYMBOL(dst_gpio_outb);
  96. int dst_gpio_inb(struct dst_state *state, u8 *result)
  97. {
  98. union dst_gpio_packet rd_packet;
  99. int err;
  100. *result = 0;
  101. if ((err = bt878_device_control(state->bt, DST_IG_READ, &rd_packet)) < 0) {
  102. dprintk(verbose, DST_ERROR, 1, "dst_gpio_inb error (err == %i)", err);
  103. return -EREMOTEIO;
  104. }
  105. *result = (u8) rd_packet.rd.value;
  106. return 0;
  107. }
  108. EXPORT_SYMBOL(dst_gpio_inb);
  109. int rdc_reset_state(struct dst_state *state)
  110. {
  111. dprintk(verbose, DST_INFO, 1, "Resetting state machine");
  112. if (dst_gpio_outb(state, RDC_8820_INT, RDC_8820_INT, 0, NO_DELAY) < 0) {
  113. dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
  114. return -1;
  115. }
  116. msleep(10);
  117. if (dst_gpio_outb(state, RDC_8820_INT, RDC_8820_INT, RDC_8820_INT, NO_DELAY) < 0) {
  118. dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
  119. msleep(10);
  120. return -1;
  121. }
  122. return 0;
  123. }
  124. EXPORT_SYMBOL(rdc_reset_state);
  125. int rdc_8820_reset(struct dst_state *state)
  126. {
  127. dprintk(verbose, DST_DEBUG, 1, "Resetting DST");
  128. if (dst_gpio_outb(state, RDC_8820_RESET, RDC_8820_RESET, 0, NO_DELAY) < 0) {
  129. dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
  130. return -1;
  131. }
  132. udelay(1000);
  133. if (dst_gpio_outb(state, RDC_8820_RESET, RDC_8820_RESET, RDC_8820_RESET, DELAY) < 0) {
  134. dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
  135. return -1;
  136. }
  137. return 0;
  138. }
  139. EXPORT_SYMBOL(rdc_8820_reset);
  140. int dst_pio_enable(struct dst_state *state)
  141. {
  142. if (dst_gpio_outb(state, ~0, RDC_8820_PIO_0_ENABLE, 0, NO_DELAY) < 0) {
  143. dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
  144. return -1;
  145. }
  146. udelay(1000);
  147. return 0;
  148. }
  149. EXPORT_SYMBOL(dst_pio_enable);
  150. int dst_pio_disable(struct dst_state *state)
  151. {
  152. if (dst_gpio_outb(state, ~0, RDC_8820_PIO_0_DISABLE, RDC_8820_PIO_0_DISABLE, NO_DELAY) < 0) {
  153. dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
  154. return -1;
  155. }
  156. if (state->type_flags & DST_TYPE_HAS_FW_1)
  157. udelay(1000);
  158. return 0;
  159. }
  160. EXPORT_SYMBOL(dst_pio_disable);
  161. int dst_wait_dst_ready(struct dst_state *state, u8 delay_mode)
  162. {
  163. u8 reply;
  164. int i;
  165. for (i = 0; i < 200; i++) {
  166. if (dst_gpio_inb(state, &reply) < 0) {
  167. dprintk(verbose, DST_ERROR, 1, "dst_gpio_inb ERROR !");
  168. return -1;
  169. }
  170. if ((reply & RDC_8820_PIO_0_ENABLE) == 0) {
  171. dprintk(verbose, DST_INFO, 1, "dst wait ready after %d", i);
  172. return 1;
  173. }
  174. msleep(10);
  175. }
  176. dprintk(verbose, DST_NOTICE, 1, "dst wait NOT ready after %d", i);
  177. return 0;
  178. }
  179. EXPORT_SYMBOL(dst_wait_dst_ready);
  180. int dst_error_recovery(struct dst_state *state)
  181. {
  182. dprintk(verbose, DST_NOTICE, 1, "Trying to return from previous errors.");
  183. dst_pio_disable(state);
  184. msleep(10);
  185. dst_pio_enable(state);
  186. msleep(10);
  187. return 0;
  188. }
  189. EXPORT_SYMBOL(dst_error_recovery);
  190. int dst_error_bailout(struct dst_state *state)
  191. {
  192. dprintk(verbose, DST_INFO, 1, "Trying to bailout from previous error.");
  193. rdc_8820_reset(state);
  194. dst_pio_disable(state);
  195. msleep(10);
  196. return 0;
  197. }
  198. EXPORT_SYMBOL(dst_error_bailout);
  199. int dst_comm_init(struct dst_state *state)
  200. {
  201. dprintk(verbose, DST_INFO, 1, "Initializing DST.");
  202. if ((dst_pio_enable(state)) < 0) {
  203. dprintk(verbose, DST_ERROR, 1, "PIO Enable Failed");
  204. return -1;
  205. }
  206. if ((rdc_reset_state(state)) < 0) {
  207. dprintk(verbose, DST_ERROR, 1, "RDC 8820 State RESET Failed.");
  208. return -1;
  209. }
  210. if (state->type_flags & DST_TYPE_HAS_FW_1)
  211. msleep(100);
  212. else
  213. msleep(5);
  214. return 0;
  215. }
  216. EXPORT_SYMBOL(dst_comm_init);
  217. int write_dst(struct dst_state *state, u8 *data, u8 len)
  218. {
  219. struct i2c_msg msg = {
  220. .addr = state->config->demod_address,
  221. .flags = 0,
  222. .buf = data,
  223. .len = len
  224. };
  225. int err;
  226. u8 cnt, i;
  227. dprintk(verbose, DST_NOTICE, 0, "writing [ ");
  228. for (i = 0; i < len; i++)
  229. dprintk(verbose, DST_NOTICE, 0, "%02x ", data[i]);
  230. dprintk(verbose, DST_NOTICE, 0, "]\n");
  231. for (cnt = 0; cnt < 2; cnt++) {
  232. if ((err = i2c_transfer(state->i2c, &msg, 1)) < 0) {
  233. dprintk(verbose, DST_INFO, 1, "_write_dst error (err == %i, len == 0x%02x, b0 == 0x%02x)", err, len, data[0]);
  234. dst_error_recovery(state);
  235. continue;
  236. } else
  237. break;
  238. }
  239. if (cnt >= 2) {
  240. dprintk(verbose, DST_INFO, 1, "RDC 8820 RESET");
  241. dst_error_bailout(state);
  242. return -1;
  243. }
  244. return 0;
  245. }
  246. EXPORT_SYMBOL(write_dst);
  247. int read_dst(struct dst_state *state, u8 *ret, u8 len)
  248. {
  249. struct i2c_msg msg = {
  250. .addr = state->config->demod_address,
  251. .flags = I2C_M_RD,
  252. .buf = ret,
  253. .len = len
  254. };
  255. int err;
  256. int cnt;
  257. for (cnt = 0; cnt < 2; cnt++) {
  258. if ((err = i2c_transfer(state->i2c, &msg, 1)) < 0) {
  259. dprintk(verbose, DST_INFO, 1, "read_dst error (err == %i, len == 0x%02x, b0 == 0x%02x)", err, len, ret[0]);
  260. dst_error_recovery(state);
  261. continue;
  262. } else
  263. break;
  264. }
  265. if (cnt >= 2) {
  266. dprintk(verbose, DST_INFO, 1, "RDC 8820 RESET");
  267. dst_error_bailout(state);
  268. return -1;
  269. }
  270. dprintk(verbose, DST_DEBUG, 1, "reply is 0x%x", ret[0]);
  271. for (err = 1; err < len; err++)
  272. dprintk(verbose, DST_DEBUG, 0, " 0x%x", ret[err]);
  273. if (err > 1)
  274. dprintk(verbose, DST_DEBUG, 0, "\n");
  275. return 0;
  276. }
  277. EXPORT_SYMBOL(read_dst);
  278. static int dst_set_polarization(struct dst_state *state)
  279. {
  280. switch (state->voltage) {
  281. case SEC_VOLTAGE_13: /* Vertical */
  282. dprintk(verbose, DST_INFO, 1, "Polarization=[Vertical]");
  283. state->tx_tuna[8] &= ~0x40;
  284. break;
  285. case SEC_VOLTAGE_18: /* Horizontal */
  286. dprintk(verbose, DST_INFO, 1, "Polarization=[Horizontal]");
  287. state->tx_tuna[8] |= 0x40;
  288. break;
  289. case SEC_VOLTAGE_OFF:
  290. break;
  291. }
  292. return 0;
  293. }
  294. static int dst_set_freq(struct dst_state *state, u32 freq)
  295. {
  296. state->frequency = freq;
  297. dprintk(verbose, DST_INFO, 1, "set Frequency %u", freq);
  298. if (state->dst_type == DST_TYPE_IS_SAT) {
  299. freq = freq / 1000;
  300. if (freq < 950 || freq > 2150)
  301. return -EINVAL;
  302. state->tx_tuna[2] = (freq >> 8);
  303. state->tx_tuna[3] = (u8) freq;
  304. state->tx_tuna[4] = 0x01;
  305. state->tx_tuna[8] &= ~0x04;
  306. if (state->type_flags & DST_TYPE_HAS_OBS_REGS) {
  307. if (freq < 1531)
  308. state->tx_tuna[8] |= 0x04;
  309. }
  310. } else if (state->dst_type == DST_TYPE_IS_TERR) {
  311. freq = freq / 1000;
  312. if (freq < 137000 || freq > 858000)
  313. return -EINVAL;
  314. state->tx_tuna[2] = (freq >> 16) & 0xff;
  315. state->tx_tuna[3] = (freq >> 8) & 0xff;
  316. state->tx_tuna[4] = (u8) freq;
  317. } else if (state->dst_type == DST_TYPE_IS_CABLE) {
  318. freq = freq / 1000;
  319. state->tx_tuna[2] = (freq >> 16) & 0xff;
  320. state->tx_tuna[3] = (freq >> 8) & 0xff;
  321. state->tx_tuna[4] = (u8) freq;
  322. } else if (state->dst_type == DST_TYPE_IS_ATSC) {
  323. freq = freq / 1000;
  324. if (freq < 51000 || freq > 858000)
  325. return -EINVAL;
  326. state->tx_tuna[2] = (freq >> 16) & 0xff;
  327. state->tx_tuna[3] = (freq >> 8) & 0xff;
  328. state->tx_tuna[4] = (u8) freq;
  329. state->tx_tuna[5] = 0x00; /* ATSC */
  330. state->tx_tuna[6] = 0x00;
  331. if (state->dst_hw_cap & DST_TYPE_HAS_ANALOG)
  332. state->tx_tuna[7] = 0x00; /* Digital */
  333. } else
  334. return -EINVAL;
  335. return 0;
  336. }
  337. static int dst_set_bandwidth(struct dst_state *state, fe_bandwidth_t bandwidth)
  338. {
  339. state->bandwidth = bandwidth;
  340. if (state->dst_type != DST_TYPE_IS_TERR)
  341. return 0;
  342. switch (bandwidth) {
  343. case BANDWIDTH_6_MHZ:
  344. if (state->dst_hw_cap & DST_TYPE_HAS_CA)
  345. state->tx_tuna[7] = 0x06;
  346. else {
  347. state->tx_tuna[6] = 0x06;
  348. state->tx_tuna[7] = 0x00;
  349. }
  350. break;
  351. case BANDWIDTH_7_MHZ:
  352. if (state->dst_hw_cap & DST_TYPE_HAS_CA)
  353. state->tx_tuna[7] = 0x07;
  354. else {
  355. state->tx_tuna[6] = 0x07;
  356. state->tx_tuna[7] = 0x00;
  357. }
  358. break;
  359. case BANDWIDTH_8_MHZ:
  360. if (state->dst_hw_cap & DST_TYPE_HAS_CA)
  361. state->tx_tuna[7] = 0x08;
  362. else {
  363. state->tx_tuna[6] = 0x08;
  364. state->tx_tuna[7] = 0x00;
  365. }
  366. break;
  367. default:
  368. return -EINVAL;
  369. }
  370. return 0;
  371. }
  372. static int dst_set_inversion(struct dst_state *state, fe_spectral_inversion_t inversion)
  373. {
  374. state->inversion = inversion;
  375. switch (inversion) {
  376. case INVERSION_OFF: /* Inversion = Normal */
  377. state->tx_tuna[8] &= ~0x80;
  378. break;
  379. case INVERSION_ON:
  380. state->tx_tuna[8] |= 0x80;
  381. break;
  382. default:
  383. return -EINVAL;
  384. }
  385. return 0;
  386. }
  387. static int dst_set_fec(struct dst_state *state, fe_code_rate_t fec)
  388. {
  389. state->fec = fec;
  390. return 0;
  391. }
  392. static fe_code_rate_t dst_get_fec(struct dst_state *state)
  393. {
  394. return state->fec;
  395. }
  396. static int dst_set_symbolrate(struct dst_state *state, u32 srate)
  397. {
  398. u32 symcalc;
  399. u64 sval;
  400. state->symbol_rate = srate;
  401. if (state->dst_type == DST_TYPE_IS_TERR) {
  402. return 0;
  403. }
  404. dprintk(verbose, DST_INFO, 1, "set symrate %u", srate);
  405. srate /= 1000;
  406. if (state->dst_type == DST_TYPE_IS_SAT) {
  407. if (state->type_flags & DST_TYPE_HAS_SYMDIV) {
  408. sval = srate;
  409. sval <<= 20;
  410. do_div(sval, 88000);
  411. symcalc = (u32) sval;
  412. dprintk(verbose, DST_INFO, 1, "set symcalc %u", symcalc);
  413. state->tx_tuna[5] = (u8) (symcalc >> 12);
  414. state->tx_tuna[6] = (u8) (symcalc >> 4);
  415. state->tx_tuna[7] = (u8) (symcalc << 4);
  416. } else {
  417. state->tx_tuna[5] = (u8) (srate >> 16) & 0x7f;
  418. state->tx_tuna[6] = (u8) (srate >> 8);
  419. state->tx_tuna[7] = (u8) srate;
  420. }
  421. state->tx_tuna[8] &= ~0x20;
  422. if (state->type_flags & DST_TYPE_HAS_OBS_REGS) {
  423. if (srate > 8000)
  424. state->tx_tuna[8] |= 0x20;
  425. }
  426. } else if (state->dst_type == DST_TYPE_IS_CABLE) {
  427. dprintk(verbose, DST_DEBUG, 1, "%s", state->fw_name);
  428. if (!strncmp(state->fw_name, "DCTNEW", 6)) {
  429. state->tx_tuna[5] = (u8) (srate >> 8);
  430. state->tx_tuna[6] = (u8) srate;
  431. state->tx_tuna[7] = 0x00;
  432. } else if (!strncmp(state->fw_name, "DCT-CI", 6)) {
  433. state->tx_tuna[5] = 0x00;
  434. state->tx_tuna[6] = (u8) (srate >> 8);
  435. state->tx_tuna[7] = (u8) srate;
  436. }
  437. }
  438. return 0;
  439. }
  440. static int dst_set_modulation(struct dst_state *state, fe_modulation_t modulation)
  441. {
  442. if (state->dst_type != DST_TYPE_IS_CABLE)
  443. return 0;
  444. state->modulation = modulation;
  445. switch (modulation) {
  446. case QAM_16:
  447. state->tx_tuna[8] = 0x10;
  448. break;
  449. case QAM_32:
  450. state->tx_tuna[8] = 0x20;
  451. break;
  452. case QAM_64:
  453. state->tx_tuna[8] = 0x40;
  454. break;
  455. case QAM_128:
  456. state->tx_tuna[8] = 0x80;
  457. break;
  458. case QAM_256:
  459. if (!strncmp(state->fw_name, "DCTNEW", 6))
  460. state->tx_tuna[8] = 0xff;
  461. else if (!strncmp(state->fw_name, "DCT-CI", 6))
  462. state->tx_tuna[8] = 0x00;
  463. break;
  464. case QPSK:
  465. case QAM_AUTO:
  466. case VSB_8:
  467. case VSB_16:
  468. default:
  469. return -EINVAL;
  470. }
  471. return 0;
  472. }
  473. static fe_modulation_t dst_get_modulation(struct dst_state *state)
  474. {
  475. return state->modulation;
  476. }
  477. u8 dst_check_sum(u8 *buf, u32 len)
  478. {
  479. u32 i;
  480. u8 val = 0;
  481. if (!len)
  482. return 0;
  483. for (i = 0; i < len; i++) {
  484. val += buf[i];
  485. }
  486. return ((~val) + 1);
  487. }
  488. EXPORT_SYMBOL(dst_check_sum);
  489. static void dst_type_flags_print(struct dst_state *state)
  490. {
  491. u32 type_flags = state->type_flags;
  492. dprintk(verbose, DST_ERROR, 0, "DST type flags :");
  493. if (type_flags & DST_TYPE_HAS_TS188)
  494. dprintk(verbose, DST_ERROR, 0, " 0x%x newtuner", DST_TYPE_HAS_TS188);
  495. if (type_flags & DST_TYPE_HAS_NEWTUNE_2)
  496. dprintk(verbose, DST_ERROR, 0, " 0x%x newtuner 2", DST_TYPE_HAS_NEWTUNE_2);
  497. if (type_flags & DST_TYPE_HAS_TS204)
  498. dprintk(verbose, DST_ERROR, 0, " 0x%x ts204", DST_TYPE_HAS_TS204);
  499. if (type_flags & DST_TYPE_HAS_VLF)
  500. dprintk(verbose, DST_ERROR, 0, " 0x%x VLF", DST_TYPE_HAS_VLF);
  501. if (type_flags & DST_TYPE_HAS_SYMDIV)
  502. dprintk(verbose, DST_ERROR, 0, " 0x%x symdiv", DST_TYPE_HAS_SYMDIV);
  503. if (type_flags & DST_TYPE_HAS_FW_1)
  504. dprintk(verbose, DST_ERROR, 0, " 0x%x firmware version = 1", DST_TYPE_HAS_FW_1);
  505. if (type_flags & DST_TYPE_HAS_FW_2)
  506. dprintk(verbose, DST_ERROR, 0, " 0x%x firmware version = 2", DST_TYPE_HAS_FW_2);
  507. if (type_flags & DST_TYPE_HAS_FW_3)
  508. dprintk(verbose, DST_ERROR, 0, " 0x%x firmware version = 3", DST_TYPE_HAS_FW_3);
  509. dprintk(verbose, DST_ERROR, 0, "\n");
  510. }
  511. static int dst_type_print(struct dst_state *state, u8 type)
  512. {
  513. char *otype;
  514. switch (type) {
  515. case DST_TYPE_IS_SAT:
  516. otype = "satellite";
  517. break;
  518. case DST_TYPE_IS_TERR:
  519. otype = "terrestrial";
  520. break;
  521. case DST_TYPE_IS_CABLE:
  522. otype = "cable";
  523. break;
  524. case DST_TYPE_IS_ATSC:
  525. otype = "atsc";
  526. break;
  527. default:
  528. dprintk(verbose, DST_INFO, 1, "invalid dst type %d", type);
  529. return -EINVAL;
  530. }
  531. dprintk(verbose, DST_INFO, 1, "DST type: %s", otype);
  532. return 0;
  533. }
  534. struct tuner_types tuner_list[] = {
  535. {
  536. .tuner_type = TUNER_TYPE_L64724,
  537. .tuner_name = "L 64724",
  538. .board_name = "UNKNOWN",
  539. .fw_name = "UNKNOWN"
  540. },
  541. {
  542. .tuner_type = TUNER_TYPE_STV0299,
  543. .tuner_name = "STV 0299",
  544. .board_name = "VP1020",
  545. .fw_name = "DST-MOT"
  546. },
  547. {
  548. .tuner_type = TUNER_TYPE_STV0299,
  549. .tuner_name = "STV 0299",
  550. .board_name = "VP1020",
  551. .fw_name = "DST-03T"
  552. },
  553. {
  554. .tuner_type = TUNER_TYPE_MB86A15,
  555. .tuner_name = "MB 86A15",
  556. .board_name = "VP1022",
  557. .fw_name = "DST-03T"
  558. },
  559. {
  560. .tuner_type = TUNER_TYPE_MB86A15,
  561. .tuner_name = "MB 86A15",
  562. .board_name = "VP1025",
  563. .fw_name = "DST-03T"
  564. },
  565. {
  566. .tuner_type = TUNER_TYPE_STV0299,
  567. .tuner_name = "STV 0299",
  568. .board_name = "VP1030",
  569. .fw_name = "DST-CI"
  570. },
  571. {
  572. .tuner_type = TUNER_TYPE_STV0299,
  573. .tuner_name = "STV 0299",
  574. .board_name = "VP1030",
  575. .fw_name = "DSTMCI"
  576. },
  577. {
  578. .tuner_type = TUNER_TYPE_UNKNOWN,
  579. .tuner_name = "UNKNOWN",
  580. .board_name = "VP2021",
  581. .fw_name = "DCTNEW"
  582. },
  583. {
  584. .tuner_type = TUNER_TYPE_UNKNOWN,
  585. .tuner_name = "UNKNOWN",
  586. .board_name = "VP2030",
  587. .fw_name = "DCT-CI"
  588. },
  589. {
  590. .tuner_type = TUNER_TYPE_UNKNOWN,
  591. .tuner_name = "UNKNOWN",
  592. .board_name = "VP2031",
  593. .fw_name = "DCT-CI"
  594. },
  595. {
  596. .tuner_type = TUNER_TYPE_UNKNOWN,
  597. .tuner_name = "UNKNOWN",
  598. .board_name = "VP2040",
  599. .fw_name = "DCT-CI"
  600. },
  601. {
  602. .tuner_type = TUNER_TYPE_UNKNOWN,
  603. .tuner_name = "UNKNOWN",
  604. .board_name = "VP3020",
  605. .fw_name = "DTTFTA"
  606. },
  607. {
  608. .tuner_type = TUNER_TYPE_UNKNOWN,
  609. .tuner_name = "UNKNOWN",
  610. .board_name = "VP3021",
  611. .fw_name = "DTTFTA"
  612. },
  613. {
  614. .tuner_type = TUNER_TYPE_TDA10046,
  615. .tuner_name = "TDA10046",
  616. .board_name = "VP3040",
  617. .fw_name = "DTT-CI"
  618. },
  619. {
  620. .tuner_type = TUNER_TYPE_UNKNOWN,
  621. .tuner_name = "UNKNOWN",
  622. .board_name = "VP3051",
  623. .fw_name = "DTTNXT"
  624. },
  625. {
  626. .tuner_type = TUNER_TYPE_NXT200x,
  627. .tuner_name = "NXT200x",
  628. .board_name = "VP3220",
  629. .fw_name = "ATSCDI"
  630. },
  631. {
  632. .tuner_type = TUNER_TYPE_NXT200x,
  633. .tuner_name = "NXT200x",
  634. .board_name = "VP3250",
  635. .fw_name = "ATSCAD"
  636. },
  637. };
  638. /*
  639. Known cards list
  640. Satellite
  641. -------------------
  642. 200103A
  643. VP-1020 DST-MOT LG(old), TS=188
  644. VP-1020 DST-03T LG(new), TS=204
  645. VP-1022 DST-03T LG(new), TS=204
  646. VP-1025 DST-03T LG(new), TS=204
  647. VP-1030 DSTMCI, LG(new), TS=188
  648. VP-1032 DSTMCI, LG(new), TS=188
  649. Cable
  650. -------------------
  651. VP-2030 DCT-CI, Samsung, TS=204
  652. VP-2021 DCT-CI, Unknown, TS=204
  653. VP-2031 DCT-CI, Philips, TS=188
  654. VP-2040 DCT-CI, Philips, TS=188, with CA daughter board
  655. VP-2040 DCT-CI, Philips, TS=204, without CA daughter board
  656. Terrestrial
  657. -------------------
  658. VP-3050 DTTNXT TS=188
  659. VP-3040 DTT-CI, Philips, TS=188
  660. VP-3040 DTT-CI, Philips, TS=204
  661. ATSC
  662. -------------------
  663. VP-3220 ATSCDI, TS=188
  664. VP-3250 ATSCAD, TS=188
  665. */
  666. static struct dst_types dst_tlist[] = {
  667. {
  668. .device_id = "200103A",
  669. .offset = 0,
  670. .dst_type = DST_TYPE_IS_SAT,
  671. .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1 | DST_TYPE_HAS_OBS_REGS,
  672. .dst_feature = 0,
  673. .tuner_type = 0
  674. }, /* obsolete */
  675. {
  676. .device_id = "DST-020",
  677. .offset = 0,
  678. .dst_type = DST_TYPE_IS_SAT,
  679. .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1,
  680. .dst_feature = 0,
  681. .tuner_type = 0
  682. }, /* obsolete */
  683. {
  684. .device_id = "DST-030",
  685. .offset = 0,
  686. .dst_type = DST_TYPE_IS_SAT,
  687. .type_flags = DST_TYPE_HAS_TS204 | DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_1,
  688. .dst_feature = 0,
  689. .tuner_type = 0
  690. }, /* obsolete */
  691. {
  692. .device_id = "DST-03T",
  693. .offset = 0,
  694. .dst_type = DST_TYPE_IS_SAT,
  695. .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_TS204 | DST_TYPE_HAS_FW_2,
  696. .dst_feature = DST_TYPE_HAS_DISEQC3 | DST_TYPE_HAS_DISEQC4 | DST_TYPE_HAS_DISEQC5
  697. | DST_TYPE_HAS_MAC | DST_TYPE_HAS_MOTO,
  698. .tuner_type = TUNER_TYPE_MULTI
  699. },
  700. {
  701. .device_id = "DST-MOT",
  702. .offset = 0,
  703. .dst_type = DST_TYPE_IS_SAT,
  704. .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1,
  705. .dst_feature = 0,
  706. .tuner_type = 0
  707. }, /* obsolete */
  708. {
  709. .device_id = "DST-CI",
  710. .offset = 1,
  711. .dst_type = DST_TYPE_IS_SAT,
  712. .type_flags = DST_TYPE_HAS_TS204 | DST_TYPE_HAS_FW_1,
  713. .dst_feature = DST_TYPE_HAS_CA,
  714. .tuner_type = 0
  715. }, /* An OEM board */
  716. {
  717. .device_id = "DSTMCI",
  718. .offset = 1,
  719. .dst_type = DST_TYPE_IS_SAT,
  720. .type_flags = DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_FW_BUILD | DST_TYPE_HAS_INC_COUNT | DST_TYPE_HAS_VLF,
  721. .dst_feature = DST_TYPE_HAS_CA | DST_TYPE_HAS_DISEQC3 | DST_TYPE_HAS_DISEQC4
  722. | DST_TYPE_HAS_MOTO | DST_TYPE_HAS_MAC,
  723. .tuner_type = TUNER_TYPE_MULTI
  724. },
  725. {
  726. .device_id = "DSTFCI",
  727. .offset = 1,
  728. .dst_type = DST_TYPE_IS_SAT,
  729. .type_flags = DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_1,
  730. .dst_feature = 0,
  731. .tuner_type = 0
  732. }, /* unknown to vendor */
  733. {
  734. .device_id = "DCT-CI",
  735. .offset = 1,
  736. .dst_type = DST_TYPE_IS_CABLE,
  737. .type_flags = DST_TYPE_HAS_MULTI_FE | DST_TYPE_HAS_FW_1 | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_VLF,
  738. .dst_feature = DST_TYPE_HAS_CA,
  739. .tuner_type = 0
  740. },
  741. {
  742. .device_id = "DCTNEW",
  743. .offset = 1,
  744. .dst_type = DST_TYPE_IS_CABLE,
  745. .type_flags = DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_3 | DST_TYPE_HAS_FW_BUILD | DST_TYPE_HAS_MULTI_FE,
  746. .dst_feature = 0,
  747. .tuner_type = 0
  748. },
  749. {
  750. .device_id = "DTT-CI",
  751. .offset = 1,
  752. .dst_type = DST_TYPE_IS_TERR,
  753. .type_flags = DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_MULTI_FE | DST_TYPE_HAS_VLF,
  754. .dst_feature = DST_TYPE_HAS_CA,
  755. .tuner_type = 0
  756. },
  757. {
  758. .device_id = "DTTDIG",
  759. .offset = 1,
  760. .dst_type = DST_TYPE_IS_TERR,
  761. .type_flags = DST_TYPE_HAS_FW_2,
  762. .dst_feature = 0,
  763. .tuner_type = 0
  764. },
  765. {
  766. .device_id = "DTTNXT",
  767. .offset = 1,
  768. .dst_type = DST_TYPE_IS_TERR,
  769. .type_flags = DST_TYPE_HAS_FW_2,
  770. .dst_feature = DST_TYPE_HAS_ANALOG,
  771. .tuner_type = 0
  772. },
  773. {
  774. .device_id = "ATSCDI",
  775. .offset = 1,
  776. .dst_type = DST_TYPE_IS_ATSC,
  777. .type_flags = DST_TYPE_HAS_FW_2,
  778. .dst_feature = 0,
  779. .tuner_type = 0
  780. },
  781. {
  782. .device_id = "ATSCAD",
  783. .offset = 1,
  784. .dst_type = DST_TYPE_IS_ATSC,
  785. .type_flags = DST_TYPE_HAS_MULTI_FE | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_FW_BUILD,
  786. .dst_feature = DST_TYPE_HAS_MAC | DST_TYPE_HAS_ANALOG,
  787. .tuner_type = 0
  788. },
  789. { }
  790. };
  791. static int dst_get_mac(struct dst_state *state)
  792. {
  793. u8 get_mac[] = { 0x00, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
  794. get_mac[7] = dst_check_sum(get_mac, 7);
  795. if (dst_command(state, get_mac, 8) < 0) {
  796. dprintk(verbose, DST_INFO, 1, "Unsupported Command");
  797. return -1;
  798. }
  799. memset(&state->mac_address, '\0', 8);
  800. memcpy(&state->mac_address, &state->rxbuffer, 6);
  801. dprintk(verbose, DST_ERROR, 1, "MAC Address=[%02x:%02x:%02x:%02x:%02x:%02x]",
  802. state->mac_address[0], state->mac_address[1], state->mac_address[2],
  803. state->mac_address[4], state->mac_address[5], state->mac_address[6]);
  804. return 0;
  805. }
  806. static int dst_fw_ver(struct dst_state *state)
  807. {
  808. u8 get_ver[] = { 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
  809. get_ver[7] = dst_check_sum(get_ver, 7);
  810. if (dst_command(state, get_ver, 8) < 0) {
  811. dprintk(verbose, DST_INFO, 1, "Unsupported Command");
  812. return -1;
  813. }
  814. memset(&state->fw_version, '\0', 8);
  815. memcpy(&state->fw_version, &state->rxbuffer, 8);
  816. dprintk(verbose, DST_ERROR, 1, "Firmware Ver = %x.%x Build = %02x, on %x:%x, %x-%x-20%02x",
  817. state->fw_version[0] >> 4, state->fw_version[0] & 0x0f,
  818. state->fw_version[1],
  819. state->fw_version[5], state->fw_version[6],
  820. state->fw_version[4], state->fw_version[3], state->fw_version[2]);
  821. return 0;
  822. }
  823. static int dst_card_type(struct dst_state *state)
  824. {
  825. int j;
  826. struct tuner_types *p_tuner_list = NULL;
  827. u8 get_type[] = { 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
  828. get_type[7] = dst_check_sum(get_type, 7);
  829. if (dst_command(state, get_type, 8) < 0) {
  830. dprintk(verbose, DST_INFO, 1, "Unsupported Command");
  831. return -1;
  832. }
  833. memset(&state->card_info, '\0', 8);
  834. memcpy(&state->card_info, &state->rxbuffer, 7);
  835. dprintk(verbose, DST_ERROR, 1, "Device Model=[%s]", &state->card_info[0]);
  836. for (j = 0, p_tuner_list = tuner_list; j < ARRAY_SIZE(tuner_list); j++, p_tuner_list++) {
  837. if (!strcmp(&state->card_info[0], p_tuner_list->board_name)) {
  838. state->tuner_type = p_tuner_list->tuner_type;
  839. dprintk(verbose, DST_ERROR, 1, "DST has [%s] tuner, tuner type=[%d]",
  840. p_tuner_list->tuner_name, p_tuner_list->tuner_type);
  841. }
  842. }
  843. return 0;
  844. }
  845. static int dst_get_vendor(struct dst_state *state)
  846. {
  847. u8 get_vendor[] = { 0x00, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
  848. get_vendor[7] = dst_check_sum(get_vendor, 7);
  849. if (dst_command(state, get_vendor, 8) < 0) {
  850. dprintk(verbose, DST_INFO, 1, "Unsupported Command");
  851. return -1;
  852. }
  853. memset(&state->vendor, '\0', 8);
  854. memcpy(&state->vendor, &state->rxbuffer, 7);
  855. dprintk(verbose, DST_ERROR, 1, "Vendor=[%s]", &state->vendor[0]);
  856. return 0;
  857. }
  858. static void debug_dst_buffer(struct dst_state *state)
  859. {
  860. int i;
  861. if (verbose > 2) {
  862. printk("%s: [", __func__);
  863. for (i = 0; i < 8; i++)
  864. printk(" %02x", state->rxbuffer[i]);
  865. printk("]\n");
  866. }
  867. }
  868. static int dst_check_stv0299(struct dst_state *state)
  869. {
  870. u8 check_stv0299[] = { 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
  871. check_stv0299[7] = dst_check_sum(check_stv0299, 7);
  872. if (dst_command(state, check_stv0299, 8) < 0) {
  873. dprintk(verbose, DST_ERROR, 1, "Cmd=[0x04] failed");
  874. return -1;
  875. }
  876. debug_dst_buffer(state);
  877. if (memcmp(&check_stv0299, &state->rxbuffer, 8)) {
  878. dprintk(verbose, DST_ERROR, 1, "Found a STV0299 NIM");
  879. state->tuner_type = TUNER_TYPE_STV0299;
  880. return 0;
  881. }
  882. return -1;
  883. }
  884. static int dst_check_mb86a15(struct dst_state *state)
  885. {
  886. u8 check_mb86a15[] = { 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
  887. check_mb86a15[7] = dst_check_sum(check_mb86a15, 7);
  888. if (dst_command(state, check_mb86a15, 8) < 0) {
  889. dprintk(verbose, DST_ERROR, 1, "Cmd=[0x10], failed");
  890. return -1;
  891. }
  892. debug_dst_buffer(state);
  893. if (memcmp(&check_mb86a15, &state->rxbuffer, 8) < 0) {
  894. dprintk(verbose, DST_ERROR, 1, "Found a MB86A15 NIM");
  895. state->tuner_type = TUNER_TYPE_MB86A15;
  896. return 0;
  897. }
  898. return -1;
  899. }
  900. static int dst_get_tuner_info(struct dst_state *state)
  901. {
  902. u8 get_tuner_1[] = { 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
  903. u8 get_tuner_2[] = { 0x00, 0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
  904. get_tuner_1[7] = dst_check_sum(get_tuner_1, 7);
  905. get_tuner_2[7] = dst_check_sum(get_tuner_2, 7);
  906. dprintk(verbose, DST_ERROR, 1, "DST TYpe = MULTI FE");
  907. if (state->type_flags & DST_TYPE_HAS_MULTI_FE) {
  908. if (dst_command(state, get_tuner_1, 8) < 0) {
  909. dprintk(verbose, DST_INFO, 1, "Cmd=[0x13], Unsupported");
  910. goto force;
  911. }
  912. } else {
  913. if (dst_command(state, get_tuner_2, 8) < 0) {
  914. dprintk(verbose, DST_INFO, 1, "Cmd=[0xb], Unsupported");
  915. goto force;
  916. }
  917. }
  918. memset(&state->board_info, '\0', 8);
  919. memcpy(&state->board_info, &state->rxbuffer, 8);
  920. if (state->type_flags & DST_TYPE_HAS_MULTI_FE) {
  921. dprintk(verbose, DST_ERROR, 1, "DST type has TS=188");
  922. }
  923. if (state->board_info[0] == 0xbc) {
  924. if (state->type_flags != DST_TYPE_IS_ATSC)
  925. state->type_flags |= DST_TYPE_HAS_TS188;
  926. else
  927. state->type_flags |= DST_TYPE_HAS_NEWTUNE_2;
  928. if (state->board_info[1] == 0x01) {
  929. state->dst_hw_cap |= DST_TYPE_HAS_DBOARD;
  930. dprintk(verbose, DST_ERROR, 1, "DST has Daughterboard");
  931. }
  932. }
  933. return 0;
  934. force:
  935. if (!strncmp(state->fw_name, "DCT-CI", 6)) {
  936. state->type_flags |= DST_TYPE_HAS_TS204;
  937. dprintk(verbose, DST_ERROR, 1, "Forcing [%s] to TS188", state->fw_name);
  938. }
  939. return -1;
  940. }
  941. static int dst_get_device_id(struct dst_state *state)
  942. {
  943. u8 reply;
  944. int i, j;
  945. struct dst_types *p_dst_type = NULL;
  946. struct tuner_types *p_tuner_list = NULL;
  947. u8 use_dst_type = 0;
  948. u32 use_type_flags = 0;
  949. static u8 device_type[8] = {0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff};
  950. state->tuner_type = 0;
  951. device_type[7] = dst_check_sum(device_type, 7);
  952. if (write_dst(state, device_type, FIXED_COMM))
  953. return -1; /* Write failed */
  954. if ((dst_pio_disable(state)) < 0)
  955. return -1;
  956. if (read_dst(state, &reply, GET_ACK))
  957. return -1; /* Read failure */
  958. if (reply != ACK) {
  959. dprintk(verbose, DST_INFO, 1, "Write not Acknowledged! [Reply=0x%02x]", reply);
  960. return -1; /* Unack'd write */
  961. }
  962. if (!dst_wait_dst_ready(state, DEVICE_INIT))
  963. return -1; /* DST not ready yet */
  964. if (read_dst(state, state->rxbuffer, FIXED_COMM))
  965. return -1;
  966. dst_pio_disable(state);
  967. if (state->rxbuffer[7] != dst_check_sum(state->rxbuffer, 7)) {
  968. dprintk(verbose, DST_INFO, 1, "Checksum failure!");
  969. return -1; /* Checksum failure */
  970. }
  971. state->rxbuffer[7] = '\0';
  972. for (i = 0, p_dst_type = dst_tlist; i < ARRAY_SIZE(dst_tlist); i++, p_dst_type++) {
  973. if (!strncmp (&state->rxbuffer[p_dst_type->offset], p_dst_type->device_id, strlen (p_dst_type->device_id))) {
  974. use_type_flags = p_dst_type->type_flags;
  975. use_dst_type = p_dst_type->dst_type;
  976. /* Card capabilities */
  977. state->dst_hw_cap = p_dst_type->dst_feature;
  978. dprintk(verbose, DST_ERROR, 1, "Recognise [%s]", p_dst_type->device_id);
  979. strncpy(&state->fw_name[0], p_dst_type->device_id, 6);
  980. /* Multiple tuners */
  981. if (p_dst_type->tuner_type & TUNER_TYPE_MULTI) {
  982. switch (use_dst_type) {
  983. case DST_TYPE_IS_SAT:
  984. /* STV0299 check */
  985. if (dst_check_stv0299(state) < 0) {
  986. dprintk(verbose, DST_ERROR, 1, "Unsupported");
  987. state->tuner_type = TUNER_TYPE_MB86A15;
  988. }
  989. break;
  990. default:
  991. break;
  992. }
  993. if (dst_check_mb86a15(state) < 0)
  994. dprintk(verbose, DST_ERROR, 1, "Unsupported");
  995. /* Single tuner */
  996. } else {
  997. state->tuner_type = p_dst_type->tuner_type;
  998. }
  999. for (j = 0, p_tuner_list = tuner_list; j < ARRAY_SIZE(tuner_list); j++, p_tuner_list++) {
  1000. if (!(strncmp(p_dst_type->device_id, p_tuner_list->fw_name, 7)) &&
  1001. p_tuner_list->tuner_type == state->tuner_type) {
  1002. dprintk(verbose, DST_ERROR, 1, "[%s] has a [%s]",
  1003. p_dst_type->device_id, p_tuner_list->tuner_name);
  1004. }
  1005. }
  1006. break;
  1007. }
  1008. }
  1009. if (i >= sizeof (dst_tlist) / sizeof (dst_tlist [0])) {
  1010. dprintk(verbose, DST_ERROR, 1, "Unable to recognize %s or %s", &state->rxbuffer[0], &state->rxbuffer[1]);
  1011. dprintk(verbose, DST_ERROR, 1, "please email linux-dvb@linuxtv.org with this type in");
  1012. use_dst_type = DST_TYPE_IS_SAT;
  1013. use_type_flags = DST_TYPE_HAS_SYMDIV;
  1014. }
  1015. dst_type_print(state, use_dst_type);
  1016. state->type_flags = use_type_flags;
  1017. state->dst_type = use_dst_type;
  1018. dst_type_flags_print(state);
  1019. return 0;
  1020. }
  1021. static int dst_probe(struct dst_state *state)
  1022. {
  1023. mutex_init(&state->dst_mutex);
  1024. if (dst_addons & DST_TYPE_HAS_CA) {
  1025. if ((rdc_8820_reset(state)) < 0) {
  1026. dprintk(verbose, DST_ERROR, 1, "RDC 8820 RESET Failed.");
  1027. return -1;
  1028. }
  1029. msleep(4000);
  1030. } else {
  1031. msleep(100);
  1032. }
  1033. if ((dst_comm_init(state)) < 0) {
  1034. dprintk(verbose, DST_ERROR, 1, "DST Initialization Failed.");
  1035. return -1;
  1036. }
  1037. msleep(100);
  1038. if (dst_get_device_id(state) < 0) {
  1039. dprintk(verbose, DST_ERROR, 1, "unknown device.");
  1040. return -1;
  1041. }
  1042. if (dst_get_mac(state) < 0) {
  1043. dprintk(verbose, DST_INFO, 1, "MAC: Unsupported command");
  1044. }
  1045. if ((state->type_flags & DST_TYPE_HAS_MULTI_FE) || (state->type_flags & DST_TYPE_HAS_FW_BUILD)) {
  1046. if (dst_get_tuner_info(state) < 0)
  1047. dprintk(verbose, DST_INFO, 1, "Tuner: Unsupported command");
  1048. }
  1049. if (state->type_flags & DST_TYPE_HAS_TS204) {
  1050. dst_packsize(state, 204);
  1051. }
  1052. if (state->type_flags & DST_TYPE_HAS_FW_BUILD) {
  1053. if (dst_fw_ver(state) < 0) {
  1054. dprintk(verbose, DST_INFO, 1, "FW: Unsupported command");
  1055. return 0;
  1056. }
  1057. if (dst_card_type(state) < 0) {
  1058. dprintk(verbose, DST_INFO, 1, "Card: Unsupported command");
  1059. return 0;
  1060. }
  1061. if (dst_get_vendor(state) < 0) {
  1062. dprintk(verbose, DST_INFO, 1, "Vendor: Unsupported command");
  1063. return 0;
  1064. }
  1065. }
  1066. return 0;
  1067. }
  1068. int dst_command(struct dst_state *state, u8 *data, u8 len)
  1069. {
  1070. u8 reply;
  1071. mutex_lock(&state->dst_mutex);
  1072. if ((dst_comm_init(state)) < 0) {
  1073. dprintk(verbose, DST_NOTICE, 1, "DST Communication Initialization Failed.");
  1074. goto error;
  1075. }
  1076. if (write_dst(state, data, len)) {
  1077. dprintk(verbose, DST_INFO, 1, "Tring to recover.. ");
  1078. if ((dst_error_recovery(state)) < 0) {
  1079. dprintk(verbose, DST_ERROR, 1, "Recovery Failed.");
  1080. goto error;
  1081. }
  1082. goto error;
  1083. }
  1084. if ((dst_pio_disable(state)) < 0) {
  1085. dprintk(verbose, DST_ERROR, 1, "PIO Disable Failed.");
  1086. goto error;
  1087. }
  1088. if (state->type_flags & DST_TYPE_HAS_FW_1)
  1089. udelay(3000);
  1090. if (read_dst(state, &reply, GET_ACK)) {
  1091. dprintk(verbose, DST_DEBUG, 1, "Trying to recover.. ");
  1092. if ((dst_error_recovery(state)) < 0) {
  1093. dprintk(verbose, DST_INFO, 1, "Recovery Failed.");
  1094. goto error;
  1095. }
  1096. goto error;
  1097. }
  1098. if (reply != ACK) {
  1099. dprintk(verbose, DST_INFO, 1, "write not acknowledged 0x%02x ", reply);
  1100. goto error;
  1101. }
  1102. if (len >= 2 && data[0] == 0 && (data[1] == 1 || data[1] == 3))
  1103. goto error;
  1104. if (state->type_flags & DST_TYPE_HAS_FW_1)
  1105. udelay(3000);
  1106. else
  1107. udelay(2000);
  1108. if (!dst_wait_dst_ready(state, NO_DELAY))
  1109. goto error;
  1110. if (read_dst(state, state->rxbuffer, FIXED_COMM)) {
  1111. dprintk(verbose, DST_DEBUG, 1, "Trying to recover.. ");
  1112. if ((dst_error_recovery(state)) < 0) {
  1113. dprintk(verbose, DST_INFO, 1, "Recovery failed.");
  1114. goto error;
  1115. }
  1116. goto error;
  1117. }
  1118. if (state->rxbuffer[7] != dst_check_sum(state->rxbuffer, 7)) {
  1119. dprintk(verbose, DST_INFO, 1, "checksum failure");
  1120. goto error;
  1121. }
  1122. mutex_unlock(&state->dst_mutex);
  1123. return 0;
  1124. error:
  1125. mutex_unlock(&state->dst_mutex);
  1126. return -EIO;
  1127. }
  1128. EXPORT_SYMBOL(dst_command);
  1129. static int dst_get_signal(struct dst_state *state)
  1130. {
  1131. int retval;
  1132. u8 get_signal[] = { 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfb };
  1133. //dprintk("%s: Getting Signal strength and other parameters\n", __FUNCTION__);
  1134. if ((state->diseq_flags & ATTEMPT_TUNE) == 0) {
  1135. state->decode_lock = state->decode_strength = state->decode_snr = 0;
  1136. return 0;
  1137. }
  1138. if (0 == (state->diseq_flags & HAS_LOCK)) {
  1139. state->decode_lock = state->decode_strength = state->decode_snr = 0;
  1140. return 0;
  1141. }
  1142. if (time_after_eq(jiffies, state->cur_jiff + (HZ / 5))) {
  1143. retval = dst_command(state, get_signal, 8);
  1144. if (retval < 0)
  1145. return retval;
  1146. if (state->dst_type == DST_TYPE_IS_SAT) {
  1147. state->decode_lock = ((state->rxbuffer[6] & 0x10) == 0) ? 1 : 0;
  1148. state->decode_strength = state->rxbuffer[5] << 8;
  1149. state->decode_snr = state->rxbuffer[2] << 8 | state->rxbuffer[3];
  1150. } else if ((state->dst_type == DST_TYPE_IS_TERR) || (state->dst_type == DST_TYPE_IS_CABLE)) {
  1151. state->decode_lock = (state->rxbuffer[1]) ? 1 : 0;
  1152. state->decode_strength = state->rxbuffer[4] << 8;
  1153. state->decode_snr = state->rxbuffer[3] << 8;
  1154. } else if (state->dst_type == DST_TYPE_IS_ATSC) {
  1155. state->decode_lock = (state->rxbuffer[6] == 0x00) ? 1 : 0;
  1156. state->decode_strength = state->rxbuffer[4] << 8;
  1157. state->decode_snr = state->rxbuffer[2] << 8 | state->rxbuffer[3];
  1158. }
  1159. state->cur_jiff = jiffies;
  1160. }
  1161. return 0;
  1162. }
  1163. static int dst_tone_power_cmd(struct dst_state *state)
  1164. {
  1165. u8 paket[8] = { 0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00 };
  1166. if (state->dst_type == DST_TYPE_IS_TERR)
  1167. return 0;
  1168. paket[4] = state->tx_tuna[4];
  1169. paket[2] = state->tx_tuna[2];
  1170. paket[3] = state->tx_tuna[3];
  1171. paket[7] = dst_check_sum (paket, 7);
  1172. dst_command(state, paket, 8);
  1173. return 0;
  1174. }
  1175. static int dst_get_tuna(struct dst_state *state)
  1176. {
  1177. int retval;
  1178. if ((state->diseq_flags & ATTEMPT_TUNE) == 0)
  1179. return 0;
  1180. state->diseq_flags &= ~(HAS_LOCK);
  1181. if (!dst_wait_dst_ready(state, NO_DELAY))
  1182. return -EIO;
  1183. if ((state->type_flags & DST_TYPE_HAS_VLF) &&
  1184. !(state->dst_type == DST_TYPE_IS_ATSC))
  1185. retval = read_dst(state, state->rx_tuna, 10);
  1186. else
  1187. retval = read_dst(state, &state->rx_tuna[2], FIXED_COMM);
  1188. if (retval < 0) {
  1189. dprintk(verbose, DST_DEBUG, 1, "read not successful");
  1190. return retval;
  1191. }
  1192. if ((state->type_flags & DST_TYPE_HAS_VLF) &&
  1193. !(state->dst_type == DST_TYPE_IS_CABLE) &&
  1194. !(state->dst_type == DST_TYPE_IS_ATSC)) {
  1195. if (state->rx_tuna[9] != dst_check_sum(&state->rx_tuna[0], 9)) {
  1196. dprintk(verbose, DST_INFO, 1, "checksum failure ? ");
  1197. return -EIO;
  1198. }
  1199. } else {
  1200. if (state->rx_tuna[9] != dst_check_sum(&state->rx_tuna[2], 7)) {
  1201. dprintk(verbose, DST_INFO, 1, "checksum failure? ");
  1202. return -EIO;
  1203. }
  1204. }
  1205. if (state->rx_tuna[2] == 0 && state->rx_tuna[3] == 0)
  1206. return 0;
  1207. if (state->dst_type == DST_TYPE_IS_SAT) {
  1208. state->decode_freq = ((state->rx_tuna[2] & 0x7f) << 8) + state->rx_tuna[3];
  1209. } else {
  1210. state->decode_freq = ((state->rx_tuna[2] & 0x7f) << 16) + (state->rx_tuna[3] << 8) + state->rx_tuna[4];
  1211. }
  1212. state->decode_freq = state->decode_freq * 1000;
  1213. state->decode_lock = 1;
  1214. state->diseq_flags |= HAS_LOCK;
  1215. return 1;
  1216. }
  1217. static int dst_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage);
  1218. static int dst_write_tuna(struct dvb_frontend *fe)
  1219. {
  1220. struct dst_state *state = fe->demodulator_priv;
  1221. int retval;
  1222. u8 reply;
  1223. dprintk(verbose, DST_INFO, 1, "type_flags 0x%x ", state->type_flags);
  1224. state->decode_freq = 0;
  1225. state->decode_lock = state->decode_strength = state->decode_snr = 0;
  1226. if (state->dst_type == DST_TYPE_IS_SAT) {
  1227. if (!(state->diseq_flags & HAS_POWER))
  1228. dst_set_voltage(fe, SEC_VOLTAGE_13);
  1229. }
  1230. state->diseq_flags &= ~(HAS_LOCK | ATTEMPT_TUNE);
  1231. mutex_lock(&state->dst_mutex);
  1232. if ((dst_comm_init(state)) < 0) {
  1233. dprintk(verbose, DST_DEBUG, 1, "DST Communication initialization failed.");
  1234. goto error;
  1235. }
  1236. // if (state->type_flags & DST_TYPE_HAS_NEWTUNE) {
  1237. if ((state->type_flags & DST_TYPE_HAS_VLF) &&
  1238. (!(state->dst_type == DST_TYPE_IS_ATSC))) {
  1239. state->tx_tuna[9] = dst_check_sum(&state->tx_tuna[0], 9);
  1240. retval = write_dst(state, &state->tx_tuna[0], 10);
  1241. } else {
  1242. state->tx_tuna[9] = dst_check_sum(&state->tx_tuna[2], 7);
  1243. retval = write_dst(state, &state->tx_tuna[2], FIXED_COMM);
  1244. }
  1245. if (retval < 0) {
  1246. dst_pio_disable(state);
  1247. dprintk(verbose, DST_DEBUG, 1, "write not successful");
  1248. goto werr;
  1249. }
  1250. if ((dst_pio_disable(state)) < 0) {
  1251. dprintk(verbose, DST_DEBUG, 1, "DST PIO disable failed !");
  1252. goto error;
  1253. }
  1254. if ((read_dst(state, &reply, GET_ACK) < 0)) {
  1255. dprintk(verbose, DST_DEBUG, 1, "read verify not successful.");
  1256. goto error;
  1257. }
  1258. if (reply != ACK) {
  1259. dprintk(verbose, DST_DEBUG, 1, "write not acknowledged 0x%02x ", reply);
  1260. goto error;
  1261. }
  1262. state->diseq_flags |= ATTEMPT_TUNE;
  1263. retval = dst_get_tuna(state);
  1264. werr:
  1265. mutex_unlock(&state->dst_mutex);
  1266. return retval;
  1267. error:
  1268. mutex_unlock(&state->dst_mutex);
  1269. return -EIO;
  1270. }
  1271. /*
  1272. * line22k0 0x00, 0x09, 0x00, 0xff, 0x01, 0x00, 0x00, 0x00
  1273. * line22k1 0x00, 0x09, 0x01, 0xff, 0x01, 0x00, 0x00, 0x00
  1274. * line22k2 0x00, 0x09, 0x02, 0xff, 0x01, 0x00, 0x00, 0x00
  1275. * tone 0x00, 0x09, 0xff, 0x00, 0x01, 0x00, 0x00, 0x00
  1276. * data 0x00, 0x09, 0xff, 0x01, 0x01, 0x00, 0x00, 0x00
  1277. * power_off 0x00, 0x09, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00
  1278. * power_on 0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00
  1279. * Diseqc 1 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec
  1280. * Diseqc 2 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf4, 0xe8
  1281. * Diseqc 3 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf8, 0xe4
  1282. * Diseqc 4 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xfc, 0xe0
  1283. */
  1284. static int dst_set_diseqc(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
  1285. {
  1286. struct dst_state *state = fe->demodulator_priv;
  1287. u8 paket[8] = { 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec };
  1288. if (state->dst_type != DST_TYPE_IS_SAT)
  1289. return 0;
  1290. if (cmd->msg_len > 0 && cmd->msg_len < 5)
  1291. memcpy(&paket[3], cmd->msg, cmd->msg_len);
  1292. else if (cmd->msg_len == 5 && state->dst_hw_cap & DST_TYPE_HAS_DISEQC5)
  1293. memcpy(&paket[2], cmd->msg, cmd->msg_len);
  1294. else
  1295. return -EINVAL;
  1296. paket[7] = dst_check_sum(&paket[0], 7);
  1297. dst_command(state, paket, 8);
  1298. return 0;
  1299. }
  1300. static int dst_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
  1301. {
  1302. int need_cmd;
  1303. struct dst_state *state = fe->demodulator_priv;
  1304. state->voltage = voltage;
  1305. if (state->dst_type != DST_TYPE_IS_SAT)
  1306. return 0;
  1307. need_cmd = 0;
  1308. switch (voltage) {
  1309. case SEC_VOLTAGE_13:
  1310. case SEC_VOLTAGE_18:
  1311. if ((state->diseq_flags & HAS_POWER) == 0)
  1312. need_cmd = 1;
  1313. state->diseq_flags |= HAS_POWER;
  1314. state->tx_tuna[4] = 0x01;
  1315. break;
  1316. case SEC_VOLTAGE_OFF:
  1317. need_cmd = 1;
  1318. state->diseq_flags &= ~(HAS_POWER | HAS_LOCK | ATTEMPT_TUNE);
  1319. state->tx_tuna[4] = 0x00;
  1320. break;
  1321. default:
  1322. return -EINVAL;
  1323. }
  1324. if (need_cmd)
  1325. dst_tone_power_cmd(state);
  1326. return 0;
  1327. }
  1328. static int dst_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
  1329. {
  1330. struct dst_state *state = fe->demodulator_priv;
  1331. state->tone = tone;
  1332. if (state->dst_type != DST_TYPE_IS_SAT)
  1333. return 0;
  1334. switch (tone) {
  1335. case SEC_TONE_OFF:
  1336. if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
  1337. state->tx_tuna[2] = 0x00;
  1338. else
  1339. state->tx_tuna[2] = 0xff;
  1340. break;
  1341. case SEC_TONE_ON:
  1342. state->tx_tuna[2] = 0x02;
  1343. break;
  1344. default:
  1345. return -EINVAL;
  1346. }
  1347. dst_tone_power_cmd(state);
  1348. return 0;
  1349. }
  1350. static int dst_send_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t minicmd)
  1351. {
  1352. struct dst_state *state = fe->demodulator_priv;
  1353. if (state->dst_type != DST_TYPE_IS_SAT)
  1354. return 0;
  1355. state->minicmd = minicmd;
  1356. switch (minicmd) {
  1357. case SEC_MINI_A:
  1358. state->tx_tuna[3] = 0x02;
  1359. break;
  1360. case SEC_MINI_B:
  1361. state->tx_tuna[3] = 0xff;
  1362. break;
  1363. }
  1364. dst_tone_power_cmd(state);
  1365. return 0;
  1366. }
  1367. static int dst_init(struct dvb_frontend *fe)
  1368. {
  1369. struct dst_state *state = fe->demodulator_priv;
  1370. static u8 sat_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x00, 0x73, 0x21, 0x00, 0x00 };
  1371. static u8 sat_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x55, 0xbd, 0x50, 0x00, 0x00 };
  1372. static u8 ter_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
  1373. static u8 ter_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
  1374. static u8 cab_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
  1375. static u8 cab_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
  1376. static u8 atsc_tuner[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
  1377. state->inversion = INVERSION_OFF;
  1378. state->voltage = SEC_VOLTAGE_13;
  1379. state->tone = SEC_TONE_OFF;
  1380. state->diseq_flags = 0;
  1381. state->k22 = 0x02;
  1382. state->bandwidth = BANDWIDTH_7_MHZ;
  1383. state->cur_jiff = jiffies;
  1384. if (state->dst_type == DST_TYPE_IS_SAT)
  1385. memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_VLF) ? sat_tuna_188 : sat_tuna_204), sizeof (sat_tuna_204));
  1386. else if (state->dst_type == DST_TYPE_IS_TERR)
  1387. memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_VLF) ? ter_tuna_188 : ter_tuna_204), sizeof (ter_tuna_204));
  1388. else if (state->dst_type == DST_TYPE_IS_CABLE)
  1389. memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_VLF) ? cab_tuna_188 : cab_tuna_204), sizeof (cab_tuna_204));
  1390. else if (state->dst_type == DST_TYPE_IS_ATSC)
  1391. memcpy(state->tx_tuna, atsc_tuner, sizeof (atsc_tuner));
  1392. return 0;
  1393. }
  1394. static int dst_read_status(struct dvb_frontend *fe, fe_status_t *status)
  1395. {
  1396. struct dst_state *state = fe->demodulator_priv;
  1397. *status = 0;
  1398. if (state->diseq_flags & HAS_LOCK) {
  1399. // dst_get_signal(state); // don't require(?) to ask MCU
  1400. if (state->decode_lock)
  1401. *status |= FE_HAS_LOCK | FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_SYNC | FE_HAS_VITERBI;
  1402. }
  1403. return 0;
  1404. }
  1405. static int dst_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
  1406. {
  1407. struct dst_state *state = fe->demodulator_priv;
  1408. dst_get_signal(state);
  1409. *strength = state->decode_strength;
  1410. return 0;
  1411. }
  1412. static int dst_read_snr(struct dvb_frontend *fe, u16 *snr)
  1413. {
  1414. struct dst_state *state = fe->demodulator_priv;
  1415. dst_get_signal(state);
  1416. *snr = state->decode_snr;
  1417. return 0;
  1418. }
  1419. static int dst_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
  1420. {
  1421. struct dst_state *state = fe->demodulator_priv;
  1422. if (p != NULL) {
  1423. dst_set_freq(state, p->frequency);
  1424. dprintk(verbose, DST_DEBUG, 1, "Set Frequency=[%d]", p->frequency);
  1425. if (state->dst_type == DST_TYPE_IS_SAT) {
  1426. if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
  1427. dst_set_inversion(state, p->inversion);
  1428. dst_set_fec(state, p->u.qpsk.fec_inner);
  1429. dst_set_symbolrate(state, p->u.qpsk.symbol_rate);
  1430. dst_set_polarization(state);
  1431. dprintk(verbose, DST_DEBUG, 1, "Set Symbolrate=[%d]", p->u.qpsk.symbol_rate);
  1432. } else if (state->dst_type == DST_TYPE_IS_TERR)
  1433. dst_set_bandwidth(state, p->u.ofdm.bandwidth);
  1434. else if (state->dst_type == DST_TYPE_IS_CABLE) {
  1435. dst_set_fec(state, p->u.qam.fec_inner);
  1436. dst_set_symbolrate(state, p->u.qam.symbol_rate);
  1437. dst_set_modulation(state, p->u.qam.modulation);
  1438. }
  1439. dst_write_tuna(fe);
  1440. }
  1441. return 0;
  1442. }
  1443. static int dst_tune_frontend(struct dvb_frontend* fe,
  1444. struct dvb_frontend_parameters* p,
  1445. unsigned int mode_flags,
  1446. int *delay,
  1447. fe_status_t *status)
  1448. {
  1449. struct dst_state *state = fe->demodulator_priv;
  1450. if (p != NULL) {
  1451. dst_set_freq(state, p->frequency);
  1452. dprintk(verbose, DST_DEBUG, 1, "Set Frequency=[%d]", p->frequency);
  1453. if (state->dst_type == DST_TYPE_IS_SAT) {
  1454. if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
  1455. dst_set_inversion(state, p->inversion);
  1456. dst_set_fec(state, p->u.qpsk.fec_inner);
  1457. dst_set_symbolrate(state, p->u.qpsk.symbol_rate);
  1458. dst_set_polarization(state);
  1459. dprintk(verbose, DST_DEBUG, 1, "Set Symbolrate=[%d]", p->u.qpsk.symbol_rate);
  1460. } else if (state->dst_type == DST_TYPE_IS_TERR)
  1461. dst_set_bandwidth(state, p->u.ofdm.bandwidth);
  1462. else if (state->dst_type == DST_TYPE_IS_CABLE) {
  1463. dst_set_fec(state, p->u.qam.fec_inner);
  1464. dst_set_symbolrate(state, p->u.qam.symbol_rate);
  1465. dst_set_modulation(state, p->u.qam.modulation);
  1466. }
  1467. dst_write_tuna(fe);
  1468. }
  1469. if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
  1470. dst_read_status(fe, status);
  1471. *delay = HZ/10;
  1472. return 0;
  1473. }
  1474. static int dst_get_tuning_algo(struct dvb_frontend *fe)
  1475. {
  1476. return dst_algo;
  1477. }
  1478. static int dst_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
  1479. {
  1480. struct dst_state *state = fe->demodulator_priv;
  1481. p->frequency = state->decode_freq;
  1482. if (state->dst_type == DST_TYPE_IS_SAT) {
  1483. if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
  1484. p->inversion = state->inversion;
  1485. p->u.qpsk.symbol_rate = state->symbol_rate;
  1486. p->u.qpsk.fec_inner = dst_get_fec(state);
  1487. } else if (state->dst_type == DST_TYPE_IS_TERR) {
  1488. p->u.ofdm.bandwidth = state->bandwidth;
  1489. } else if (state->dst_type == DST_TYPE_IS_CABLE) {
  1490. p->u.qam.symbol_rate = state->symbol_rate;
  1491. p->u.qam.fec_inner = dst_get_fec(state);
  1492. p->u.qam.modulation = dst_get_modulation(state);
  1493. }
  1494. return 0;
  1495. }
  1496. static void dst_release(struct dvb_frontend *fe)
  1497. {
  1498. struct dst_state *state = fe->demodulator_priv;
  1499. kfree(state);
  1500. }
  1501. static struct dvb_frontend_ops dst_dvbt_ops;
  1502. static struct dvb_frontend_ops dst_dvbs_ops;
  1503. static struct dvb_frontend_ops dst_dvbc_ops;
  1504. static struct dvb_frontend_ops dst_atsc_ops;
  1505. struct dst_state *dst_attach(struct dst_state *state, struct dvb_adapter *dvb_adapter)
  1506. {
  1507. /* check if the ASIC is there */
  1508. if (dst_probe(state) < 0) {
  1509. kfree(state);
  1510. return NULL;
  1511. }
  1512. /* determine settings based on type */
  1513. /* create dvb_frontend */
  1514. switch (state->dst_type) {
  1515. case DST_TYPE_IS_TERR:
  1516. memcpy(&state->frontend.ops, &dst_dvbt_ops, sizeof(struct dvb_frontend_ops));
  1517. break;
  1518. case DST_TYPE_IS_CABLE:
  1519. memcpy(&state->frontend.ops, &dst_dvbc_ops, sizeof(struct dvb_frontend_ops));
  1520. break;
  1521. case DST_TYPE_IS_SAT:
  1522. memcpy(&state->frontend.ops, &dst_dvbs_ops, sizeof(struct dvb_frontend_ops));
  1523. break;
  1524. case DST_TYPE_IS_ATSC:
  1525. memcpy(&state->frontend.ops, &dst_atsc_ops, sizeof(struct dvb_frontend_ops));
  1526. break;
  1527. default:
  1528. dprintk(verbose, DST_ERROR, 1, "unknown DST type. please report to the LinuxTV.org DVB mailinglist.");
  1529. kfree(state);
  1530. return NULL;
  1531. }
  1532. state->frontend.demodulator_priv = state;
  1533. return state; /* Manu (DST is a card not a frontend) */
  1534. }
  1535. EXPORT_SYMBOL(dst_attach);
  1536. static struct dvb_frontend_ops dst_dvbt_ops = {
  1537. .info = {
  1538. .name = "DST DVB-T",
  1539. .type = FE_OFDM,
  1540. .frequency_min = 137000000,
  1541. .frequency_max = 858000000,
  1542. .frequency_stepsize = 166667,
  1543. .caps = FE_CAN_FEC_AUTO | FE_CAN_QAM_AUTO | FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO
  1544. },
  1545. .release = dst_release,
  1546. .init = dst_init,
  1547. .tune = dst_tune_frontend,
  1548. .set_frontend = dst_set_frontend,
  1549. .get_frontend = dst_get_frontend,
  1550. .get_frontend_algo = dst_get_tuning_algo,
  1551. .read_status = dst_read_status,
  1552. .read_signal_strength = dst_read_signal_strength,
  1553. .read_snr = dst_read_snr,
  1554. };
  1555. static struct dvb_frontend_ops dst_dvbs_ops = {
  1556. .info = {
  1557. .name = "DST DVB-S",
  1558. .type = FE_QPSK,
  1559. .frequency_min = 950000,
  1560. .frequency_max = 2150000,
  1561. .frequency_stepsize = 1000, /* kHz for QPSK frontends */
  1562. .frequency_tolerance = 29500,
  1563. .symbol_rate_min = 1000000,
  1564. .symbol_rate_max = 45000000,
  1565. /* . symbol_rate_tolerance = ???,*/
  1566. .caps = FE_CAN_FEC_AUTO | FE_CAN_QPSK
  1567. },
  1568. .release = dst_release,
  1569. .init = dst_init,
  1570. .tune = dst_tune_frontend,
  1571. .set_frontend = dst_set_frontend,
  1572. .get_frontend = dst_get_frontend,
  1573. .get_frontend_algo = dst_get_tuning_algo,
  1574. .read_status = dst_read_status,
  1575. .read_signal_strength = dst_read_signal_strength,
  1576. .read_snr = dst_read_snr,
  1577. .diseqc_send_burst = dst_send_burst,
  1578. .diseqc_send_master_cmd = dst_set_diseqc,
  1579. .set_voltage = dst_set_voltage,
  1580. .set_tone = dst_set_tone,
  1581. };
  1582. static struct dvb_frontend_ops dst_dvbc_ops = {
  1583. .info = {
  1584. .name = "DST DVB-C",
  1585. .type = FE_QAM,
  1586. .frequency_stepsize = 62500,
  1587. .frequency_min = 51000000,
  1588. .frequency_max = 858000000,
  1589. .symbol_rate_min = 1000000,
  1590. .symbol_rate_max = 45000000,
  1591. /* . symbol_rate_tolerance = ???,*/
  1592. .caps = FE_CAN_FEC_AUTO | FE_CAN_QAM_AUTO
  1593. },
  1594. .release = dst_release,
  1595. .init = dst_init,
  1596. .tune = dst_tune_frontend,
  1597. .set_frontend = dst_set_frontend,
  1598. .get_frontend = dst_get_frontend,
  1599. .get_frontend_algo = dst_get_tuning_algo,
  1600. .read_status = dst_read_status,
  1601. .read_signal_strength = dst_read_signal_strength,
  1602. .read_snr = dst_read_snr,
  1603. };
  1604. static struct dvb_frontend_ops dst_atsc_ops = {
  1605. .info = {
  1606. .name = "DST ATSC",
  1607. .type = FE_ATSC,
  1608. .frequency_stepsize = 62500,
  1609. .frequency_min = 510000000,
  1610. .frequency_max = 858000000,
  1611. .symbol_rate_min = 1000000,
  1612. .symbol_rate_max = 45000000,
  1613. .caps = FE_CAN_FEC_AUTO | FE_CAN_QAM_AUTO | FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
  1614. },
  1615. .release = dst_release,
  1616. .init = dst_init,
  1617. .tune = dst_tune_frontend,
  1618. .set_frontend = dst_set_frontend,
  1619. .get_frontend = dst_get_frontend,
  1620. .get_frontend_algo = dst_get_tuning_algo,
  1621. .read_status = dst_read_status,
  1622. .read_signal_strength = dst_read_signal_strength,
  1623. .read_snr = dst_read_snr,
  1624. };
  1625. MODULE_DESCRIPTION("DST DVB-S/T/C/ATSC Combo Frontend driver");
  1626. MODULE_AUTHOR("Jamie Honan, Manu Abraham");
  1627. MODULE_LICENSE("GPL");