ipath_intr.c 28 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942
  1. /*
  2. * Copyright (c) 2006 QLogic, Inc. All rights reserved.
  3. * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/pci.h>
  34. #include "ipath_kernel.h"
  35. #include "ipath_layer.h"
  36. #include "ipath_common.h"
  37. /* These are all rcv-related errors which we want to count for stats */
  38. #define E_SUM_PKTERRS \
  39. (INFINIPATH_E_RHDRLEN | INFINIPATH_E_RBADTID | \
  40. INFINIPATH_E_RBADVERSION | INFINIPATH_E_RHDR | \
  41. INFINIPATH_E_RLONGPKTLEN | INFINIPATH_E_RSHORTPKTLEN | \
  42. INFINIPATH_E_RMAXPKTLEN | INFINIPATH_E_RMINPKTLEN | \
  43. INFINIPATH_E_RFORMATERR | INFINIPATH_E_RUNSUPVL | \
  44. INFINIPATH_E_RUNEXPCHAR | INFINIPATH_E_REBP)
  45. /* These are all send-related errors which we want to count for stats */
  46. #define E_SUM_ERRS \
  47. (INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SUNEXPERRPKTNUM | \
  48. INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
  49. INFINIPATH_E_SMAXPKTLEN | INFINIPATH_E_SUNSUPVL | \
  50. INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
  51. INFINIPATH_E_INVALIDADDR)
  52. /*
  53. * these are errors that can occur when the link changes state while
  54. * a packet is being sent or received. This doesn't cover things
  55. * like EBP or VCRC that can be the result of a sending having the
  56. * link change state, so we receive a "known bad" packet.
  57. */
  58. #define E_SUM_LINK_PKTERRS \
  59. (INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
  60. INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
  61. INFINIPATH_E_RSHORTPKTLEN | INFINIPATH_E_RMINPKTLEN | \
  62. INFINIPATH_E_RUNEXPCHAR)
  63. static u64 handle_e_sum_errs(struct ipath_devdata *dd, ipath_err_t errs)
  64. {
  65. unsigned long sbuf[4];
  66. u64 ignore_this_time = 0;
  67. u32 piobcnt;
  68. /* if possible that sendbuffererror could be valid */
  69. piobcnt = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
  70. /* read these before writing errorclear */
  71. sbuf[0] = ipath_read_kreg64(
  72. dd, dd->ipath_kregs->kr_sendbuffererror);
  73. sbuf[1] = ipath_read_kreg64(
  74. dd, dd->ipath_kregs->kr_sendbuffererror + 1);
  75. if (piobcnt > 128) {
  76. sbuf[2] = ipath_read_kreg64(
  77. dd, dd->ipath_kregs->kr_sendbuffererror + 2);
  78. sbuf[3] = ipath_read_kreg64(
  79. dd, dd->ipath_kregs->kr_sendbuffererror + 3);
  80. }
  81. if (sbuf[0] || sbuf[1] || (piobcnt > 128 && (sbuf[2] || sbuf[3]))) {
  82. int i;
  83. ipath_cdbg(PKT, "SendbufErrs %lx %lx ", sbuf[0], sbuf[1]);
  84. if (ipath_debug & __IPATH_PKTDBG && piobcnt > 128)
  85. printk("%lx %lx ", sbuf[2], sbuf[3]);
  86. for (i = 0; i < piobcnt; i++) {
  87. if (test_bit(i, sbuf)) {
  88. u32 __iomem *piobuf;
  89. if (i < dd->ipath_piobcnt2k)
  90. piobuf = (u32 __iomem *)
  91. (dd->ipath_pio2kbase +
  92. i * dd->ipath_palign);
  93. else
  94. piobuf = (u32 __iomem *)
  95. (dd->ipath_pio4kbase +
  96. (i - dd->ipath_piobcnt2k) *
  97. dd->ipath_4kalign);
  98. ipath_cdbg(PKT,
  99. "PIObuf[%u] @%p pbc is %x; ",
  100. i, piobuf, readl(piobuf));
  101. ipath_disarm_piobufs(dd, i, 1);
  102. }
  103. }
  104. if (ipath_debug & __IPATH_PKTDBG)
  105. printk("\n");
  106. }
  107. if ((errs & E_SUM_LINK_PKTERRS) &&
  108. !(dd->ipath_flags & IPATH_LINKACTIVE)) {
  109. /*
  110. * This can happen when SMA is trying to bring the link
  111. * up, but the IB link changes state at the "wrong" time.
  112. * The IB logic then complains that the packet isn't
  113. * valid. We don't want to confuse people, so we just
  114. * don't print them, except at debug
  115. */
  116. ipath_dbg("Ignoring packet errors %llx, because link not "
  117. "ACTIVE\n", (unsigned long long) errs);
  118. ignore_this_time = errs & E_SUM_LINK_PKTERRS;
  119. }
  120. return ignore_this_time;
  121. }
  122. /* return the strings for the most common link states */
  123. static char *ib_linkstate(u32 linkstate)
  124. {
  125. char *ret;
  126. switch (linkstate) {
  127. case IPATH_IBSTATE_INIT:
  128. ret = "Init";
  129. break;
  130. case IPATH_IBSTATE_ARM:
  131. ret = "Arm";
  132. break;
  133. case IPATH_IBSTATE_ACTIVE:
  134. ret = "Active";
  135. break;
  136. default:
  137. ret = "Down";
  138. }
  139. return ret;
  140. }
  141. static void handle_e_ibstatuschanged(struct ipath_devdata *dd,
  142. ipath_err_t errs, int noprint)
  143. {
  144. u64 val;
  145. u32 ltstate, lstate;
  146. /*
  147. * even if diags are enabled, we want to notice LINKINIT, etc.
  148. * We just don't want to change the LED state, or
  149. * dd->ipath_kregs->kr_ibcctrl
  150. */
  151. val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
  152. lstate = val & IPATH_IBSTATE_MASK;
  153. /*
  154. * this is confusing enough when it happens that I want to always put it
  155. * on the console and in the logs. If it was a requested state change,
  156. * we'll have already cleared the flags, so we won't print this warning
  157. */
  158. if ((lstate != IPATH_IBSTATE_ARM && lstate != IPATH_IBSTATE_ACTIVE)
  159. && (dd->ipath_flags & (IPATH_LINKARMED | IPATH_LINKACTIVE))) {
  160. dev_info(&dd->pcidev->dev, "Link state changed from %s to %s\n",
  161. (dd->ipath_flags & IPATH_LINKARMED) ? "ARM" : "ACTIVE",
  162. ib_linkstate(lstate));
  163. /*
  164. * Flush all queued sends when link went to DOWN or INIT,
  165. * to be sure that they don't block SMA and other MAD packets
  166. */
  167. ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
  168. INFINIPATH_S_ABORT);
  169. ipath_disarm_piobufs(dd, dd->ipath_lastport_piobuf,
  170. (unsigned)(dd->ipath_piobcnt2k +
  171. dd->ipath_piobcnt4k) -
  172. dd->ipath_lastport_piobuf);
  173. }
  174. else if (lstate == IPATH_IBSTATE_INIT || lstate == IPATH_IBSTATE_ARM ||
  175. lstate == IPATH_IBSTATE_ACTIVE) {
  176. /*
  177. * only print at SMA if there is a change, debug if not
  178. * (sometimes we want to know that, usually not).
  179. */
  180. if (lstate == ((unsigned) dd->ipath_lastibcstat
  181. & IPATH_IBSTATE_MASK)) {
  182. ipath_dbg("Status change intr but no change (%s)\n",
  183. ib_linkstate(lstate));
  184. }
  185. else
  186. ipath_cdbg(SMA, "Unit %u link state %s, last "
  187. "was %s\n", dd->ipath_unit,
  188. ib_linkstate(lstate),
  189. ib_linkstate((unsigned)
  190. dd->ipath_lastibcstat
  191. & IPATH_IBSTATE_MASK));
  192. }
  193. else {
  194. lstate = dd->ipath_lastibcstat & IPATH_IBSTATE_MASK;
  195. if (lstate == IPATH_IBSTATE_INIT ||
  196. lstate == IPATH_IBSTATE_ARM ||
  197. lstate == IPATH_IBSTATE_ACTIVE)
  198. ipath_cdbg(SMA, "Unit %u link state down"
  199. " (state 0x%x), from %s\n",
  200. dd->ipath_unit,
  201. (u32)val & IPATH_IBSTATE_MASK,
  202. ib_linkstate(lstate));
  203. else
  204. ipath_cdbg(VERBOSE, "Unit %u link state changed "
  205. "to 0x%x from down (%x)\n",
  206. dd->ipath_unit, (u32) val, lstate);
  207. }
  208. ltstate = (val >> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
  209. INFINIPATH_IBCS_LINKTRAININGSTATE_MASK;
  210. lstate = (val >> INFINIPATH_IBCS_LINKSTATE_SHIFT) &
  211. INFINIPATH_IBCS_LINKSTATE_MASK;
  212. if (ltstate == INFINIPATH_IBCS_LT_STATE_POLLACTIVE ||
  213. ltstate == INFINIPATH_IBCS_LT_STATE_POLLQUIET) {
  214. u32 last_ltstate;
  215. /*
  216. * Ignore cycling back and forth from Polling.Active
  217. * to Polling.Quiet while waiting for the other end of
  218. * the link to come up. We will cycle back and forth
  219. * between them if no cable is plugged in,
  220. * the other device is powered off or disabled, etc.
  221. */
  222. last_ltstate = (dd->ipath_lastibcstat >>
  223. INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT)
  224. & INFINIPATH_IBCS_LINKTRAININGSTATE_MASK;
  225. if (last_ltstate == INFINIPATH_IBCS_LT_STATE_POLLACTIVE
  226. || last_ltstate ==
  227. INFINIPATH_IBCS_LT_STATE_POLLQUIET) {
  228. if (dd->ipath_ibpollcnt > 40) {
  229. dd->ipath_flags |= IPATH_NOCABLE;
  230. *dd->ipath_statusp |=
  231. IPATH_STATUS_IB_NOCABLE;
  232. } else
  233. dd->ipath_ibpollcnt++;
  234. goto skip_ibchange;
  235. }
  236. }
  237. dd->ipath_ibpollcnt = 0; /* some state other than 2 or 3 */
  238. ipath_stats.sps_iblink++;
  239. if (ltstate != INFINIPATH_IBCS_LT_STATE_LINKUP) {
  240. dd->ipath_flags |= IPATH_LINKDOWN;
  241. dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT
  242. | IPATH_LINKACTIVE |
  243. IPATH_LINKARMED);
  244. *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY;
  245. dd->ipath_lli_counter = 0;
  246. if (!noprint) {
  247. if (((dd->ipath_lastibcstat >>
  248. INFINIPATH_IBCS_LINKSTATE_SHIFT) &
  249. INFINIPATH_IBCS_LINKSTATE_MASK)
  250. == INFINIPATH_IBCS_L_STATE_ACTIVE)
  251. /* if from up to down be more vocal */
  252. ipath_cdbg(SMA,
  253. "Unit %u link now down (%s)\n",
  254. dd->ipath_unit,
  255. ipath_ibcstatus_str[ltstate]);
  256. else
  257. ipath_cdbg(VERBOSE, "Unit %u link is "
  258. "down (%s)\n", dd->ipath_unit,
  259. ipath_ibcstatus_str[ltstate]);
  260. }
  261. dd->ipath_f_setextled(dd, lstate, ltstate);
  262. } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_ACTIVE) {
  263. dd->ipath_flags |= IPATH_LINKACTIVE;
  264. dd->ipath_flags &=
  265. ~(IPATH_LINKUNK | IPATH_LINKINIT | IPATH_LINKDOWN |
  266. IPATH_LINKARMED | IPATH_NOCABLE);
  267. *dd->ipath_statusp &= ~IPATH_STATUS_IB_NOCABLE;
  268. *dd->ipath_statusp |=
  269. IPATH_STATUS_IB_READY | IPATH_STATUS_IB_CONF;
  270. dd->ipath_f_setextled(dd, lstate, ltstate);
  271. __ipath_layer_intr(dd, IPATH_LAYER_INT_IF_UP);
  272. } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_INIT) {
  273. /*
  274. * set INIT and DOWN. Down is checked by most of the other
  275. * code, but INIT is useful to know in a few places.
  276. */
  277. dd->ipath_flags |= IPATH_LINKINIT | IPATH_LINKDOWN;
  278. dd->ipath_flags &=
  279. ~(IPATH_LINKUNK | IPATH_LINKACTIVE | IPATH_LINKARMED
  280. | IPATH_NOCABLE);
  281. *dd->ipath_statusp &= ~(IPATH_STATUS_IB_NOCABLE
  282. | IPATH_STATUS_IB_READY);
  283. dd->ipath_f_setextled(dd, lstate, ltstate);
  284. } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_ARM) {
  285. dd->ipath_flags |= IPATH_LINKARMED;
  286. dd->ipath_flags &=
  287. ~(IPATH_LINKUNK | IPATH_LINKDOWN | IPATH_LINKINIT |
  288. IPATH_LINKACTIVE | IPATH_NOCABLE);
  289. *dd->ipath_statusp &= ~(IPATH_STATUS_IB_NOCABLE
  290. | IPATH_STATUS_IB_READY);
  291. dd->ipath_f_setextled(dd, lstate, ltstate);
  292. } else {
  293. if (!noprint)
  294. ipath_dbg("IBstatuschange unit %u: %s (%x)\n",
  295. dd->ipath_unit,
  296. ipath_ibcstatus_str[ltstate], ltstate);
  297. }
  298. skip_ibchange:
  299. dd->ipath_lastibcstat = val;
  300. }
  301. static void handle_supp_msgs(struct ipath_devdata *dd,
  302. unsigned supp_msgs, char msg[512])
  303. {
  304. /*
  305. * Print the message unless it's ibc status change only, which
  306. * happens so often we never want to count it.
  307. */
  308. if (dd->ipath_lasterror & ~INFINIPATH_E_IBSTATUSCHANGED) {
  309. ipath_decode_err(msg, sizeof msg, dd->ipath_lasterror &
  310. ~INFINIPATH_E_IBSTATUSCHANGED);
  311. if (dd->ipath_lasterror &
  312. ~(INFINIPATH_E_RRCVEGRFULL | INFINIPATH_E_RRCVHDRFULL))
  313. ipath_dev_err(dd, "Suppressed %u messages for "
  314. "fast-repeating errors (%s) (%llx)\n",
  315. supp_msgs, msg,
  316. (unsigned long long)
  317. dd->ipath_lasterror);
  318. else {
  319. /*
  320. * rcvegrfull and rcvhdrqfull are "normal", for some
  321. * types of processes (mostly benchmarks) that send
  322. * huge numbers of messages, while not processing
  323. * them. So only complain about these at debug
  324. * level.
  325. */
  326. ipath_dbg("Suppressed %u messages for %s\n",
  327. supp_msgs, msg);
  328. }
  329. }
  330. }
  331. static unsigned handle_frequent_errors(struct ipath_devdata *dd,
  332. ipath_err_t errs, char msg[512],
  333. int *noprint)
  334. {
  335. unsigned long nc;
  336. static unsigned long nextmsg_time;
  337. static unsigned nmsgs, supp_msgs;
  338. /*
  339. * Throttle back "fast" messages to no more than 10 per 5 seconds.
  340. * This isn't perfect, but it's a reasonable heuristic. If we get
  341. * more than 10, give a 6x longer delay.
  342. */
  343. nc = jiffies;
  344. if (nmsgs > 10) {
  345. if (time_before(nc, nextmsg_time)) {
  346. *noprint = 1;
  347. if (!supp_msgs++)
  348. nextmsg_time = nc + HZ * 3;
  349. }
  350. else if (supp_msgs) {
  351. handle_supp_msgs(dd, supp_msgs, msg);
  352. supp_msgs = 0;
  353. nmsgs = 0;
  354. }
  355. }
  356. else if (!nmsgs++ || time_after(nc, nextmsg_time))
  357. nextmsg_time = nc + HZ / 2;
  358. return supp_msgs;
  359. }
  360. static int handle_errors(struct ipath_devdata *dd, ipath_err_t errs)
  361. {
  362. char msg[512];
  363. u64 ignore_this_time = 0;
  364. int i;
  365. int chkerrpkts = 0, noprint = 0;
  366. unsigned supp_msgs;
  367. supp_msgs = handle_frequent_errors(dd, errs, msg, &noprint);
  368. /*
  369. * don't report errors that are masked (includes those always
  370. * ignored)
  371. */
  372. errs &= ~dd->ipath_maskederrs;
  373. /* do these first, they are most important */
  374. if (errs & INFINIPATH_E_HARDWARE) {
  375. /* reuse same msg buf */
  376. dd->ipath_f_handle_hwerrors(dd, msg, sizeof msg);
  377. }
  378. if (!noprint && (errs & ~infinipath_e_bitsextant))
  379. ipath_dev_err(dd, "error interrupt with unknown errors "
  380. "%llx set\n", (unsigned long long)
  381. (errs & ~infinipath_e_bitsextant));
  382. if (errs & E_SUM_ERRS)
  383. ignore_this_time = handle_e_sum_errs(dd, errs);
  384. else if ((errs & E_SUM_LINK_PKTERRS) &&
  385. !(dd->ipath_flags & IPATH_LINKACTIVE)) {
  386. /*
  387. * This can happen when SMA is trying to bring the link
  388. * up, but the IB link changes state at the "wrong" time.
  389. * The IB logic then complains that the packet isn't
  390. * valid. We don't want to confuse people, so we just
  391. * don't print them, except at debug
  392. */
  393. ipath_dbg("Ignoring packet errors %llx, because link not "
  394. "ACTIVE\n", (unsigned long long) errs);
  395. ignore_this_time = errs & E_SUM_LINK_PKTERRS;
  396. }
  397. if (supp_msgs == 250000) {
  398. /*
  399. * It's not entirely reasonable assuming that the errors set
  400. * in the last clear period are all responsible for the
  401. * problem, but the alternative is to assume it's the only
  402. * ones on this particular interrupt, which also isn't great
  403. */
  404. dd->ipath_maskederrs |= dd->ipath_lasterror | errs;
  405. ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
  406. ~dd->ipath_maskederrs);
  407. ipath_decode_err(msg, sizeof msg,
  408. (dd->ipath_maskederrs & ~dd->
  409. ipath_ignorederrs));
  410. if ((dd->ipath_maskederrs & ~dd->ipath_ignorederrs) &
  411. ~(INFINIPATH_E_RRCVEGRFULL | INFINIPATH_E_RRCVHDRFULL))
  412. ipath_dev_err(dd, "Disabling error(s) %llx because "
  413. "occurring too frequently (%s)\n",
  414. (unsigned long long)
  415. (dd->ipath_maskederrs &
  416. ~dd->ipath_ignorederrs), msg);
  417. else {
  418. /*
  419. * rcvegrfull and rcvhdrqfull are "normal",
  420. * for some types of processes (mostly benchmarks)
  421. * that send huge numbers of messages, while not
  422. * processing them. So only complain about
  423. * these at debug level.
  424. */
  425. ipath_dbg("Disabling frequent queue full errors "
  426. "(%s)\n", msg);
  427. }
  428. /*
  429. * Re-enable the masked errors after around 3 minutes. in
  430. * ipath_get_faststats(). If we have a series of fast
  431. * repeating but different errors, the interval will keep
  432. * stretching out, but that's OK, as that's pretty
  433. * catastrophic.
  434. */
  435. dd->ipath_unmasktime = jiffies + HZ * 180;
  436. }
  437. ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, errs);
  438. if (ignore_this_time)
  439. errs &= ~ignore_this_time;
  440. if (errs & ~dd->ipath_lasterror) {
  441. errs &= ~dd->ipath_lasterror;
  442. /* never suppress duplicate hwerrors or ibstatuschange */
  443. dd->ipath_lasterror |= errs &
  444. ~(INFINIPATH_E_HARDWARE |
  445. INFINIPATH_E_IBSTATUSCHANGED);
  446. }
  447. if (!errs)
  448. return 0;
  449. if (!noprint)
  450. /*
  451. * the ones we mask off are handled specially below or above
  452. */
  453. ipath_decode_err(msg, sizeof msg,
  454. errs & ~(INFINIPATH_E_IBSTATUSCHANGED |
  455. INFINIPATH_E_RRCVEGRFULL |
  456. INFINIPATH_E_RRCVHDRFULL |
  457. INFINIPATH_E_HARDWARE));
  458. else
  459. /* so we don't need if (!noprint) at strlcat's below */
  460. *msg = 0;
  461. if (errs & E_SUM_PKTERRS) {
  462. ipath_stats.sps_pkterrs++;
  463. chkerrpkts = 1;
  464. }
  465. if (errs & E_SUM_ERRS)
  466. ipath_stats.sps_errs++;
  467. if (errs & (INFINIPATH_E_RICRC | INFINIPATH_E_RVCRC)) {
  468. ipath_stats.sps_crcerrs++;
  469. chkerrpkts = 1;
  470. }
  471. /*
  472. * We don't want to print these two as they happen, or we can make
  473. * the situation even worse, because it takes so long to print
  474. * messages to serial consoles. Kernel ports get printed from
  475. * fast_stats, no more than every 5 seconds, user ports get printed
  476. * on close
  477. */
  478. if (errs & INFINIPATH_E_RRCVHDRFULL) {
  479. int any;
  480. u32 hd, tl;
  481. ipath_stats.sps_hdrqfull++;
  482. for (any = i = 0; i < dd->ipath_cfgports; i++) {
  483. struct ipath_portdata *pd = dd->ipath_pd[i];
  484. if (i == 0) {
  485. hd = dd->ipath_port0head;
  486. tl = (u32) le64_to_cpu(
  487. *dd->ipath_hdrqtailptr);
  488. } else if (pd && pd->port_cnt &&
  489. pd->port_rcvhdrtail_kvaddr) {
  490. /*
  491. * don't report same point multiple times,
  492. * except kernel
  493. */
  494. tl = (u32) * pd->port_rcvhdrtail_kvaddr;
  495. if (tl == dd->ipath_lastrcvhdrqtails[i])
  496. continue;
  497. hd = ipath_read_ureg32(dd, ur_rcvhdrhead,
  498. i);
  499. } else
  500. continue;
  501. if (hd == (tl + 1) ||
  502. (!hd && tl == dd->ipath_hdrqlast)) {
  503. if (i == 0)
  504. chkerrpkts = 1;
  505. dd->ipath_lastrcvhdrqtails[i] = tl;
  506. pd->port_hdrqfull++;
  507. }
  508. }
  509. }
  510. if (errs & INFINIPATH_E_RRCVEGRFULL) {
  511. /*
  512. * since this is of less importance and not likely to
  513. * happen without also getting hdrfull, only count
  514. * occurrences; don't check each port (or even the kernel
  515. * vs user)
  516. */
  517. ipath_stats.sps_etidfull++;
  518. if (dd->ipath_port0head !=
  519. (u32) le64_to_cpu(*dd->ipath_hdrqtailptr))
  520. chkerrpkts = 1;
  521. }
  522. /*
  523. * do this before IBSTATUSCHANGED, in case both bits set in a single
  524. * interrupt; we want the STATUSCHANGE to "win", so we do our
  525. * internal copy of state machine correctly
  526. */
  527. if (errs & INFINIPATH_E_RIBLOSTLINK) {
  528. /*
  529. * force through block below
  530. */
  531. errs |= INFINIPATH_E_IBSTATUSCHANGED;
  532. ipath_stats.sps_iblink++;
  533. dd->ipath_flags |= IPATH_LINKDOWN;
  534. dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT
  535. | IPATH_LINKARMED | IPATH_LINKACTIVE);
  536. *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY;
  537. if (!noprint) {
  538. u64 st = ipath_read_kreg64(
  539. dd, dd->ipath_kregs->kr_ibcstatus);
  540. ipath_dbg("Lost link, link now down (%s)\n",
  541. ipath_ibcstatus_str[st & 0xf]);
  542. }
  543. }
  544. if (errs & INFINIPATH_E_IBSTATUSCHANGED)
  545. handle_e_ibstatuschanged(dd, errs, noprint);
  546. if (errs & INFINIPATH_E_RESET) {
  547. if (!noprint)
  548. ipath_dev_err(dd, "Got reset, requires re-init "
  549. "(unload and reload driver)\n");
  550. dd->ipath_flags &= ~IPATH_INITTED; /* needs re-init */
  551. /* mark as having had error */
  552. *dd->ipath_statusp |= IPATH_STATUS_HWERROR;
  553. *dd->ipath_statusp &= ~IPATH_STATUS_IB_CONF;
  554. }
  555. if (!noprint && *msg)
  556. ipath_dev_err(dd, "%s error\n", msg);
  557. if (dd->ipath_sma_state_wanted & dd->ipath_flags) {
  558. ipath_cdbg(VERBOSE, "sma wanted state %x, iflags now %x, "
  559. "waking\n", dd->ipath_sma_state_wanted,
  560. dd->ipath_flags);
  561. wake_up_interruptible(&ipath_sma_state_wait);
  562. }
  563. return chkerrpkts;
  564. }
  565. /* this is separate to allow for better optimization of ipath_intr() */
  566. static void ipath_bad_intr(struct ipath_devdata *dd, u32 * unexpectp)
  567. {
  568. /*
  569. * sometimes happen during driver init and unload, don't want
  570. * to process any interrupts at that point
  571. */
  572. /* this is just a bandaid, not a fix, if something goes badly
  573. * wrong */
  574. if (++*unexpectp > 100) {
  575. if (++*unexpectp > 105) {
  576. /*
  577. * ok, we must be taking somebody else's interrupts,
  578. * due to a messed up mptable and/or PIRQ table, so
  579. * unregister the interrupt. We've seen this during
  580. * linuxbios development work, and it may happen in
  581. * the future again.
  582. */
  583. if (dd->pcidev && dd->pcidev->irq) {
  584. ipath_dev_err(dd, "Now %u unexpected "
  585. "interrupts, unregistering "
  586. "interrupt handler\n",
  587. *unexpectp);
  588. ipath_dbg("free_irq of irq %x\n",
  589. dd->pcidev->irq);
  590. free_irq(dd->pcidev->irq, dd);
  591. }
  592. }
  593. if (ipath_read_kreg32(dd, dd->ipath_kregs->kr_intmask)) {
  594. ipath_dev_err(dd, "%u unexpected interrupts, "
  595. "disabling interrupts completely\n",
  596. *unexpectp);
  597. /*
  598. * disable all interrupts, something is very wrong
  599. */
  600. ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask,
  601. 0ULL);
  602. }
  603. } else if (*unexpectp > 1)
  604. ipath_dbg("Interrupt when not ready, should not happen, "
  605. "ignoring\n");
  606. }
  607. static void ipath_bad_regread(struct ipath_devdata *dd)
  608. {
  609. static int allbits;
  610. /* separate routine, for better optimization of ipath_intr() */
  611. /*
  612. * We print the message and disable interrupts, in hope of
  613. * having a better chance of debugging the problem.
  614. */
  615. ipath_dev_err(dd,
  616. "Read of interrupt status failed (all bits set)\n");
  617. if (allbits++) {
  618. /* disable all interrupts, something is very wrong */
  619. ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
  620. if (allbits == 2) {
  621. ipath_dev_err(dd, "Still bad interrupt status, "
  622. "unregistering interrupt\n");
  623. free_irq(dd->pcidev->irq, dd);
  624. } else if (allbits > 2) {
  625. if ((allbits % 10000) == 0)
  626. printk(".");
  627. } else
  628. ipath_dev_err(dd, "Disabling interrupts, "
  629. "multiple errors\n");
  630. }
  631. }
  632. static void handle_port_pioavail(struct ipath_devdata *dd)
  633. {
  634. u32 i;
  635. /*
  636. * start from port 1, since for now port 0 is never using
  637. * wait_event for PIO
  638. */
  639. for (i = 1; dd->ipath_portpiowait && i < dd->ipath_cfgports; i++) {
  640. struct ipath_portdata *pd = dd->ipath_pd[i];
  641. if (pd && pd->port_cnt &&
  642. dd->ipath_portpiowait & (1U << i)) {
  643. clear_bit(i, &dd->ipath_portpiowait);
  644. if (test_bit(IPATH_PORT_WAITING_PIO,
  645. &pd->port_flag)) {
  646. clear_bit(IPATH_PORT_WAITING_PIO,
  647. &pd->port_flag);
  648. wake_up_interruptible(&pd->port_wait);
  649. }
  650. }
  651. }
  652. }
  653. static void handle_layer_pioavail(struct ipath_devdata *dd)
  654. {
  655. int ret;
  656. ret = __ipath_layer_intr(dd, IPATH_LAYER_INT_SEND_CONTINUE);
  657. if (ret > 0)
  658. goto set;
  659. ret = __ipath_verbs_piobufavail(dd);
  660. if (ret > 0)
  661. goto set;
  662. return;
  663. set:
  664. set_bit(IPATH_S_PIOINTBUFAVAIL, &dd->ipath_sendctrl);
  665. ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
  666. dd->ipath_sendctrl);
  667. }
  668. /*
  669. * Handle receive interrupts for user ports; this means a user
  670. * process was waiting for a packet to arrive, and didn't want
  671. * to poll
  672. */
  673. static void handle_urcv(struct ipath_devdata *dd, u32 istat)
  674. {
  675. u64 portr;
  676. int i;
  677. int rcvdint = 0;
  678. portr = ((istat >> INFINIPATH_I_RCVAVAIL_SHIFT) &
  679. infinipath_i_rcvavail_mask)
  680. | ((istat >> INFINIPATH_I_RCVURG_SHIFT) &
  681. infinipath_i_rcvurg_mask);
  682. for (i = 1; i < dd->ipath_cfgports; i++) {
  683. struct ipath_portdata *pd = dd->ipath_pd[i];
  684. if (portr & (1 << i) && pd && pd->port_cnt &&
  685. test_bit(IPATH_PORT_WAITING_RCV, &pd->port_flag)) {
  686. int rcbit;
  687. clear_bit(IPATH_PORT_WAITING_RCV,
  688. &pd->port_flag);
  689. rcbit = i + INFINIPATH_R_INTRAVAIL_SHIFT;
  690. clear_bit(1UL << rcbit, &dd->ipath_rcvctrl);
  691. wake_up_interruptible(&pd->port_wait);
  692. rcvdint = 1;
  693. }
  694. }
  695. if (rcvdint) {
  696. /* only want to take one interrupt, so turn off the rcv
  697. * interrupt for all the ports that we did the wakeup on
  698. * (but never for kernel port)
  699. */
  700. ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
  701. dd->ipath_rcvctrl);
  702. }
  703. }
  704. irqreturn_t ipath_intr(int irq, void *data, struct pt_regs *regs)
  705. {
  706. struct ipath_devdata *dd = data;
  707. u32 istat, chk0rcv = 0;
  708. ipath_err_t estat = 0;
  709. irqreturn_t ret;
  710. u32 oldhead, curtail;
  711. static unsigned unexpected = 0;
  712. static const u32 port0rbits = (1U<<INFINIPATH_I_RCVAVAIL_SHIFT) |
  713. (1U<<INFINIPATH_I_RCVURG_SHIFT);
  714. ipath_stats.sps_ints++;
  715. if (!(dd->ipath_flags & IPATH_PRESENT)) {
  716. /*
  717. * This return value is not great, but we do not want the
  718. * interrupt core code to remove our interrupt handler
  719. * because we don't appear to be handling an interrupt
  720. * during a chip reset.
  721. */
  722. return IRQ_HANDLED;
  723. }
  724. /*
  725. * this needs to be flags&initted, not statusp, so we keep
  726. * taking interrupts even after link goes down, etc.
  727. * Also, we *must* clear the interrupt at some point, or we won't
  728. * take it again, which can be real bad for errors, etc...
  729. */
  730. if (!(dd->ipath_flags & IPATH_INITTED)) {
  731. ipath_bad_intr(dd, &unexpected);
  732. ret = IRQ_NONE;
  733. goto bail;
  734. }
  735. /*
  736. * We try to avoid reading the interrupt status register, since
  737. * that's a PIO read, and stalls the processor for up to about
  738. * ~0.25 usec. The idea is that if we processed a port0 packet,
  739. * we blindly clear the port 0 receive interrupt bits, and nothing
  740. * else, then return. If other interrupts are pending, the chip
  741. * will re-interrupt us as soon as we write the intclear register.
  742. * We then won't process any more kernel packets (if not the 2nd
  743. * time, then the 3rd or 4th) and we'll then handle the other
  744. * interrupts. We clear the interrupts first so that we don't
  745. * lose intr for later packets that arrive while we are processing.
  746. */
  747. oldhead = dd->ipath_port0head;
  748. curtail = (u32)le64_to_cpu(*dd->ipath_hdrqtailptr);
  749. if (oldhead != curtail) {
  750. if (dd->ipath_flags & IPATH_GPIO_INTR) {
  751. ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_clear,
  752. (u64) (1 << 2));
  753. istat = port0rbits | INFINIPATH_I_GPIO;
  754. }
  755. else
  756. istat = port0rbits;
  757. ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, istat);
  758. ipath_kreceive(dd);
  759. if (oldhead != dd->ipath_port0head) {
  760. ipath_stats.sps_fastrcvint++;
  761. goto done;
  762. }
  763. }
  764. istat = ipath_read_kreg32(dd, dd->ipath_kregs->kr_intstatus);
  765. if (unlikely(!istat)) {
  766. ipath_stats.sps_nullintr++;
  767. ret = IRQ_NONE; /* not our interrupt, or already handled */
  768. goto bail;
  769. }
  770. if (unlikely(istat == -1)) {
  771. ipath_bad_regread(dd);
  772. /* don't know if it was our interrupt or not */
  773. ret = IRQ_NONE;
  774. goto bail;
  775. }
  776. if (unexpected)
  777. unexpected = 0;
  778. if (unlikely(istat & ~infinipath_i_bitsextant))
  779. ipath_dev_err(dd,
  780. "interrupt with unknown interrupts %x set\n",
  781. istat & (u32) ~ infinipath_i_bitsextant);
  782. else
  783. ipath_cdbg(VERBOSE, "intr stat=0x%x\n", istat);
  784. if (unlikely(istat & INFINIPATH_I_ERROR)) {
  785. ipath_stats.sps_errints++;
  786. estat = ipath_read_kreg64(dd,
  787. dd->ipath_kregs->kr_errorstatus);
  788. if (!estat)
  789. dev_info(&dd->pcidev->dev, "error interrupt (%x), "
  790. "but no error bits set!\n", istat);
  791. else if (estat == -1LL)
  792. /*
  793. * should we try clearing all, or hope next read
  794. * works?
  795. */
  796. ipath_dev_err(dd, "Read of error status failed "
  797. "(all bits set); ignoring\n");
  798. else
  799. if (handle_errors(dd, estat))
  800. /* force calling ipath_kreceive() */
  801. chk0rcv = 1;
  802. }
  803. if (istat & INFINIPATH_I_GPIO) {
  804. /*
  805. * Packets are available in the port 0 rcv queue.
  806. * Eventually this needs to be generalized to check
  807. * IPATH_GPIO_INTR, and the specific GPIO bit, if
  808. * GPIO interrupts are used for anything else.
  809. */
  810. if (unlikely(!(dd->ipath_flags & IPATH_GPIO_INTR))) {
  811. u32 gpiostatus;
  812. gpiostatus = ipath_read_kreg32(
  813. dd, dd->ipath_kregs->kr_gpio_status);
  814. ipath_dbg("Unexpected GPIO interrupt bits %x\n",
  815. gpiostatus);
  816. ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_clear,
  817. gpiostatus);
  818. }
  819. else {
  820. /* Clear GPIO status bit 2 */
  821. ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_clear,
  822. (u64) (1 << 2));
  823. chk0rcv = 1;
  824. }
  825. }
  826. chk0rcv |= istat & port0rbits;
  827. /*
  828. * Clear the interrupt bits we found set, unless they are receive
  829. * related, in which case we already cleared them above, and don't
  830. * want to clear them again, because we might lose an interrupt.
  831. * Clear it early, so we "know" know the chip will have seen this by
  832. * the time we process the queue, and will re-interrupt if necessary.
  833. * The processor itself won't take the interrupt again until we return.
  834. */
  835. ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, istat);
  836. /*
  837. * handle port0 receive before checking for pio buffers available,
  838. * since receives can overflow; piobuf waiters can afford a few
  839. * extra cycles, since they were waiting anyway, and user's waiting
  840. * for receive are at the bottom.
  841. */
  842. if (chk0rcv) {
  843. ipath_kreceive(dd);
  844. istat &= ~port0rbits;
  845. }
  846. if (istat & ((infinipath_i_rcvavail_mask <<
  847. INFINIPATH_I_RCVAVAIL_SHIFT)
  848. | (infinipath_i_rcvurg_mask <<
  849. INFINIPATH_I_RCVURG_SHIFT)))
  850. handle_urcv(dd, istat);
  851. if (istat & INFINIPATH_I_SPIOBUFAVAIL) {
  852. clear_bit(IPATH_S_PIOINTBUFAVAIL, &dd->ipath_sendctrl);
  853. ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
  854. dd->ipath_sendctrl);
  855. if (dd->ipath_portpiowait)
  856. handle_port_pioavail(dd);
  857. handle_layer_pioavail(dd);
  858. }
  859. done:
  860. ret = IRQ_HANDLED;
  861. bail:
  862. return ret;
  863. }