omap-rng.c 4.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208
  1. /*
  2. * driver/char/hw_random/omap-rng.c
  3. *
  4. * RNG driver for TI OMAP CPU family
  5. *
  6. * Author: Deepak Saxena <dsaxena@plexity.net>
  7. *
  8. * Copyright 2005 (c) MontaVista Software, Inc.
  9. *
  10. * Mostly based on original driver:
  11. *
  12. * Copyright (C) 2005 Nokia Corporation
  13. * Author: Juha Yrj��<juha.yrjola@nokia.com>
  14. *
  15. * This file is licensed under the terms of the GNU General Public
  16. * License version 2. This program is licensed "as is" without any
  17. * warranty of any kind, whether express or implied.
  18. *
  19. * TODO:
  20. *
  21. * - Make status updated be interrupt driven so we don't poll
  22. *
  23. */
  24. #include <linux/module.h>
  25. #include <linux/init.h>
  26. #include <linux/random.h>
  27. #include <linux/err.h>
  28. #include <linux/device.h>
  29. #include <linux/hw_random.h>
  30. #include <asm/io.h>
  31. #include <asm/hardware/clock.h>
  32. #define RNG_OUT_REG 0x00 /* Output register */
  33. #define RNG_STAT_REG 0x04 /* Status register
  34. [0] = STAT_BUSY */
  35. #define RNG_ALARM_REG 0x24 /* Alarm register
  36. [7:0] = ALARM_COUNTER */
  37. #define RNG_CONFIG_REG 0x28 /* Configuration register
  38. [11:6] = RESET_COUNT
  39. [5:3] = RING2_DELAY
  40. [2:0] = RING1_DELAY */
  41. #define RNG_REV_REG 0x3c /* Revision register
  42. [7:0] = REV_NB */
  43. #define RNG_MASK_REG 0x40 /* Mask and reset register
  44. [2] = IT_EN
  45. [1] = SOFTRESET
  46. [0] = AUTOIDLE */
  47. #define RNG_SYSSTATUS 0x44 /* System status
  48. [0] = RESETDONE */
  49. static void __iomem *rng_base;
  50. static struct clk *rng_ick;
  51. static struct device *rng_dev;
  52. static u32 omap_rng_read_reg(int reg)
  53. {
  54. return __raw_readl(rng_base + reg);
  55. }
  56. static void omap_rng_write_reg(int reg, u32 val)
  57. {
  58. __raw_writel(val, rng_base + reg);
  59. }
  60. /* REVISIT: Does the status bit really work on 16xx? */
  61. static int omap_rng_data_present(struct hwrng *rng)
  62. {
  63. return omap_rng_read_reg(RNG_STAT_REG) ? 0 : 1;
  64. }
  65. static int omap_rng_data_read(struct hwrng *rng, u32 *data)
  66. {
  67. *data = omap_rng_read_reg(RNG_OUT_REG);
  68. return 4;
  69. }
  70. static struct hwrng omap_rng_ops = {
  71. .name = "omap",
  72. .data_present = omap_rng_data_present,
  73. .data_read = omap_rng_data_read,
  74. };
  75. static int __init omap_rng_probe(struct device *dev)
  76. {
  77. struct platform_device *pdev = to_platform_device(dev);
  78. struct resource *res, *mem;
  79. int ret;
  80. /*
  81. * A bit ugly, and it will never actually happen but there can
  82. * be only one RNG and this catches any bork
  83. */
  84. BUG_ON(rng_dev);
  85. if (cpu_is_omap24xx()) {
  86. rng_ick = clk_get(NULL, "rng_ick");
  87. if (IS_ERR(rng_ick)) {
  88. dev_err(dev, "Could not get rng_ick\n");
  89. ret = PTR_ERR(rng_ick);
  90. return ret;
  91. }
  92. else {
  93. clk_use(rng_ick);
  94. }
  95. }
  96. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  97. if (!res)
  98. return -ENOENT;
  99. mem = request_mem_region(res->start, res->end - res->start + 1,
  100. pdev->name);
  101. if (mem == NULL)
  102. return -EBUSY;
  103. dev_set_drvdata(dev, mem);
  104. rng_base = (u32 __iomem *)io_p2v(res->start);
  105. ret = hwrng_register(&omap_rng_ops);
  106. if (ret) {
  107. release_resource(mem);
  108. rng_base = NULL;
  109. return ret;
  110. }
  111. dev_info(dev, "OMAP Random Number Generator ver. %02x\n",
  112. omap_rng_read_reg(RNG_REV_REG));
  113. omap_rng_write_reg(RNG_MASK_REG, 0x1);
  114. rng_dev = dev;
  115. return 0;
  116. }
  117. static int __exit omap_rng_remove(struct device *dev)
  118. {
  119. struct resource *mem = dev_get_drvdata(dev);
  120. hwrng_unregister(&omap_rng_ops);
  121. omap_rng_write_reg(RNG_MASK_REG, 0x0);
  122. if (cpu_is_omap24xx()) {
  123. clk_unuse(rng_ick);
  124. clk_put(rng_ick);
  125. }
  126. release_resource(mem);
  127. rng_base = NULL;
  128. return 0;
  129. }
  130. #ifdef CONFIG_PM
  131. static int omap_rng_suspend(struct device *dev, pm_message_t message, u32 level)
  132. {
  133. omap_rng_write_reg(RNG_MASK_REG, 0x0);
  134. return 0;
  135. }
  136. static int omap_rng_resume(struct device *dev, pm_message_t message, u32 level)
  137. {
  138. omap_rng_write_reg(RNG_MASK_REG, 0x1);
  139. return 1;
  140. }
  141. #else
  142. #define omap_rng_suspend NULL
  143. #define omap_rng_resume NULL
  144. #endif
  145. static struct device_driver omap_rng_driver = {
  146. .name = "omap_rng",
  147. .bus = &platform_bus_type,
  148. .probe = omap_rng_probe,
  149. .remove = __exit_p(omap_rng_remove),
  150. .suspend = omap_rng_suspend,
  151. .resume = omap_rng_resume
  152. };
  153. static int __init omap_rng_init(void)
  154. {
  155. if (!cpu_is_omap16xx() && !cpu_is_omap24xx())
  156. return -ENODEV;
  157. return driver_register(&omap_rng_driver);
  158. }
  159. static void __exit omap_rng_exit(void)
  160. {
  161. driver_unregister(&omap_rng_driver);
  162. }
  163. module_init(omap_rng_init);
  164. module_exit(omap_rng_exit);
  165. MODULE_AUTHOR("Deepak Saxena (and others)");
  166. MODULE_LICENSE("GPL");