setup.c 19 KB

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  1. /*
  2. * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
  3. * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
  4. *
  5. * Description:
  6. * Architecture- / platform-specific boot-time initialization code for
  7. * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
  8. * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
  9. * <dan@net4x.com>.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version
  14. * 2 of the License, or (at your option) any later version.
  15. */
  16. #undef DEBUG
  17. #include <linux/init.h>
  18. #include <linux/threads.h>
  19. #include <linux/smp.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/initrd.h>
  23. #include <linux/seq_file.h>
  24. #include <linux/kdev_t.h>
  25. #include <linux/major.h>
  26. #include <linux/root_dev.h>
  27. #include <linux/kernel.h>
  28. #include <asm/processor.h>
  29. #include <asm/machdep.h>
  30. #include <asm/page.h>
  31. #include <asm/mmu.h>
  32. #include <asm/pgtable.h>
  33. #include <asm/mmu_context.h>
  34. #include <asm/cputable.h>
  35. #include <asm/sections.h>
  36. #include <asm/iommu.h>
  37. #include <asm/firmware.h>
  38. #include <asm/system.h>
  39. #include <asm/time.h>
  40. #include <asm/paca.h>
  41. #include <asm/cache.h>
  42. #include <asm/sections.h>
  43. #include <asm/abs_addr.h>
  44. #include <asm/iseries/hv_lp_config.h>
  45. #include <asm/iseries/hv_call_event.h>
  46. #include <asm/iseries/hv_call_xm.h>
  47. #include <asm/iseries/it_lp_queue.h>
  48. #include <asm/iseries/mf.h>
  49. #include <asm/iseries/hv_lp_event.h>
  50. #include <asm/iseries/lpar_map.h>
  51. #include <asm/udbg.h>
  52. #include <asm/irq.h>
  53. #include "naca.h"
  54. #include "setup.h"
  55. #include "irq.h"
  56. #include "vpd_areas.h"
  57. #include "processor_vpd.h"
  58. #include "main_store.h"
  59. #include "call_sm.h"
  60. #include "call_hpt.h"
  61. #ifdef DEBUG
  62. #define DBG(fmt...) udbg_printf(fmt)
  63. #else
  64. #define DBG(fmt...)
  65. #endif
  66. /* Function Prototypes */
  67. static unsigned long build_iSeries_Memory_Map(void);
  68. static void iseries_shared_idle(void);
  69. static void iseries_dedicated_idle(void);
  70. #ifdef CONFIG_PCI
  71. extern void iSeries_pci_final_fixup(void);
  72. #else
  73. static void iSeries_pci_final_fixup(void) { }
  74. #endif
  75. extern int rd_size; /* Defined in drivers/block/rd.c */
  76. extern unsigned long iSeries_recal_tb;
  77. extern unsigned long iSeries_recal_titan;
  78. struct MemoryBlock {
  79. unsigned long absStart;
  80. unsigned long absEnd;
  81. unsigned long logicalStart;
  82. unsigned long logicalEnd;
  83. };
  84. /*
  85. * Process the main store vpd to determine where the holes in memory are
  86. * and return the number of physical blocks and fill in the array of
  87. * block data.
  88. */
  89. static unsigned long iSeries_process_Condor_mainstore_vpd(
  90. struct MemoryBlock *mb_array, unsigned long max_entries)
  91. {
  92. unsigned long holeFirstChunk, holeSizeChunks;
  93. unsigned long numMemoryBlocks = 1;
  94. struct IoHriMainStoreSegment4 *msVpd =
  95. (struct IoHriMainStoreSegment4 *)xMsVpd;
  96. unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
  97. unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
  98. unsigned long holeSize = holeEnd - holeStart;
  99. printk("Mainstore_VPD: Condor\n");
  100. /*
  101. * Determine if absolute memory has any
  102. * holes so that we can interpret the
  103. * access map we get back from the hypervisor
  104. * correctly.
  105. */
  106. mb_array[0].logicalStart = 0;
  107. mb_array[0].logicalEnd = 0x100000000;
  108. mb_array[0].absStart = 0;
  109. mb_array[0].absEnd = 0x100000000;
  110. if (holeSize) {
  111. numMemoryBlocks = 2;
  112. holeStart = holeStart & 0x000fffffffffffff;
  113. holeStart = addr_to_chunk(holeStart);
  114. holeFirstChunk = holeStart;
  115. holeSize = addr_to_chunk(holeSize);
  116. holeSizeChunks = holeSize;
  117. printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
  118. holeFirstChunk, holeSizeChunks );
  119. mb_array[0].logicalEnd = holeFirstChunk;
  120. mb_array[0].absEnd = holeFirstChunk;
  121. mb_array[1].logicalStart = holeFirstChunk;
  122. mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
  123. mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
  124. mb_array[1].absEnd = 0x100000000;
  125. }
  126. return numMemoryBlocks;
  127. }
  128. #define MaxSegmentAreas 32
  129. #define MaxSegmentAdrRangeBlocks 128
  130. #define MaxAreaRangeBlocks 4
  131. static unsigned long iSeries_process_Regatta_mainstore_vpd(
  132. struct MemoryBlock *mb_array, unsigned long max_entries)
  133. {
  134. struct IoHriMainStoreSegment5 *msVpdP =
  135. (struct IoHriMainStoreSegment5 *)xMsVpd;
  136. unsigned long numSegmentBlocks = 0;
  137. u32 existsBits = msVpdP->msAreaExists;
  138. unsigned long area_num;
  139. printk("Mainstore_VPD: Regatta\n");
  140. for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
  141. unsigned long numAreaBlocks;
  142. struct IoHriMainStoreArea4 *currentArea;
  143. if (existsBits & 0x80000000) {
  144. unsigned long block_num;
  145. currentArea = &msVpdP->msAreaArray[area_num];
  146. numAreaBlocks = currentArea->numAdrRangeBlocks;
  147. printk("ms_vpd: processing area %2ld blocks=%ld",
  148. area_num, numAreaBlocks);
  149. for (block_num = 0; block_num < numAreaBlocks;
  150. ++block_num ) {
  151. /* Process an address range block */
  152. struct MemoryBlock tempBlock;
  153. unsigned long i;
  154. tempBlock.absStart =
  155. (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
  156. tempBlock.absEnd =
  157. (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
  158. tempBlock.logicalStart = 0;
  159. tempBlock.logicalEnd = 0;
  160. printk("\n block %ld absStart=%016lx absEnd=%016lx",
  161. block_num, tempBlock.absStart,
  162. tempBlock.absEnd);
  163. for (i = 0; i < numSegmentBlocks; ++i) {
  164. if (mb_array[i].absStart ==
  165. tempBlock.absStart)
  166. break;
  167. }
  168. if (i == numSegmentBlocks) {
  169. if (numSegmentBlocks == max_entries)
  170. panic("iSeries_process_mainstore_vpd: too many memory blocks");
  171. mb_array[numSegmentBlocks] = tempBlock;
  172. ++numSegmentBlocks;
  173. } else
  174. printk(" (duplicate)");
  175. }
  176. printk("\n");
  177. }
  178. existsBits <<= 1;
  179. }
  180. /* Now sort the blocks found into ascending sequence */
  181. if (numSegmentBlocks > 1) {
  182. unsigned long m, n;
  183. for (m = 0; m < numSegmentBlocks - 1; ++m) {
  184. for (n = numSegmentBlocks - 1; m < n; --n) {
  185. if (mb_array[n].absStart <
  186. mb_array[n-1].absStart) {
  187. struct MemoryBlock tempBlock;
  188. tempBlock = mb_array[n];
  189. mb_array[n] = mb_array[n-1];
  190. mb_array[n-1] = tempBlock;
  191. }
  192. }
  193. }
  194. }
  195. /*
  196. * Assign "logical" addresses to each block. These
  197. * addresses correspond to the hypervisor "bitmap" space.
  198. * Convert all addresses into units of 256K chunks.
  199. */
  200. {
  201. unsigned long i, nextBitmapAddress;
  202. printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
  203. nextBitmapAddress = 0;
  204. for (i = 0; i < numSegmentBlocks; ++i) {
  205. unsigned long length = mb_array[i].absEnd -
  206. mb_array[i].absStart;
  207. mb_array[i].logicalStart = nextBitmapAddress;
  208. mb_array[i].logicalEnd = nextBitmapAddress + length;
  209. nextBitmapAddress += length;
  210. printk(" Bitmap range: %016lx - %016lx\n"
  211. " Absolute range: %016lx - %016lx\n",
  212. mb_array[i].logicalStart,
  213. mb_array[i].logicalEnd,
  214. mb_array[i].absStart, mb_array[i].absEnd);
  215. mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
  216. 0x000fffffffffffff);
  217. mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
  218. 0x000fffffffffffff);
  219. mb_array[i].logicalStart =
  220. addr_to_chunk(mb_array[i].logicalStart);
  221. mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
  222. }
  223. }
  224. return numSegmentBlocks;
  225. }
  226. static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
  227. unsigned long max_entries)
  228. {
  229. unsigned long i;
  230. unsigned long mem_blocks = 0;
  231. if (cpu_has_feature(CPU_FTR_SLB))
  232. mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
  233. max_entries);
  234. else
  235. mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
  236. max_entries);
  237. printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
  238. for (i = 0; i < mem_blocks; ++i) {
  239. printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
  240. " abs chunks %016lx - %016lx\n",
  241. i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
  242. mb_array[i].absStart, mb_array[i].absEnd);
  243. }
  244. return mem_blocks;
  245. }
  246. static void __init iSeries_get_cmdline(void)
  247. {
  248. char *p, *q;
  249. /* copy the command line parameter from the primary VSP */
  250. HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
  251. HvLpDma_Direction_RemoteToLocal);
  252. p = cmd_line;
  253. q = cmd_line + 255;
  254. while(p < q) {
  255. if (!*p || *p == '\n')
  256. break;
  257. ++p;
  258. }
  259. *p = 0;
  260. }
  261. static void __init iSeries_init_early(void)
  262. {
  263. DBG(" -> iSeries_init_early()\n");
  264. #if defined(CONFIG_BLK_DEV_INITRD)
  265. /*
  266. * If the init RAM disk has been configured and there is
  267. * a non-zero starting address for it, set it up
  268. */
  269. if (naca.xRamDisk) {
  270. initrd_start = (unsigned long)__va(naca.xRamDisk);
  271. initrd_end = initrd_start + naca.xRamDiskSize * HW_PAGE_SIZE;
  272. initrd_below_start_ok = 1; // ramdisk in kernel space
  273. ROOT_DEV = Root_RAM0;
  274. if (((rd_size * 1024) / HW_PAGE_SIZE) < naca.xRamDiskSize)
  275. rd_size = (naca.xRamDiskSize * HW_PAGE_SIZE) / 1024;
  276. } else
  277. #endif /* CONFIG_BLK_DEV_INITRD */
  278. {
  279. /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
  280. }
  281. iSeries_recal_tb = get_tb();
  282. iSeries_recal_titan = HvCallXm_loadTod();
  283. /*
  284. * Initialize the DMA/TCE management
  285. */
  286. iommu_init_early_iSeries();
  287. /* Initialize machine-dependency vectors */
  288. #ifdef CONFIG_SMP
  289. smp_init_iSeries();
  290. #endif
  291. /* Associate Lp Event Queue 0 with processor 0 */
  292. HvCallEvent_setLpEventQueueInterruptProc(0, 0);
  293. mf_init();
  294. /* If we were passed an initrd, set the ROOT_DEV properly if the values
  295. * look sensible. If not, clear initrd reference.
  296. */
  297. #ifdef CONFIG_BLK_DEV_INITRD
  298. if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
  299. initrd_end > initrd_start)
  300. ROOT_DEV = Root_RAM0;
  301. else
  302. initrd_start = initrd_end = 0;
  303. #endif /* CONFIG_BLK_DEV_INITRD */
  304. DBG(" <- iSeries_init_early()\n");
  305. }
  306. struct mschunks_map mschunks_map = {
  307. /* XXX We don't use these, but Piranha might need them. */
  308. .chunk_size = MSCHUNKS_CHUNK_SIZE,
  309. .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
  310. .chunk_mask = MSCHUNKS_OFFSET_MASK,
  311. };
  312. EXPORT_SYMBOL(mschunks_map);
  313. void mschunks_alloc(unsigned long num_chunks)
  314. {
  315. klimit = _ALIGN(klimit, sizeof(u32));
  316. mschunks_map.mapping = (u32 *)klimit;
  317. klimit += num_chunks * sizeof(u32);
  318. mschunks_map.num_chunks = num_chunks;
  319. }
  320. /*
  321. * The iSeries may have very large memories ( > 128 GB ) and a partition
  322. * may get memory in "chunks" that may be anywhere in the 2**52 real
  323. * address space. The chunks are 256K in size. To map this to the
  324. * memory model Linux expects, the AS/400 specific code builds a
  325. * translation table to translate what Linux thinks are "physical"
  326. * addresses to the actual real addresses. This allows us to make
  327. * it appear to Linux that we have contiguous memory starting at
  328. * physical address zero while in fact this could be far from the truth.
  329. * To avoid confusion, I'll let the words physical and/or real address
  330. * apply to the Linux addresses while I'll use "absolute address" to
  331. * refer to the actual hardware real address.
  332. *
  333. * build_iSeries_Memory_Map gets information from the Hypervisor and
  334. * looks at the Main Store VPD to determine the absolute addresses
  335. * of the memory that has been assigned to our partition and builds
  336. * a table used to translate Linux's physical addresses to these
  337. * absolute addresses. Absolute addresses are needed when
  338. * communicating with the hypervisor (e.g. to build HPT entries)
  339. *
  340. * Returns the physical memory size
  341. */
  342. static unsigned long __init build_iSeries_Memory_Map(void)
  343. {
  344. u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
  345. u32 nextPhysChunk;
  346. u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
  347. u32 totalChunks,moreChunks;
  348. u32 currChunk, thisChunk, absChunk;
  349. u32 currDword;
  350. u32 chunkBit;
  351. u64 map;
  352. struct MemoryBlock mb[32];
  353. unsigned long numMemoryBlocks, curBlock;
  354. /* Chunk size on iSeries is 256K bytes */
  355. totalChunks = (u32)HvLpConfig_getMsChunks();
  356. mschunks_alloc(totalChunks);
  357. /*
  358. * Get absolute address of our load area
  359. * and map it to physical address 0
  360. * This guarantees that the loadarea ends up at physical 0
  361. * otherwise, it might not be returned by PLIC as the first
  362. * chunks
  363. */
  364. loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
  365. loadAreaSize = itLpNaca.xLoadAreaChunks;
  366. /*
  367. * Only add the pages already mapped here.
  368. * Otherwise we might add the hpt pages
  369. * The rest of the pages of the load area
  370. * aren't in the HPT yet and can still
  371. * be assigned an arbitrary physical address
  372. */
  373. if ((loadAreaSize * 64) > HvPagesToMap)
  374. loadAreaSize = HvPagesToMap / 64;
  375. loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
  376. /*
  377. * TODO Do we need to do something if the HPT is in the 64MB load area?
  378. * This would be required if the itLpNaca.xLoadAreaChunks includes
  379. * the HPT size
  380. */
  381. printk("Mapping load area - physical addr = 0000000000000000\n"
  382. " absolute addr = %016lx\n",
  383. chunk_to_addr(loadAreaFirstChunk));
  384. printk("Load area size %dK\n", loadAreaSize * 256);
  385. for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
  386. mschunks_map.mapping[nextPhysChunk] =
  387. loadAreaFirstChunk + nextPhysChunk;
  388. /*
  389. * Get absolute address of our HPT and remember it so
  390. * we won't map it to any physical address
  391. */
  392. hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
  393. hptSizePages = (u32)HvCallHpt_getHptPages();
  394. hptSizeChunks = hptSizePages >>
  395. (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
  396. hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
  397. printk("HPT absolute addr = %016lx, size = %dK\n",
  398. chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
  399. /*
  400. * Determine if absolute memory has any
  401. * holes so that we can interpret the
  402. * access map we get back from the hypervisor
  403. * correctly.
  404. */
  405. numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
  406. /*
  407. * Process the main store access map from the hypervisor
  408. * to build up our physical -> absolute translation table
  409. */
  410. curBlock = 0;
  411. currChunk = 0;
  412. currDword = 0;
  413. moreChunks = totalChunks;
  414. while (moreChunks) {
  415. map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
  416. currDword);
  417. thisChunk = currChunk;
  418. while (map) {
  419. chunkBit = map >> 63;
  420. map <<= 1;
  421. if (chunkBit) {
  422. --moreChunks;
  423. while (thisChunk >= mb[curBlock].logicalEnd) {
  424. ++curBlock;
  425. if (curBlock >= numMemoryBlocks)
  426. panic("out of memory blocks");
  427. }
  428. if (thisChunk < mb[curBlock].logicalStart)
  429. panic("memory block error");
  430. absChunk = mb[curBlock].absStart +
  431. (thisChunk - mb[curBlock].logicalStart);
  432. if (((absChunk < hptFirstChunk) ||
  433. (absChunk > hptLastChunk)) &&
  434. ((absChunk < loadAreaFirstChunk) ||
  435. (absChunk > loadAreaLastChunk))) {
  436. mschunks_map.mapping[nextPhysChunk] =
  437. absChunk;
  438. ++nextPhysChunk;
  439. }
  440. }
  441. ++thisChunk;
  442. }
  443. ++currDword;
  444. currChunk += 64;
  445. }
  446. /*
  447. * main store size (in chunks) is
  448. * totalChunks - hptSizeChunks
  449. * which should be equal to
  450. * nextPhysChunk
  451. */
  452. return chunk_to_addr(nextPhysChunk);
  453. }
  454. /*
  455. * Document me.
  456. */
  457. static void __init iSeries_setup_arch(void)
  458. {
  459. if (get_lppaca()->shared_proc) {
  460. ppc_md.idle_loop = iseries_shared_idle;
  461. printk(KERN_DEBUG "Using shared processor idle loop\n");
  462. } else {
  463. ppc_md.idle_loop = iseries_dedicated_idle;
  464. printk(KERN_DEBUG "Using dedicated idle loop\n");
  465. }
  466. /* Setup the Lp Event Queue */
  467. setup_hvlpevent_queue();
  468. printk("Max logical processors = %d\n",
  469. itVpdAreas.xSlicMaxLogicalProcs);
  470. printk("Max physical processors = %d\n",
  471. itVpdAreas.xSlicMaxPhysicalProcs);
  472. }
  473. static void iSeries_show_cpuinfo(struct seq_file *m)
  474. {
  475. seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
  476. }
  477. static void __init iSeries_progress(char * st, unsigned short code)
  478. {
  479. printk("Progress: [%04x] - %s\n", (unsigned)code, st);
  480. mf_display_progress(code);
  481. }
  482. static void __init iSeries_fixup_klimit(void)
  483. {
  484. /*
  485. * Change klimit to take into account any ram disk
  486. * that may be included
  487. */
  488. if (naca.xRamDisk)
  489. klimit = KERNELBASE + (u64)naca.xRamDisk +
  490. (naca.xRamDiskSize * HW_PAGE_SIZE);
  491. }
  492. static int __init iSeries_src_init(void)
  493. {
  494. /* clear the progress line */
  495. ppc_md.progress(" ", 0xffff);
  496. return 0;
  497. }
  498. late_initcall(iSeries_src_init);
  499. static inline void process_iSeries_events(void)
  500. {
  501. asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
  502. }
  503. static void yield_shared_processor(void)
  504. {
  505. unsigned long tb;
  506. HvCall_setEnabledInterrupts(HvCall_MaskIPI |
  507. HvCall_MaskLpEvent |
  508. HvCall_MaskLpProd |
  509. HvCall_MaskTimeout);
  510. tb = get_tb();
  511. /* Compute future tb value when yield should expire */
  512. HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
  513. /*
  514. * The decrementer stops during the yield. Force a fake decrementer
  515. * here and let the timer_interrupt code sort out the actual time.
  516. */
  517. get_lppaca()->int_dword.fields.decr_int = 1;
  518. ppc64_runlatch_on();
  519. process_iSeries_events();
  520. }
  521. static void iseries_shared_idle(void)
  522. {
  523. while (1) {
  524. while (!need_resched() && !hvlpevent_is_pending()) {
  525. local_irq_disable();
  526. ppc64_runlatch_off();
  527. /* Recheck with irqs off */
  528. if (!need_resched() && !hvlpevent_is_pending())
  529. yield_shared_processor();
  530. HMT_medium();
  531. local_irq_enable();
  532. }
  533. ppc64_runlatch_on();
  534. if (hvlpevent_is_pending())
  535. process_iSeries_events();
  536. preempt_enable_no_resched();
  537. schedule();
  538. preempt_disable();
  539. }
  540. }
  541. static void iseries_dedicated_idle(void)
  542. {
  543. set_thread_flag(TIF_POLLING_NRFLAG);
  544. while (1) {
  545. if (!need_resched()) {
  546. while (!need_resched()) {
  547. ppc64_runlatch_off();
  548. HMT_low();
  549. if (hvlpevent_is_pending()) {
  550. HMT_medium();
  551. ppc64_runlatch_on();
  552. process_iSeries_events();
  553. }
  554. }
  555. HMT_medium();
  556. }
  557. ppc64_runlatch_on();
  558. preempt_enable_no_resched();
  559. schedule();
  560. preempt_disable();
  561. }
  562. }
  563. #ifndef CONFIG_PCI
  564. void __init iSeries_init_IRQ(void) { }
  565. #endif
  566. static int __init iseries_probe(void)
  567. {
  568. unsigned long root = of_get_flat_dt_root();
  569. if (!of_flat_dt_is_compatible(root, "IBM,iSeries"))
  570. return 0;
  571. powerpc_firmware_features |= FW_FEATURE_ISERIES;
  572. powerpc_firmware_features |= FW_FEATURE_LPAR;
  573. hpte_init_iSeries();
  574. return 1;
  575. }
  576. define_machine(iseries) {
  577. .name = "iSeries",
  578. .setup_arch = iSeries_setup_arch,
  579. .show_cpuinfo = iSeries_show_cpuinfo,
  580. .init_IRQ = iSeries_init_IRQ,
  581. .get_irq = iSeries_get_irq,
  582. .init_early = iSeries_init_early,
  583. .pcibios_fixup = iSeries_pci_final_fixup,
  584. .restart = mf_reboot,
  585. .power_off = mf_power_off,
  586. .halt = mf_power_off,
  587. .get_boot_time = iSeries_get_boot_time,
  588. .set_rtc_time = iSeries_set_rtc_time,
  589. .get_rtc_time = iSeries_get_rtc_time,
  590. .calibrate_decr = generic_calibrate_decr,
  591. .progress = iSeries_progress,
  592. .probe = iseries_probe,
  593. /* XXX Implement enable_pmcs for iSeries */
  594. };
  595. void * __init iSeries_early_setup(void)
  596. {
  597. unsigned long phys_mem_size;
  598. iSeries_fixup_klimit();
  599. /*
  600. * Initialize the table which translate Linux physical addresses to
  601. * AS/400 absolute addresses
  602. */
  603. phys_mem_size = build_iSeries_Memory_Map();
  604. iSeries_get_cmdline();
  605. return (void *) __pa(build_flat_dt(phys_mem_size));
  606. }
  607. static void hvputc(char c)
  608. {
  609. if (c == '\n')
  610. hvputc('\r');
  611. HvCall_writeLogBuffer(&c, 1);
  612. }
  613. void __init udbg_init_iseries(void)
  614. {
  615. udbg_putc = hvputc;
  616. }