it8172_setup.c 9.2 KB

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  1. /*
  2. * BRIEF MODULE DESCRIPTION
  3. * IT8172/QED5231 board setup.
  4. *
  5. * Copyright 2000 MontaVista Software Inc.
  6. * Author: MontaVista Software, Inc.
  7. * ppopov@mvista.com or source@mvista.com
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  15. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  16. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  17. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  18. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  19. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  20. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  21. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  22. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  23. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24. *
  25. * You should have received a copy of the GNU General Public License along
  26. * with this program; if not, write to the Free Software Foundation, Inc.,
  27. * 675 Mass Ave, Cambridge, MA 02139, USA.
  28. */
  29. #include <linux/init.h>
  30. #include <linux/sched.h>
  31. #include <linux/ioport.h>
  32. #include <linux/serial_reg.h>
  33. #include <linux/major.h>
  34. #include <linux/kdev_t.h>
  35. #include <linux/root_dev.h>
  36. #include <linux/pm.h>
  37. #include <asm/cpu.h>
  38. #include <asm/time.h>
  39. #include <asm/io.h>
  40. #include <asm/bootinfo.h>
  41. #include <asm/irq.h>
  42. #include <asm/mipsregs.h>
  43. #include <asm/reboot.h>
  44. #include <asm/traps.h>
  45. #include <asm/it8172/it8172.h>
  46. #include <asm/it8712.h>
  47. extern struct resource ioport_resource;
  48. #ifdef CONFIG_SERIO_I8042
  49. int init_8712_keyboard(void);
  50. #endif
  51. extern int SearchIT8712(void);
  52. extern void InitLPCInterface(void);
  53. extern char * __init prom_getcmdline(void);
  54. extern void it8172_restart(char *command);
  55. extern void it8172_halt(void);
  56. extern void it8172_power_off(void);
  57. extern void (*board_time_init)(void);
  58. extern void (*board_timer_setup)(struct irqaction *irq);
  59. extern void it8172_time_init(void);
  60. extern void it8172_timer_setup(struct irqaction *irq);
  61. #ifdef CONFIG_IT8172_REVC
  62. struct {
  63. struct resource ram;
  64. struct resource pci_mem;
  65. struct resource pci_io;
  66. struct resource flash;
  67. struct resource boot;
  68. } it8172_resources = {
  69. {
  70. .start = 0, /* to be initted */
  71. .end = 0,
  72. .name = "RAM",
  73. .flags = IORESOURCE_MEM
  74. }, {
  75. .start = 0x10000000,
  76. .end = 0x13FFFFFF,
  77. .name = "PCI Mem",
  78. .flags = IORESOURCE_MEM
  79. }, {
  80. .start = 0x14000000,
  81. .end = 0x17FFFFFF
  82. .name = "PCI I/O",
  83. }, {
  84. .start = 0x08000000,
  85. .end = 0x0CFFFFFF
  86. .name = "Flash",
  87. }, {
  88. .start = 0x1FC00000,
  89. .end = 0x1FFFFFFF
  90. .name = "Boot ROM",
  91. }
  92. };
  93. #else
  94. struct {
  95. struct resource ram;
  96. struct resource pci_mem0;
  97. struct resource pci_mem1;
  98. struct resource pci_io;
  99. struct resource pci_mem2;
  100. struct resource pci_mem3;
  101. struct resource flash;
  102. struct resource boot;
  103. } it8172_resources = {
  104. {
  105. .start = 0, /* to be initted */
  106. .end = 0,
  107. .name = "RAM",
  108. .flags = IORESOURCE_MEM
  109. }, {
  110. .start = 0x0C000000,
  111. .end = 0x0FFFFFFF,
  112. .name = "PCI Mem0",
  113. .flags = IORESOURCE_MEM
  114. }, {
  115. .start = 0x10000000,
  116. .end = 0x13FFFFFF,
  117. .name = "PCI Mem1",
  118. .flags = IORESOURCE_MEM
  119. }, {
  120. .start = 0x14000000,
  121. .end = 0x17FFFFFF
  122. .name = "PCI I/O",
  123. }, {
  124. .start = 0x1A000000,
  125. .end = 0x1BFFFFFF,
  126. .name = "PCI Mem2",
  127. .flags = IORESOURCE_MEM
  128. }, {
  129. .start = 0x1C000000,
  130. .end = 0x1FBFFFFF,
  131. .name = "PCI Mem3",
  132. .flags = IORESOURCE_MEM
  133. }, {
  134. .start = 0x08000000,
  135. .end = 0x0CFFFFFF
  136. .name = "Flash",
  137. }, {
  138. .start = 0x1FC00000,
  139. .end = 0x1FFFFFFF
  140. .name = "Boot ROM",
  141. }
  142. };
  143. #endif
  144. void __init it8172_init_ram_resource(unsigned long memsize)
  145. {
  146. it8172_resources.ram.end = memsize;
  147. }
  148. void __init plat_mem_setup(void)
  149. {
  150. unsigned short dsr;
  151. char *argptr;
  152. argptr = prom_getcmdline();
  153. #ifdef CONFIG_SERIAL_CONSOLE
  154. if ((argptr = strstr(argptr, "console=")) == NULL) {
  155. argptr = prom_getcmdline();
  156. strcat(argptr, " console=ttyS0,115200");
  157. }
  158. #endif
  159. clear_c0_status(ST0_FR);
  160. board_time_init = it8172_time_init;
  161. board_timer_setup = it8172_timer_setup;
  162. _machine_restart = it8172_restart;
  163. _machine_halt = it8172_halt;
  164. pm_power_off = it8172_power_off;
  165. /*
  166. * IO/MEM resources.
  167. *
  168. * revisit this area.
  169. */
  170. set_io_port_base(KSEG1);
  171. ioport_resource.start = it8172_resources.pci_io.start;
  172. ioport_resource.end = it8172_resources.pci_io.end;
  173. #ifdef CONFIG_IT8172_REVC
  174. iomem_resource.start = it8172_resources.pci_mem.start;
  175. iomem_resource.end = it8172_resources.pci_mem.end;
  176. #else
  177. iomem_resource.start = it8172_resources.pci_mem0.start;
  178. iomem_resource.end = it8172_resources.pci_mem3.end;
  179. #endif
  180. #ifdef CONFIG_BLK_DEV_INITRD
  181. ROOT_DEV = Root_RAM0;
  182. #endif
  183. /*
  184. * Pull enabled devices out of standby
  185. */
  186. IT_IO_READ16(IT_PM_DSR, dsr);
  187. /*
  188. * Fixme: This breaks when these drivers are modules!!!
  189. */
  190. #ifdef CONFIG_SOUND_IT8172
  191. dsr &= ~IT_PM_DSR_ACSB;
  192. #else
  193. dsr |= IT_PM_DSR_ACSB;
  194. #endif
  195. #ifdef CONFIG_BLK_DEV_IT8172
  196. dsr &= ~IT_PM_DSR_IDESB;
  197. #else
  198. dsr |= IT_PM_DSR_IDESB;
  199. #endif
  200. IT_IO_WRITE16(IT_PM_DSR, dsr);
  201. InitLPCInterface();
  202. #ifdef CONFIG_MIPS_ITE8172
  203. if (SearchIT8712()) {
  204. printk("Found IT8712 Super IO\n");
  205. /* enable IT8712 serial port */
  206. LPCSetConfig(LDN_SERIAL1, 0x30, 0x01); /* enable */
  207. LPCSetConfig(LDN_SERIAL1, 0x23, 0x01); /* clock selection */
  208. #ifdef CONFIG_SERIO_I8042
  209. if (init_8712_keyboard()) {
  210. printk("Unable to initialize keyboard\n");
  211. LPCSetConfig(LDN_KEYBOARD, 0x30, 0x0); /* disable keyboard */
  212. } else {
  213. LPCSetConfig(LDN_KEYBOARD, 0x30, 0x1); /* enable keyboard */
  214. LPCSetConfig(LDN_KEYBOARD, 0xf0, 0x2);
  215. LPCSetConfig(LDN_KEYBOARD, 0x71, 0x3);
  216. LPCSetConfig(LDN_MOUSE, 0x30, 0x1); /* enable mouse */
  217. LPCSetConfig(0x4, 0x30, 0x1);
  218. LPCSetConfig(0x4, 0xf4, LPCGetConfig(0x4, 0xf4) | 0x80);
  219. if ((LPCGetConfig(LDN_KEYBOARD, 0x30) == 0) ||
  220. (LPCGetConfig(LDN_MOUSE, 0x30) == 0))
  221. printk("Error: keyboard or mouse not enabled\n");
  222. }
  223. #endif
  224. }
  225. else {
  226. printk("IT8712 Super IO not found\n");
  227. }
  228. #endif
  229. #ifdef CONFIG_IT8172_CIR
  230. {
  231. unsigned long data;
  232. //printk("Enabling CIR0\n");
  233. IT_IO_READ16(IT_PM_DSR, data);
  234. data &= ~IT_PM_DSR_CIR0SB;
  235. IT_IO_WRITE16(IT_PM_DSR, data);
  236. //printk("DSR register: %x\n", (unsigned)IT_IO_READ16(IT_PM_DSR, data));
  237. }
  238. #endif
  239. #ifdef CONFIG_IT8172_SCR0
  240. {
  241. unsigned i;
  242. /* Enable Smart Card Reader 0 */
  243. /* First power it up */
  244. IT_IO_READ16(IT_PM_DSR, i);
  245. i &= ~IT_PM_DSR_SCR0SB;
  246. IT_IO_WRITE16(IT_PM_DSR, i);
  247. /* Then initialize its registers */
  248. outb(( IT_SCR_SFR_GATE_UART_OFF << IT_SCR_SFR_GATE_UART_BIT
  249. |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
  250. |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
  251. |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
  252. |IT_SCR_SFR_ENABLE_ON << IT_SCR_SFR_ENABLE_BIT),
  253. IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SFR);
  254. outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
  255. IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SCDR);
  256. }
  257. #endif /* CONFIG_IT8172_SCR0 */
  258. #ifdef CONFIG_IT8172_SCR1
  259. {
  260. unsigned i;
  261. /* Enable Smart Card Reader 1 */
  262. /* First power it up */
  263. IT_IO_READ16(IT_PM_DSR, i);
  264. i &= ~IT_PM_DSR_SCR1SB;
  265. IT_IO_WRITE16(IT_PM_DSR, i);
  266. /* Then initialize its registers */
  267. outb(( IT_SCR_SFR_GATE_UART_OFF << IT_SCR_SFR_GATE_UART_BIT
  268. |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
  269. |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
  270. |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
  271. |IT_SCR_SFR_ENABLE_ON << IT_SCR_SFR_ENABLE_BIT),
  272. IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SFR);
  273. outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
  274. IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SCDR);
  275. }
  276. #endif /* CONFIG_IT8172_SCR1 */
  277. }
  278. #ifdef CONFIG_SERIO_I8042
  279. /*
  280. * According to the ITE Special BIOS Note for waking up the
  281. * keyboard controller...
  282. */
  283. static int init_8712_keyboard(void)
  284. {
  285. unsigned int cmd_port = 0x14000064;
  286. unsigned int data_port = 0x14000060;
  287. ^^^^^^^^^^^
  288. Somebody here doesn't grok the concept of io ports.
  289. unsigned char data;
  290. int i;
  291. outb(0xaa, cmd_port); /* send self-test cmd */
  292. i = 0;
  293. while (!(inb(cmd_port) & 0x1)) { /* wait output buffer full */
  294. i++;
  295. if (i > 0xffffff)
  296. return 1;
  297. }
  298. data = inb(data_port);
  299. outb(0xcb, cmd_port); /* set ps2 mode */
  300. while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
  301. i++;
  302. if (i > 0xffffff)
  303. return 1;
  304. }
  305. outb(0x01, data_port);
  306. while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
  307. i++;
  308. if (i > 0xffffff)
  309. return 1;
  310. }
  311. outb(0x60, cmd_port); /* write 8042 command byte */
  312. while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
  313. i++;
  314. if (i > 0xffffff)
  315. return 1;
  316. }
  317. outb(0x45, data_port); /* at interface, keyboard enabled, system flag */
  318. while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
  319. i++;
  320. if (i > 0xffffff)
  321. return 1;
  322. }
  323. outb(0xae, cmd_port); /* enable interface */
  324. return 0;
  325. }
  326. #endif