traps.c 32 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245
  1. /*
  2. * linux/arch/i386/traps.c
  3. *
  4. * Copyright (C) 1991, 1992 Linus Torvalds
  5. *
  6. * Pentium III FXSR, SSE support
  7. * Gareth Hughes <gareth@valinux.com>, May 2000
  8. */
  9. /*
  10. * 'Traps.c' handles hardware traps and faults after we have saved some
  11. * state in 'asm.s'.
  12. */
  13. #include <linux/sched.h>
  14. #include <linux/kernel.h>
  15. #include <linux/string.h>
  16. #include <linux/errno.h>
  17. #include <linux/timer.h>
  18. #include <linux/mm.h>
  19. #include <linux/init.h>
  20. #include <linux/delay.h>
  21. #include <linux/spinlock.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/highmem.h>
  24. #include <linux/kallsyms.h>
  25. #include <linux/ptrace.h>
  26. #include <linux/utsname.h>
  27. #include <linux/kprobes.h>
  28. #include <linux/kexec.h>
  29. #include <linux/unwind.h>
  30. #ifdef CONFIG_EISA
  31. #include <linux/ioport.h>
  32. #include <linux/eisa.h>
  33. #endif
  34. #ifdef CONFIG_MCA
  35. #include <linux/mca.h>
  36. #endif
  37. #include <asm/processor.h>
  38. #include <asm/system.h>
  39. #include <asm/uaccess.h>
  40. #include <asm/io.h>
  41. #include <asm/atomic.h>
  42. #include <asm/debugreg.h>
  43. #include <asm/desc.h>
  44. #include <asm/i387.h>
  45. #include <asm/nmi.h>
  46. #include <asm/unwind.h>
  47. #include <asm/smp.h>
  48. #include <asm/arch_hooks.h>
  49. #include <asm/kdebug.h>
  50. #include <linux/module.h>
  51. #include "mach_traps.h"
  52. asmlinkage int system_call(void);
  53. struct desc_struct default_ldt[] = { { 0, 0 }, { 0, 0 }, { 0, 0 },
  54. { 0, 0 }, { 0, 0 } };
  55. /* Do we ignore FPU interrupts ? */
  56. char ignore_fpu_irq = 0;
  57. /*
  58. * The IDT has to be page-aligned to simplify the Pentium
  59. * F0 0F bug workaround.. We have a special link segment
  60. * for this.
  61. */
  62. struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, };
  63. asmlinkage void divide_error(void);
  64. asmlinkage void debug(void);
  65. asmlinkage void nmi(void);
  66. asmlinkage void int3(void);
  67. asmlinkage void overflow(void);
  68. asmlinkage void bounds(void);
  69. asmlinkage void invalid_op(void);
  70. asmlinkage void device_not_available(void);
  71. asmlinkage void coprocessor_segment_overrun(void);
  72. asmlinkage void invalid_TSS(void);
  73. asmlinkage void segment_not_present(void);
  74. asmlinkage void stack_segment(void);
  75. asmlinkage void general_protection(void);
  76. asmlinkage void page_fault(void);
  77. asmlinkage void coprocessor_error(void);
  78. asmlinkage void simd_coprocessor_error(void);
  79. asmlinkage void alignment_check(void);
  80. asmlinkage void spurious_interrupt_bug(void);
  81. asmlinkage void machine_check(void);
  82. static int kstack_depth_to_print = 24;
  83. static int call_trace = 1;
  84. ATOMIC_NOTIFIER_HEAD(i386die_chain);
  85. int register_die_notifier(struct notifier_block *nb)
  86. {
  87. vmalloc_sync_all();
  88. return atomic_notifier_chain_register(&i386die_chain, nb);
  89. }
  90. EXPORT_SYMBOL(register_die_notifier);
  91. int unregister_die_notifier(struct notifier_block *nb)
  92. {
  93. return atomic_notifier_chain_unregister(&i386die_chain, nb);
  94. }
  95. EXPORT_SYMBOL(unregister_die_notifier);
  96. static inline int valid_stack_ptr(struct thread_info *tinfo, void *p)
  97. {
  98. return p > (void *)tinfo &&
  99. p < (void *)tinfo + THREAD_SIZE - 3;
  100. }
  101. /*
  102. * Print one address/symbol entries per line.
  103. */
  104. static inline void print_addr_and_symbol(unsigned long addr, char *log_lvl)
  105. {
  106. printk(" [<%08lx>] ", addr);
  107. print_symbol("%s\n", addr);
  108. }
  109. static inline unsigned long print_context_stack(struct thread_info *tinfo,
  110. unsigned long *stack, unsigned long ebp,
  111. char *log_lvl)
  112. {
  113. unsigned long addr;
  114. #ifdef CONFIG_FRAME_POINTER
  115. while (valid_stack_ptr(tinfo, (void *)ebp)) {
  116. addr = *(unsigned long *)(ebp + 4);
  117. print_addr_and_symbol(addr, log_lvl);
  118. /*
  119. * break out of recursive entries (such as
  120. * end_of_stack_stop_unwind_function):
  121. */
  122. if (ebp == *(unsigned long *)ebp)
  123. break;
  124. ebp = *(unsigned long *)ebp;
  125. }
  126. #else
  127. while (valid_stack_ptr(tinfo, stack)) {
  128. addr = *stack++;
  129. if (__kernel_text_address(addr))
  130. print_addr_and_symbol(addr, log_lvl);
  131. }
  132. #endif
  133. return ebp;
  134. }
  135. static asmlinkage int
  136. show_trace_unwind(struct unwind_frame_info *info, void *log_lvl)
  137. {
  138. int n = 0;
  139. while (unwind(info) == 0 && UNW_PC(info)) {
  140. n++;
  141. print_addr_and_symbol(UNW_PC(info), log_lvl);
  142. if (arch_unw_user_mode(info))
  143. break;
  144. }
  145. return n;
  146. }
  147. static void show_trace_log_lvl(struct task_struct *task, struct pt_regs *regs,
  148. unsigned long *stack, char *log_lvl)
  149. {
  150. unsigned long ebp;
  151. if (!task)
  152. task = current;
  153. if (call_trace >= 0) {
  154. int unw_ret = 0;
  155. struct unwind_frame_info info;
  156. if (regs) {
  157. if (unwind_init_frame_info(&info, task, regs) == 0)
  158. unw_ret = show_trace_unwind(&info, log_lvl);
  159. } else if (task == current)
  160. unw_ret = unwind_init_running(&info, show_trace_unwind, log_lvl);
  161. else {
  162. if (unwind_init_blocked(&info, task) == 0)
  163. unw_ret = show_trace_unwind(&info, log_lvl);
  164. }
  165. if (unw_ret > 0) {
  166. if (call_trace > 0)
  167. return;
  168. printk("%sLegacy call trace:\n", log_lvl);
  169. }
  170. }
  171. if (task == current) {
  172. /* Grab ebp right from our regs */
  173. asm ("movl %%ebp, %0" : "=r" (ebp) : );
  174. } else {
  175. /* ebp is the last reg pushed by switch_to */
  176. ebp = *(unsigned long *) task->thread.esp;
  177. }
  178. while (1) {
  179. struct thread_info *context;
  180. context = (struct thread_info *)
  181. ((unsigned long)stack & (~(THREAD_SIZE - 1)));
  182. ebp = print_context_stack(context, stack, ebp, log_lvl);
  183. stack = (unsigned long*)context->previous_esp;
  184. if (!stack)
  185. break;
  186. printk("%s =======================\n", log_lvl);
  187. }
  188. }
  189. void show_trace(struct task_struct *task, struct pt_regs *regs, unsigned long * stack)
  190. {
  191. show_trace_log_lvl(task, regs, stack, "");
  192. }
  193. static void show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,
  194. unsigned long *esp, char *log_lvl)
  195. {
  196. unsigned long *stack;
  197. int i;
  198. if (esp == NULL) {
  199. if (task)
  200. esp = (unsigned long*)task->thread.esp;
  201. else
  202. esp = (unsigned long *)&esp;
  203. }
  204. stack = esp;
  205. for(i = 0; i < kstack_depth_to_print; i++) {
  206. if (kstack_end(stack))
  207. break;
  208. if (i && ((i % 8) == 0))
  209. printk("\n%s ", log_lvl);
  210. printk("%08lx ", *stack++);
  211. }
  212. printk("\n%sCall Trace:\n", log_lvl);
  213. show_trace_log_lvl(task, regs, esp, log_lvl);
  214. }
  215. void show_stack(struct task_struct *task, unsigned long *esp)
  216. {
  217. printk(" ");
  218. show_stack_log_lvl(task, NULL, esp, "");
  219. }
  220. /*
  221. * The architecture-independent dump_stack generator
  222. */
  223. void dump_stack(void)
  224. {
  225. unsigned long stack;
  226. show_trace(current, NULL, &stack);
  227. }
  228. EXPORT_SYMBOL(dump_stack);
  229. void show_registers(struct pt_regs *regs)
  230. {
  231. int i;
  232. int in_kernel = 1;
  233. unsigned long esp;
  234. unsigned short ss;
  235. esp = (unsigned long) (&regs->esp);
  236. savesegment(ss, ss);
  237. if (user_mode_vm(regs)) {
  238. in_kernel = 0;
  239. esp = regs->esp;
  240. ss = regs->xss & 0xffff;
  241. }
  242. print_modules();
  243. printk(KERN_EMERG "CPU: %d\nEIP: %04x:[<%08lx>] %s VLI\n"
  244. "EFLAGS: %08lx (%s %.*s) \n",
  245. smp_processor_id(), 0xffff & regs->xcs, regs->eip,
  246. print_tainted(), regs->eflags, system_utsname.release,
  247. (int)strcspn(system_utsname.version, " "),
  248. system_utsname.version);
  249. print_symbol(KERN_EMERG "EIP is at %s\n", regs->eip);
  250. printk(KERN_EMERG "eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n",
  251. regs->eax, regs->ebx, regs->ecx, regs->edx);
  252. printk(KERN_EMERG "esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n",
  253. regs->esi, regs->edi, regs->ebp, esp);
  254. printk(KERN_EMERG "ds: %04x es: %04x ss: %04x\n",
  255. regs->xds & 0xffff, regs->xes & 0xffff, ss);
  256. printk(KERN_EMERG "Process %.*s (pid: %d, ti=%p task=%p task.ti=%p)",
  257. TASK_COMM_LEN, current->comm, current->pid,
  258. current_thread_info(), current, current->thread_info);
  259. /*
  260. * When in-kernel, we also print out the stack and code at the
  261. * time of the fault..
  262. */
  263. if (in_kernel) {
  264. u8 __user *eip;
  265. printk("\n" KERN_EMERG "Stack: ");
  266. show_stack_log_lvl(NULL, regs, (unsigned long *)esp, KERN_EMERG);
  267. printk(KERN_EMERG "Code: ");
  268. eip = (u8 __user *)regs->eip - 43;
  269. for (i = 0; i < 64; i++, eip++) {
  270. unsigned char c;
  271. if (eip < (u8 __user *)PAGE_OFFSET || __get_user(c, eip)) {
  272. printk(" Bad EIP value.");
  273. break;
  274. }
  275. if (eip == (u8 __user *)regs->eip)
  276. printk("<%02x> ", c);
  277. else
  278. printk("%02x ", c);
  279. }
  280. }
  281. printk("\n");
  282. }
  283. static void handle_BUG(struct pt_regs *regs)
  284. {
  285. unsigned short ud2;
  286. unsigned short line;
  287. char *file;
  288. char c;
  289. unsigned long eip;
  290. eip = regs->eip;
  291. if (eip < PAGE_OFFSET)
  292. goto no_bug;
  293. if (__get_user(ud2, (unsigned short __user *)eip))
  294. goto no_bug;
  295. if (ud2 != 0x0b0f)
  296. goto no_bug;
  297. if (__get_user(line, (unsigned short __user *)(eip + 2)))
  298. goto bug;
  299. if (__get_user(file, (char * __user *)(eip + 4)) ||
  300. (unsigned long)file < PAGE_OFFSET || __get_user(c, file))
  301. file = "<bad filename>";
  302. printk(KERN_EMERG "------------[ cut here ]------------\n");
  303. printk(KERN_EMERG "kernel BUG at %s:%d!\n", file, line);
  304. no_bug:
  305. return;
  306. /* Here we know it was a BUG but file-n-line is unavailable */
  307. bug:
  308. printk(KERN_EMERG "Kernel BUG\n");
  309. }
  310. /* This is gone through when something in the kernel
  311. * has done something bad and is about to be terminated.
  312. */
  313. void die(const char * str, struct pt_regs * regs, long err)
  314. {
  315. static struct {
  316. spinlock_t lock;
  317. u32 lock_owner;
  318. int lock_owner_depth;
  319. } die = {
  320. .lock = SPIN_LOCK_UNLOCKED,
  321. .lock_owner = -1,
  322. .lock_owner_depth = 0
  323. };
  324. static int die_counter;
  325. unsigned long flags;
  326. oops_enter();
  327. if (die.lock_owner != raw_smp_processor_id()) {
  328. console_verbose();
  329. spin_lock_irqsave(&die.lock, flags);
  330. die.lock_owner = smp_processor_id();
  331. die.lock_owner_depth = 0;
  332. bust_spinlocks(1);
  333. }
  334. else
  335. local_save_flags(flags);
  336. if (++die.lock_owner_depth < 3) {
  337. int nl = 0;
  338. unsigned long esp;
  339. unsigned short ss;
  340. handle_BUG(regs);
  341. printk(KERN_EMERG "%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
  342. #ifdef CONFIG_PREEMPT
  343. printk(KERN_EMERG "PREEMPT ");
  344. nl = 1;
  345. #endif
  346. #ifdef CONFIG_SMP
  347. if (!nl)
  348. printk(KERN_EMERG);
  349. printk("SMP ");
  350. nl = 1;
  351. #endif
  352. #ifdef CONFIG_DEBUG_PAGEALLOC
  353. if (!nl)
  354. printk(KERN_EMERG);
  355. printk("DEBUG_PAGEALLOC");
  356. nl = 1;
  357. #endif
  358. if (nl)
  359. printk("\n");
  360. if (notify_die(DIE_OOPS, str, regs, err,
  361. current->thread.trap_no, SIGSEGV) !=
  362. NOTIFY_STOP) {
  363. show_registers(regs);
  364. /* Executive summary in case the oops scrolled away */
  365. esp = (unsigned long) (&regs->esp);
  366. savesegment(ss, ss);
  367. if (user_mode(regs)) {
  368. esp = regs->esp;
  369. ss = regs->xss & 0xffff;
  370. }
  371. printk(KERN_EMERG "EIP: [<%08lx>] ", regs->eip);
  372. print_symbol("%s", regs->eip);
  373. printk(" SS:ESP %04x:%08lx\n", ss, esp);
  374. }
  375. else
  376. regs = NULL;
  377. } else
  378. printk(KERN_EMERG "Recursive die() failure, output suppressed\n");
  379. bust_spinlocks(0);
  380. die.lock_owner = -1;
  381. spin_unlock_irqrestore(&die.lock, flags);
  382. if (!regs)
  383. return;
  384. if (kexec_should_crash(current))
  385. crash_kexec(regs);
  386. if (in_interrupt())
  387. panic("Fatal exception in interrupt");
  388. if (panic_on_oops) {
  389. printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
  390. ssleep(5);
  391. panic("Fatal exception");
  392. }
  393. oops_exit();
  394. do_exit(SIGSEGV);
  395. }
  396. static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
  397. {
  398. if (!user_mode_vm(regs))
  399. die(str, regs, err);
  400. }
  401. static void __kprobes do_trap(int trapnr, int signr, char *str, int vm86,
  402. struct pt_regs * regs, long error_code,
  403. siginfo_t *info)
  404. {
  405. struct task_struct *tsk = current;
  406. tsk->thread.error_code = error_code;
  407. tsk->thread.trap_no = trapnr;
  408. if (regs->eflags & VM_MASK) {
  409. if (vm86)
  410. goto vm86_trap;
  411. goto trap_signal;
  412. }
  413. if (!user_mode(regs))
  414. goto kernel_trap;
  415. trap_signal: {
  416. if (info)
  417. force_sig_info(signr, info, tsk);
  418. else
  419. force_sig(signr, tsk);
  420. return;
  421. }
  422. kernel_trap: {
  423. if (!fixup_exception(regs))
  424. die(str, regs, error_code);
  425. return;
  426. }
  427. vm86_trap: {
  428. int ret = handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, trapnr);
  429. if (ret) goto trap_signal;
  430. return;
  431. }
  432. }
  433. #define DO_ERROR(trapnr, signr, str, name) \
  434. fastcall void do_##name(struct pt_regs * regs, long error_code) \
  435. { \
  436. if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
  437. == NOTIFY_STOP) \
  438. return; \
  439. do_trap(trapnr, signr, str, 0, regs, error_code, NULL); \
  440. }
  441. #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
  442. fastcall void do_##name(struct pt_regs * regs, long error_code) \
  443. { \
  444. siginfo_t info; \
  445. info.si_signo = signr; \
  446. info.si_errno = 0; \
  447. info.si_code = sicode; \
  448. info.si_addr = (void __user *)siaddr; \
  449. if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
  450. == NOTIFY_STOP) \
  451. return; \
  452. do_trap(trapnr, signr, str, 0, regs, error_code, &info); \
  453. }
  454. #define DO_VM86_ERROR(trapnr, signr, str, name) \
  455. fastcall void do_##name(struct pt_regs * regs, long error_code) \
  456. { \
  457. if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
  458. == NOTIFY_STOP) \
  459. return; \
  460. do_trap(trapnr, signr, str, 1, regs, error_code, NULL); \
  461. }
  462. #define DO_VM86_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
  463. fastcall void do_##name(struct pt_regs * regs, long error_code) \
  464. { \
  465. siginfo_t info; \
  466. info.si_signo = signr; \
  467. info.si_errno = 0; \
  468. info.si_code = sicode; \
  469. info.si_addr = (void __user *)siaddr; \
  470. if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
  471. == NOTIFY_STOP) \
  472. return; \
  473. do_trap(trapnr, signr, str, 1, regs, error_code, &info); \
  474. }
  475. DO_VM86_ERROR_INFO( 0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->eip)
  476. #ifndef CONFIG_KPROBES
  477. DO_VM86_ERROR( 3, SIGTRAP, "int3", int3)
  478. #endif
  479. DO_VM86_ERROR( 4, SIGSEGV, "overflow", overflow)
  480. DO_VM86_ERROR( 5, SIGSEGV, "bounds", bounds)
  481. DO_ERROR_INFO( 6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->eip)
  482. DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
  483. DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
  484. DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
  485. DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
  486. DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
  487. DO_ERROR_INFO(32, SIGSEGV, "iret exception", iret_error, ILL_BADSTK, 0)
  488. fastcall void __kprobes do_general_protection(struct pt_regs * regs,
  489. long error_code)
  490. {
  491. int cpu = get_cpu();
  492. struct tss_struct *tss = &per_cpu(init_tss, cpu);
  493. struct thread_struct *thread = &current->thread;
  494. /*
  495. * Perform the lazy TSS's I/O bitmap copy. If the TSS has an
  496. * invalid offset set (the LAZY one) and the faulting thread has
  497. * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS
  498. * and we set the offset field correctly. Then we let the CPU to
  499. * restart the faulting instruction.
  500. */
  501. if (tss->io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY &&
  502. thread->io_bitmap_ptr) {
  503. memcpy(tss->io_bitmap, thread->io_bitmap_ptr,
  504. thread->io_bitmap_max);
  505. /*
  506. * If the previously set map was extending to higher ports
  507. * than the current one, pad extra space with 0xff (no access).
  508. */
  509. if (thread->io_bitmap_max < tss->io_bitmap_max)
  510. memset((char *) tss->io_bitmap +
  511. thread->io_bitmap_max, 0xff,
  512. tss->io_bitmap_max - thread->io_bitmap_max);
  513. tss->io_bitmap_max = thread->io_bitmap_max;
  514. tss->io_bitmap_base = IO_BITMAP_OFFSET;
  515. tss->io_bitmap_owner = thread;
  516. put_cpu();
  517. return;
  518. }
  519. put_cpu();
  520. current->thread.error_code = error_code;
  521. current->thread.trap_no = 13;
  522. if (regs->eflags & VM_MASK)
  523. goto gp_in_vm86;
  524. if (!user_mode(regs))
  525. goto gp_in_kernel;
  526. current->thread.error_code = error_code;
  527. current->thread.trap_no = 13;
  528. force_sig(SIGSEGV, current);
  529. return;
  530. gp_in_vm86:
  531. local_irq_enable();
  532. handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
  533. return;
  534. gp_in_kernel:
  535. if (!fixup_exception(regs)) {
  536. if (notify_die(DIE_GPF, "general protection fault", regs,
  537. error_code, 13, SIGSEGV) == NOTIFY_STOP)
  538. return;
  539. die("general protection fault", regs, error_code);
  540. }
  541. }
  542. static void mem_parity_error(unsigned char reason, struct pt_regs * regs)
  543. {
  544. printk(KERN_EMERG "Uhhuh. NMI received. Dazed and confused, but trying "
  545. "to continue\n");
  546. printk(KERN_EMERG "You probably have a hardware problem with your RAM "
  547. "chips\n");
  548. /* Clear and disable the memory parity error line. */
  549. clear_mem_error(reason);
  550. }
  551. static void io_check_error(unsigned char reason, struct pt_regs * regs)
  552. {
  553. unsigned long i;
  554. printk(KERN_EMERG "NMI: IOCK error (debug interrupt?)\n");
  555. show_registers(regs);
  556. /* Re-enable the IOCK line, wait for a few seconds */
  557. reason = (reason & 0xf) | 8;
  558. outb(reason, 0x61);
  559. i = 2000;
  560. while (--i) udelay(1000);
  561. reason &= ~8;
  562. outb(reason, 0x61);
  563. }
  564. static void unknown_nmi_error(unsigned char reason, struct pt_regs * regs)
  565. {
  566. #ifdef CONFIG_MCA
  567. /* Might actually be able to figure out what the guilty party
  568. * is. */
  569. if( MCA_bus ) {
  570. mca_handle_nmi();
  571. return;
  572. }
  573. #endif
  574. printk("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
  575. reason, smp_processor_id());
  576. printk("Dazed and confused, but trying to continue\n");
  577. printk("Do you have a strange power saving mode enabled?\n");
  578. }
  579. static DEFINE_SPINLOCK(nmi_print_lock);
  580. void die_nmi (struct pt_regs *regs, const char *msg)
  581. {
  582. if (notify_die(DIE_NMIWATCHDOG, msg, regs, 0, 2, SIGINT) ==
  583. NOTIFY_STOP)
  584. return;
  585. spin_lock(&nmi_print_lock);
  586. /*
  587. * We are in trouble anyway, lets at least try
  588. * to get a message out.
  589. */
  590. bust_spinlocks(1);
  591. printk(KERN_EMERG "%s", msg);
  592. printk(" on CPU%d, eip %08lx, registers:\n",
  593. smp_processor_id(), regs->eip);
  594. show_registers(regs);
  595. printk(KERN_EMERG "console shuts up ...\n");
  596. console_silent();
  597. spin_unlock(&nmi_print_lock);
  598. bust_spinlocks(0);
  599. /* If we are in kernel we are probably nested up pretty bad
  600. * and might aswell get out now while we still can.
  601. */
  602. if (!user_mode_vm(regs)) {
  603. current->thread.trap_no = 2;
  604. crash_kexec(regs);
  605. }
  606. do_exit(SIGSEGV);
  607. }
  608. static void default_do_nmi(struct pt_regs * regs)
  609. {
  610. unsigned char reason = 0;
  611. /* Only the BSP gets external NMIs from the system. */
  612. if (!smp_processor_id())
  613. reason = get_nmi_reason();
  614. if (!(reason & 0xc0)) {
  615. if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 2, SIGINT)
  616. == NOTIFY_STOP)
  617. return;
  618. #ifdef CONFIG_X86_LOCAL_APIC
  619. /*
  620. * Ok, so this is none of the documented NMI sources,
  621. * so it must be the NMI watchdog.
  622. */
  623. if (nmi_watchdog) {
  624. nmi_watchdog_tick(regs);
  625. return;
  626. }
  627. #endif
  628. unknown_nmi_error(reason, regs);
  629. return;
  630. }
  631. if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) == NOTIFY_STOP)
  632. return;
  633. if (reason & 0x80)
  634. mem_parity_error(reason, regs);
  635. if (reason & 0x40)
  636. io_check_error(reason, regs);
  637. /*
  638. * Reassert NMI in case it became active meanwhile
  639. * as it's edge-triggered.
  640. */
  641. reassert_nmi();
  642. }
  643. static int dummy_nmi_callback(struct pt_regs * regs, int cpu)
  644. {
  645. return 0;
  646. }
  647. static nmi_callback_t nmi_callback = dummy_nmi_callback;
  648. fastcall void do_nmi(struct pt_regs * regs, long error_code)
  649. {
  650. int cpu;
  651. nmi_enter();
  652. cpu = smp_processor_id();
  653. ++nmi_count(cpu);
  654. if (!rcu_dereference(nmi_callback)(regs, cpu))
  655. default_do_nmi(regs);
  656. nmi_exit();
  657. }
  658. void set_nmi_callback(nmi_callback_t callback)
  659. {
  660. vmalloc_sync_all();
  661. rcu_assign_pointer(nmi_callback, callback);
  662. }
  663. EXPORT_SYMBOL_GPL(set_nmi_callback);
  664. void unset_nmi_callback(void)
  665. {
  666. nmi_callback = dummy_nmi_callback;
  667. }
  668. EXPORT_SYMBOL_GPL(unset_nmi_callback);
  669. #ifdef CONFIG_KPROBES
  670. fastcall void __kprobes do_int3(struct pt_regs *regs, long error_code)
  671. {
  672. if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
  673. == NOTIFY_STOP)
  674. return;
  675. /* This is an interrupt gate, because kprobes wants interrupts
  676. disabled. Normal trap handlers don't. */
  677. restore_interrupts(regs);
  678. do_trap(3, SIGTRAP, "int3", 1, regs, error_code, NULL);
  679. }
  680. #endif
  681. /*
  682. * Our handling of the processor debug registers is non-trivial.
  683. * We do not clear them on entry and exit from the kernel. Therefore
  684. * it is possible to get a watchpoint trap here from inside the kernel.
  685. * However, the code in ./ptrace.c has ensured that the user can
  686. * only set watchpoints on userspace addresses. Therefore the in-kernel
  687. * watchpoint trap can only occur in code which is reading/writing
  688. * from user space. Such code must not hold kernel locks (since it
  689. * can equally take a page fault), therefore it is safe to call
  690. * force_sig_info even though that claims and releases locks.
  691. *
  692. * Code in ./signal.c ensures that the debug control register
  693. * is restored before we deliver any signal, and therefore that
  694. * user code runs with the correct debug control register even though
  695. * we clear it here.
  696. *
  697. * Being careful here means that we don't have to be as careful in a
  698. * lot of more complicated places (task switching can be a bit lazy
  699. * about restoring all the debug state, and ptrace doesn't have to
  700. * find every occurrence of the TF bit that could be saved away even
  701. * by user code)
  702. */
  703. fastcall void __kprobes do_debug(struct pt_regs * regs, long error_code)
  704. {
  705. unsigned int condition;
  706. struct task_struct *tsk = current;
  707. get_debugreg(condition, 6);
  708. if (notify_die(DIE_DEBUG, "debug", regs, condition, error_code,
  709. SIGTRAP) == NOTIFY_STOP)
  710. return;
  711. /* It's safe to allow irq's after DR6 has been saved */
  712. if (regs->eflags & X86_EFLAGS_IF)
  713. local_irq_enable();
  714. /* Mask out spurious debug traps due to lazy DR7 setting */
  715. if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
  716. if (!tsk->thread.debugreg[7])
  717. goto clear_dr7;
  718. }
  719. if (regs->eflags & VM_MASK)
  720. goto debug_vm86;
  721. /* Save debug status register where ptrace can see it */
  722. tsk->thread.debugreg[6] = condition;
  723. /*
  724. * Single-stepping through TF: make sure we ignore any events in
  725. * kernel space (but re-enable TF when returning to user mode).
  726. */
  727. if (condition & DR_STEP) {
  728. /*
  729. * We already checked v86 mode above, so we can
  730. * check for kernel mode by just checking the CPL
  731. * of CS.
  732. */
  733. if (!user_mode(regs))
  734. goto clear_TF_reenable;
  735. }
  736. /* Ok, finally something we can handle */
  737. send_sigtrap(tsk, regs, error_code);
  738. /* Disable additional traps. They'll be re-enabled when
  739. * the signal is delivered.
  740. */
  741. clear_dr7:
  742. set_debugreg(0, 7);
  743. return;
  744. debug_vm86:
  745. handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1);
  746. return;
  747. clear_TF_reenable:
  748. set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
  749. regs->eflags &= ~TF_MASK;
  750. return;
  751. }
  752. /*
  753. * Note that we play around with the 'TS' bit in an attempt to get
  754. * the correct behaviour even in the presence of the asynchronous
  755. * IRQ13 behaviour
  756. */
  757. void math_error(void __user *eip)
  758. {
  759. struct task_struct * task;
  760. siginfo_t info;
  761. unsigned short cwd, swd;
  762. /*
  763. * Save the info for the exception handler and clear the error.
  764. */
  765. task = current;
  766. save_init_fpu(task);
  767. task->thread.trap_no = 16;
  768. task->thread.error_code = 0;
  769. info.si_signo = SIGFPE;
  770. info.si_errno = 0;
  771. info.si_code = __SI_FAULT;
  772. info.si_addr = eip;
  773. /*
  774. * (~cwd & swd) will mask out exceptions that are not set to unmasked
  775. * status. 0x3f is the exception bits in these regs, 0x200 is the
  776. * C1 reg you need in case of a stack fault, 0x040 is the stack
  777. * fault bit. We should only be taking one exception at a time,
  778. * so if this combination doesn't produce any single exception,
  779. * then we have a bad program that isn't syncronizing its FPU usage
  780. * and it will suffer the consequences since we won't be able to
  781. * fully reproduce the context of the exception
  782. */
  783. cwd = get_fpu_cwd(task);
  784. swd = get_fpu_swd(task);
  785. switch (swd & ~cwd & 0x3f) {
  786. case 0x000: /* No unmasked exception */
  787. return;
  788. default: /* Multiple exceptions */
  789. break;
  790. case 0x001: /* Invalid Op */
  791. /*
  792. * swd & 0x240 == 0x040: Stack Underflow
  793. * swd & 0x240 == 0x240: Stack Overflow
  794. * User must clear the SF bit (0x40) if set
  795. */
  796. info.si_code = FPE_FLTINV;
  797. break;
  798. case 0x002: /* Denormalize */
  799. case 0x010: /* Underflow */
  800. info.si_code = FPE_FLTUND;
  801. break;
  802. case 0x004: /* Zero Divide */
  803. info.si_code = FPE_FLTDIV;
  804. break;
  805. case 0x008: /* Overflow */
  806. info.si_code = FPE_FLTOVF;
  807. break;
  808. case 0x020: /* Precision */
  809. info.si_code = FPE_FLTRES;
  810. break;
  811. }
  812. force_sig_info(SIGFPE, &info, task);
  813. }
  814. fastcall void do_coprocessor_error(struct pt_regs * regs, long error_code)
  815. {
  816. ignore_fpu_irq = 1;
  817. math_error((void __user *)regs->eip);
  818. }
  819. static void simd_math_error(void __user *eip)
  820. {
  821. struct task_struct * task;
  822. siginfo_t info;
  823. unsigned short mxcsr;
  824. /*
  825. * Save the info for the exception handler and clear the error.
  826. */
  827. task = current;
  828. save_init_fpu(task);
  829. task->thread.trap_no = 19;
  830. task->thread.error_code = 0;
  831. info.si_signo = SIGFPE;
  832. info.si_errno = 0;
  833. info.si_code = __SI_FAULT;
  834. info.si_addr = eip;
  835. /*
  836. * The SIMD FPU exceptions are handled a little differently, as there
  837. * is only a single status/control register. Thus, to determine which
  838. * unmasked exception was caught we must mask the exception mask bits
  839. * at 0x1f80, and then use these to mask the exception bits at 0x3f.
  840. */
  841. mxcsr = get_fpu_mxcsr(task);
  842. switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
  843. case 0x000:
  844. default:
  845. break;
  846. case 0x001: /* Invalid Op */
  847. info.si_code = FPE_FLTINV;
  848. break;
  849. case 0x002: /* Denormalize */
  850. case 0x010: /* Underflow */
  851. info.si_code = FPE_FLTUND;
  852. break;
  853. case 0x004: /* Zero Divide */
  854. info.si_code = FPE_FLTDIV;
  855. break;
  856. case 0x008: /* Overflow */
  857. info.si_code = FPE_FLTOVF;
  858. break;
  859. case 0x020: /* Precision */
  860. info.si_code = FPE_FLTRES;
  861. break;
  862. }
  863. force_sig_info(SIGFPE, &info, task);
  864. }
  865. fastcall void do_simd_coprocessor_error(struct pt_regs * regs,
  866. long error_code)
  867. {
  868. if (cpu_has_xmm) {
  869. /* Handle SIMD FPU exceptions on PIII+ processors. */
  870. ignore_fpu_irq = 1;
  871. simd_math_error((void __user *)regs->eip);
  872. } else {
  873. /*
  874. * Handle strange cache flush from user space exception
  875. * in all other cases. This is undocumented behaviour.
  876. */
  877. if (regs->eflags & VM_MASK) {
  878. handle_vm86_fault((struct kernel_vm86_regs *)regs,
  879. error_code);
  880. return;
  881. }
  882. current->thread.trap_no = 19;
  883. current->thread.error_code = error_code;
  884. die_if_kernel("cache flush denied", regs, error_code);
  885. force_sig(SIGSEGV, current);
  886. }
  887. }
  888. fastcall void do_spurious_interrupt_bug(struct pt_regs * regs,
  889. long error_code)
  890. {
  891. #if 0
  892. /* No need to warn about this any longer. */
  893. printk("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
  894. #endif
  895. }
  896. fastcall void setup_x86_bogus_stack(unsigned char * stk)
  897. {
  898. unsigned long *switch16_ptr, *switch32_ptr;
  899. struct pt_regs *regs;
  900. unsigned long stack_top, stack_bot;
  901. unsigned short iret_frame16_off;
  902. int cpu = smp_processor_id();
  903. /* reserve the space on 32bit stack for the magic switch16 pointer */
  904. memmove(stk, stk + 8, sizeof(struct pt_regs));
  905. switch16_ptr = (unsigned long *)(stk + sizeof(struct pt_regs));
  906. regs = (struct pt_regs *)stk;
  907. /* now the switch32 on 16bit stack */
  908. stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu);
  909. stack_top = stack_bot + CPU_16BIT_STACK_SIZE;
  910. switch32_ptr = (unsigned long *)(stack_top - 8);
  911. iret_frame16_off = CPU_16BIT_STACK_SIZE - 8 - 20;
  912. /* copy iret frame on 16bit stack */
  913. memcpy((void *)(stack_bot + iret_frame16_off), &regs->eip, 20);
  914. /* fill in the switch pointers */
  915. switch16_ptr[0] = (regs->esp & 0xffff0000) | iret_frame16_off;
  916. switch16_ptr[1] = __ESPFIX_SS;
  917. switch32_ptr[0] = (unsigned long)stk + sizeof(struct pt_regs) +
  918. 8 - CPU_16BIT_STACK_SIZE;
  919. switch32_ptr[1] = __KERNEL_DS;
  920. }
  921. fastcall unsigned char * fixup_x86_bogus_stack(unsigned short sp)
  922. {
  923. unsigned long *switch32_ptr;
  924. unsigned char *stack16, *stack32;
  925. unsigned long stack_top, stack_bot;
  926. int len;
  927. int cpu = smp_processor_id();
  928. stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu);
  929. stack_top = stack_bot + CPU_16BIT_STACK_SIZE;
  930. switch32_ptr = (unsigned long *)(stack_top - 8);
  931. /* copy the data from 16bit stack to 32bit stack */
  932. len = CPU_16BIT_STACK_SIZE - 8 - sp;
  933. stack16 = (unsigned char *)(stack_bot + sp);
  934. stack32 = (unsigned char *)
  935. (switch32_ptr[0] + CPU_16BIT_STACK_SIZE - 8 - len);
  936. memcpy(stack32, stack16, len);
  937. return stack32;
  938. }
  939. /*
  940. * 'math_state_restore()' saves the current math information in the
  941. * old math state array, and gets the new ones from the current task
  942. *
  943. * Careful.. There are problems with IBM-designed IRQ13 behaviour.
  944. * Don't touch unless you *really* know how it works.
  945. *
  946. * Must be called with kernel preemption disabled (in this case,
  947. * local interrupts are disabled at the call-site in entry.S).
  948. */
  949. asmlinkage void math_state_restore(struct pt_regs regs)
  950. {
  951. struct thread_info *thread = current_thread_info();
  952. struct task_struct *tsk = thread->task;
  953. clts(); /* Allow maths ops (or we recurse) */
  954. if (!tsk_used_math(tsk))
  955. init_fpu(tsk);
  956. restore_fpu(tsk);
  957. thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
  958. }
  959. #ifndef CONFIG_MATH_EMULATION
  960. asmlinkage void math_emulate(long arg)
  961. {
  962. printk(KERN_EMERG "math-emulation not enabled and no coprocessor found.\n");
  963. printk(KERN_EMERG "killing %s.\n",current->comm);
  964. force_sig(SIGFPE,current);
  965. schedule();
  966. }
  967. #endif /* CONFIG_MATH_EMULATION */
  968. #ifdef CONFIG_X86_F00F_BUG
  969. void __init trap_init_f00f_bug(void)
  970. {
  971. __set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO);
  972. /*
  973. * Update the IDT descriptor and reload the IDT so that
  974. * it uses the read-only mapped virtual address.
  975. */
  976. idt_descr.address = fix_to_virt(FIX_F00F_IDT);
  977. load_idt(&idt_descr);
  978. }
  979. #endif
  980. #define _set_gate(gate_addr,type,dpl,addr,seg) \
  981. do { \
  982. int __d0, __d1; \
  983. __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
  984. "movw %4,%%dx\n\t" \
  985. "movl %%eax,%0\n\t" \
  986. "movl %%edx,%1" \
  987. :"=m" (*((long *) (gate_addr))), \
  988. "=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \
  989. :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
  990. "3" ((char *) (addr)),"2" ((seg) << 16)); \
  991. } while (0)
  992. /*
  993. * This needs to use 'idt_table' rather than 'idt', and
  994. * thus use the _nonmapped_ version of the IDT, as the
  995. * Pentium F0 0F bugfix can have resulted in the mapped
  996. * IDT being write-protected.
  997. */
  998. void set_intr_gate(unsigned int n, void *addr)
  999. {
  1000. _set_gate(idt_table+n,14,0,addr,__KERNEL_CS);
  1001. }
  1002. /*
  1003. * This routine sets up an interrupt gate at directory privilege level 3.
  1004. */
  1005. static inline void set_system_intr_gate(unsigned int n, void *addr)
  1006. {
  1007. _set_gate(idt_table+n, 14, 3, addr, __KERNEL_CS);
  1008. }
  1009. static void __init set_trap_gate(unsigned int n, void *addr)
  1010. {
  1011. _set_gate(idt_table+n,15,0,addr,__KERNEL_CS);
  1012. }
  1013. static void __init set_system_gate(unsigned int n, void *addr)
  1014. {
  1015. _set_gate(idt_table+n,15,3,addr,__KERNEL_CS);
  1016. }
  1017. static void __init set_task_gate(unsigned int n, unsigned int gdt_entry)
  1018. {
  1019. _set_gate(idt_table+n,5,0,0,(gdt_entry<<3));
  1020. }
  1021. void __init trap_init(void)
  1022. {
  1023. #ifdef CONFIG_EISA
  1024. void __iomem *p = ioremap(0x0FFFD9, 4);
  1025. if (readl(p) == 'E'+('I'<<8)+('S'<<16)+('A'<<24)) {
  1026. EISA_bus = 1;
  1027. }
  1028. iounmap(p);
  1029. #endif
  1030. #ifdef CONFIG_X86_LOCAL_APIC
  1031. init_apic_mappings();
  1032. #endif
  1033. set_trap_gate(0,&divide_error);
  1034. set_intr_gate(1,&debug);
  1035. set_intr_gate(2,&nmi);
  1036. set_system_intr_gate(3, &int3); /* int3/4 can be called from all */
  1037. set_system_gate(4,&overflow);
  1038. set_trap_gate(5,&bounds);
  1039. set_trap_gate(6,&invalid_op);
  1040. set_trap_gate(7,&device_not_available);
  1041. set_task_gate(8,GDT_ENTRY_DOUBLEFAULT_TSS);
  1042. set_trap_gate(9,&coprocessor_segment_overrun);
  1043. set_trap_gate(10,&invalid_TSS);
  1044. set_trap_gate(11,&segment_not_present);
  1045. set_trap_gate(12,&stack_segment);
  1046. set_trap_gate(13,&general_protection);
  1047. set_intr_gate(14,&page_fault);
  1048. set_trap_gate(15,&spurious_interrupt_bug);
  1049. set_trap_gate(16,&coprocessor_error);
  1050. set_trap_gate(17,&alignment_check);
  1051. #ifdef CONFIG_X86_MCE
  1052. set_trap_gate(18,&machine_check);
  1053. #endif
  1054. set_trap_gate(19,&simd_coprocessor_error);
  1055. if (cpu_has_fxsr) {
  1056. /*
  1057. * Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned.
  1058. * Generates a compile-time "error: zero width for bit-field" if
  1059. * the alignment is wrong.
  1060. */
  1061. struct fxsrAlignAssert {
  1062. int _:!(offsetof(struct task_struct,
  1063. thread.i387.fxsave) & 15);
  1064. };
  1065. printk(KERN_INFO "Enabling fast FPU save and restore... ");
  1066. set_in_cr4(X86_CR4_OSFXSR);
  1067. printk("done.\n");
  1068. }
  1069. if (cpu_has_xmm) {
  1070. printk(KERN_INFO "Enabling unmasked SIMD FPU exception "
  1071. "support... ");
  1072. set_in_cr4(X86_CR4_OSXMMEXCPT);
  1073. printk("done.\n");
  1074. }
  1075. set_system_gate(SYSCALL_VECTOR,&system_call);
  1076. /*
  1077. * Should be a barrier for any external CPU state.
  1078. */
  1079. cpu_init();
  1080. trap_init_hook();
  1081. }
  1082. static int __init kstack_setup(char *s)
  1083. {
  1084. kstack_depth_to_print = simple_strtoul(s, NULL, 0);
  1085. return 1;
  1086. }
  1087. __setup("kstack=", kstack_setup);
  1088. static int __init call_trace_setup(char *s)
  1089. {
  1090. if (strcmp(s, "old") == 0)
  1091. call_trace = -1;
  1092. else if (strcmp(s, "both") == 0)
  1093. call_trace = 0;
  1094. else if (strcmp(s, "new") == 0)
  1095. call_trace = 1;
  1096. return 1;
  1097. }
  1098. __setup("call_trace=", call_trace_setup);