irq.c 7.9 KB

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  1. /*
  2. * linux/arch/i386/kernel/irq.c
  3. *
  4. * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
  5. *
  6. * This file contains the lowest level x86-specific interrupt
  7. * entry, irq-stacks and irq statistics code. All the remaining
  8. * irq logic is done by the generic kernel/irq/ code and
  9. * by the x86-specific irq controller code. (e.g. i8259.c and
  10. * io_apic.c.)
  11. */
  12. #include <asm/uaccess.h>
  13. #include <linux/module.h>
  14. #include <linux/seq_file.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel_stat.h>
  17. #include <linux/notifier.h>
  18. #include <linux/cpu.h>
  19. #include <linux/delay.h>
  20. DEFINE_PER_CPU(irq_cpustat_t, irq_stat) ____cacheline_internodealigned_in_smp;
  21. EXPORT_PER_CPU_SYMBOL(irq_stat);
  22. #ifndef CONFIG_X86_LOCAL_APIC
  23. /*
  24. * 'what should we do if we get a hw irq event on an illegal vector'.
  25. * each architecture has to answer this themselves.
  26. */
  27. void ack_bad_irq(unsigned int irq)
  28. {
  29. printk("unexpected IRQ trap at vector %02x\n", irq);
  30. }
  31. #endif
  32. #ifdef CONFIG_4KSTACKS
  33. /*
  34. * per-CPU IRQ handling contexts (thread information and stack)
  35. */
  36. union irq_ctx {
  37. struct thread_info tinfo;
  38. u32 stack[THREAD_SIZE/sizeof(u32)];
  39. };
  40. static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
  41. static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
  42. #endif
  43. /*
  44. * do_IRQ handles all normal device IRQ's (the special
  45. * SMP cross-CPU interrupts have their own specific
  46. * handlers).
  47. */
  48. fastcall unsigned int do_IRQ(struct pt_regs *regs)
  49. {
  50. /* high bit used in ret_from_ code */
  51. int irq = ~regs->orig_eax;
  52. #ifdef CONFIG_4KSTACKS
  53. union irq_ctx *curctx, *irqctx;
  54. u32 *isp;
  55. #endif
  56. if (unlikely((unsigned)irq >= NR_IRQS)) {
  57. printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
  58. __FUNCTION__, irq);
  59. BUG();
  60. }
  61. irq_enter();
  62. #ifdef CONFIG_DEBUG_STACKOVERFLOW
  63. /* Debugging check for stack overflow: is there less than 1KB free? */
  64. {
  65. long esp;
  66. __asm__ __volatile__("andl %%esp,%0" :
  67. "=r" (esp) : "0" (THREAD_SIZE - 1));
  68. if (unlikely(esp < (sizeof(struct thread_info) + STACK_WARN))) {
  69. printk("do_IRQ: stack overflow: %ld\n",
  70. esp - sizeof(struct thread_info));
  71. dump_stack();
  72. }
  73. }
  74. #endif
  75. if (!irq_desc[irq].handle_irq) {
  76. __do_IRQ(irq, regs);
  77. goto out_exit;
  78. }
  79. #ifdef CONFIG_4KSTACKS
  80. curctx = (union irq_ctx *) current_thread_info();
  81. irqctx = hardirq_ctx[smp_processor_id()];
  82. /*
  83. * this is where we switch to the IRQ stack. However, if we are
  84. * already using the IRQ stack (because we interrupted a hardirq
  85. * handler) we can't do that and just have to keep using the
  86. * current stack (which is the irq stack already after all)
  87. */
  88. if (curctx != irqctx) {
  89. int arg1, arg2, ebx;
  90. /* build the stack frame on the IRQ stack */
  91. isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
  92. irqctx->tinfo.task = curctx->tinfo.task;
  93. irqctx->tinfo.previous_esp = current_stack_pointer;
  94. /*
  95. * Copy the softirq bits in preempt_count so that the
  96. * softirq checks work in the hardirq context.
  97. */
  98. irqctx->tinfo.preempt_count =
  99. (irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) |
  100. (curctx->tinfo.preempt_count & SOFTIRQ_MASK);
  101. asm volatile(
  102. " xchgl %%ebx,%%esp \n"
  103. " call __do_IRQ \n"
  104. " movl %%ebx,%%esp \n"
  105. : "=a" (arg1), "=d" (arg2), "=b" (ebx)
  106. : "0" (irq), "1" (regs), "2" (isp)
  107. : "memory", "cc", "ecx"
  108. );
  109. } else
  110. #endif
  111. __do_IRQ(irq, regs);
  112. out_exit:
  113. irq_exit();
  114. return 1;
  115. }
  116. #ifdef CONFIG_4KSTACKS
  117. /*
  118. * These should really be __section__(".bss.page_aligned") as well, but
  119. * gcc's 3.0 and earlier don't handle that correctly.
  120. */
  121. static char softirq_stack[NR_CPUS * THREAD_SIZE]
  122. __attribute__((__aligned__(THREAD_SIZE)));
  123. static char hardirq_stack[NR_CPUS * THREAD_SIZE]
  124. __attribute__((__aligned__(THREAD_SIZE)));
  125. /*
  126. * allocate per-cpu stacks for hardirq and for softirq processing
  127. */
  128. void irq_ctx_init(int cpu)
  129. {
  130. union irq_ctx *irqctx;
  131. if (hardirq_ctx[cpu])
  132. return;
  133. irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE];
  134. irqctx->tinfo.task = NULL;
  135. irqctx->tinfo.exec_domain = NULL;
  136. irqctx->tinfo.cpu = cpu;
  137. irqctx->tinfo.preempt_count = HARDIRQ_OFFSET;
  138. irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
  139. hardirq_ctx[cpu] = irqctx;
  140. irqctx = (union irq_ctx*) &softirq_stack[cpu*THREAD_SIZE];
  141. irqctx->tinfo.task = NULL;
  142. irqctx->tinfo.exec_domain = NULL;
  143. irqctx->tinfo.cpu = cpu;
  144. irqctx->tinfo.preempt_count = 0;
  145. irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
  146. softirq_ctx[cpu] = irqctx;
  147. printk("CPU %u irqstacks, hard=%p soft=%p\n",
  148. cpu,hardirq_ctx[cpu],softirq_ctx[cpu]);
  149. }
  150. void irq_ctx_exit(int cpu)
  151. {
  152. hardirq_ctx[cpu] = NULL;
  153. }
  154. extern asmlinkage void __do_softirq(void);
  155. asmlinkage void do_softirq(void)
  156. {
  157. unsigned long flags;
  158. struct thread_info *curctx;
  159. union irq_ctx *irqctx;
  160. u32 *isp;
  161. if (in_interrupt())
  162. return;
  163. local_irq_save(flags);
  164. if (local_softirq_pending()) {
  165. curctx = current_thread_info();
  166. irqctx = softirq_ctx[smp_processor_id()];
  167. irqctx->tinfo.task = curctx->task;
  168. irqctx->tinfo.previous_esp = current_stack_pointer;
  169. /* build the stack frame on the softirq stack */
  170. isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
  171. asm volatile(
  172. " xchgl %%ebx,%%esp \n"
  173. " call __do_softirq \n"
  174. " movl %%ebx,%%esp \n"
  175. : "=b"(isp)
  176. : "0"(isp)
  177. : "memory", "cc", "edx", "ecx", "eax"
  178. );
  179. /*
  180. * Shouldnt happen, we returned above if in_interrupt():
  181. */
  182. WARN_ON_ONCE(softirq_count());
  183. }
  184. local_irq_restore(flags);
  185. }
  186. EXPORT_SYMBOL(do_softirq);
  187. #endif
  188. /*
  189. * Interrupt statistics:
  190. */
  191. atomic_t irq_err_count;
  192. /*
  193. * /proc/interrupts printing:
  194. */
  195. int show_interrupts(struct seq_file *p, void *v)
  196. {
  197. int i = *(loff_t *) v, j;
  198. struct irqaction * action;
  199. unsigned long flags;
  200. if (i == 0) {
  201. seq_printf(p, " ");
  202. for_each_online_cpu(j)
  203. seq_printf(p, "CPU%-8d",j);
  204. seq_putc(p, '\n');
  205. }
  206. if (i < NR_IRQS) {
  207. spin_lock_irqsave(&irq_desc[i].lock, flags);
  208. action = irq_desc[i].action;
  209. if (!action)
  210. goto skip;
  211. seq_printf(p, "%3d: ",i);
  212. #ifndef CONFIG_SMP
  213. seq_printf(p, "%10u ", kstat_irqs(i));
  214. #else
  215. for_each_online_cpu(j)
  216. seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
  217. #endif
  218. seq_printf(p, " %14s", irq_desc[i].chip->typename);
  219. seq_printf(p, " %s", action->name);
  220. for (action=action->next; action; action = action->next)
  221. seq_printf(p, ", %s", action->name);
  222. seq_putc(p, '\n');
  223. skip:
  224. spin_unlock_irqrestore(&irq_desc[i].lock, flags);
  225. } else if (i == NR_IRQS) {
  226. seq_printf(p, "NMI: ");
  227. for_each_online_cpu(j)
  228. seq_printf(p, "%10u ", nmi_count(j));
  229. seq_putc(p, '\n');
  230. #ifdef CONFIG_X86_LOCAL_APIC
  231. seq_printf(p, "LOC: ");
  232. for_each_online_cpu(j)
  233. seq_printf(p, "%10u ",
  234. per_cpu(irq_stat,j).apic_timer_irqs);
  235. seq_putc(p, '\n');
  236. #endif
  237. seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
  238. #if defined(CONFIG_X86_IO_APIC)
  239. seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
  240. #endif
  241. }
  242. return 0;
  243. }
  244. #ifdef CONFIG_HOTPLUG_CPU
  245. #include <mach_apic.h>
  246. void fixup_irqs(cpumask_t map)
  247. {
  248. unsigned int irq;
  249. static int warned;
  250. for (irq = 0; irq < NR_IRQS; irq++) {
  251. cpumask_t mask;
  252. if (irq == 2)
  253. continue;
  254. cpus_and(mask, irq_desc[irq].affinity, map);
  255. if (any_online_cpu(mask) == NR_CPUS) {
  256. printk("Breaking affinity for irq %i\n", irq);
  257. mask = map;
  258. }
  259. if (irq_desc[irq].chip->set_affinity)
  260. irq_desc[irq].chip->set_affinity(irq, mask);
  261. else if (irq_desc[irq].action && !(warned++))
  262. printk("Cannot set affinity for irq %i\n", irq);
  263. }
  264. #if 0
  265. barrier();
  266. /* Ingo Molnar says: "after the IO-APIC masks have been redirected
  267. [note the nop - the interrupt-enable boundary on x86 is two
  268. instructions from sti] - to flush out pending hardirqs and
  269. IPIs. After this point nothing is supposed to reach this CPU." */
  270. __asm__ __volatile__("sti; nop; cli");
  271. barrier();
  272. #else
  273. /* That doesn't seem sufficient. Give it 1ms. */
  274. local_irq_enable();
  275. mdelay(1);
  276. local_irq_disable();
  277. #endif
  278. }
  279. #endif