sa1111.c 32 KB

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  1. /*
  2. * linux/arch/arm/mach-sa1100/sa1111.c
  3. *
  4. * SA1111 support
  5. *
  6. * Original code by John Dorsey
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This file contains all generic SA1111 support.
  13. *
  14. * All initialization functions provided here are intended to be called
  15. * from machine specific code with proper arguments when required.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/init.h>
  19. #include <linux/kernel.h>
  20. #include <linux/delay.h>
  21. #include <linux/ptrace.h>
  22. #include <linux/errno.h>
  23. #include <linux/ioport.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/slab.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/dma-mapping.h>
  28. #include <linux/clk.h>
  29. #include <asm/hardware.h>
  30. #include <asm/mach-types.h>
  31. #include <asm/io.h>
  32. #include <asm/irq.h>
  33. #include <asm/mach/irq.h>
  34. #include <asm/sizes.h>
  35. #include <asm/hardware/sa1111.h>
  36. extern void __init sa1110_mb_enable(void);
  37. /*
  38. * We keep the following data for the overall SA1111. Note that the
  39. * struct device and struct resource are "fake"; they should be supplied
  40. * by the bus above us. However, in the interests of getting all SA1111
  41. * drivers converted over to the device model, we provide this as an
  42. * anchor point for all the other drivers.
  43. */
  44. struct sa1111 {
  45. struct device *dev;
  46. struct clk *clk;
  47. unsigned long phys;
  48. int irq;
  49. spinlock_t lock;
  50. void __iomem *base;
  51. };
  52. /*
  53. * We _really_ need to eliminate this. Its only users
  54. * are the PWM and DMA checking code.
  55. */
  56. static struct sa1111 *g_sa1111;
  57. struct sa1111_dev_info {
  58. unsigned long offset;
  59. unsigned long skpcr_mask;
  60. unsigned int devid;
  61. unsigned int irq[6];
  62. };
  63. static struct sa1111_dev_info sa1111_devices[] = {
  64. {
  65. .offset = SA1111_USB,
  66. .skpcr_mask = SKPCR_UCLKEN,
  67. .devid = SA1111_DEVID_USB,
  68. .irq = {
  69. IRQ_USBPWR,
  70. IRQ_HCIM,
  71. IRQ_HCIBUFFACC,
  72. IRQ_HCIRMTWKP,
  73. IRQ_NHCIMFCIR,
  74. IRQ_USB_PORT_RESUME
  75. },
  76. },
  77. {
  78. .offset = 0x0600,
  79. .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN,
  80. .devid = SA1111_DEVID_SAC,
  81. .irq = {
  82. AUDXMTDMADONEA,
  83. AUDXMTDMADONEB,
  84. AUDRCVDMADONEA,
  85. AUDRCVDMADONEB
  86. },
  87. },
  88. {
  89. .offset = 0x0800,
  90. .skpcr_mask = SKPCR_SCLKEN,
  91. .devid = SA1111_DEVID_SSP,
  92. },
  93. {
  94. .offset = SA1111_KBD,
  95. .skpcr_mask = SKPCR_PTCLKEN,
  96. .devid = SA1111_DEVID_PS2,
  97. .irq = {
  98. IRQ_TPRXINT,
  99. IRQ_TPTXINT
  100. },
  101. },
  102. {
  103. .offset = SA1111_MSE,
  104. .skpcr_mask = SKPCR_PMCLKEN,
  105. .devid = SA1111_DEVID_PS2,
  106. .irq = {
  107. IRQ_MSRXINT,
  108. IRQ_MSTXINT
  109. },
  110. },
  111. {
  112. .offset = 0x1800,
  113. .skpcr_mask = 0,
  114. .devid = SA1111_DEVID_PCMCIA,
  115. .irq = {
  116. IRQ_S0_READY_NINT,
  117. IRQ_S0_CD_VALID,
  118. IRQ_S0_BVD1_STSCHG,
  119. IRQ_S1_READY_NINT,
  120. IRQ_S1_CD_VALID,
  121. IRQ_S1_BVD1_STSCHG,
  122. },
  123. },
  124. };
  125. void __init sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes)
  126. {
  127. unsigned int sz = SZ_1M >> PAGE_SHIFT;
  128. if (node != 0)
  129. sz = 0;
  130. size[1] = size[0] - sz;
  131. size[0] = sz;
  132. }
  133. /*
  134. * SA1111 interrupt support. Since clearing an IRQ while there are
  135. * active IRQs causes the interrupt output to pulse, the upper levels
  136. * will call us again if there are more interrupts to process.
  137. */
  138. static void
  139. sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
  140. {
  141. unsigned int stat0, stat1, i;
  142. void __iomem *base = get_irq_data(irq);
  143. stat0 = sa1111_readl(base + SA1111_INTSTATCLR0);
  144. stat1 = sa1111_readl(base + SA1111_INTSTATCLR1);
  145. sa1111_writel(stat0, base + SA1111_INTSTATCLR0);
  146. desc->chip->ack(irq);
  147. sa1111_writel(stat1, base + SA1111_INTSTATCLR1);
  148. if (stat0 == 0 && stat1 == 0) {
  149. do_bad_IRQ(irq, desc, regs);
  150. return;
  151. }
  152. for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1)
  153. if (stat0 & 1)
  154. handle_edge_irq(i, irq_desc + i, regs);
  155. for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1)
  156. if (stat1 & 1)
  157. handle_edge_irq(i, irq_desc + i, regs);
  158. /* For level-based interrupts */
  159. desc->chip->unmask(irq);
  160. }
  161. #define SA1111_IRQMASK_LO(x) (1 << (x - IRQ_SA1111_START))
  162. #define SA1111_IRQMASK_HI(x) (1 << (x - IRQ_SA1111_START - 32))
  163. static void sa1111_ack_irq(unsigned int irq)
  164. {
  165. }
  166. static void sa1111_mask_lowirq(unsigned int irq)
  167. {
  168. void __iomem *mapbase = get_irq_chipdata(irq);
  169. unsigned long ie0;
  170. ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
  171. ie0 &= ~SA1111_IRQMASK_LO(irq);
  172. writel(ie0, mapbase + SA1111_INTEN0);
  173. }
  174. static void sa1111_unmask_lowirq(unsigned int irq)
  175. {
  176. void __iomem *mapbase = get_irq_chipdata(irq);
  177. unsigned long ie0;
  178. ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
  179. ie0 |= SA1111_IRQMASK_LO(irq);
  180. sa1111_writel(ie0, mapbase + SA1111_INTEN0);
  181. }
  182. /*
  183. * Attempt to re-trigger the interrupt. The SA1111 contains a register
  184. * (INTSET) which claims to do this. However, in practice no amount of
  185. * manipulation of INTEN and INTSET guarantees that the interrupt will
  186. * be triggered. In fact, its very difficult, if not impossible to get
  187. * INTSET to re-trigger the interrupt.
  188. */
  189. static int sa1111_retrigger_lowirq(unsigned int irq)
  190. {
  191. unsigned int mask = SA1111_IRQMASK_LO(irq);
  192. void __iomem *mapbase = get_irq_chipdata(irq);
  193. unsigned long ip0;
  194. int i;
  195. ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
  196. for (i = 0; i < 8; i++) {
  197. sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0);
  198. sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
  199. if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
  200. break;
  201. }
  202. if (i == 8)
  203. printk(KERN_ERR "Danger Will Robinson: failed to "
  204. "re-trigger IRQ%d\n", irq);
  205. return i == 8 ? -1 : 0;
  206. }
  207. static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
  208. {
  209. unsigned int mask = SA1111_IRQMASK_LO(irq);
  210. void __iomem *mapbase = get_irq_chipdata(irq);
  211. unsigned long ip0;
  212. if (flags == IRQT_PROBE)
  213. return 0;
  214. if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
  215. return -EINVAL;
  216. ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
  217. if (flags & __IRQT_RISEDGE)
  218. ip0 &= ~mask;
  219. else
  220. ip0 |= mask;
  221. sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
  222. sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0);
  223. return 0;
  224. }
  225. static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
  226. {
  227. unsigned int mask = SA1111_IRQMASK_LO(irq);
  228. void __iomem *mapbase = get_irq_chipdata(irq);
  229. unsigned long we0;
  230. we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
  231. if (on)
  232. we0 |= mask;
  233. else
  234. we0 &= ~mask;
  235. sa1111_writel(we0, mapbase + SA1111_WAKEEN0);
  236. return 0;
  237. }
  238. static struct irqchip sa1111_low_chip = {
  239. .ack = sa1111_ack_irq,
  240. .mask = sa1111_mask_lowirq,
  241. .unmask = sa1111_unmask_lowirq,
  242. .retrigger = sa1111_retrigger_lowirq,
  243. .set_type = sa1111_type_lowirq,
  244. .set_wake = sa1111_wake_lowirq,
  245. };
  246. static void sa1111_mask_highirq(unsigned int irq)
  247. {
  248. void __iomem *mapbase = get_irq_chipdata(irq);
  249. unsigned long ie1;
  250. ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
  251. ie1 &= ~SA1111_IRQMASK_HI(irq);
  252. sa1111_writel(ie1, mapbase + SA1111_INTEN1);
  253. }
  254. static void sa1111_unmask_highirq(unsigned int irq)
  255. {
  256. void __iomem *mapbase = get_irq_chipdata(irq);
  257. unsigned long ie1;
  258. ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
  259. ie1 |= SA1111_IRQMASK_HI(irq);
  260. sa1111_writel(ie1, mapbase + SA1111_INTEN1);
  261. }
  262. /*
  263. * Attempt to re-trigger the interrupt. The SA1111 contains a register
  264. * (INTSET) which claims to do this. However, in practice no amount of
  265. * manipulation of INTEN and INTSET guarantees that the interrupt will
  266. * be triggered. In fact, its very difficult, if not impossible to get
  267. * INTSET to re-trigger the interrupt.
  268. */
  269. static int sa1111_retrigger_highirq(unsigned int irq)
  270. {
  271. unsigned int mask = SA1111_IRQMASK_HI(irq);
  272. void __iomem *mapbase = get_irq_chipdata(irq);
  273. unsigned long ip1;
  274. int i;
  275. ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
  276. for (i = 0; i < 8; i++) {
  277. sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1);
  278. sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
  279. if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
  280. break;
  281. }
  282. if (i == 8)
  283. printk(KERN_ERR "Danger Will Robinson: failed to "
  284. "re-trigger IRQ%d\n", irq);
  285. return i == 8 ? -1 : 0;
  286. }
  287. static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
  288. {
  289. unsigned int mask = SA1111_IRQMASK_HI(irq);
  290. void __iomem *mapbase = get_irq_chipdata(irq);
  291. unsigned long ip1;
  292. if (flags == IRQT_PROBE)
  293. return 0;
  294. if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
  295. return -EINVAL;
  296. ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
  297. if (flags & __IRQT_RISEDGE)
  298. ip1 &= ~mask;
  299. else
  300. ip1 |= mask;
  301. sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
  302. sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1);
  303. return 0;
  304. }
  305. static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
  306. {
  307. unsigned int mask = SA1111_IRQMASK_HI(irq);
  308. void __iomem *mapbase = get_irq_chipdata(irq);
  309. unsigned long we1;
  310. we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
  311. if (on)
  312. we1 |= mask;
  313. else
  314. we1 &= ~mask;
  315. sa1111_writel(we1, mapbase + SA1111_WAKEEN1);
  316. return 0;
  317. }
  318. static struct irqchip sa1111_high_chip = {
  319. .ack = sa1111_ack_irq,
  320. .mask = sa1111_mask_highirq,
  321. .unmask = sa1111_unmask_highirq,
  322. .retrigger = sa1111_retrigger_highirq,
  323. .set_type = sa1111_type_highirq,
  324. .set_wake = sa1111_wake_highirq,
  325. };
  326. static void sa1111_setup_irq(struct sa1111 *sachip)
  327. {
  328. void __iomem *irqbase = sachip->base + SA1111_INTC;
  329. unsigned int irq;
  330. /*
  331. * We're guaranteed that this region hasn't been taken.
  332. */
  333. request_mem_region(sachip->phys + SA1111_INTC, 512, "irq");
  334. /* disable all IRQs */
  335. sa1111_writel(0, irqbase + SA1111_INTEN0);
  336. sa1111_writel(0, irqbase + SA1111_INTEN1);
  337. sa1111_writel(0, irqbase + SA1111_WAKEEN0);
  338. sa1111_writel(0, irqbase + SA1111_WAKEEN1);
  339. /*
  340. * detect on rising edge. Note: Feb 2001 Errata for SA1111
  341. * specifies that S0ReadyInt and S1ReadyInt should be '1'.
  342. */
  343. sa1111_writel(0, irqbase + SA1111_INTPOL0);
  344. sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) |
  345. SA1111_IRQMASK_HI(IRQ_S1_READY_NINT),
  346. irqbase + SA1111_INTPOL1);
  347. /* clear all IRQs */
  348. sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0);
  349. sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1);
  350. for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
  351. set_irq_chip(irq, &sa1111_low_chip);
  352. set_irq_chipdata(irq, irqbase);
  353. set_irq_handler(irq, do_edge_IRQ);
  354. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  355. }
  356. for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
  357. set_irq_chip(irq, &sa1111_high_chip);
  358. set_irq_chipdata(irq, irqbase);
  359. set_irq_handler(irq, do_edge_IRQ);
  360. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  361. }
  362. /*
  363. * Register SA1111 interrupt
  364. */
  365. set_irq_type(sachip->irq, IRQT_RISING);
  366. set_irq_data(sachip->irq, irqbase);
  367. set_irq_chained_handler(sachip->irq, sa1111_irq_handler);
  368. }
  369. /*
  370. * Bring the SA1111 out of reset. This requires a set procedure:
  371. * 1. nRESET asserted (by hardware)
  372. * 2. CLK turned on from SA1110
  373. * 3. nRESET deasserted
  374. * 4. VCO turned on, PLL_BYPASS turned off
  375. * 5. Wait lock time, then assert RCLKEn
  376. * 7. PCR set to allow clocking of individual functions
  377. *
  378. * Until we've done this, the only registers we can access are:
  379. * SBI_SKCR
  380. * SBI_SMCR
  381. * SBI_SKID
  382. */
  383. static void sa1111_wake(struct sa1111 *sachip)
  384. {
  385. unsigned long flags, r;
  386. spin_lock_irqsave(&sachip->lock, flags);
  387. clk_enable(sachip->clk);
  388. /*
  389. * Turn VCO on, and disable PLL Bypass.
  390. */
  391. r = sa1111_readl(sachip->base + SA1111_SKCR);
  392. r &= ~SKCR_VCO_OFF;
  393. sa1111_writel(r, sachip->base + SA1111_SKCR);
  394. r |= SKCR_PLL_BYPASS | SKCR_OE_EN;
  395. sa1111_writel(r, sachip->base + SA1111_SKCR);
  396. /*
  397. * Wait lock time. SA1111 manual _doesn't_
  398. * specify a figure for this! We choose 100us.
  399. */
  400. udelay(100);
  401. /*
  402. * Enable RCLK. We also ensure that RDYEN is set.
  403. */
  404. r |= SKCR_RCLKEN | SKCR_RDYEN;
  405. sa1111_writel(r, sachip->base + SA1111_SKCR);
  406. /*
  407. * Wait 14 RCLK cycles for the chip to finish coming out
  408. * of reset. (RCLK=24MHz). This is 590ns.
  409. */
  410. udelay(1);
  411. /*
  412. * Ensure all clocks are initially off.
  413. */
  414. sa1111_writel(0, sachip->base + SA1111_SKPCR);
  415. spin_unlock_irqrestore(&sachip->lock, flags);
  416. }
  417. #ifdef CONFIG_ARCH_SA1100
  418. static u32 sa1111_dma_mask[] = {
  419. ~0,
  420. ~(1 << 20),
  421. ~(1 << 23),
  422. ~(1 << 24),
  423. ~(1 << 25),
  424. ~(1 << 20),
  425. ~(1 << 20),
  426. 0,
  427. };
  428. /*
  429. * Configure the SA1111 shared memory controller.
  430. */
  431. void
  432. sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
  433. unsigned int cas_latency)
  434. {
  435. unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC);
  436. if (cas_latency == 3)
  437. smcr |= SMCR_CLAT;
  438. sa1111_writel(smcr, sachip->base + SA1111_SMCR);
  439. /*
  440. * Now clear the bits in the DMA mask to work around the SA1111
  441. * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion
  442. * Chip Specification Update, June 2000, Erratum #7).
  443. */
  444. if (sachip->dev->dma_mask)
  445. *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2];
  446. sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2];
  447. }
  448. #endif
  449. static void sa1111_dev_release(struct device *_dev)
  450. {
  451. struct sa1111_dev *dev = SA1111_DEV(_dev);
  452. release_resource(&dev->res);
  453. kfree(dev);
  454. }
  455. static int
  456. sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
  457. struct sa1111_dev_info *info)
  458. {
  459. struct sa1111_dev *dev;
  460. int ret;
  461. dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL);
  462. if (!dev) {
  463. ret = -ENOMEM;
  464. goto out;
  465. }
  466. snprintf(dev->dev.bus_id, sizeof(dev->dev.bus_id),
  467. "%4.4lx", info->offset);
  468. dev->devid = info->devid;
  469. dev->dev.parent = sachip->dev;
  470. dev->dev.bus = &sa1111_bus_type;
  471. dev->dev.release = sa1111_dev_release;
  472. dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask;
  473. dev->res.start = sachip->phys + info->offset;
  474. dev->res.end = dev->res.start + 511;
  475. dev->res.name = dev->dev.bus_id;
  476. dev->res.flags = IORESOURCE_MEM;
  477. dev->mapbase = sachip->base + info->offset;
  478. dev->skpcr_mask = info->skpcr_mask;
  479. memmove(dev->irq, info->irq, sizeof(dev->irq));
  480. ret = request_resource(parent, &dev->res);
  481. if (ret) {
  482. printk("SA1111: failed to allocate resource for %s\n",
  483. dev->res.name);
  484. kfree(dev);
  485. goto out;
  486. }
  487. ret = device_register(&dev->dev);
  488. if (ret) {
  489. release_resource(&dev->res);
  490. kfree(dev);
  491. goto out;
  492. }
  493. /*
  494. * If the parent device has a DMA mask associated with it,
  495. * propagate it down to the children.
  496. */
  497. if (sachip->dev->dma_mask) {
  498. dev->dma_mask = *sachip->dev->dma_mask;
  499. dev->dev.dma_mask = &dev->dma_mask;
  500. if (dev->dma_mask != 0xffffffffUL) {
  501. ret = dmabounce_register_dev(&dev->dev, 1024, 4096);
  502. if (ret) {
  503. printk("SA1111: Failed to register %s with dmabounce", dev->dev.bus_id);
  504. device_unregister(&dev->dev);
  505. }
  506. }
  507. }
  508. out:
  509. return ret;
  510. }
  511. /**
  512. * sa1111_probe - probe for a single SA1111 chip.
  513. * @phys_addr: physical address of device.
  514. *
  515. * Probe for a SA1111 chip. This must be called
  516. * before any other SA1111-specific code.
  517. *
  518. * Returns:
  519. * %-ENODEV device not found.
  520. * %-EBUSY physical address already marked in-use.
  521. * %0 successful.
  522. */
  523. static int
  524. __sa1111_probe(struct device *me, struct resource *mem, int irq)
  525. {
  526. struct sa1111 *sachip;
  527. unsigned long id;
  528. unsigned int has_devs, val;
  529. int i, ret = -ENODEV;
  530. sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL);
  531. if (!sachip)
  532. return -ENOMEM;
  533. sachip->clk = clk_get(me, "GPIO27_CLK");
  534. if (!sachip->clk) {
  535. ret = PTR_ERR(sachip->clk);
  536. goto err_free;
  537. }
  538. spin_lock_init(&sachip->lock);
  539. sachip->dev = me;
  540. dev_set_drvdata(sachip->dev, sachip);
  541. sachip->phys = mem->start;
  542. sachip->irq = irq;
  543. /*
  544. * Map the whole region. This also maps the
  545. * registers for our children.
  546. */
  547. sachip->base = ioremap(mem->start, PAGE_SIZE * 2);
  548. if (!sachip->base) {
  549. ret = -ENOMEM;
  550. goto err_clkput;
  551. }
  552. /*
  553. * Probe for the chip. Only touch the SBI registers.
  554. */
  555. id = sa1111_readl(sachip->base + SA1111_SKID);
  556. if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
  557. printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
  558. ret = -ENODEV;
  559. goto err_unmap;
  560. }
  561. printk(KERN_INFO "SA1111 Microprocessor Companion Chip: "
  562. "silicon revision %lx, metal revision %lx\n",
  563. (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK));
  564. /*
  565. * We found it. Wake the chip up, and initialise.
  566. */
  567. sa1111_wake(sachip);
  568. #ifdef CONFIG_ARCH_SA1100
  569. /*
  570. * The SDRAM configuration of the SA1110 and the SA1111 must
  571. * match. This is very important to ensure that SA1111 accesses
  572. * don't corrupt the SDRAM. Note that this ungates the SA1111's
  573. * MBGNT signal, so we must have called sa1110_mb_disable()
  574. * beforehand.
  575. */
  576. sa1111_configure_smc(sachip, 1,
  577. FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
  578. FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
  579. /*
  580. * We only need to turn on DCLK whenever we want to use the
  581. * DMA. It can otherwise be held firmly in the off position.
  582. * (currently, we always enable it.)
  583. */
  584. val = sa1111_readl(sachip->base + SA1111_SKPCR);
  585. sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR);
  586. /*
  587. * Enable the SA1110 memory bus request and grant signals.
  588. */
  589. sa1110_mb_enable();
  590. #endif
  591. /*
  592. * The interrupt controller must be initialised before any
  593. * other device to ensure that the interrupts are available.
  594. */
  595. if (sachip->irq != NO_IRQ)
  596. sa1111_setup_irq(sachip);
  597. g_sa1111 = sachip;
  598. has_devs = ~0;
  599. if (machine_is_assabet() || machine_is_jornada720() ||
  600. machine_is_badge4())
  601. has_devs &= ~(1 << 4);
  602. else
  603. has_devs &= ~(1 << 1);
  604. for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++)
  605. if (has_devs & (1 << i))
  606. sa1111_init_one_child(sachip, mem, &sa1111_devices[i]);
  607. return 0;
  608. err_unmap:
  609. iounmap(sachip->base);
  610. err_clkput:
  611. clk_put(sachip->clk);
  612. err_free:
  613. kfree(sachip);
  614. return ret;
  615. }
  616. static int sa1111_remove_one(struct device *dev, void *data)
  617. {
  618. device_unregister(dev);
  619. return 0;
  620. }
  621. static void __sa1111_remove(struct sa1111 *sachip)
  622. {
  623. void __iomem *irqbase = sachip->base + SA1111_INTC;
  624. device_for_each_child(sachip->dev, NULL, sa1111_remove_one);
  625. /* disable all IRQs */
  626. sa1111_writel(0, irqbase + SA1111_INTEN0);
  627. sa1111_writel(0, irqbase + SA1111_INTEN1);
  628. sa1111_writel(0, irqbase + SA1111_WAKEEN0);
  629. sa1111_writel(0, irqbase + SA1111_WAKEEN1);
  630. clk_disable(sachip->clk);
  631. if (sachip->irq != NO_IRQ) {
  632. set_irq_chained_handler(sachip->irq, NULL);
  633. set_irq_data(sachip->irq, NULL);
  634. release_mem_region(sachip->phys + SA1111_INTC, 512);
  635. }
  636. iounmap(sachip->base);
  637. clk_put(sachip->clk);
  638. kfree(sachip);
  639. }
  640. /*
  641. * According to the "Intel StrongARM SA-1111 Microprocessor Companion
  642. * Chip Specification Update" (June 2000), erratum #7, there is a
  643. * significant bug in the SA1111 SDRAM shared memory controller. If
  644. * an access to a region of memory above 1MB relative to the bank base,
  645. * it is important that address bit 10 _NOT_ be asserted. Depending
  646. * on the configuration of the RAM, bit 10 may correspond to one
  647. * of several different (processor-relative) address bits.
  648. *
  649. * This routine only identifies whether or not a given DMA address
  650. * is susceptible to the bug.
  651. *
  652. * This should only get called for sa1111_device types due to the
  653. * way we configure our device dma_masks.
  654. */
  655. int dma_needs_bounce(struct device *dev, dma_addr_t addr, size_t size)
  656. {
  657. /*
  658. * Section 4.6 of the "Intel StrongARM SA-1111 Development Module
  659. * User's Guide" mentions that jumpers R51 and R52 control the
  660. * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or
  661. * SDRAM bank 1 on Neponset). The default configuration selects
  662. * Assabet, so any address in bank 1 is necessarily invalid.
  663. */
  664. return ((machine_is_assabet() || machine_is_pfs168()) &&
  665. (addr >= 0xc8000000 || (addr + size) >= 0xc8000000));
  666. }
  667. struct sa1111_save_data {
  668. unsigned int skcr;
  669. unsigned int skpcr;
  670. unsigned int skcdr;
  671. unsigned char skaud;
  672. unsigned char skpwm0;
  673. unsigned char skpwm1;
  674. /*
  675. * Interrupt controller
  676. */
  677. unsigned int intpol0;
  678. unsigned int intpol1;
  679. unsigned int inten0;
  680. unsigned int inten1;
  681. unsigned int wakepol0;
  682. unsigned int wakepol1;
  683. unsigned int wakeen0;
  684. unsigned int wakeen1;
  685. };
  686. #ifdef CONFIG_PM
  687. static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
  688. {
  689. struct sa1111 *sachip = platform_get_drvdata(dev);
  690. struct sa1111_save_data *save;
  691. unsigned long flags;
  692. unsigned int val;
  693. void __iomem *base;
  694. save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
  695. if (!save)
  696. return -ENOMEM;
  697. dev->dev.power.saved_state = save;
  698. spin_lock_irqsave(&sachip->lock, flags);
  699. /*
  700. * Save state.
  701. */
  702. base = sachip->base;
  703. save->skcr = sa1111_readl(base + SA1111_SKCR);
  704. save->skpcr = sa1111_readl(base + SA1111_SKPCR);
  705. save->skcdr = sa1111_readl(base + SA1111_SKCDR);
  706. save->skaud = sa1111_readl(base + SA1111_SKAUD);
  707. save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0);
  708. save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1);
  709. base = sachip->base + SA1111_INTC;
  710. save->intpol0 = sa1111_readl(base + SA1111_INTPOL0);
  711. save->intpol1 = sa1111_readl(base + SA1111_INTPOL1);
  712. save->inten0 = sa1111_readl(base + SA1111_INTEN0);
  713. save->inten1 = sa1111_readl(base + SA1111_INTEN1);
  714. save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0);
  715. save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1);
  716. save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0);
  717. save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1);
  718. /*
  719. * Disable.
  720. */
  721. val = sa1111_readl(sachip->base + SA1111_SKCR);
  722. sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR);
  723. sa1111_writel(0, sachip->base + SA1111_SKPWM0);
  724. sa1111_writel(0, sachip->base + SA1111_SKPWM1);
  725. clk_disable(sachip->clk);
  726. spin_unlock_irqrestore(&sachip->lock, flags);
  727. return 0;
  728. }
  729. /*
  730. * sa1111_resume - Restore the SA1111 device state.
  731. * @dev: device to restore
  732. *
  733. * Restore the general state of the SA1111; clock control and
  734. * interrupt controller. Other parts of the SA1111 must be
  735. * restored by their respective drivers, and must be called
  736. * via LDM after this function.
  737. */
  738. static int sa1111_resume(struct platform_device *dev)
  739. {
  740. struct sa1111 *sachip = platform_get_drvdata(dev);
  741. struct sa1111_save_data *save;
  742. unsigned long flags, id;
  743. void __iomem *base;
  744. save = (struct sa1111_save_data *)dev->dev.power.saved_state;
  745. if (!save)
  746. return 0;
  747. spin_lock_irqsave(&sachip->lock, flags);
  748. /*
  749. * Ensure that the SA1111 is still here.
  750. * FIXME: shouldn't do this here.
  751. */
  752. id = sa1111_readl(sachip->base + SA1111_SKID);
  753. if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
  754. __sa1111_remove(sachip);
  755. platform_set_drvdata(dev, NULL);
  756. kfree(save);
  757. return 0;
  758. }
  759. /*
  760. * First of all, wake up the chip.
  761. */
  762. sa1111_wake(sachip);
  763. sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
  764. sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
  765. base = sachip->base;
  766. sa1111_writel(save->skcr, base + SA1111_SKCR);
  767. sa1111_writel(save->skpcr, base + SA1111_SKPCR);
  768. sa1111_writel(save->skcdr, base + SA1111_SKCDR);
  769. sa1111_writel(save->skaud, base + SA1111_SKAUD);
  770. sa1111_writel(save->skpwm0, base + SA1111_SKPWM0);
  771. sa1111_writel(save->skpwm1, base + SA1111_SKPWM1);
  772. base = sachip->base + SA1111_INTC;
  773. sa1111_writel(save->intpol0, base + SA1111_INTPOL0);
  774. sa1111_writel(save->intpol1, base + SA1111_INTPOL1);
  775. sa1111_writel(save->inten0, base + SA1111_INTEN0);
  776. sa1111_writel(save->inten1, base + SA1111_INTEN1);
  777. sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0);
  778. sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1);
  779. sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0);
  780. sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1);
  781. spin_unlock_irqrestore(&sachip->lock, flags);
  782. dev->dev.power.saved_state = NULL;
  783. kfree(save);
  784. return 0;
  785. }
  786. #else
  787. #define sa1111_suspend NULL
  788. #define sa1111_resume NULL
  789. #endif
  790. static int sa1111_probe(struct platform_device *pdev)
  791. {
  792. struct resource *mem;
  793. int irq;
  794. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  795. if (!mem)
  796. return -EINVAL;
  797. irq = platform_get_irq(pdev, 0);
  798. if (irq < 0)
  799. return -ENXIO;
  800. return __sa1111_probe(&pdev->dev, mem, irq);
  801. }
  802. static int sa1111_remove(struct platform_device *pdev)
  803. {
  804. struct sa1111 *sachip = platform_get_drvdata(pdev);
  805. if (sachip) {
  806. __sa1111_remove(sachip);
  807. platform_set_drvdata(pdev, NULL);
  808. #ifdef CONFIG_PM
  809. kfree(pdev->dev.power.saved_state);
  810. pdev->dev.power.saved_state = NULL;
  811. #endif
  812. }
  813. return 0;
  814. }
  815. /*
  816. * Not sure if this should be on the system bus or not yet.
  817. * We really want some way to register a system device at
  818. * the per-machine level, and then have this driver pick
  819. * up the registered devices.
  820. *
  821. * We also need to handle the SDRAM configuration for
  822. * PXA250/SA1110 machine classes.
  823. */
  824. static struct platform_driver sa1111_device_driver = {
  825. .probe = sa1111_probe,
  826. .remove = sa1111_remove,
  827. .suspend = sa1111_suspend,
  828. .resume = sa1111_resume,
  829. .driver = {
  830. .name = "sa1111",
  831. },
  832. };
  833. /*
  834. * Get the parent device driver (us) structure
  835. * from a child function device
  836. */
  837. static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev)
  838. {
  839. return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent);
  840. }
  841. /*
  842. * The bits in the opdiv field are non-linear.
  843. */
  844. static unsigned char opdiv_table[] = { 1, 4, 2, 8 };
  845. static unsigned int __sa1111_pll_clock(struct sa1111 *sachip)
  846. {
  847. unsigned int skcdr, fbdiv, ipdiv, opdiv;
  848. skcdr = sa1111_readl(sachip->base + SA1111_SKCDR);
  849. fbdiv = (skcdr & 0x007f) + 2;
  850. ipdiv = ((skcdr & 0x0f80) >> 7) + 2;
  851. opdiv = opdiv_table[(skcdr & 0x3000) >> 12];
  852. return 3686400 * fbdiv / (ipdiv * opdiv);
  853. }
  854. /**
  855. * sa1111_pll_clock - return the current PLL clock frequency.
  856. * @sadev: SA1111 function block
  857. *
  858. * BUG: we should look at SKCR. We also blindly believe that
  859. * the chip is being fed with the 3.6864MHz clock.
  860. *
  861. * Returns the PLL clock in Hz.
  862. */
  863. unsigned int sa1111_pll_clock(struct sa1111_dev *sadev)
  864. {
  865. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  866. return __sa1111_pll_clock(sachip);
  867. }
  868. /**
  869. * sa1111_select_audio_mode - select I2S or AC link mode
  870. * @sadev: SA1111 function block
  871. * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S
  872. *
  873. * Frob the SKCR to select AC Link mode or I2S mode for
  874. * the audio block.
  875. */
  876. void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode)
  877. {
  878. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  879. unsigned long flags;
  880. unsigned int val;
  881. spin_lock_irqsave(&sachip->lock, flags);
  882. val = sa1111_readl(sachip->base + SA1111_SKCR);
  883. if (mode == SA1111_AUDIO_I2S) {
  884. val &= ~SKCR_SELAC;
  885. } else {
  886. val |= SKCR_SELAC;
  887. }
  888. sa1111_writel(val, sachip->base + SA1111_SKCR);
  889. spin_unlock_irqrestore(&sachip->lock, flags);
  890. }
  891. /**
  892. * sa1111_set_audio_rate - set the audio sample rate
  893. * @sadev: SA1111 SAC function block
  894. * @rate: sample rate to select
  895. */
  896. int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate)
  897. {
  898. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  899. unsigned int div;
  900. if (sadev->devid != SA1111_DEVID_SAC)
  901. return -EINVAL;
  902. div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate;
  903. if (div == 0)
  904. div = 1;
  905. if (div > 128)
  906. div = 128;
  907. sa1111_writel(div - 1, sachip->base + SA1111_SKAUD);
  908. return 0;
  909. }
  910. /**
  911. * sa1111_get_audio_rate - get the audio sample rate
  912. * @sadev: SA1111 SAC function block device
  913. */
  914. int sa1111_get_audio_rate(struct sa1111_dev *sadev)
  915. {
  916. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  917. unsigned long div;
  918. if (sadev->devid != SA1111_DEVID_SAC)
  919. return -EINVAL;
  920. div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1;
  921. return __sa1111_pll_clock(sachip) / (256 * div);
  922. }
  923. void sa1111_set_io_dir(struct sa1111_dev *sadev,
  924. unsigned int bits, unsigned int dir,
  925. unsigned int sleep_dir)
  926. {
  927. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  928. unsigned long flags;
  929. unsigned int val;
  930. void __iomem *gpio = sachip->base + SA1111_GPIO;
  931. #define MODIFY_BITS(port, mask, dir) \
  932. if (mask) { \
  933. val = sa1111_readl(port); \
  934. val &= ~(mask); \
  935. val |= (dir) & (mask); \
  936. sa1111_writel(val, port); \
  937. }
  938. spin_lock_irqsave(&sachip->lock, flags);
  939. MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir);
  940. MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8);
  941. MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16);
  942. MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir);
  943. MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8);
  944. MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16);
  945. spin_unlock_irqrestore(&sachip->lock, flags);
  946. }
  947. void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
  948. {
  949. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  950. unsigned long flags;
  951. unsigned int val;
  952. void __iomem *gpio = sachip->base + SA1111_GPIO;
  953. spin_lock_irqsave(&sachip->lock, flags);
  954. MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v);
  955. MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8);
  956. MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16);
  957. spin_unlock_irqrestore(&sachip->lock, flags);
  958. }
  959. void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
  960. {
  961. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  962. unsigned long flags;
  963. unsigned int val;
  964. void __iomem *gpio = sachip->base + SA1111_GPIO;
  965. spin_lock_irqsave(&sachip->lock, flags);
  966. MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v);
  967. MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8);
  968. MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16);
  969. spin_unlock_irqrestore(&sachip->lock, flags);
  970. }
  971. /*
  972. * Individual device operations.
  973. */
  974. /**
  975. * sa1111_enable_device - enable an on-chip SA1111 function block
  976. * @sadev: SA1111 function block device to enable
  977. */
  978. void sa1111_enable_device(struct sa1111_dev *sadev)
  979. {
  980. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  981. unsigned long flags;
  982. unsigned int val;
  983. spin_lock_irqsave(&sachip->lock, flags);
  984. val = sa1111_readl(sachip->base + SA1111_SKPCR);
  985. sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
  986. spin_unlock_irqrestore(&sachip->lock, flags);
  987. }
  988. /**
  989. * sa1111_disable_device - disable an on-chip SA1111 function block
  990. * @sadev: SA1111 function block device to disable
  991. */
  992. void sa1111_disable_device(struct sa1111_dev *sadev)
  993. {
  994. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  995. unsigned long flags;
  996. unsigned int val;
  997. spin_lock_irqsave(&sachip->lock, flags);
  998. val = sa1111_readl(sachip->base + SA1111_SKPCR);
  999. sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
  1000. spin_unlock_irqrestore(&sachip->lock, flags);
  1001. }
  1002. /*
  1003. * SA1111 "Register Access Bus."
  1004. *
  1005. * We model this as a regular bus type, and hang devices directly
  1006. * off this.
  1007. */
  1008. static int sa1111_match(struct device *_dev, struct device_driver *_drv)
  1009. {
  1010. struct sa1111_dev *dev = SA1111_DEV(_dev);
  1011. struct sa1111_driver *drv = SA1111_DRV(_drv);
  1012. return dev->devid == drv->devid;
  1013. }
  1014. static int sa1111_bus_suspend(struct device *dev, pm_message_t state)
  1015. {
  1016. struct sa1111_dev *sadev = SA1111_DEV(dev);
  1017. struct sa1111_driver *drv = SA1111_DRV(dev->driver);
  1018. int ret = 0;
  1019. if (drv && drv->suspend)
  1020. ret = drv->suspend(sadev, state);
  1021. return ret;
  1022. }
  1023. static int sa1111_bus_resume(struct device *dev)
  1024. {
  1025. struct sa1111_dev *sadev = SA1111_DEV(dev);
  1026. struct sa1111_driver *drv = SA1111_DRV(dev->driver);
  1027. int ret = 0;
  1028. if (drv && drv->resume)
  1029. ret = drv->resume(sadev);
  1030. return ret;
  1031. }
  1032. static int sa1111_bus_probe(struct device *dev)
  1033. {
  1034. struct sa1111_dev *sadev = SA1111_DEV(dev);
  1035. struct sa1111_driver *drv = SA1111_DRV(dev->driver);
  1036. int ret = -ENODEV;
  1037. if (drv->probe)
  1038. ret = drv->probe(sadev);
  1039. return ret;
  1040. }
  1041. static int sa1111_bus_remove(struct device *dev)
  1042. {
  1043. struct sa1111_dev *sadev = SA1111_DEV(dev);
  1044. struct sa1111_driver *drv = SA1111_DRV(dev->driver);
  1045. int ret = 0;
  1046. if (drv->remove)
  1047. ret = drv->remove(sadev);
  1048. return ret;
  1049. }
  1050. struct bus_type sa1111_bus_type = {
  1051. .name = "sa1111-rab",
  1052. .match = sa1111_match,
  1053. .probe = sa1111_bus_probe,
  1054. .remove = sa1111_bus_remove,
  1055. .suspend = sa1111_bus_suspend,
  1056. .resume = sa1111_bus_resume,
  1057. };
  1058. int sa1111_driver_register(struct sa1111_driver *driver)
  1059. {
  1060. driver->drv.bus = &sa1111_bus_type;
  1061. return driver_register(&driver->drv);
  1062. }
  1063. void sa1111_driver_unregister(struct sa1111_driver *driver)
  1064. {
  1065. driver_unregister(&driver->drv);
  1066. }
  1067. static int __init sa1111_init(void)
  1068. {
  1069. int ret = bus_register(&sa1111_bus_type);
  1070. if (ret == 0)
  1071. platform_driver_register(&sa1111_device_driver);
  1072. return ret;
  1073. }
  1074. static void __exit sa1111_exit(void)
  1075. {
  1076. platform_driver_unregister(&sa1111_device_driver);
  1077. bus_unregister(&sa1111_bus_type);
  1078. }
  1079. subsys_initcall(sa1111_init);
  1080. module_exit(sa1111_exit);
  1081. MODULE_DESCRIPTION("Intel Corporation SA1111 core driver");
  1082. MODULE_LICENSE("GPL");
  1083. EXPORT_SYMBOL(sa1111_select_audio_mode);
  1084. EXPORT_SYMBOL(sa1111_set_audio_rate);
  1085. EXPORT_SYMBOL(sa1111_get_audio_rate);
  1086. EXPORT_SYMBOL(sa1111_set_io_dir);
  1087. EXPORT_SYMBOL(sa1111_set_io);
  1088. EXPORT_SYMBOL(sa1111_set_sleep_io);
  1089. EXPORT_SYMBOL(sa1111_enable_device);
  1090. EXPORT_SYMBOL(sa1111_disable_device);
  1091. EXPORT_SYMBOL(sa1111_pll_clock);
  1092. EXPORT_SYMBOL(sa1111_bus_type);
  1093. EXPORT_SYMBOL(sa1111_driver_register);
  1094. EXPORT_SYMBOL(sa1111_driver_unregister);