common.c 13 KB

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  1. /*
  2. * Low-Level PCI Support for PC
  3. *
  4. * (c) 1999--2000 Martin Mares <mj@ucw.cz>
  5. */
  6. #include <linux/sched.h>
  7. #include <linux/pci.h>
  8. #include <linux/ioport.h>
  9. #include <linux/init.h>
  10. #include <linux/dmi.h>
  11. #include <asm/acpi.h>
  12. #include <asm/segment.h>
  13. #include <asm/io.h>
  14. #include <asm/smp.h>
  15. #include "pci.h"
  16. unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
  17. PCI_PROBE_MMCONF;
  18. static int pci_bf_sort;
  19. int pci_routeirq;
  20. int noioapicquirk;
  21. int pcibios_last_bus = -1;
  22. unsigned long pirq_table_addr;
  23. struct pci_bus *pci_root_bus;
  24. struct pci_raw_ops *raw_pci_ops;
  25. struct pci_raw_ops *raw_pci_ext_ops;
  26. int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
  27. int reg, int len, u32 *val)
  28. {
  29. if (reg < 256 && raw_pci_ops)
  30. return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
  31. if (raw_pci_ext_ops)
  32. return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
  33. return -EINVAL;
  34. }
  35. int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
  36. int reg, int len, u32 val)
  37. {
  38. if (reg < 256 && raw_pci_ops)
  39. return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
  40. if (raw_pci_ext_ops)
  41. return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
  42. return -EINVAL;
  43. }
  44. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
  45. {
  46. return raw_pci_read(pci_domain_nr(bus), bus->number,
  47. devfn, where, size, value);
  48. }
  49. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
  50. {
  51. return raw_pci_write(pci_domain_nr(bus), bus->number,
  52. devfn, where, size, value);
  53. }
  54. struct pci_ops pci_root_ops = {
  55. .read = pci_read,
  56. .write = pci_write,
  57. };
  58. /*
  59. * legacy, numa, and acpi all want to call pcibios_scan_root
  60. * from their initcalls. This flag prevents that.
  61. */
  62. int pcibios_scanned;
  63. /*
  64. * This interrupt-safe spinlock protects all accesses to PCI
  65. * configuration space.
  66. */
  67. DEFINE_SPINLOCK(pci_config_lock);
  68. static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d)
  69. {
  70. pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
  71. printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
  72. return 0;
  73. }
  74. static struct dmi_system_id can_skip_pciprobe_dmi_table[] __devinitdata = {
  75. /*
  76. * Systems where PCI IO resource ISA alignment can be skipped
  77. * when the ISA enable bit in the bridge control is not set
  78. */
  79. {
  80. .callback = can_skip_ioresource_align,
  81. .ident = "IBM System x3800",
  82. .matches = {
  83. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  84. DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
  85. },
  86. },
  87. {
  88. .callback = can_skip_ioresource_align,
  89. .ident = "IBM System x3850",
  90. .matches = {
  91. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  92. DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
  93. },
  94. },
  95. {
  96. .callback = can_skip_ioresource_align,
  97. .ident = "IBM System x3950",
  98. .matches = {
  99. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  100. DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
  101. },
  102. },
  103. {}
  104. };
  105. void __init dmi_check_skip_isa_align(void)
  106. {
  107. dmi_check_system(can_skip_pciprobe_dmi_table);
  108. }
  109. /*
  110. * Called after each bus is probed, but before its children
  111. * are examined.
  112. */
  113. void __devinit pcibios_fixup_bus(struct pci_bus *b)
  114. {
  115. pci_read_bridge_bases(b);
  116. }
  117. /*
  118. * Only use DMI information to set this if nothing was passed
  119. * on the kernel command line (which was parsed earlier).
  120. */
  121. static int __devinit set_bf_sort(const struct dmi_system_id *d)
  122. {
  123. if (pci_bf_sort == pci_bf_sort_default) {
  124. pci_bf_sort = pci_dmi_bf;
  125. printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
  126. }
  127. return 0;
  128. }
  129. /*
  130. * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
  131. */
  132. #ifdef __i386__
  133. static int __devinit assign_all_busses(const struct dmi_system_id *d)
  134. {
  135. pci_probe |= PCI_ASSIGN_ALL_BUSSES;
  136. printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
  137. " (pci=assign-busses)\n", d->ident);
  138. return 0;
  139. }
  140. #endif
  141. static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = {
  142. #ifdef __i386__
  143. /*
  144. * Laptops which need pci=assign-busses to see Cardbus cards
  145. */
  146. {
  147. .callback = assign_all_busses,
  148. .ident = "Samsung X20 Laptop",
  149. .matches = {
  150. DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
  151. DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
  152. },
  153. },
  154. #endif /* __i386__ */
  155. {
  156. .callback = set_bf_sort,
  157. .ident = "Dell PowerEdge 1950",
  158. .matches = {
  159. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  160. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
  161. },
  162. },
  163. {
  164. .callback = set_bf_sort,
  165. .ident = "Dell PowerEdge 1955",
  166. .matches = {
  167. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  168. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
  169. },
  170. },
  171. {
  172. .callback = set_bf_sort,
  173. .ident = "Dell PowerEdge 2900",
  174. .matches = {
  175. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  176. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
  177. },
  178. },
  179. {
  180. .callback = set_bf_sort,
  181. .ident = "Dell PowerEdge 2950",
  182. .matches = {
  183. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  184. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
  185. },
  186. },
  187. {
  188. .callback = set_bf_sort,
  189. .ident = "Dell PowerEdge R900",
  190. .matches = {
  191. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  192. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
  193. },
  194. },
  195. {
  196. .callback = set_bf_sort,
  197. .ident = "HP ProLiant BL20p G3",
  198. .matches = {
  199. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  200. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
  201. },
  202. },
  203. {
  204. .callback = set_bf_sort,
  205. .ident = "HP ProLiant BL20p G4",
  206. .matches = {
  207. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  208. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
  209. },
  210. },
  211. {
  212. .callback = set_bf_sort,
  213. .ident = "HP ProLiant BL30p G1",
  214. .matches = {
  215. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  216. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
  217. },
  218. },
  219. {
  220. .callback = set_bf_sort,
  221. .ident = "HP ProLiant BL25p G1",
  222. .matches = {
  223. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  224. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
  225. },
  226. },
  227. {
  228. .callback = set_bf_sort,
  229. .ident = "HP ProLiant BL35p G1",
  230. .matches = {
  231. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  232. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
  233. },
  234. },
  235. {
  236. .callback = set_bf_sort,
  237. .ident = "HP ProLiant BL45p G1",
  238. .matches = {
  239. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  240. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
  241. },
  242. },
  243. {
  244. .callback = set_bf_sort,
  245. .ident = "HP ProLiant BL45p G2",
  246. .matches = {
  247. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  248. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
  249. },
  250. },
  251. {
  252. .callback = set_bf_sort,
  253. .ident = "HP ProLiant BL460c G1",
  254. .matches = {
  255. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  256. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
  257. },
  258. },
  259. {
  260. .callback = set_bf_sort,
  261. .ident = "HP ProLiant BL465c G1",
  262. .matches = {
  263. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  264. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
  265. },
  266. },
  267. {
  268. .callback = set_bf_sort,
  269. .ident = "HP ProLiant BL480c G1",
  270. .matches = {
  271. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  272. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
  273. },
  274. },
  275. {
  276. .callback = set_bf_sort,
  277. .ident = "HP ProLiant BL685c G1",
  278. .matches = {
  279. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  280. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
  281. },
  282. },
  283. {
  284. .callback = set_bf_sort,
  285. .ident = "HP ProLiant DL360",
  286. .matches = {
  287. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  288. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"),
  289. },
  290. },
  291. {
  292. .callback = set_bf_sort,
  293. .ident = "HP ProLiant DL380",
  294. .matches = {
  295. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  296. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"),
  297. },
  298. },
  299. #ifdef __i386__
  300. {
  301. .callback = assign_all_busses,
  302. .ident = "Compaq EVO N800c",
  303. .matches = {
  304. DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
  305. DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
  306. },
  307. },
  308. #endif
  309. {
  310. .callback = set_bf_sort,
  311. .ident = "HP ProLiant DL360",
  312. .matches = {
  313. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  314. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"),
  315. },
  316. },
  317. {
  318. .callback = set_bf_sort,
  319. .ident = "HP ProLiant DL380",
  320. .matches = {
  321. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  322. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"),
  323. },
  324. },
  325. {}
  326. };
  327. void __init dmi_check_pciprobe(void)
  328. {
  329. dmi_check_system(pciprobe_dmi_table);
  330. }
  331. struct pci_bus * __devinit pcibios_scan_root(int busnum)
  332. {
  333. struct pci_bus *bus = NULL;
  334. struct pci_sysdata *sd;
  335. while ((bus = pci_find_next_bus(bus)) != NULL) {
  336. if (bus->number == busnum) {
  337. /* Already scanned */
  338. return bus;
  339. }
  340. }
  341. /* Allocate per-root-bus (not per bus) arch-specific data.
  342. * TODO: leak; this memory is never freed.
  343. * It's arguable whether it's worth the trouble to care.
  344. */
  345. sd = kzalloc(sizeof(*sd), GFP_KERNEL);
  346. if (!sd) {
  347. printk(KERN_ERR "PCI: OOM, not probing PCI bus %02x\n", busnum);
  348. return NULL;
  349. }
  350. sd->node = get_mp_bus_to_node(busnum);
  351. printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
  352. bus = pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd);
  353. if (!bus)
  354. kfree(sd);
  355. return bus;
  356. }
  357. extern u8 pci_cache_line_size;
  358. static int __init pcibios_init(void)
  359. {
  360. struct cpuinfo_x86 *c = &boot_cpu_data;
  361. if (!raw_pci_ops) {
  362. printk(KERN_WARNING "PCI: System does not support PCI\n");
  363. return 0;
  364. }
  365. /*
  366. * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
  367. * and P4. It's also good for 386/486s (which actually have 16)
  368. * as quite a few PCI devices do not support smaller values.
  369. */
  370. pci_cache_line_size = 32 >> 2;
  371. if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
  372. pci_cache_line_size = 64 >> 2; /* K7 & K8 */
  373. else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
  374. pci_cache_line_size = 128 >> 2; /* P4 */
  375. pcibios_resource_survey();
  376. if (pci_bf_sort >= pci_force_bf)
  377. pci_sort_breadthfirst();
  378. return 0;
  379. }
  380. subsys_initcall(pcibios_init);
  381. char * __devinit pcibios_setup(char *str)
  382. {
  383. if (!strcmp(str, "off")) {
  384. pci_probe = 0;
  385. return NULL;
  386. } else if (!strcmp(str, "bfsort")) {
  387. pci_bf_sort = pci_force_bf;
  388. return NULL;
  389. } else if (!strcmp(str, "nobfsort")) {
  390. pci_bf_sort = pci_force_nobf;
  391. return NULL;
  392. }
  393. #ifdef CONFIG_PCI_BIOS
  394. else if (!strcmp(str, "bios")) {
  395. pci_probe = PCI_PROBE_BIOS;
  396. return NULL;
  397. } else if (!strcmp(str, "nobios")) {
  398. pci_probe &= ~PCI_PROBE_BIOS;
  399. return NULL;
  400. } else if (!strcmp(str, "biosirq")) {
  401. pci_probe |= PCI_BIOS_IRQ_SCAN;
  402. return NULL;
  403. } else if (!strncmp(str, "pirqaddr=", 9)) {
  404. pirq_table_addr = simple_strtoul(str+9, NULL, 0);
  405. return NULL;
  406. }
  407. #endif
  408. #ifdef CONFIG_PCI_DIRECT
  409. else if (!strcmp(str, "conf1")) {
  410. pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
  411. return NULL;
  412. }
  413. else if (!strcmp(str, "conf2")) {
  414. pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
  415. return NULL;
  416. }
  417. #endif
  418. #ifdef CONFIG_PCI_MMCONFIG
  419. else if (!strcmp(str, "nommconf")) {
  420. pci_probe &= ~PCI_PROBE_MMCONF;
  421. return NULL;
  422. }
  423. else if (!strcmp(str, "check_enable_amd_mmconf")) {
  424. pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
  425. return NULL;
  426. }
  427. #endif
  428. else if (!strcmp(str, "noacpi")) {
  429. acpi_noirq_set();
  430. return NULL;
  431. }
  432. else if (!strcmp(str, "noearly")) {
  433. pci_probe |= PCI_PROBE_NOEARLY;
  434. return NULL;
  435. }
  436. #ifndef CONFIG_X86_VISWS
  437. else if (!strcmp(str, "usepirqmask")) {
  438. pci_probe |= PCI_USE_PIRQ_MASK;
  439. return NULL;
  440. } else if (!strncmp(str, "irqmask=", 8)) {
  441. pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
  442. return NULL;
  443. } else if (!strncmp(str, "lastbus=", 8)) {
  444. pcibios_last_bus = simple_strtol(str+8, NULL, 0);
  445. return NULL;
  446. }
  447. #endif
  448. else if (!strcmp(str, "rom")) {
  449. pci_probe |= PCI_ASSIGN_ROMS;
  450. return NULL;
  451. } else if (!strcmp(str, "assign-busses")) {
  452. pci_probe |= PCI_ASSIGN_ALL_BUSSES;
  453. return NULL;
  454. } else if (!strcmp(str, "use_crs")) {
  455. pci_probe |= PCI_USE__CRS;
  456. return NULL;
  457. } else if (!strcmp(str, "routeirq")) {
  458. pci_routeirq = 1;
  459. return NULL;
  460. } else if (!strcmp(str, "skip_isa_align")) {
  461. pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
  462. return NULL;
  463. } else if (!strcmp(str, "noioapicquirk")) {
  464. noioapicquirk = 1;
  465. return NULL;
  466. }
  467. return str;
  468. }
  469. unsigned int pcibios_assign_all_busses(void)
  470. {
  471. return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
  472. }
  473. int pcibios_enable_device(struct pci_dev *dev, int mask)
  474. {
  475. int err;
  476. if ((err = pci_enable_resources(dev, mask)) < 0)
  477. return err;
  478. if (!dev->msi_enabled)
  479. return pcibios_enable_irq(dev);
  480. return 0;
  481. }
  482. void pcibios_disable_device (struct pci_dev *dev)
  483. {
  484. if (!dev->msi_enabled && pcibios_disable_irq)
  485. pcibios_disable_irq(dev);
  486. }
  487. struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
  488. {
  489. struct pci_bus *bus = NULL;
  490. struct pci_sysdata *sd;
  491. /*
  492. * Allocate per-root-bus (not per bus) arch-specific data.
  493. * TODO: leak; this memory is never freed.
  494. * It's arguable whether it's worth the trouble to care.
  495. */
  496. sd = kzalloc(sizeof(*sd), GFP_KERNEL);
  497. if (!sd) {
  498. printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno);
  499. return NULL;
  500. }
  501. sd->node = node;
  502. bus = pci_scan_bus(busno, ops, sd);
  503. if (!bus)
  504. kfree(sd);
  505. return bus;
  506. }
  507. struct pci_bus * __devinit pci_scan_bus_with_sysdata(int busno)
  508. {
  509. return pci_scan_bus_on_node(busno, &pci_root_ops, -1);
  510. }