m8260_pci.h 2.3 KB

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  1. #ifndef _PPC_KERNEL_M8260_PCI_H
  2. #define _PPC_KERNEL_M8260_PCI_H
  3. #include <asm/m8260_pci.h>
  4. /*
  5. * Local->PCI map (from CPU) controlled by
  6. * MPC826x master window
  7. *
  8. * 0x80000000 - 0xBFFFFFFF Total CPU2PCI space PCIBR0
  9. *
  10. * 0x80000000 - 0x9FFFFFFF PCI Mem with prefetch (Outbound ATU #1)
  11. * 0xA0000000 - 0xAFFFFFFF PCI Mem w/o prefetch (Outbound ATU #2)
  12. * 0xB0000000 - 0xB0FFFFFF 32-bit PCI IO (Outbound ATU #3)
  13. *
  14. * PCI->Local map (from PCI)
  15. * MPC826x slave window controlled by
  16. *
  17. * 0x00000000 - 0x07FFFFFF MPC826x local memory (Inbound ATU #1)
  18. */
  19. /*
  20. * Slave window that allows PCI masters to access MPC826x local memory.
  21. * This window is set up using the first set of Inbound ATU registers
  22. */
  23. #ifndef MPC826x_PCI_SLAVE_MEM_LOCAL
  24. #define MPC826x_PCI_SLAVE_MEM_LOCAL (((struct bd_info *)__res)->bi_memstart)
  25. #define MPC826x_PCI_SLAVE_MEM_BUS (((struct bd_info *)__res)->bi_memstart)
  26. #define MPC826x_PCI_SLAVE_MEM_SIZE (((struct bd_info *)__res)->bi_memsize)
  27. #endif
  28. /*
  29. * This is the window that allows the CPU to access PCI address space.
  30. * It will be setup with the SIU PCIBR0 register. All three PCI master
  31. * windows, which allow the CPU to access PCI prefetch, non prefetch,
  32. * and IO space (see below), must all fit within this window.
  33. */
  34. #ifndef MPC826x_PCI_BASE
  35. #define MPC826x_PCI_BASE 0x80000000
  36. #define MPC826x_PCI_MASK 0xc0000000
  37. #endif
  38. #ifndef MPC826x_PCI_LOWER_MEM
  39. #define MPC826x_PCI_LOWER_MEM 0x80000000
  40. #define MPC826x_PCI_UPPER_MEM 0x9fffffff
  41. #define MPC826x_PCI_MEM_OFFSET 0x00000000
  42. #endif
  43. #ifndef MPC826x_PCI_LOWER_MMIO
  44. #define MPC826x_PCI_LOWER_MMIO 0xa0000000
  45. #define MPC826x_PCI_UPPER_MMIO 0xafffffff
  46. #define MPC826x_PCI_MMIO_OFFSET 0x00000000
  47. #endif
  48. #ifndef MPC826x_PCI_LOWER_IO
  49. #define MPC826x_PCI_LOWER_IO 0x00000000
  50. #define MPC826x_PCI_UPPER_IO 0x00ffffff
  51. #define MPC826x_PCI_IO_BASE 0xb0000000
  52. #define MPC826x_PCI_IO_SIZE 0x01000000
  53. #endif
  54. #ifndef _IO_BASE
  55. #define _IO_BASE isa_io_base
  56. #endif
  57. #ifdef CONFIG_8260_PCI9
  58. struct pci_controller;
  59. extern void setup_m8260_indirect_pci(struct pci_controller* hose,
  60. u32 cfg_addr, u32 cfg_data);
  61. #else
  62. #define setup_m8260_indirect_pci setup_indirect_pci
  63. #endif
  64. #endif /* _PPC_KERNEL_M8260_PCI_H */