omap2430.c 17 KB

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  1. /*
  2. * Copyright (C) 2005-2007 by Texas Instruments
  3. * Some code has been taken from tusb6010.c
  4. * Copyrights for that are attributable to:
  5. * Copyright (C) 2006 Nokia Corporation
  6. * Tony Lindgren <tony@atomide.com>
  7. *
  8. * This file is part of the Inventra Controller Driver for Linux.
  9. *
  10. * The Inventra Controller Driver for Linux is free software; you
  11. * can redistribute it and/or modify it under the terms of the GNU
  12. * General Public License version 2 as published by the Free Software
  13. * Foundation.
  14. *
  15. * The Inventra Controller Driver for Linux is distributed in
  16. * the hope that it will be useful, but WITHOUT ANY WARRANTY;
  17. * without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
  19. * License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with The Inventra Controller Driver for Linux ; if not,
  23. * write to the Free Software Foundation, Inc., 59 Temple Place,
  24. * Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <linux/module.h>
  28. #include <linux/kernel.h>
  29. #include <linux/sched.h>
  30. #include <linux/init.h>
  31. #include <linux/list.h>
  32. #include <linux/io.h>
  33. #include <linux/of.h>
  34. #include <linux/platform_device.h>
  35. #include <linux/dma-mapping.h>
  36. #include <linux/pm_runtime.h>
  37. #include <linux/err.h>
  38. #include <linux/delay.h>
  39. #include <linux/usb/musb-omap.h>
  40. #include <linux/usb/omap_control_usb.h>
  41. #include "musb_core.h"
  42. #include "omap2430.h"
  43. struct omap2430_glue {
  44. struct device *dev;
  45. struct platform_device *musb;
  46. enum omap_musb_vbus_id_status status;
  47. struct work_struct omap_musb_mailbox_work;
  48. struct device *control_otghs;
  49. };
  50. #define glue_to_musb(g) platform_get_drvdata(g->musb)
  51. static struct omap2430_glue *_glue;
  52. static struct timer_list musb_idle_timer;
  53. static void musb_do_idle(unsigned long _musb)
  54. {
  55. struct musb *musb = (void *)_musb;
  56. unsigned long flags;
  57. u8 power;
  58. u8 devctl;
  59. spin_lock_irqsave(&musb->lock, flags);
  60. switch (musb->xceiv->state) {
  61. case OTG_STATE_A_WAIT_BCON:
  62. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  63. if (devctl & MUSB_DEVCTL_BDEVICE) {
  64. musb->xceiv->state = OTG_STATE_B_IDLE;
  65. MUSB_DEV_MODE(musb);
  66. } else {
  67. musb->xceiv->state = OTG_STATE_A_IDLE;
  68. MUSB_HST_MODE(musb);
  69. }
  70. break;
  71. case OTG_STATE_A_SUSPEND:
  72. /* finish RESUME signaling? */
  73. if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
  74. power = musb_readb(musb->mregs, MUSB_POWER);
  75. power &= ~MUSB_POWER_RESUME;
  76. dev_dbg(musb->controller, "root port resume stopped, power %02x\n", power);
  77. musb_writeb(musb->mregs, MUSB_POWER, power);
  78. musb->is_active = 1;
  79. musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
  80. | MUSB_PORT_STAT_RESUME);
  81. musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  82. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  83. /* NOTE: it might really be A_WAIT_BCON ... */
  84. musb->xceiv->state = OTG_STATE_A_HOST;
  85. }
  86. break;
  87. case OTG_STATE_A_HOST:
  88. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  89. if (devctl & MUSB_DEVCTL_BDEVICE)
  90. musb->xceiv->state = OTG_STATE_B_IDLE;
  91. else
  92. musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
  93. default:
  94. break;
  95. }
  96. spin_unlock_irqrestore(&musb->lock, flags);
  97. }
  98. static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
  99. {
  100. unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
  101. static unsigned long last_timer;
  102. if (timeout == 0)
  103. timeout = default_timeout;
  104. /* Never idle if active, or when VBUS timeout is not set as host */
  105. if (musb->is_active || ((musb->a_wait_bcon == 0)
  106. && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
  107. dev_dbg(musb->controller, "%s active, deleting timer\n",
  108. usb_otg_state_string(musb->xceiv->state));
  109. del_timer(&musb_idle_timer);
  110. last_timer = jiffies;
  111. return;
  112. }
  113. if (time_after(last_timer, timeout)) {
  114. if (!timer_pending(&musb_idle_timer))
  115. last_timer = timeout;
  116. else {
  117. dev_dbg(musb->controller, "Longer idle timer already pending, ignoring\n");
  118. return;
  119. }
  120. }
  121. last_timer = timeout;
  122. dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
  123. usb_otg_state_string(musb->xceiv->state),
  124. (unsigned long)jiffies_to_msecs(timeout - jiffies));
  125. mod_timer(&musb_idle_timer, timeout);
  126. }
  127. static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
  128. {
  129. struct usb_otg *otg = musb->xceiv->otg;
  130. u8 devctl;
  131. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  132. /* HDRC controls CPEN, but beware current surges during device
  133. * connect. They can trigger transient overcurrent conditions
  134. * that must be ignored.
  135. */
  136. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  137. if (is_on) {
  138. if (musb->xceiv->state == OTG_STATE_A_IDLE) {
  139. int loops = 100;
  140. /* start the session */
  141. devctl |= MUSB_DEVCTL_SESSION;
  142. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  143. /*
  144. * Wait for the musb to set as A device to enable the
  145. * VBUS
  146. */
  147. while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) {
  148. mdelay(5);
  149. cpu_relax();
  150. if (time_after(jiffies, timeout)
  151. || loops-- <= 0) {
  152. dev_err(musb->controller,
  153. "configured as A device timeout");
  154. break;
  155. }
  156. }
  157. otg_set_vbus(otg, 1);
  158. } else {
  159. musb->is_active = 1;
  160. otg->default_a = 1;
  161. musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
  162. devctl |= MUSB_DEVCTL_SESSION;
  163. MUSB_HST_MODE(musb);
  164. }
  165. } else {
  166. musb->is_active = 0;
  167. /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
  168. * jumping right to B_IDLE...
  169. */
  170. otg->default_a = 0;
  171. musb->xceiv->state = OTG_STATE_B_IDLE;
  172. devctl &= ~MUSB_DEVCTL_SESSION;
  173. MUSB_DEV_MODE(musb);
  174. }
  175. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  176. dev_dbg(musb->controller, "VBUS %s, devctl %02x "
  177. /* otg %3x conf %08x prcm %08x */ "\n",
  178. usb_otg_state_string(musb->xceiv->state),
  179. musb_readb(musb->mregs, MUSB_DEVCTL));
  180. }
  181. static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
  182. {
  183. u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  184. devctl |= MUSB_DEVCTL_SESSION;
  185. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  186. return 0;
  187. }
  188. static inline void omap2430_low_level_exit(struct musb *musb)
  189. {
  190. u32 l;
  191. /* in any role */
  192. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  193. l |= ENABLEFORCE; /* enable MSTANDBY */
  194. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  195. }
  196. static inline void omap2430_low_level_init(struct musb *musb)
  197. {
  198. u32 l;
  199. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  200. l &= ~ENABLEFORCE; /* disable MSTANDBY */
  201. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  202. }
  203. void omap_musb_mailbox(enum omap_musb_vbus_id_status status)
  204. {
  205. struct omap2430_glue *glue = _glue;
  206. if (!glue) {
  207. pr_err("%s: musb core is not yet initialized\n", __func__);
  208. return;
  209. }
  210. glue->status = status;
  211. if (!glue_to_musb(glue)) {
  212. pr_err("%s: musb core is not yet ready\n", __func__);
  213. return;
  214. }
  215. schedule_work(&glue->omap_musb_mailbox_work);
  216. }
  217. EXPORT_SYMBOL_GPL(omap_musb_mailbox);
  218. static void omap_musb_set_mailbox(struct omap2430_glue *glue)
  219. {
  220. struct musb *musb = glue_to_musb(glue);
  221. struct device *dev = musb->controller;
  222. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  223. struct omap_musb_board_data *data = pdata->board_data;
  224. struct usb_otg *otg = musb->xceiv->otg;
  225. switch (glue->status) {
  226. case OMAP_MUSB_ID_GROUND:
  227. dev_dbg(dev, "ID GND\n");
  228. otg->default_a = true;
  229. musb->xceiv->state = OTG_STATE_A_IDLE;
  230. musb->xceiv->last_event = USB_EVENT_ID;
  231. if (musb->gadget_driver) {
  232. pm_runtime_get_sync(dev);
  233. omap_control_usb_set_mode(glue->control_otghs,
  234. USB_MODE_HOST);
  235. omap2430_musb_set_vbus(musb, 1);
  236. }
  237. break;
  238. case OMAP_MUSB_VBUS_VALID:
  239. dev_dbg(dev, "VBUS Connect\n");
  240. otg->default_a = false;
  241. musb->xceiv->state = OTG_STATE_B_IDLE;
  242. musb->xceiv->last_event = USB_EVENT_VBUS;
  243. if (musb->gadget_driver)
  244. pm_runtime_get_sync(dev);
  245. omap_control_usb_set_mode(glue->control_otghs, USB_MODE_DEVICE);
  246. break;
  247. case OMAP_MUSB_ID_FLOAT:
  248. case OMAP_MUSB_VBUS_OFF:
  249. dev_dbg(dev, "VBUS Disconnect\n");
  250. musb->xceiv->last_event = USB_EVENT_NONE;
  251. if (musb->gadget_driver) {
  252. pm_runtime_mark_last_busy(dev);
  253. pm_runtime_put_autosuspend(dev);
  254. }
  255. if (data->interface_type == MUSB_INTERFACE_UTMI)
  256. otg_set_vbus(musb->xceiv->otg, 0);
  257. omap_control_usb_set_mode(glue->control_otghs,
  258. USB_MODE_DISCONNECT);
  259. break;
  260. default:
  261. dev_dbg(dev, "ID float\n");
  262. }
  263. }
  264. static void omap_musb_mailbox_work(struct work_struct *mailbox_work)
  265. {
  266. struct omap2430_glue *glue = container_of(mailbox_work,
  267. struct omap2430_glue, omap_musb_mailbox_work);
  268. omap_musb_set_mailbox(glue);
  269. }
  270. static irqreturn_t omap2430_musb_interrupt(int irq, void *__hci)
  271. {
  272. unsigned long flags;
  273. irqreturn_t retval = IRQ_NONE;
  274. struct musb *musb = __hci;
  275. spin_lock_irqsave(&musb->lock, flags);
  276. musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
  277. musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
  278. musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
  279. if (musb->int_usb || musb->int_tx || musb->int_rx)
  280. retval = musb_interrupt(musb);
  281. spin_unlock_irqrestore(&musb->lock, flags);
  282. return retval;
  283. }
  284. static int omap2430_musb_init(struct musb *musb)
  285. {
  286. u32 l;
  287. int status = 0;
  288. struct device *dev = musb->controller;
  289. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  290. struct musb_hdrc_platform_data *plat = dev->platform_data;
  291. struct omap_musb_board_data *data = plat->board_data;
  292. /* We require some kind of external transceiver, hooked
  293. * up through ULPI. TWL4030-family PMICs include one,
  294. * which needs a driver, drivers aren't always needed.
  295. */
  296. if (dev->parent->of_node)
  297. musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent,
  298. "usb-phy", 0);
  299. else
  300. musb->xceiv = devm_usb_get_phy_dev(dev, 0);
  301. if (IS_ERR(musb->xceiv)) {
  302. status = PTR_ERR(musb->xceiv);
  303. if (status == -ENXIO)
  304. return status;
  305. pr_err("HS USB OTG: no transceiver configured\n");
  306. return -EPROBE_DEFER;
  307. }
  308. musb->isr = omap2430_musb_interrupt;
  309. status = pm_runtime_get_sync(dev);
  310. if (status < 0) {
  311. dev_err(dev, "pm_runtime_get_sync FAILED %d\n", status);
  312. goto err1;
  313. }
  314. l = musb_readl(musb->mregs, OTG_INTERFSEL);
  315. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  316. /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
  317. l &= ~ULPI_12PIN; /* Disable ULPI */
  318. l |= UTMI_8BIT; /* Enable UTMI */
  319. } else {
  320. l |= ULPI_12PIN;
  321. }
  322. musb_writel(musb->mregs, OTG_INTERFSEL, l);
  323. pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
  324. "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
  325. musb_readl(musb->mregs, OTG_REVISION),
  326. musb_readl(musb->mregs, OTG_SYSCONFIG),
  327. musb_readl(musb->mregs, OTG_SYSSTATUS),
  328. musb_readl(musb->mregs, OTG_INTERFSEL),
  329. musb_readl(musb->mregs, OTG_SIMENABLE));
  330. setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
  331. if (glue->status != OMAP_MUSB_UNKNOWN)
  332. omap_musb_set_mailbox(glue);
  333. usb_phy_init(musb->xceiv);
  334. pm_runtime_put_noidle(musb->controller);
  335. return 0;
  336. err1:
  337. return status;
  338. }
  339. static void omap2430_musb_enable(struct musb *musb)
  340. {
  341. u8 devctl;
  342. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  343. struct device *dev = musb->controller;
  344. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  345. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  346. struct omap_musb_board_data *data = pdata->board_data;
  347. switch (glue->status) {
  348. case OMAP_MUSB_ID_GROUND:
  349. omap_control_usb_set_mode(glue->control_otghs, USB_MODE_HOST);
  350. if (data->interface_type != MUSB_INTERFACE_UTMI)
  351. break;
  352. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  353. /* start the session */
  354. devctl |= MUSB_DEVCTL_SESSION;
  355. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  356. while (musb_readb(musb->mregs, MUSB_DEVCTL) &
  357. MUSB_DEVCTL_BDEVICE) {
  358. cpu_relax();
  359. if (time_after(jiffies, timeout)) {
  360. dev_err(dev, "configured as A device timeout");
  361. break;
  362. }
  363. }
  364. break;
  365. case OMAP_MUSB_VBUS_VALID:
  366. omap_control_usb_set_mode(glue->control_otghs, USB_MODE_DEVICE);
  367. break;
  368. default:
  369. break;
  370. }
  371. }
  372. static void omap2430_musb_disable(struct musb *musb)
  373. {
  374. struct device *dev = musb->controller;
  375. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  376. if (glue->status != OMAP_MUSB_UNKNOWN)
  377. omap_control_usb_set_mode(glue->control_otghs,
  378. USB_MODE_DISCONNECT);
  379. }
  380. static int omap2430_musb_exit(struct musb *musb)
  381. {
  382. del_timer_sync(&musb_idle_timer);
  383. omap2430_low_level_exit(musb);
  384. return 0;
  385. }
  386. static const struct musb_platform_ops omap2430_ops = {
  387. .init = omap2430_musb_init,
  388. .exit = omap2430_musb_exit,
  389. .set_mode = omap2430_musb_set_mode,
  390. .try_idle = omap2430_musb_try_idle,
  391. .set_vbus = omap2430_musb_set_vbus,
  392. .enable = omap2430_musb_enable,
  393. .disable = omap2430_musb_disable,
  394. };
  395. static u64 omap2430_dmamask = DMA_BIT_MASK(32);
  396. static int omap2430_probe(struct platform_device *pdev)
  397. {
  398. struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
  399. struct omap_musb_board_data *data;
  400. struct platform_device *musb;
  401. struct omap2430_glue *glue;
  402. struct device_node *np = pdev->dev.of_node;
  403. struct musb_hdrc_config *config;
  404. int ret = -ENOMEM;
  405. glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
  406. if (!glue) {
  407. dev_err(&pdev->dev, "failed to allocate glue context\n");
  408. goto err0;
  409. }
  410. musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
  411. if (!musb) {
  412. dev_err(&pdev->dev, "failed to allocate musb device\n");
  413. goto err0;
  414. }
  415. musb->dev.parent = &pdev->dev;
  416. musb->dev.dma_mask = &omap2430_dmamask;
  417. musb->dev.coherent_dma_mask = omap2430_dmamask;
  418. glue->dev = &pdev->dev;
  419. glue->musb = musb;
  420. glue->status = OMAP_MUSB_UNKNOWN;
  421. if (np) {
  422. pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
  423. if (!pdata) {
  424. dev_err(&pdev->dev,
  425. "failed to allocate musb platfrom data\n");
  426. goto err2;
  427. }
  428. data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
  429. if (!data) {
  430. dev_err(&pdev->dev,
  431. "failed to allocate musb board data\n");
  432. goto err2;
  433. }
  434. config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL);
  435. if (!config) {
  436. dev_err(&pdev->dev,
  437. "failed to allocate musb hdrc config\n");
  438. goto err2;
  439. }
  440. of_property_read_u32(np, "mode", (u32 *)&pdata->mode);
  441. of_property_read_u32(np, "interface-type",
  442. (u32 *)&data->interface_type);
  443. of_property_read_u32(np, "num-eps", (u32 *)&config->num_eps);
  444. of_property_read_u32(np, "ram-bits", (u32 *)&config->ram_bits);
  445. of_property_read_u32(np, "power", (u32 *)&pdata->power);
  446. config->multipoint = of_property_read_bool(np, "multipoint");
  447. pdata->has_mailbox = of_property_read_bool(np,
  448. "ti,has-mailbox");
  449. pdata->board_data = data;
  450. pdata->config = config;
  451. }
  452. if (pdata->has_mailbox) {
  453. glue->control_otghs = omap_get_control_dev();
  454. if (IS_ERR(glue->control_otghs)) {
  455. dev_vdbg(&pdev->dev, "Failed to get control device\n");
  456. return -ENODEV;
  457. }
  458. } else {
  459. glue->control_otghs = ERR_PTR(-ENODEV);
  460. }
  461. pdata->platform_ops = &omap2430_ops;
  462. platform_set_drvdata(pdev, glue);
  463. /*
  464. * REVISIT if we ever have two instances of the wrapper, we will be
  465. * in big trouble
  466. */
  467. _glue = glue;
  468. INIT_WORK(&glue->omap_musb_mailbox_work, omap_musb_mailbox_work);
  469. ret = platform_device_add_resources(musb, pdev->resource,
  470. pdev->num_resources);
  471. if (ret) {
  472. dev_err(&pdev->dev, "failed to add resources\n");
  473. goto err2;
  474. }
  475. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  476. if (ret) {
  477. dev_err(&pdev->dev, "failed to add platform_data\n");
  478. goto err2;
  479. }
  480. pm_runtime_enable(&pdev->dev);
  481. ret = platform_device_add(musb);
  482. if (ret) {
  483. dev_err(&pdev->dev, "failed to register musb device\n");
  484. goto err2;
  485. }
  486. return 0;
  487. err2:
  488. platform_device_put(musb);
  489. err0:
  490. return ret;
  491. }
  492. static int omap2430_remove(struct platform_device *pdev)
  493. {
  494. struct omap2430_glue *glue = platform_get_drvdata(pdev);
  495. cancel_work_sync(&glue->omap_musb_mailbox_work);
  496. platform_device_unregister(glue->musb);
  497. return 0;
  498. }
  499. #ifdef CONFIG_PM
  500. static int omap2430_runtime_suspend(struct device *dev)
  501. {
  502. struct omap2430_glue *glue = dev_get_drvdata(dev);
  503. struct musb *musb = glue_to_musb(glue);
  504. if (musb) {
  505. musb->context.otg_interfsel = musb_readl(musb->mregs,
  506. OTG_INTERFSEL);
  507. omap2430_low_level_exit(musb);
  508. usb_phy_set_suspend(musb->xceiv, 1);
  509. }
  510. return 0;
  511. }
  512. static int omap2430_runtime_resume(struct device *dev)
  513. {
  514. struct omap2430_glue *glue = dev_get_drvdata(dev);
  515. struct musb *musb = glue_to_musb(glue);
  516. if (musb) {
  517. omap2430_low_level_init(musb);
  518. musb_writel(musb->mregs, OTG_INTERFSEL,
  519. musb->context.otg_interfsel);
  520. usb_phy_set_suspend(musb->xceiv, 0);
  521. }
  522. return 0;
  523. }
  524. static struct dev_pm_ops omap2430_pm_ops = {
  525. .runtime_suspend = omap2430_runtime_suspend,
  526. .runtime_resume = omap2430_runtime_resume,
  527. };
  528. #define DEV_PM_OPS (&omap2430_pm_ops)
  529. #else
  530. #define DEV_PM_OPS NULL
  531. #endif
  532. #ifdef CONFIG_OF
  533. static const struct of_device_id omap2430_id_table[] = {
  534. {
  535. .compatible = "ti,omap4-musb"
  536. },
  537. {
  538. .compatible = "ti,omap3-musb"
  539. },
  540. {},
  541. };
  542. MODULE_DEVICE_TABLE(of, omap2430_id_table);
  543. #endif
  544. static struct platform_driver omap2430_driver = {
  545. .probe = omap2430_probe,
  546. .remove = omap2430_remove,
  547. .driver = {
  548. .name = "musb-omap2430",
  549. .pm = DEV_PM_OPS,
  550. .of_match_table = of_match_ptr(omap2430_id_table),
  551. },
  552. };
  553. MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
  554. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  555. MODULE_LICENSE("GPL v2");
  556. static int __init omap2430_init(void)
  557. {
  558. return platform_driver_register(&omap2430_driver);
  559. }
  560. subsys_initcall(omap2430_init);
  561. static void __exit omap2430_exit(void)
  562. {
  563. platform_driver_unregister(&omap2430_driver);
  564. }
  565. module_exit(omap2430_exit);