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arch
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arm
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plat-mxc
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include
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mach
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mx25.h

mx25.h 1.8 KB
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  1. #ifndef __MACH_MX25_H__
    2. 

  2. #define __MACH_MX25_H__
    3. 

  3. 

  4. #define MX25_AIPS1_BASE_ADDR		0x43f00000
    5. 

  5. #define MX25_AIPS1_BASE_ADDR_VIRT	0xfc000000
    6. 

  6. #define MX25_AIPS1_SIZE			SZ_1M
    7. 

  7. #define MX25_AIPS2_BASE_ADDR		0x53f00000
    8. 

  8. #define MX25_AIPS2_BASE_ADDR_VIRT	0xfc200000
    9. 

  9. #define MX25_AIPS2_SIZE			SZ_1M
    10. 

  10. #define MX25_AVIC_BASE_ADDR		0x68000000
    11. 

  11. #define MX25_AVIC_BASE_ADDR_VIRT	0xfc400000
    12. 

  12. #define MX25_AVIC_SIZE			SZ_1M
    13. 

  13. 

  14. #define MX25_I2C1_BASE_ADDR		(MX25_AIPS1_BASE_ADDR + 0x80000)
    15. 

  15. #define MX25_I2C3_BASE_ADDR		(MX25_AIPS1_BASE_ADDR + 0x84000)
    16. 

  16. #define MX25_I2C2_BASE_ADDR		(MX25_AIPS1_BASE_ADDR + 0x98000)
    17. 

  17. #define MX25_IOMUXC_BASE_ADDR		(MX25_AIPS1_BASE_ADDR + 0xac000)
    18. 

  18. 

  19. #define MX25_CRM_BASE_ADDR		(MX25_AIPS2_BASE_ADDR + 0x80000)
    20. 

  20. #define MX25_GPT1_BASE_ADDR		(MX25_AIPS2_BASE_ADDR + 0x90000)
    21. 

  21. #define MX25_WDOG_BASE_ADDR		(MX25_AIPS2_BASE_ADDR + 0xdc000)
    22. 

  22. 

  23. #define MX25_GPIO1_BASE_ADDR_VIRT	(MX25_AIPS2_BASE_ADDR_VIRT + 0xcc000)
    24. 

  24. #define MX25_GPIO2_BASE_ADDR_VIRT	(MX25_AIPS2_BASE_ADDR_VIRT + 0xd0000)
    25. 

  25. #define MX25_GPIO3_BASE_ADDR_VIRT	(MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000)
    26. 

  26. #define MX25_GPIO4_BASE_ADDR_VIRT	(MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000)
    27. 

  27. 

  28. #define MX25_IO_ADDRESS(x) (					\
    29. 

  29. 	IMX_IO_ADDRESS(x, MX25_AIPS1) ?:			\
    30. 

  30. 	IMX_IO_ADDRESS(x, MX25_AIPS2) ?:			\
    31. 

  31. 	IMX_IO_ADDRESS(x, MX25_AVIC))
    32. 

  32. 

  33. #define MX25_UART1_BASE_ADDR		0x43f90000
    34. 

  34. #define MX25_UART2_BASE_ADDR		0x43f94000
    35. 

  35. 

  36. #define MX25_FEC_BASE_ADDR		0x50038000
    37. 

  37. #define MX25_NFC_BASE_ADDR		0xbb000000
    38. 

  38. #define MX25_DRYICE_BASE_ADDR		0x53ffc000
    39. 

  39. #define MX25_LCDC_BASE_ADDR		0x53fbc000
    40. 

  40. 

  41. #define MX25_INT_I2C1		3
    42. 

  42. #define MX25_INT_I2C2		4
    43. 

  43. #define MX25_INT_I2C3		10
    44. 

  44. #define MX25_INT_DRYICE		25
    45. 

  45. #define MX25_INT_FEC		57
    46. 

  46. #define MX25_INT_NANDFC		33
    47. 

  47. #define MX25_INT_LCDC		39
    48. 

  48. 

  49. #if defined(IMX_NEEDS_DEPRECATED_SYMBOLS)
    50. 

  50. #define UART1_BASE_ADDR			MX25_UART1_BASE_ADDR
    51. 

  51. #define UART2_BASE_ADDR			MX25_UART2_BASE_ADDR
    52. 

  52. #endif
    53. 

  53. 

  54. #endif /* ifndef __MACH_MX25_H__ */
    55.