smp.h 3.1 KB

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  1. #ifndef __ASM_SMP_H
  2. #define __ASM_SMP_H
  3. /*
  4. * We need the APIC definitions automatically as part of 'smp.h'
  5. */
  6. #include <linux/threads.h>
  7. #include <linux/cpumask.h>
  8. #include <linux/bitops.h>
  9. extern int disable_apic;
  10. #include <asm/fixmap.h>
  11. #include <asm/mpspec.h>
  12. #include <asm/io_apic.h>
  13. #include <asm/apic.h>
  14. #include <asm/thread_info.h>
  15. #ifdef CONFIG_SMP
  16. #include <asm/pda.h>
  17. struct pt_regs;
  18. extern cpumask_t cpu_present_mask;
  19. extern cpumask_t cpu_possible_map;
  20. extern cpumask_t cpu_online_map;
  21. extern cpumask_t cpu_callout_map;
  22. extern cpumask_t cpu_initialized;
  23. /*
  24. * Private routines/data
  25. */
  26. extern void smp_alloc_memory(void);
  27. extern volatile unsigned long smp_invalidate_needed;
  28. extern void lock_ipi_call_lock(void);
  29. extern void unlock_ipi_call_lock(void);
  30. extern int smp_num_siblings;
  31. extern void smp_send_reschedule(int cpu);
  32. void smp_stop_cpu(void);
  33. extern int smp_call_function_single(int cpuid, void (*func) (void *info),
  34. void *info, int retry, int wait);
  35. extern cpumask_t cpu_sibling_map[NR_CPUS];
  36. extern cpumask_t cpu_core_map[NR_CPUS];
  37. extern u8 cpu_llc_id[NR_CPUS];
  38. #define SMP_TRAMPOLINE_BASE 0x6000
  39. /*
  40. * On x86 all CPUs are mapped 1:1 to the APIC space.
  41. * This simplifies scheduling and IPI sending and
  42. * compresses data structures.
  43. */
  44. static inline int num_booting_cpus(void)
  45. {
  46. return cpus_weight(cpu_callout_map);
  47. }
  48. #define raw_smp_processor_id() read_pda(cpunumber)
  49. static inline int hard_smp_processor_id(void)
  50. {
  51. /* we don't want to mark this access volatile - bad code generation */
  52. return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID));
  53. }
  54. extern int safe_smp_processor_id(void);
  55. extern int __cpu_disable(void);
  56. extern void __cpu_die(unsigned int cpu);
  57. extern void prefill_possible_map(void);
  58. extern unsigned num_processors;
  59. extern unsigned disabled_cpus;
  60. #define NO_PROC_ID 0xFF /* No processor magic marker */
  61. #endif
  62. /*
  63. * Some lowlevel functions might want to know about
  64. * the real APIC ID <-> CPU # mapping.
  65. */
  66. extern u8 x86_cpu_to_apicid[NR_CPUS]; /* physical ID */
  67. extern u8 x86_cpu_to_log_apicid[NR_CPUS];
  68. extern u8 bios_cpu_apicid[];
  69. static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
  70. {
  71. return cpus_addr(cpumask)[0];
  72. }
  73. static inline int cpu_present_to_apicid(int mps_cpu)
  74. {
  75. if (mps_cpu < NR_CPUS)
  76. return (int)bios_cpu_apicid[mps_cpu];
  77. else
  78. return BAD_APICID;
  79. }
  80. #ifndef CONFIG_SMP
  81. #define stack_smp_processor_id() 0
  82. #define safe_smp_processor_id() 0
  83. #define cpu_logical_map(x) (x)
  84. #else
  85. #include <asm/thread_info.h>
  86. #define stack_smp_processor_id() \
  87. ({ \
  88. struct thread_info *ti; \
  89. __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
  90. ti->cpu; \
  91. })
  92. #endif
  93. static __inline int logical_smp_processor_id(void)
  94. {
  95. /* we don't want to mark this access volatile - bad code generation */
  96. return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
  97. }
  98. #ifdef CONFIG_SMP
  99. #define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu]
  100. #else
  101. #define cpu_physical_id(cpu) boot_cpu_id
  102. static inline int smp_call_function_single(int cpuid, void (*func) (void *info),
  103. void *info, int retry, int wait)
  104. {
  105. /* Disable interrupts here? */
  106. func(info);
  107. return 0;
  108. }
  109. #endif /* !CONFIG_SMP */
  110. #endif