iwl3945-base.c 191 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/lib80211.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-3945.h"
  50. #include "iwl-helpers.h"
  51. #include "iwl-core.h"
  52. #include "iwl-dev.h"
  53. /*
  54. * module name, copyright, version, etc.
  55. */
  56. #define DRV_DESCRIPTION \
  57. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  58. #ifdef CONFIG_IWL3945_DEBUG
  59. #define VD "d"
  60. #else
  61. #define VD
  62. #endif
  63. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  64. #define VS "s"
  65. #else
  66. #define VS
  67. #endif
  68. #define IWL39_VERSION "1.2.26k" VD VS
  69. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  70. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  71. #define DRV_VERSION IWL39_VERSION
  72. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  73. MODULE_VERSION(DRV_VERSION);
  74. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  75. MODULE_LICENSE("GPL");
  76. /* module parameters */
  77. struct iwl_mod_params iwl3945_mod_params = {
  78. .num_of_queues = IWL39_MAX_NUM_QUEUES,
  79. .sw_crypto = 1,
  80. /* the rest are 0 by default */
  81. };
  82. /*************** STATION TABLE MANAGEMENT ****
  83. * mac80211 should be examined to determine if sta_info is duplicating
  84. * the functionality provided here
  85. */
  86. /**************************************************************/
  87. #if 0 /* temporary disable till we add real remove station */
  88. /**
  89. * iwl3945_remove_station - Remove driver's knowledge of station.
  90. *
  91. * NOTE: This does not remove station from device's station table.
  92. */
  93. static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  94. {
  95. int index = IWL_INVALID_STATION;
  96. int i;
  97. unsigned long flags;
  98. spin_lock_irqsave(&priv->sta_lock, flags);
  99. if (is_ap)
  100. index = IWL_AP_ID;
  101. else if (is_broadcast_ether_addr(addr))
  102. index = priv->hw_params.bcast_sta_id;
  103. else
  104. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
  105. if (priv->stations_39[i].used &&
  106. !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  107. addr)) {
  108. index = i;
  109. break;
  110. }
  111. if (unlikely(index == IWL_INVALID_STATION))
  112. goto out;
  113. if (priv->stations_39[index].used) {
  114. priv->stations_39[index].used = 0;
  115. priv->num_stations--;
  116. }
  117. BUG_ON(priv->num_stations < 0);
  118. out:
  119. spin_unlock_irqrestore(&priv->sta_lock, flags);
  120. return 0;
  121. }
  122. #endif
  123. /**
  124. * iwl3945_clear_stations_table - Clear the driver's station table
  125. *
  126. * NOTE: This does not clear or otherwise alter the device's station table.
  127. */
  128. static void iwl3945_clear_stations_table(struct iwl_priv *priv)
  129. {
  130. unsigned long flags;
  131. spin_lock_irqsave(&priv->sta_lock, flags);
  132. priv->num_stations = 0;
  133. memset(priv->stations_39, 0, sizeof(priv->stations_39));
  134. spin_unlock_irqrestore(&priv->sta_lock, flags);
  135. }
  136. /**
  137. * iwl3945_add_station - Add station to station tables in driver and device
  138. */
  139. u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
  140. {
  141. int i;
  142. int index = IWL_INVALID_STATION;
  143. struct iwl3945_station_entry *station;
  144. unsigned long flags_spin;
  145. u8 rate;
  146. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  147. if (is_ap)
  148. index = IWL_AP_ID;
  149. else if (is_broadcast_ether_addr(addr))
  150. index = priv->hw_params.bcast_sta_id;
  151. else
  152. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
  153. if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  154. addr)) {
  155. index = i;
  156. break;
  157. }
  158. if (!priv->stations_39[i].used &&
  159. index == IWL_INVALID_STATION)
  160. index = i;
  161. }
  162. /* These two conditions has the same outcome but keep them separate
  163. since they have different meaning */
  164. if (unlikely(index == IWL_INVALID_STATION)) {
  165. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  166. return index;
  167. }
  168. if (priv->stations_39[index].used &&
  169. !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
  170. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  171. return index;
  172. }
  173. IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
  174. station = &priv->stations_39[index];
  175. station->used = 1;
  176. priv->num_stations++;
  177. /* Set up the REPLY_ADD_STA command to send to device */
  178. memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
  179. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  180. station->sta.mode = 0;
  181. station->sta.sta.sta_id = index;
  182. station->sta.station_flags = 0;
  183. if (priv->band == IEEE80211_BAND_5GHZ)
  184. rate = IWL_RATE_6M_PLCP;
  185. else
  186. rate = IWL_RATE_1M_PLCP;
  187. /* Turn on both antennas for the station... */
  188. station->sta.rate_n_flags =
  189. iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
  190. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  191. /* Add station to device's station table */
  192. iwl3945_send_add_station(priv, &station->sta, flags);
  193. return index;
  194. }
  195. int iwl3945_send_statistics_request(struct iwl_priv *priv)
  196. {
  197. u32 val = 0;
  198. struct iwl_host_cmd cmd = {
  199. .id = REPLY_STATISTICS_CMD,
  200. .len = sizeof(val),
  201. .data = &val,
  202. };
  203. return iwl_send_cmd_sync(priv, &cmd);
  204. }
  205. /**
  206. * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
  207. * @band: 2.4 or 5 GHz band
  208. * @channel: Any channel valid for the requested band
  209. * In addition to setting the staging RXON, priv->band is also set.
  210. *
  211. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  212. * in the staging RXON flag structure based on the band
  213. */
  214. static int iwl3945_set_rxon_channel(struct iwl_priv *priv,
  215. enum ieee80211_band band,
  216. u16 channel)
  217. {
  218. if (!iwl3945_get_channel_info(priv, band, channel)) {
  219. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  220. channel, band);
  221. return -EINVAL;
  222. }
  223. if ((le16_to_cpu(priv->staging39_rxon.channel) == channel) &&
  224. (priv->band == band))
  225. return 0;
  226. priv->staging39_rxon.channel = cpu_to_le16(channel);
  227. if (band == IEEE80211_BAND_5GHZ)
  228. priv->staging39_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  229. else
  230. priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  231. priv->band = band;
  232. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
  233. return 0;
  234. }
  235. /**
  236. * iwl3945_check_rxon_cmd - validate RXON structure is valid
  237. *
  238. * NOTE: This is really only useful during development and can eventually
  239. * be #ifdef'd out once the driver is stable and folks aren't actively
  240. * making changes
  241. */
  242. static int iwl3945_check_rxon_cmd(struct iwl_priv *priv)
  243. {
  244. int error = 0;
  245. int counter = 1;
  246. struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
  247. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  248. error |= le32_to_cpu(rxon->flags &
  249. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  250. RXON_FLG_RADAR_DETECT_MSK));
  251. if (error)
  252. IWL_WARN(priv, "check 24G fields %d | %d\n",
  253. counter++, error);
  254. } else {
  255. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  256. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  257. if (error)
  258. IWL_WARN(priv, "check 52 fields %d | %d\n",
  259. counter++, error);
  260. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  261. if (error)
  262. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  263. counter++, error);
  264. }
  265. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  266. if (error)
  267. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  268. /* make sure basic rates 6Mbps and 1Mbps are supported */
  269. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  270. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  271. if (error)
  272. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  273. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  274. if (error)
  275. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  276. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  277. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  278. if (error)
  279. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  280. counter++, error);
  281. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  282. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  283. if (error)
  284. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  285. counter++, error);
  286. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  287. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  288. if (error)
  289. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  290. counter++, error);
  291. if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
  292. error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
  293. RXON_FLG_ANT_A_MSK)) == 0);
  294. if (error)
  295. IWL_WARN(priv, "check antenna %d %d\n", counter++, error);
  296. if (error)
  297. IWL_WARN(priv, "Tuning to channel %d\n",
  298. le16_to_cpu(rxon->channel));
  299. if (error) {
  300. IWL_ERR(priv, "Not a valid rxon_assoc_cmd field values\n");
  301. return -1;
  302. }
  303. return 0;
  304. }
  305. /**
  306. * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  307. * @priv: staging_rxon is compared to active_rxon
  308. *
  309. * If the RXON structure is changing enough to require a new tune,
  310. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  311. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  312. */
  313. static int iwl3945_full_rxon_required(struct iwl_priv *priv)
  314. {
  315. /* These items are only settable from the full RXON command */
  316. if (!(iwl3945_is_associated(priv)) ||
  317. compare_ether_addr(priv->staging39_rxon.bssid_addr,
  318. priv->active39_rxon.bssid_addr) ||
  319. compare_ether_addr(priv->staging39_rxon.node_addr,
  320. priv->active39_rxon.node_addr) ||
  321. compare_ether_addr(priv->staging39_rxon.wlap_bssid_addr,
  322. priv->active39_rxon.wlap_bssid_addr) ||
  323. (priv->staging39_rxon.dev_type != priv->active39_rxon.dev_type) ||
  324. (priv->staging39_rxon.channel != priv->active39_rxon.channel) ||
  325. (priv->staging39_rxon.air_propagation !=
  326. priv->active39_rxon.air_propagation) ||
  327. (priv->staging39_rxon.assoc_id != priv->active39_rxon.assoc_id))
  328. return 1;
  329. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  330. * be updated with the RXON_ASSOC command -- however only some
  331. * flag transitions are allowed using RXON_ASSOC */
  332. /* Check if we are not switching bands */
  333. if ((priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  334. (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK))
  335. return 1;
  336. /* Check if we are switching association toggle */
  337. if ((priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  338. (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  339. return 1;
  340. return 0;
  341. }
  342. static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
  343. {
  344. int rc = 0;
  345. struct iwl_rx_packet *res = NULL;
  346. struct iwl3945_rxon_assoc_cmd rxon_assoc;
  347. struct iwl_host_cmd cmd = {
  348. .id = REPLY_RXON_ASSOC,
  349. .len = sizeof(rxon_assoc),
  350. .meta.flags = CMD_WANT_SKB,
  351. .data = &rxon_assoc,
  352. };
  353. const struct iwl3945_rxon_cmd *rxon1 = &priv->staging39_rxon;
  354. const struct iwl3945_rxon_cmd *rxon2 = &priv->active39_rxon;
  355. if ((rxon1->flags == rxon2->flags) &&
  356. (rxon1->filter_flags == rxon2->filter_flags) &&
  357. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  358. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  359. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  360. return 0;
  361. }
  362. rxon_assoc.flags = priv->staging39_rxon.flags;
  363. rxon_assoc.filter_flags = priv->staging39_rxon.filter_flags;
  364. rxon_assoc.ofdm_basic_rates = priv->staging39_rxon.ofdm_basic_rates;
  365. rxon_assoc.cck_basic_rates = priv->staging39_rxon.cck_basic_rates;
  366. rxon_assoc.reserved = 0;
  367. rc = iwl_send_cmd_sync(priv, &cmd);
  368. if (rc)
  369. return rc;
  370. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  371. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  372. IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
  373. rc = -EIO;
  374. }
  375. priv->alloc_rxb_skb--;
  376. dev_kfree_skb_any(cmd.meta.u.skb);
  377. return rc;
  378. }
  379. /**
  380. * iwl3945_commit_rxon - commit staging_rxon to hardware
  381. *
  382. * The RXON command in staging_rxon is committed to the hardware and
  383. * the active_rxon structure is updated with the new data. This
  384. * function correctly transitions out of the RXON_ASSOC_MSK state if
  385. * a HW tune is required based on the RXON structure changes.
  386. */
  387. static int iwl3945_commit_rxon(struct iwl_priv *priv)
  388. {
  389. /* cast away the const for active_rxon in this function */
  390. struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active39_rxon;
  391. int rc = 0;
  392. if (!iwl_is_alive(priv))
  393. return -1;
  394. /* always get timestamp with Rx frame */
  395. priv->staging39_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  396. /* select antenna */
  397. priv->staging39_rxon.flags &=
  398. ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
  399. priv->staging39_rxon.flags |= iwl3945_get_antenna_flags(priv);
  400. rc = iwl3945_check_rxon_cmd(priv);
  401. if (rc) {
  402. IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
  403. return -EINVAL;
  404. }
  405. /* If we don't need to send a full RXON, we can use
  406. * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
  407. * and other flags for the current radio configuration. */
  408. if (!iwl3945_full_rxon_required(priv)) {
  409. rc = iwl3945_send_rxon_assoc(priv);
  410. if (rc) {
  411. IWL_ERR(priv, "Error setting RXON_ASSOC "
  412. "configuration (%d).\n", rc);
  413. return rc;
  414. }
  415. memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
  416. return 0;
  417. }
  418. /* If we are currently associated and the new config requires
  419. * an RXON_ASSOC and the new config wants the associated mask enabled,
  420. * we must clear the associated from the active configuration
  421. * before we apply the new config */
  422. if (iwl3945_is_associated(priv) &&
  423. (priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  424. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  425. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  426. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  427. sizeof(struct iwl3945_rxon_cmd),
  428. &priv->active39_rxon);
  429. /* If the mask clearing failed then we set
  430. * active_rxon back to what it was previously */
  431. if (rc) {
  432. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  433. IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
  434. "configuration (%d).\n", rc);
  435. return rc;
  436. }
  437. }
  438. IWL_DEBUG_INFO("Sending RXON\n"
  439. "* with%s RXON_FILTER_ASSOC_MSK\n"
  440. "* channel = %d\n"
  441. "* bssid = %pM\n",
  442. ((priv->staging39_rxon.filter_flags &
  443. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  444. le16_to_cpu(priv->staging39_rxon.channel),
  445. priv->staging_rxon.bssid_addr);
  446. /* Apply the new configuration */
  447. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  448. sizeof(struct iwl3945_rxon_cmd), &priv->staging39_rxon);
  449. if (rc) {
  450. IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
  451. return rc;
  452. }
  453. memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
  454. iwl3945_clear_stations_table(priv);
  455. /* If we issue a new RXON command which required a tune then we must
  456. * send a new TXPOWER command or we won't be able to Tx any frames */
  457. rc = priv->cfg->ops->lib->send_tx_power(priv);
  458. if (rc) {
  459. IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
  460. return rc;
  461. }
  462. /* Add the broadcast address so we can send broadcast frames */
  463. if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
  464. IWL_INVALID_STATION) {
  465. IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
  466. return -EIO;
  467. }
  468. /* If we have set the ASSOC_MSK and we are in BSS mode then
  469. * add the IWL_AP_ID to the station rate table */
  470. if (iwl3945_is_associated(priv) &&
  471. (priv->iw_mode == NL80211_IFTYPE_STATION))
  472. if (iwl3945_add_station(priv, priv->active39_rxon.bssid_addr, 1, 0)
  473. == IWL_INVALID_STATION) {
  474. IWL_ERR(priv, "Error adding AP address for transmit\n");
  475. return -EIO;
  476. }
  477. /* Init the hardware's rate fallback order based on the band */
  478. rc = iwl3945_init_hw_rate_table(priv);
  479. if (rc) {
  480. IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
  481. return -EIO;
  482. }
  483. return 0;
  484. }
  485. static int iwl3945_send_bt_config(struct iwl_priv *priv)
  486. {
  487. struct iwl_bt_cmd bt_cmd = {
  488. .flags = 3,
  489. .lead_time = 0xAA,
  490. .max_kill = 1,
  491. .kill_ack_mask = 0,
  492. .kill_cts_mask = 0,
  493. };
  494. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  495. sizeof(bt_cmd), &bt_cmd);
  496. }
  497. static int iwl3945_add_sta_sync_callback(struct iwl_priv *priv,
  498. struct iwl_cmd *cmd, struct sk_buff *skb)
  499. {
  500. struct iwl_rx_packet *res = NULL;
  501. if (!skb) {
  502. IWL_ERR(priv, "Error: Response NULL in REPLY_ADD_STA.\n");
  503. return 1;
  504. }
  505. res = (struct iwl_rx_packet *)skb->data;
  506. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  507. IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
  508. res->hdr.flags);
  509. return 1;
  510. }
  511. switch (res->u.add_sta.status) {
  512. case ADD_STA_SUCCESS_MSK:
  513. break;
  514. default:
  515. break;
  516. }
  517. /* We didn't cache the SKB; let the caller free it */
  518. return 1;
  519. }
  520. int iwl3945_send_add_station(struct iwl_priv *priv,
  521. struct iwl3945_addsta_cmd *sta, u8 flags)
  522. {
  523. struct iwl_rx_packet *res = NULL;
  524. int rc = 0;
  525. struct iwl_host_cmd cmd = {
  526. .id = REPLY_ADD_STA,
  527. .len = sizeof(struct iwl3945_addsta_cmd),
  528. .meta.flags = flags,
  529. .data = sta,
  530. };
  531. if (flags & CMD_ASYNC)
  532. cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
  533. else
  534. cmd.meta.flags |= CMD_WANT_SKB;
  535. rc = iwl_send_cmd(priv, &cmd);
  536. if (rc || (flags & CMD_ASYNC))
  537. return rc;
  538. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  539. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  540. IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
  541. res->hdr.flags);
  542. rc = -EIO;
  543. }
  544. if (rc == 0) {
  545. switch (res->u.add_sta.status) {
  546. case ADD_STA_SUCCESS_MSK:
  547. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  548. break;
  549. default:
  550. rc = -EIO;
  551. IWL_WARN(priv, "REPLY_ADD_STA failed\n");
  552. break;
  553. }
  554. }
  555. priv->alloc_rxb_skb--;
  556. dev_kfree_skb_any(cmd.meta.u.skb);
  557. return rc;
  558. }
  559. static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
  560. struct ieee80211_key_conf *keyconf,
  561. u8 sta_id)
  562. {
  563. unsigned long flags;
  564. __le16 key_flags = 0;
  565. switch (keyconf->alg) {
  566. case ALG_CCMP:
  567. key_flags |= STA_KEY_FLG_CCMP;
  568. key_flags |= cpu_to_le16(
  569. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  570. key_flags &= ~STA_KEY_FLG_INVALID;
  571. break;
  572. case ALG_TKIP:
  573. case ALG_WEP:
  574. default:
  575. return -EINVAL;
  576. }
  577. spin_lock_irqsave(&priv->sta_lock, flags);
  578. priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
  579. priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
  580. memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
  581. keyconf->keylen);
  582. memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
  583. keyconf->keylen);
  584. priv->stations_39[sta_id].sta.key.key_flags = key_flags;
  585. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  586. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  587. spin_unlock_irqrestore(&priv->sta_lock, flags);
  588. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  589. iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
  590. return 0;
  591. }
  592. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  593. {
  594. unsigned long flags;
  595. spin_lock_irqsave(&priv->sta_lock, flags);
  596. memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
  597. memset(&priv->stations_39[sta_id].sta.key, 0,
  598. sizeof(struct iwl4965_keyinfo));
  599. priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  600. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  601. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  602. spin_unlock_irqrestore(&priv->sta_lock, flags);
  603. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  604. iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
  605. return 0;
  606. }
  607. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  608. {
  609. struct list_head *element;
  610. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  611. priv->frames_count);
  612. while (!list_empty(&priv->free_frames)) {
  613. element = priv->free_frames.next;
  614. list_del(element);
  615. kfree(list_entry(element, struct iwl3945_frame, list));
  616. priv->frames_count--;
  617. }
  618. if (priv->frames_count) {
  619. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  620. priv->frames_count);
  621. priv->frames_count = 0;
  622. }
  623. }
  624. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  625. {
  626. struct iwl3945_frame *frame;
  627. struct list_head *element;
  628. if (list_empty(&priv->free_frames)) {
  629. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  630. if (!frame) {
  631. IWL_ERR(priv, "Could not allocate frame!\n");
  632. return NULL;
  633. }
  634. priv->frames_count++;
  635. return frame;
  636. }
  637. element = priv->free_frames.next;
  638. list_del(element);
  639. return list_entry(element, struct iwl3945_frame, list);
  640. }
  641. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  642. {
  643. memset(frame, 0, sizeof(*frame));
  644. list_add(&frame->list, &priv->free_frames);
  645. }
  646. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  647. struct ieee80211_hdr *hdr,
  648. int left)
  649. {
  650. if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
  651. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  652. (priv->iw_mode != NL80211_IFTYPE_AP)))
  653. return 0;
  654. if (priv->ibss_beacon->len > left)
  655. return 0;
  656. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  657. return priv->ibss_beacon->len;
  658. }
  659. static u8 iwl3945_rate_get_lowest_plcp(struct iwl_priv *priv)
  660. {
  661. u8 i;
  662. int rate_mask;
  663. /* Set rate mask*/
  664. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  665. rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
  666. else
  667. rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
  668. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  669. i = iwl3945_rates[i].next_ieee) {
  670. if (rate_mask & (1 << i))
  671. return iwl3945_rates[i].plcp;
  672. }
  673. /* No valid rate was found. Assign the lowest one */
  674. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  675. return IWL_RATE_1M_PLCP;
  676. else
  677. return IWL_RATE_6M_PLCP;
  678. }
  679. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  680. {
  681. struct iwl3945_frame *frame;
  682. unsigned int frame_size;
  683. int rc;
  684. u8 rate;
  685. frame = iwl3945_get_free_frame(priv);
  686. if (!frame) {
  687. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  688. "command.\n");
  689. return -ENOMEM;
  690. }
  691. rate = iwl3945_rate_get_lowest_plcp(priv);
  692. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  693. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  694. &frame->u.cmd[0]);
  695. iwl3945_free_frame(priv, frame);
  696. return rc;
  697. }
  698. /******************************************************************************
  699. *
  700. * EEPROM related functions
  701. *
  702. ******************************************************************************/
  703. static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
  704. {
  705. memcpy(mac, priv->eeprom39.mac_address, 6);
  706. }
  707. /*
  708. * Clear the OWNER_MSK, to establish driver (instead of uCode running on
  709. * embedded controller) as EEPROM reader; each read is a series of pulses
  710. * to/from the EEPROM chip, not a single event, so even reads could conflict
  711. * if they weren't arbitrated by some ownership mechanism. Here, the driver
  712. * simply claims ownership, which should be safe when this function is called
  713. * (i.e. before loading uCode!).
  714. */
  715. static inline int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
  716. {
  717. _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
  718. return 0;
  719. }
  720. /**
  721. * iwl3945_eeprom_init - read EEPROM contents
  722. *
  723. * Load the EEPROM contents from adapter into priv->eeprom39
  724. *
  725. * NOTE: This routine uses the non-debug IO access functions.
  726. */
  727. int iwl3945_eeprom_init(struct iwl_priv *priv)
  728. {
  729. u16 *e = (u16 *)&priv->eeprom39;
  730. u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
  731. int sz = sizeof(priv->eeprom39);
  732. int ret;
  733. u16 addr;
  734. /* The EEPROM structure has several padding buffers within it
  735. * and when adding new EEPROM maps is subject to programmer errors
  736. * which may be very difficult to identify without explicitly
  737. * checking the resulting size of the eeprom map. */
  738. BUILD_BUG_ON(sizeof(priv->eeprom39) != IWL_EEPROM_IMAGE_SIZE);
  739. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  740. IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
  741. return -ENOENT;
  742. }
  743. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  744. ret = iwl3945_eeprom_acquire_semaphore(priv);
  745. if (ret < 0) {
  746. IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
  747. return -ENOENT;
  748. }
  749. /* eeprom is an array of 16bit values */
  750. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  751. u32 r;
  752. _iwl_write32(priv, CSR_EEPROM_REG,
  753. CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
  754. _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  755. ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
  756. CSR_EEPROM_REG_READ_VALID_MSK,
  757. IWL_EEPROM_ACCESS_TIMEOUT);
  758. if (ret < 0) {
  759. IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
  760. return ret;
  761. }
  762. r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
  763. e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
  764. }
  765. return 0;
  766. }
  767. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  768. {
  769. if (priv->shared_virt)
  770. pci_free_consistent(priv->pci_dev,
  771. sizeof(struct iwl3945_shared),
  772. priv->shared_virt,
  773. priv->shared_phys);
  774. }
  775. /*
  776. * QoS support
  777. */
  778. static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
  779. struct iwl_qosparam_cmd *qos)
  780. {
  781. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  782. sizeof(struct iwl_qosparam_cmd), qos);
  783. }
  784. static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
  785. {
  786. unsigned long flags;
  787. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  788. return;
  789. spin_lock_irqsave(&priv->lock, flags);
  790. priv->qos_data.def_qos_parm.qos_flags = 0;
  791. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  792. !priv->qos_data.qos_cap.q_AP.txop_request)
  793. priv->qos_data.def_qos_parm.qos_flags |=
  794. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  795. if (priv->qos_data.qos_active)
  796. priv->qos_data.def_qos_parm.qos_flags |=
  797. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  798. spin_unlock_irqrestore(&priv->lock, flags);
  799. if (force || iwl3945_is_associated(priv)) {
  800. IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
  801. priv->qos_data.qos_active);
  802. iwl3945_send_qos_params_command(priv,
  803. &(priv->qos_data.def_qos_parm));
  804. }
  805. }
  806. /*
  807. * Power management (not Tx power!) functions
  808. */
  809. #define MSEC_TO_USEC 1024
  810. /* default power management (not Tx power) table values */
  811. /* for TIM 0-10 */
  812. static struct iwl_power_vec_entry range_0[IWL_POWER_MAX] = {
  813. {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  814. {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  815. {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  816. {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  817. {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  818. {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  819. };
  820. /* for TIM > 10 */
  821. static struct iwl_power_vec_entry range_1[IWL_POWER_MAX] = {
  822. {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  823. {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  824. {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  825. {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  826. {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  827. {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  828. };
  829. int iwl3945_power_init_handle(struct iwl_priv *priv)
  830. {
  831. int rc = 0, i;
  832. struct iwl_power_mgr *pow_data;
  833. int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_MAX;
  834. u16 pci_pm;
  835. IWL_DEBUG_POWER("Initialize power \n");
  836. pow_data = &priv->power_data;
  837. memset(pow_data, 0, sizeof(*pow_data));
  838. pow_data->dtim_period = 1;
  839. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  840. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  841. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  842. if (rc != 0)
  843. return 0;
  844. else {
  845. struct iwl_powertable_cmd *cmd;
  846. IWL_DEBUG_POWER("adjust power command flags\n");
  847. for (i = 0; i < IWL_POWER_MAX; i++) {
  848. cmd = &pow_data->pwr_range_0[i].cmd;
  849. if (pci_pm & 0x1)
  850. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  851. else
  852. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  853. }
  854. }
  855. return rc;
  856. }
  857. static int iwl3945_update_power_cmd(struct iwl_priv *priv,
  858. struct iwl_powertable_cmd *cmd, u32 mode)
  859. {
  860. struct iwl_power_mgr *pow_data;
  861. struct iwl_power_vec_entry *range;
  862. u32 max_sleep = 0;
  863. int i;
  864. u8 period = 0;
  865. bool skip;
  866. if (mode > IWL_POWER_INDEX_5) {
  867. IWL_DEBUG_POWER("Error invalid power mode \n");
  868. return -EINVAL;
  869. }
  870. pow_data = &priv->power_data;
  871. if (pow_data->dtim_period < 10)
  872. range = &pow_data->pwr_range_0[0];
  873. else
  874. range = &pow_data->pwr_range_1[1];
  875. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
  876. if (period == 0) {
  877. period = 1;
  878. skip = false;
  879. } else {
  880. skip = !!range[mode].no_dtim;
  881. }
  882. if (skip) {
  883. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  884. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  885. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  886. } else {
  887. max_sleep = period;
  888. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  889. }
  890. for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
  891. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  892. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  893. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  894. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  895. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  896. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  897. le32_to_cpu(cmd->sleep_interval[0]),
  898. le32_to_cpu(cmd->sleep_interval[1]),
  899. le32_to_cpu(cmd->sleep_interval[2]),
  900. le32_to_cpu(cmd->sleep_interval[3]),
  901. le32_to_cpu(cmd->sleep_interval[4]));
  902. return 0;
  903. }
  904. static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode)
  905. {
  906. u32 uninitialized_var(final_mode);
  907. int rc;
  908. struct iwl_powertable_cmd cmd;
  909. /* If on battery, set to 3,
  910. * if plugged into AC power, set to CAM ("continuously aware mode"),
  911. * else user level */
  912. switch (mode) {
  913. case IWL39_POWER_BATTERY:
  914. final_mode = IWL_POWER_INDEX_3;
  915. break;
  916. case IWL39_POWER_AC:
  917. final_mode = IWL_POWER_MODE_CAM;
  918. break;
  919. default:
  920. final_mode = mode;
  921. break;
  922. }
  923. iwl3945_update_power_cmd(priv, &cmd, final_mode);
  924. /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
  925. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD,
  926. sizeof(struct iwl3945_powertable_cmd), &cmd);
  927. if (final_mode == IWL_POWER_MODE_CAM)
  928. clear_bit(STATUS_POWER_PMI, &priv->status);
  929. else
  930. set_bit(STATUS_POWER_PMI, &priv->status);
  931. return rc;
  932. }
  933. #define MAX_UCODE_BEACON_INTERVAL 1024
  934. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  935. static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
  936. {
  937. u16 new_val = 0;
  938. u16 beacon_factor = 0;
  939. beacon_factor =
  940. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  941. / MAX_UCODE_BEACON_INTERVAL;
  942. new_val = beacon_val / beacon_factor;
  943. return cpu_to_le16(new_val);
  944. }
  945. static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
  946. {
  947. u64 interval_tm_unit;
  948. u64 tsf, result;
  949. unsigned long flags;
  950. struct ieee80211_conf *conf = NULL;
  951. u16 beacon_int = 0;
  952. conf = ieee80211_get_hw_conf(priv->hw);
  953. spin_lock_irqsave(&priv->lock, flags);
  954. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  955. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  956. tsf = priv->timestamp;
  957. beacon_int = priv->beacon_int;
  958. spin_unlock_irqrestore(&priv->lock, flags);
  959. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  960. if (beacon_int == 0) {
  961. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  962. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  963. } else {
  964. priv->rxon_timing.beacon_interval =
  965. cpu_to_le16(beacon_int);
  966. priv->rxon_timing.beacon_interval =
  967. iwl3945_adjust_beacon_interval(
  968. le16_to_cpu(priv->rxon_timing.beacon_interval));
  969. }
  970. priv->rxon_timing.atim_window = 0;
  971. } else {
  972. priv->rxon_timing.beacon_interval =
  973. iwl3945_adjust_beacon_interval(conf->beacon_int);
  974. /* TODO: we need to get atim_window from upper stack
  975. * for now we set to 0 */
  976. priv->rxon_timing.atim_window = 0;
  977. }
  978. interval_tm_unit =
  979. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  980. result = do_div(tsf, interval_tm_unit);
  981. priv->rxon_timing.beacon_init_val =
  982. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  983. IWL_DEBUG_ASSOC
  984. ("beacon interval %d beacon timer %d beacon tim %d\n",
  985. le16_to_cpu(priv->rxon_timing.beacon_interval),
  986. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  987. le16_to_cpu(priv->rxon_timing.atim_window));
  988. }
  989. static int iwl3945_scan_initiate(struct iwl_priv *priv)
  990. {
  991. if (!iwl_is_ready_rf(priv)) {
  992. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  993. return -EIO;
  994. }
  995. if (test_bit(STATUS_SCANNING, &priv->status)) {
  996. IWL_DEBUG_SCAN("Scan already in progress.\n");
  997. return -EAGAIN;
  998. }
  999. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1000. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1001. "Queuing.\n");
  1002. return -EAGAIN;
  1003. }
  1004. IWL_DEBUG_INFO("Starting scan...\n");
  1005. if (priv->cfg->sku & IWL_SKU_G)
  1006. priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
  1007. if (priv->cfg->sku & IWL_SKU_A)
  1008. priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
  1009. set_bit(STATUS_SCANNING, &priv->status);
  1010. priv->scan_start = jiffies;
  1011. priv->scan_pass_start = priv->scan_start;
  1012. queue_work(priv->workqueue, &priv->request_scan);
  1013. return 0;
  1014. }
  1015. static int iwl3945_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  1016. {
  1017. struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
  1018. if (hw_decrypt)
  1019. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  1020. else
  1021. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  1022. return 0;
  1023. }
  1024. static void iwl3945_set_flags_for_phymode(struct iwl_priv *priv,
  1025. enum ieee80211_band band)
  1026. {
  1027. if (band == IEEE80211_BAND_5GHZ) {
  1028. priv->staging39_rxon.flags &=
  1029. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1030. | RXON_FLG_CCK_MSK);
  1031. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1032. } else {
  1033. /* Copied from iwl3945_bg_post_associate() */
  1034. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1035. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1036. else
  1037. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1038. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  1039. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1040. priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1041. priv->staging39_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1042. priv->staging39_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1043. }
  1044. }
  1045. /*
  1046. * initialize rxon structure with default values from eeprom
  1047. */
  1048. static void iwl3945_connection_init_rx_config(struct iwl_priv *priv,
  1049. int mode)
  1050. {
  1051. const struct iwl_channel_info *ch_info;
  1052. memset(&priv->staging39_rxon, 0, sizeof(priv->staging39_rxon));
  1053. switch (mode) {
  1054. case NL80211_IFTYPE_AP:
  1055. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_AP;
  1056. break;
  1057. case NL80211_IFTYPE_STATION:
  1058. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1059. priv->staging39_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1060. break;
  1061. case NL80211_IFTYPE_ADHOC:
  1062. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1063. priv->staging39_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1064. priv->staging39_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1065. RXON_FILTER_ACCEPT_GRP_MSK;
  1066. break;
  1067. case NL80211_IFTYPE_MONITOR:
  1068. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1069. priv->staging39_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1070. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1071. break;
  1072. default:
  1073. IWL_ERR(priv, "Unsupported interface type %d\n", mode);
  1074. break;
  1075. }
  1076. #if 0
  1077. /* TODO: Figure out when short_preamble would be set and cache from
  1078. * that */
  1079. if (!hw_to_local(priv->hw)->short_preamble)
  1080. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1081. else
  1082. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1083. #endif
  1084. ch_info = iwl3945_get_channel_info(priv, priv->band,
  1085. le16_to_cpu(priv->active39_rxon.channel));
  1086. if (!ch_info)
  1087. ch_info = &priv->channel_info[0];
  1088. /*
  1089. * in some case A channels are all non IBSS
  1090. * in this case force B/G channel
  1091. */
  1092. if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
  1093. ch_info = &priv->channel_info[0];
  1094. priv->staging39_rxon.channel = cpu_to_le16(ch_info->channel);
  1095. if (is_channel_a_band(ch_info))
  1096. priv->band = IEEE80211_BAND_5GHZ;
  1097. else
  1098. priv->band = IEEE80211_BAND_2GHZ;
  1099. iwl3945_set_flags_for_phymode(priv, priv->band);
  1100. priv->staging39_rxon.ofdm_basic_rates =
  1101. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1102. priv->staging39_rxon.cck_basic_rates =
  1103. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1104. }
  1105. static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
  1106. {
  1107. if (mode == NL80211_IFTYPE_ADHOC) {
  1108. const struct iwl_channel_info *ch_info;
  1109. ch_info = iwl3945_get_channel_info(priv,
  1110. priv->band,
  1111. le16_to_cpu(priv->staging39_rxon.channel));
  1112. if (!ch_info || !is_channel_ibss(ch_info)) {
  1113. IWL_ERR(priv, "channel %d not IBSS channel\n",
  1114. le16_to_cpu(priv->staging39_rxon.channel));
  1115. return -EINVAL;
  1116. }
  1117. }
  1118. iwl3945_connection_init_rx_config(priv, mode);
  1119. memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1120. iwl3945_clear_stations_table(priv);
  1121. /* don't commit rxon if rf-kill is on*/
  1122. if (!iwl_is_ready_rf(priv))
  1123. return -EAGAIN;
  1124. cancel_delayed_work(&priv->scan_check);
  1125. if (iwl_scan_cancel_timeout(priv, 100)) {
  1126. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  1127. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  1128. return -EAGAIN;
  1129. }
  1130. iwl3945_commit_rxon(priv);
  1131. return 0;
  1132. }
  1133. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  1134. struct ieee80211_tx_info *info,
  1135. struct iwl_cmd *cmd,
  1136. struct sk_buff *skb_frag,
  1137. int last_frag)
  1138. {
  1139. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  1140. struct iwl3945_hw_key *keyinfo =
  1141. &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
  1142. switch (keyinfo->alg) {
  1143. case ALG_CCMP:
  1144. tx->sec_ctl = TX_CMD_SEC_CCM;
  1145. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  1146. IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
  1147. break;
  1148. case ALG_TKIP:
  1149. #if 0
  1150. tx->sec_ctl = TX_CMD_SEC_TKIP;
  1151. if (last_frag)
  1152. memcpy(tx->tkip_mic.byte, skb_frag->tail - 8,
  1153. 8);
  1154. else
  1155. memset(tx->tkip_mic.byte, 0, 8);
  1156. #endif
  1157. break;
  1158. case ALG_WEP:
  1159. tx->sec_ctl = TX_CMD_SEC_WEP |
  1160. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  1161. if (keyinfo->keylen == 13)
  1162. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  1163. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  1164. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  1165. "with key %d\n", info->control.hw_key->hw_key_idx);
  1166. break;
  1167. default:
  1168. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  1169. break;
  1170. }
  1171. }
  1172. /*
  1173. * handle build REPLY_TX command notification.
  1174. */
  1175. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  1176. struct iwl_cmd *cmd,
  1177. struct ieee80211_tx_info *info,
  1178. struct ieee80211_hdr *hdr, u8 std_id)
  1179. {
  1180. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  1181. __le32 tx_flags = tx->tx_flags;
  1182. __le16 fc = hdr->frame_control;
  1183. u8 rc_flags = info->control.rates[0].flags;
  1184. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1185. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  1186. tx_flags |= TX_CMD_FLG_ACK_MSK;
  1187. if (ieee80211_is_mgmt(fc))
  1188. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1189. if (ieee80211_is_probe_resp(fc) &&
  1190. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  1191. tx_flags |= TX_CMD_FLG_TSF_MSK;
  1192. } else {
  1193. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  1194. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1195. }
  1196. tx->sta_id = std_id;
  1197. if (ieee80211_has_morefrags(fc))
  1198. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  1199. if (ieee80211_is_data_qos(fc)) {
  1200. u8 *qc = ieee80211_get_qos_ctl(hdr);
  1201. tx->tid_tspec = qc[0] & 0xf;
  1202. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  1203. } else {
  1204. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1205. }
  1206. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  1207. tx_flags |= TX_CMD_FLG_RTS_MSK;
  1208. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  1209. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  1210. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  1211. tx_flags |= TX_CMD_FLG_CTS_MSK;
  1212. }
  1213. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  1214. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  1215. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  1216. if (ieee80211_is_mgmt(fc)) {
  1217. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  1218. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  1219. else
  1220. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  1221. } else {
  1222. tx->timeout.pm_frame_timeout = 0;
  1223. #ifdef CONFIG_IWL3945_LEDS
  1224. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  1225. #endif
  1226. }
  1227. tx->driver_txop = 0;
  1228. tx->tx_flags = tx_flags;
  1229. tx->next_frame_len = 0;
  1230. }
  1231. /**
  1232. * iwl3945_get_sta_id - Find station's index within station table
  1233. */
  1234. static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  1235. {
  1236. int sta_id;
  1237. u16 fc = le16_to_cpu(hdr->frame_control);
  1238. /* If this frame is broadcast or management, use broadcast station id */
  1239. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  1240. is_multicast_ether_addr(hdr->addr1))
  1241. return priv->hw_params.bcast_sta_id;
  1242. switch (priv->iw_mode) {
  1243. /* If we are a client station in a BSS network, use the special
  1244. * AP station entry (that's the only station we communicate with) */
  1245. case NL80211_IFTYPE_STATION:
  1246. return IWL_AP_ID;
  1247. /* If we are an AP, then find the station, or use BCAST */
  1248. case NL80211_IFTYPE_AP:
  1249. sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
  1250. if (sta_id != IWL_INVALID_STATION)
  1251. return sta_id;
  1252. return priv->hw_params.bcast_sta_id;
  1253. /* If this frame is going out to an IBSS network, find the station,
  1254. * or create a new station table entry */
  1255. case NL80211_IFTYPE_ADHOC: {
  1256. /* Create new station table entry */
  1257. sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
  1258. if (sta_id != IWL_INVALID_STATION)
  1259. return sta_id;
  1260. sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
  1261. if (sta_id != IWL_INVALID_STATION)
  1262. return sta_id;
  1263. IWL_DEBUG_DROP("Station %pM not in station map. "
  1264. "Defaulting to broadcast...\n",
  1265. hdr->addr1);
  1266. iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  1267. return priv->hw_params.bcast_sta_id;
  1268. }
  1269. /* If we are in monitor mode, use BCAST. This is required for
  1270. * packet injection. */
  1271. case NL80211_IFTYPE_MONITOR:
  1272. return priv->hw_params.bcast_sta_id;
  1273. default:
  1274. IWL_WARN(priv, "Unknown mode of operation: %d\n",
  1275. priv->iw_mode);
  1276. return priv->hw_params.bcast_sta_id;
  1277. }
  1278. }
  1279. /*
  1280. * start REPLY_TX command process
  1281. */
  1282. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  1283. {
  1284. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1285. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  1286. struct iwl3945_tx_cmd *tx;
  1287. struct iwl_tx_queue *txq = NULL;
  1288. struct iwl_queue *q = NULL;
  1289. struct iwl_cmd *out_cmd = NULL;
  1290. dma_addr_t phys_addr;
  1291. dma_addr_t txcmd_phys;
  1292. int txq_id = skb_get_queue_mapping(skb);
  1293. u16 len, idx, len_org, hdr_len;
  1294. u8 id;
  1295. u8 unicast;
  1296. u8 sta_id;
  1297. u8 tid = 0;
  1298. u16 seq_number = 0;
  1299. __le16 fc;
  1300. u8 wait_write_ptr = 0;
  1301. u8 *qc = NULL;
  1302. unsigned long flags;
  1303. int rc;
  1304. spin_lock_irqsave(&priv->lock, flags);
  1305. if (iwl_is_rfkill(priv)) {
  1306. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  1307. goto drop_unlock;
  1308. }
  1309. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  1310. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  1311. goto drop_unlock;
  1312. }
  1313. unicast = !is_multicast_ether_addr(hdr->addr1);
  1314. id = 0;
  1315. fc = hdr->frame_control;
  1316. #ifdef CONFIG_IWL3945_DEBUG
  1317. if (ieee80211_is_auth(fc))
  1318. IWL_DEBUG_TX("Sending AUTH frame\n");
  1319. else if (ieee80211_is_assoc_req(fc))
  1320. IWL_DEBUG_TX("Sending ASSOC frame\n");
  1321. else if (ieee80211_is_reassoc_req(fc))
  1322. IWL_DEBUG_TX("Sending REASSOC frame\n");
  1323. #endif
  1324. /* drop all data frame if we are not associated */
  1325. if (ieee80211_is_data(fc) &&
  1326. (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
  1327. (!iwl3945_is_associated(priv) ||
  1328. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  1329. IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
  1330. goto drop_unlock;
  1331. }
  1332. spin_unlock_irqrestore(&priv->lock, flags);
  1333. hdr_len = ieee80211_hdrlen(fc);
  1334. /* Find (or create) index into station table for destination station */
  1335. sta_id = iwl3945_get_sta_id(priv, hdr);
  1336. if (sta_id == IWL_INVALID_STATION) {
  1337. IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
  1338. hdr->addr1);
  1339. goto drop;
  1340. }
  1341. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  1342. if (ieee80211_is_data_qos(fc)) {
  1343. qc = ieee80211_get_qos_ctl(hdr);
  1344. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  1345. seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
  1346. IEEE80211_SCTL_SEQ;
  1347. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  1348. (hdr->seq_ctrl &
  1349. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  1350. seq_number += 0x10;
  1351. }
  1352. /* Descriptor for chosen Tx queue */
  1353. txq = &priv->txq[txq_id];
  1354. q = &txq->q;
  1355. spin_lock_irqsave(&priv->lock, flags);
  1356. idx = get_cmd_index(q, q->write_ptr, 0);
  1357. /* Set up driver data for this TFD */
  1358. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  1359. txq->txb[q->write_ptr].skb[0] = skb;
  1360. /* Init first empty entry in queue's array of Tx/cmd buffers */
  1361. out_cmd = txq->cmd[idx];
  1362. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  1363. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  1364. memset(tx, 0, sizeof(*tx));
  1365. /*
  1366. * Set up the Tx-command (not MAC!) header.
  1367. * Store the chosen Tx queue and TFD index within the sequence field;
  1368. * after Tx, uCode's Tx response will return this value so driver can
  1369. * locate the frame within the tx queue and do post-tx processing.
  1370. */
  1371. out_cmd->hdr.cmd = REPLY_TX;
  1372. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  1373. INDEX_TO_SEQ(q->write_ptr)));
  1374. /* Copy MAC header from skb into command buffer */
  1375. memcpy(tx->hdr, hdr, hdr_len);
  1376. /*
  1377. * Use the first empty entry in this queue's command buffer array
  1378. * to contain the Tx command and MAC header concatenated together
  1379. * (payload data will be in another buffer).
  1380. * Size of this varies, due to varying MAC header length.
  1381. * If end is not dword aligned, we'll have 2 extra bytes at the end
  1382. * of the MAC header (device reads on dword boundaries).
  1383. * We'll tell device about this padding later.
  1384. */
  1385. len = sizeof(struct iwl3945_tx_cmd) +
  1386. sizeof(struct iwl_cmd_header) + hdr_len;
  1387. len_org = len;
  1388. len = (len + 3) & ~3;
  1389. if (len_org != len)
  1390. len_org = 1;
  1391. else
  1392. len_org = 0;
  1393. /* Physical address of this Tx command's header (not MAC header!),
  1394. * within command buffer array. */
  1395. txcmd_phys = pci_map_single(priv->pci_dev,
  1396. out_cmd, sizeof(struct iwl_cmd),
  1397. PCI_DMA_TODEVICE);
  1398. pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
  1399. pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
  1400. /* Add buffer containing Tx command and MAC(!) header to TFD's
  1401. * first entry */
  1402. txcmd_phys += offsetof(struct iwl_cmd, hdr);
  1403. /* Add buffer containing Tx command and MAC(!) header to TFD's
  1404. * first entry */
  1405. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  1406. txcmd_phys, len, 1, 0);
  1407. if (info->control.hw_key)
  1408. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
  1409. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  1410. * if any (802.11 null frames have no payload). */
  1411. len = skb->len - hdr_len;
  1412. if (len) {
  1413. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  1414. len, PCI_DMA_TODEVICE);
  1415. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  1416. phys_addr, len,
  1417. 0, U32_PAD(len));
  1418. }
  1419. /* Total # bytes to be transmitted */
  1420. len = (u16)skb->len;
  1421. tx->len = cpu_to_le16(len);
  1422. /* TODO need this for burst mode later on */
  1423. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  1424. /* set is_hcca to 0; it probably will never be implemented */
  1425. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  1426. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  1427. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  1428. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  1429. txq->need_update = 1;
  1430. if (qc)
  1431. priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
  1432. } else {
  1433. wait_write_ptr = 1;
  1434. txq->need_update = 0;
  1435. }
  1436. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  1437. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  1438. ieee80211_hdrlen(fc));
  1439. /* Tell device the write index *just past* this latest filled TFD */
  1440. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  1441. rc = iwl_txq_update_write_ptr(priv, txq);
  1442. spin_unlock_irqrestore(&priv->lock, flags);
  1443. if (rc)
  1444. return rc;
  1445. if ((iwl_queue_space(q) < q->high_mark)
  1446. && priv->mac80211_registered) {
  1447. if (wait_write_ptr) {
  1448. spin_lock_irqsave(&priv->lock, flags);
  1449. txq->need_update = 1;
  1450. iwl_txq_update_write_ptr(priv, txq);
  1451. spin_unlock_irqrestore(&priv->lock, flags);
  1452. }
  1453. ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
  1454. }
  1455. return 0;
  1456. drop_unlock:
  1457. spin_unlock_irqrestore(&priv->lock, flags);
  1458. drop:
  1459. return -1;
  1460. }
  1461. static void iwl3945_set_rate(struct iwl_priv *priv)
  1462. {
  1463. const struct ieee80211_supported_band *sband = NULL;
  1464. struct ieee80211_rate *rate;
  1465. int i;
  1466. sband = iwl_get_hw_mode(priv, priv->band);
  1467. if (!sband) {
  1468. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  1469. return;
  1470. }
  1471. priv->active_rate = 0;
  1472. priv->active_rate_basic = 0;
  1473. IWL_DEBUG_RATE("Setting rates for %s GHz\n",
  1474. sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
  1475. for (i = 0; i < sband->n_bitrates; i++) {
  1476. rate = &sband->bitrates[i];
  1477. if ((rate->hw_value < IWL_RATE_COUNT) &&
  1478. !(rate->flags & IEEE80211_CHAN_DISABLED)) {
  1479. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
  1480. rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
  1481. priv->active_rate |= (1 << rate->hw_value);
  1482. }
  1483. }
  1484. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  1485. priv->active_rate, priv->active_rate_basic);
  1486. /*
  1487. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  1488. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  1489. * OFDM
  1490. */
  1491. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  1492. priv->staging39_rxon.cck_basic_rates =
  1493. ((priv->active_rate_basic &
  1494. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  1495. else
  1496. priv->staging39_rxon.cck_basic_rates =
  1497. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1498. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  1499. priv->staging39_rxon.ofdm_basic_rates =
  1500. ((priv->active_rate_basic &
  1501. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  1502. IWL_FIRST_OFDM_RATE) & 0xFF;
  1503. else
  1504. priv->staging39_rxon.ofdm_basic_rates =
  1505. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1506. }
  1507. static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  1508. {
  1509. unsigned long flags;
  1510. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  1511. return;
  1512. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  1513. disable_radio ? "OFF" : "ON");
  1514. if (disable_radio) {
  1515. iwl_scan_cancel(priv);
  1516. /* FIXME: This is a workaround for AP */
  1517. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  1518. spin_lock_irqsave(&priv->lock, flags);
  1519. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  1520. CSR_UCODE_SW_BIT_RFKILL);
  1521. spin_unlock_irqrestore(&priv->lock, flags);
  1522. iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  1523. set_bit(STATUS_RF_KILL_SW, &priv->status);
  1524. }
  1525. return;
  1526. }
  1527. spin_lock_irqsave(&priv->lock, flags);
  1528. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  1529. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  1530. spin_unlock_irqrestore(&priv->lock, flags);
  1531. /* wake up ucode */
  1532. msleep(10);
  1533. spin_lock_irqsave(&priv->lock, flags);
  1534. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  1535. if (!iwl_grab_nic_access(priv))
  1536. iwl_release_nic_access(priv);
  1537. spin_unlock_irqrestore(&priv->lock, flags);
  1538. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  1539. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  1540. "disabled by HW switch\n");
  1541. return;
  1542. }
  1543. if (priv->is_open)
  1544. queue_work(priv->workqueue, &priv->restart);
  1545. return;
  1546. }
  1547. void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  1548. u32 decrypt_res, struct ieee80211_rx_status *stats)
  1549. {
  1550. u16 fc =
  1551. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  1552. if (priv->active39_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  1553. return;
  1554. if (!(fc & IEEE80211_FCTL_PROTECTED))
  1555. return;
  1556. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  1557. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  1558. case RX_RES_STATUS_SEC_TYPE_TKIP:
  1559. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  1560. RX_RES_STATUS_BAD_ICV_MIC)
  1561. stats->flag |= RX_FLAG_MMIC_ERROR;
  1562. case RX_RES_STATUS_SEC_TYPE_WEP:
  1563. case RX_RES_STATUS_SEC_TYPE_CCMP:
  1564. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  1565. RX_RES_STATUS_DECRYPT_OK) {
  1566. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  1567. stats->flag |= RX_FLAG_DECRYPTED;
  1568. }
  1569. break;
  1570. default:
  1571. break;
  1572. }
  1573. }
  1574. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  1575. #include "iwl-spectrum.h"
  1576. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  1577. #define BEACON_TIME_MASK_HIGH 0xFF000000
  1578. #define TIME_UNIT 1024
  1579. /*
  1580. * extended beacon time format
  1581. * time in usec will be changed into a 32-bit value in 8:24 format
  1582. * the high 1 byte is the beacon counts
  1583. * the lower 3 bytes is the time in usec within one beacon interval
  1584. */
  1585. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  1586. {
  1587. u32 quot;
  1588. u32 rem;
  1589. u32 interval = beacon_interval * 1024;
  1590. if (!interval || !usec)
  1591. return 0;
  1592. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  1593. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  1594. return (quot << 24) + rem;
  1595. }
  1596. /* base is usually what we get from ucode with each received frame,
  1597. * the same as HW timer counter counting down
  1598. */
  1599. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  1600. {
  1601. u32 base_low = base & BEACON_TIME_MASK_LOW;
  1602. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  1603. u32 interval = beacon_interval * TIME_UNIT;
  1604. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  1605. (addon & BEACON_TIME_MASK_HIGH);
  1606. if (base_low > addon_low)
  1607. res += base_low - addon_low;
  1608. else if (base_low < addon_low) {
  1609. res += interval + base_low - addon_low;
  1610. res += (1 << 24);
  1611. } else
  1612. res += (1 << 24);
  1613. return cpu_to_le32(res);
  1614. }
  1615. static int iwl3945_get_measurement(struct iwl_priv *priv,
  1616. struct ieee80211_measurement_params *params,
  1617. u8 type)
  1618. {
  1619. struct iwl_spectrum_cmd spectrum;
  1620. struct iwl_rx_packet *res;
  1621. struct iwl_host_cmd cmd = {
  1622. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  1623. .data = (void *)&spectrum,
  1624. .meta.flags = CMD_WANT_SKB,
  1625. };
  1626. u32 add_time = le64_to_cpu(params->start_time);
  1627. int rc;
  1628. int spectrum_resp_status;
  1629. int duration = le16_to_cpu(params->duration);
  1630. if (iwl3945_is_associated(priv))
  1631. add_time =
  1632. iwl3945_usecs_to_beacons(
  1633. le64_to_cpu(params->start_time) - priv->last_tsf,
  1634. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1635. memset(&spectrum, 0, sizeof(spectrum));
  1636. spectrum.channel_count = cpu_to_le16(1);
  1637. spectrum.flags =
  1638. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  1639. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  1640. cmd.len = sizeof(spectrum);
  1641. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  1642. if (iwl3945_is_associated(priv))
  1643. spectrum.start_time =
  1644. iwl3945_add_beacon_time(priv->last_beacon_time,
  1645. add_time,
  1646. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1647. else
  1648. spectrum.start_time = 0;
  1649. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  1650. spectrum.channels[0].channel = params->channel;
  1651. spectrum.channels[0].type = type;
  1652. if (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  1653. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  1654. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  1655. rc = iwl_send_cmd_sync(priv, &cmd);
  1656. if (rc)
  1657. return rc;
  1658. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1659. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1660. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  1661. rc = -EIO;
  1662. }
  1663. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  1664. switch (spectrum_resp_status) {
  1665. case 0: /* Command will be handled */
  1666. if (res->u.spectrum.id != 0xff) {
  1667. IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
  1668. res->u.spectrum.id);
  1669. priv->measurement_status &= ~MEASUREMENT_READY;
  1670. }
  1671. priv->measurement_status |= MEASUREMENT_ACTIVE;
  1672. rc = 0;
  1673. break;
  1674. case 1: /* Command will not be handled */
  1675. rc = -EAGAIN;
  1676. break;
  1677. }
  1678. dev_kfree_skb_any(cmd.meta.u.skb);
  1679. return rc;
  1680. }
  1681. #endif
  1682. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  1683. struct iwl_rx_mem_buffer *rxb)
  1684. {
  1685. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1686. struct iwl_alive_resp *palive;
  1687. struct delayed_work *pwork;
  1688. palive = &pkt->u.alive_frame;
  1689. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  1690. "0x%01X 0x%01X\n",
  1691. palive->is_valid, palive->ver_type,
  1692. palive->ver_subtype);
  1693. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  1694. IWL_DEBUG_INFO("Initialization Alive received.\n");
  1695. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  1696. sizeof(struct iwl_alive_resp));
  1697. pwork = &priv->init_alive_start;
  1698. } else {
  1699. IWL_DEBUG_INFO("Runtime Alive received.\n");
  1700. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  1701. sizeof(struct iwl_alive_resp));
  1702. pwork = &priv->alive_start;
  1703. iwl3945_disable_events(priv);
  1704. }
  1705. /* We delay the ALIVE response by 5ms to
  1706. * give the HW RF Kill time to activate... */
  1707. if (palive->is_valid == UCODE_VALID_OK)
  1708. queue_delayed_work(priv->workqueue, pwork,
  1709. msecs_to_jiffies(5));
  1710. else
  1711. IWL_WARN(priv, "uCode did not respond OK.\n");
  1712. }
  1713. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  1714. struct iwl_rx_mem_buffer *rxb)
  1715. {
  1716. #ifdef CONFIG_IWLWIFI_DEBUG
  1717. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1718. #endif
  1719. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  1720. return;
  1721. }
  1722. static void iwl3945_rx_reply_error(struct iwl_priv *priv,
  1723. struct iwl_rx_mem_buffer *rxb)
  1724. {
  1725. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1726. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  1727. "seq 0x%04X ser 0x%08X\n",
  1728. le32_to_cpu(pkt->u.err_resp.error_type),
  1729. get_cmd_string(pkt->u.err_resp.cmd_id),
  1730. pkt->u.err_resp.cmd_id,
  1731. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1732. le32_to_cpu(pkt->u.err_resp.error_info));
  1733. }
  1734. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1735. static void iwl3945_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  1736. {
  1737. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1738. struct iwl3945_rxon_cmd *rxon = (void *)&priv->active39_rxon;
  1739. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  1740. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  1741. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  1742. rxon->channel = csa->channel;
  1743. priv->staging39_rxon.channel = csa->channel;
  1744. }
  1745. static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
  1746. struct iwl_rx_mem_buffer *rxb)
  1747. {
  1748. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  1749. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1750. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  1751. if (!report->state) {
  1752. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  1753. "Spectrum Measure Notification: Start\n");
  1754. return;
  1755. }
  1756. memcpy(&priv->measure_report, report, sizeof(*report));
  1757. priv->measurement_status |= MEASUREMENT_READY;
  1758. #endif
  1759. }
  1760. static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
  1761. struct iwl_rx_mem_buffer *rxb)
  1762. {
  1763. #ifdef CONFIG_IWL3945_DEBUG
  1764. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1765. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1766. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  1767. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1768. #endif
  1769. }
  1770. static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  1771. struct iwl_rx_mem_buffer *rxb)
  1772. {
  1773. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1774. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  1775. "notification for %s:\n",
  1776. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  1777. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
  1778. le32_to_cpu(pkt->len));
  1779. }
  1780. static void iwl3945_bg_beacon_update(struct work_struct *work)
  1781. {
  1782. struct iwl_priv *priv =
  1783. container_of(work, struct iwl_priv, beacon_update);
  1784. struct sk_buff *beacon;
  1785. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  1786. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  1787. if (!beacon) {
  1788. IWL_ERR(priv, "update beacon failed\n");
  1789. return;
  1790. }
  1791. mutex_lock(&priv->mutex);
  1792. /* new beacon skb is allocated every time; dispose previous.*/
  1793. if (priv->ibss_beacon)
  1794. dev_kfree_skb(priv->ibss_beacon);
  1795. priv->ibss_beacon = beacon;
  1796. mutex_unlock(&priv->mutex);
  1797. iwl3945_send_beacon_cmd(priv);
  1798. }
  1799. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  1800. struct iwl_rx_mem_buffer *rxb)
  1801. {
  1802. #ifdef CONFIG_IWL3945_DEBUG
  1803. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1804. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  1805. u8 rate = beacon->beacon_notify_hdr.rate;
  1806. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  1807. "tsf %d %d rate %d\n",
  1808. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  1809. beacon->beacon_notify_hdr.failure_frame,
  1810. le32_to_cpu(beacon->ibss_mgr_status),
  1811. le32_to_cpu(beacon->high_tsf),
  1812. le32_to_cpu(beacon->low_tsf), rate);
  1813. #endif
  1814. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  1815. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  1816. queue_work(priv->workqueue, &priv->beacon_update);
  1817. }
  1818. /* Service response to REPLY_SCAN_CMD (0x80) */
  1819. static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
  1820. struct iwl_rx_mem_buffer *rxb)
  1821. {
  1822. #ifdef CONFIG_IWL3945_DEBUG
  1823. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1824. struct iwl_scanreq_notification *notif =
  1825. (struct iwl_scanreq_notification *)pkt->u.raw;
  1826. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  1827. #endif
  1828. }
  1829. /* Service SCAN_START_NOTIFICATION (0x82) */
  1830. static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
  1831. struct iwl_rx_mem_buffer *rxb)
  1832. {
  1833. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1834. struct iwl_scanstart_notification *notif =
  1835. (struct iwl_scanstart_notification *)pkt->u.raw;
  1836. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  1837. IWL_DEBUG_SCAN("Scan start: "
  1838. "%d [802.11%s] "
  1839. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  1840. notif->channel,
  1841. notif->band ? "bg" : "a",
  1842. notif->tsf_high,
  1843. notif->tsf_low, notif->status, notif->beacon_timer);
  1844. }
  1845. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  1846. static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
  1847. struct iwl_rx_mem_buffer *rxb)
  1848. {
  1849. #ifdef CONFIG_IWLWIFI_DEBUG
  1850. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1851. struct iwl_scanresults_notification *notif =
  1852. (struct iwl_scanresults_notification *)pkt->u.raw;
  1853. #endif
  1854. IWL_DEBUG_SCAN("Scan ch.res: "
  1855. "%d [802.11%s] "
  1856. "(TSF: 0x%08X:%08X) - %d "
  1857. "elapsed=%lu usec (%dms since last)\n",
  1858. notif->channel,
  1859. notif->band ? "bg" : "a",
  1860. le32_to_cpu(notif->tsf_high),
  1861. le32_to_cpu(notif->tsf_low),
  1862. le32_to_cpu(notif->statistics[0]),
  1863. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  1864. jiffies_to_msecs(elapsed_jiffies
  1865. (priv->last_scan_jiffies, jiffies)));
  1866. priv->last_scan_jiffies = jiffies;
  1867. priv->next_scan_jiffies = 0;
  1868. }
  1869. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  1870. static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
  1871. struct iwl_rx_mem_buffer *rxb)
  1872. {
  1873. #ifdef CONFIG_IWLWIFI_DEBUG
  1874. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1875. struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  1876. #endif
  1877. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  1878. scan_notif->scanned_channels,
  1879. scan_notif->tsf_low,
  1880. scan_notif->tsf_high, scan_notif->status);
  1881. /* The HW is no longer scanning */
  1882. clear_bit(STATUS_SCAN_HW, &priv->status);
  1883. /* The scan completion notification came in, so kill that timer... */
  1884. cancel_delayed_work(&priv->scan_check);
  1885. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  1886. (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
  1887. "2.4" : "5.2",
  1888. jiffies_to_msecs(elapsed_jiffies
  1889. (priv->scan_pass_start, jiffies)));
  1890. /* Remove this scanned band from the list of pending
  1891. * bands to scan, band G precedes A in order of scanning
  1892. * as seen in iwl3945_bg_request_scan */
  1893. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
  1894. priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
  1895. else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
  1896. priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
  1897. /* If a request to abort was given, or the scan did not succeed
  1898. * then we reset the scan state machine and terminate,
  1899. * re-queuing another scan if one has been requested */
  1900. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1901. IWL_DEBUG_INFO("Aborted scan completed.\n");
  1902. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1903. } else {
  1904. /* If there are more bands on this scan pass reschedule */
  1905. if (priv->scan_bands > 0)
  1906. goto reschedule;
  1907. }
  1908. priv->last_scan_jiffies = jiffies;
  1909. priv->next_scan_jiffies = 0;
  1910. IWL_DEBUG_INFO("Setting scan to off\n");
  1911. clear_bit(STATUS_SCANNING, &priv->status);
  1912. IWL_DEBUG_INFO("Scan took %dms\n",
  1913. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  1914. queue_work(priv->workqueue, &priv->scan_completed);
  1915. return;
  1916. reschedule:
  1917. priv->scan_pass_start = jiffies;
  1918. queue_work(priv->workqueue, &priv->request_scan);
  1919. }
  1920. /* Handle notification from uCode that card's power state is changing
  1921. * due to software, hardware, or critical temperature RFKILL */
  1922. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  1923. struct iwl_rx_mem_buffer *rxb)
  1924. {
  1925. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1926. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  1927. unsigned long status = priv->status;
  1928. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  1929. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  1930. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  1931. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  1932. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  1933. if (flags & HW_CARD_DISABLED)
  1934. set_bit(STATUS_RF_KILL_HW, &priv->status);
  1935. else
  1936. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  1937. if (flags & SW_CARD_DISABLED)
  1938. set_bit(STATUS_RF_KILL_SW, &priv->status);
  1939. else
  1940. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  1941. iwl_scan_cancel(priv);
  1942. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  1943. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  1944. (test_bit(STATUS_RF_KILL_SW, &status) !=
  1945. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  1946. queue_work(priv->workqueue, &priv->rf_kill);
  1947. else
  1948. wake_up_interruptible(&priv->wait_command_queue);
  1949. }
  1950. /**
  1951. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  1952. *
  1953. * Setup the RX handlers for each of the reply types sent from the uCode
  1954. * to the host.
  1955. *
  1956. * This function chains into the hardware specific files for them to setup
  1957. * any hardware specific handlers as well.
  1958. */
  1959. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  1960. {
  1961. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  1962. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  1963. priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
  1964. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
  1965. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  1966. iwl3945_rx_spectrum_measure_notif;
  1967. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
  1968. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  1969. iwl3945_rx_pm_debug_statistics_notif;
  1970. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  1971. /*
  1972. * The same handler is used for both the REPLY to a discrete
  1973. * statistics request from the host as well as for the periodic
  1974. * statistics notifications (after received beacons) from the uCode.
  1975. */
  1976. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  1977. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  1978. priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
  1979. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
  1980. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  1981. iwl3945_rx_scan_results_notif;
  1982. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  1983. iwl3945_rx_scan_complete_notif;
  1984. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  1985. /* Set up hardware specific Rx handlers */
  1986. iwl3945_hw_rx_handler_setup(priv);
  1987. }
  1988. /**
  1989. * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
  1990. * When FW advances 'R' index, all entries between old and new 'R' index
  1991. * need to be reclaimed.
  1992. */
  1993. static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
  1994. int txq_id, int index)
  1995. {
  1996. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  1997. struct iwl_queue *q = &txq->q;
  1998. int nfreed = 0;
  1999. if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
  2000. IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
  2001. "is out of range [0-%d] %d %d.\n", txq_id,
  2002. index, q->n_bd, q->write_ptr, q->read_ptr);
  2003. return;
  2004. }
  2005. for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
  2006. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2007. if (nfreed > 1) {
  2008. IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
  2009. q->write_ptr, q->read_ptr);
  2010. queue_work(priv->workqueue, &priv->restart);
  2011. break;
  2012. }
  2013. nfreed++;
  2014. }
  2015. }
  2016. /**
  2017. * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  2018. * @rxb: Rx buffer to reclaim
  2019. *
  2020. * If an Rx buffer has an async callback associated with it the callback
  2021. * will be executed. The attached skb (if present) will only be freed
  2022. * if the callback returns 1
  2023. */
  2024. static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
  2025. struct iwl_rx_mem_buffer *rxb)
  2026. {
  2027. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2028. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2029. int txq_id = SEQ_TO_QUEUE(sequence);
  2030. int index = SEQ_TO_INDEX(sequence);
  2031. int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
  2032. int cmd_index;
  2033. struct iwl_cmd *cmd;
  2034. if (WARN(txq_id != IWL_CMD_QUEUE_NUM,
  2035. "wrong command queue %d, sequence 0x%X readp=%d writep=%d\n",
  2036. txq_id, sequence,
  2037. priv->txq[IWL_CMD_QUEUE_NUM].q.read_ptr,
  2038. priv->txq[IWL_CMD_QUEUE_NUM].q.write_ptr)) {
  2039. iwl_print_hex_dump(priv, IWL_DL_INFO , rxb, 32);
  2040. return;
  2041. }
  2042. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  2043. cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  2044. /* Input error checking is done when commands are added to queue. */
  2045. if (cmd->meta.flags & CMD_WANT_SKB) {
  2046. cmd->meta.source->u.skb = rxb->skb;
  2047. rxb->skb = NULL;
  2048. } else if (cmd->meta.u.callback &&
  2049. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  2050. rxb->skb = NULL;
  2051. iwl3945_cmd_queue_reclaim(priv, txq_id, index);
  2052. if (!(cmd->meta.flags & CMD_ASYNC)) {
  2053. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  2054. wake_up_interruptible(&priv->wait_command_queue);
  2055. }
  2056. }
  2057. /************************** RX-FUNCTIONS ****************************/
  2058. /*
  2059. * Rx theory of operation
  2060. *
  2061. * The host allocates 32 DMA target addresses and passes the host address
  2062. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  2063. * 0 to 31
  2064. *
  2065. * Rx Queue Indexes
  2066. * The host/firmware share two index registers for managing the Rx buffers.
  2067. *
  2068. * The READ index maps to the first position that the firmware may be writing
  2069. * to -- the driver can read up to (but not including) this position and get
  2070. * good data.
  2071. * The READ index is managed by the firmware once the card is enabled.
  2072. *
  2073. * The WRITE index maps to the last position the driver has read from -- the
  2074. * position preceding WRITE is the last slot the firmware can place a packet.
  2075. *
  2076. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  2077. * WRITE = READ.
  2078. *
  2079. * During initialization, the host sets up the READ queue position to the first
  2080. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  2081. *
  2082. * When the firmware places a packet in a buffer, it will advance the READ index
  2083. * and fire the RX interrupt. The driver can then query the READ index and
  2084. * process as many packets as possible, moving the WRITE index forward as it
  2085. * resets the Rx queue buffers with new memory.
  2086. *
  2087. * The management in the driver is as follows:
  2088. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  2089. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  2090. * to replenish the iwl->rxq->rx_free.
  2091. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  2092. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  2093. * 'processed' and 'read' driver indexes as well)
  2094. * + A received packet is processed and handed to the kernel network stack,
  2095. * detached from the iwl->rxq. The driver 'processed' index is updated.
  2096. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  2097. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  2098. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  2099. * were enough free buffers and RX_STALLED is set it is cleared.
  2100. *
  2101. *
  2102. * Driver sequence:
  2103. *
  2104. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  2105. * iwl3945_rx_queue_restock
  2106. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  2107. * queue, updates firmware pointers, and updates
  2108. * the WRITE index. If insufficient rx_free buffers
  2109. * are available, schedules iwl3945_rx_replenish
  2110. *
  2111. * -- enable interrupts --
  2112. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  2113. * READ INDEX, detaching the SKB from the pool.
  2114. * Moves the packet buffer from queue to rx_used.
  2115. * Calls iwl3945_rx_queue_restock to refill any empty
  2116. * slots.
  2117. * ...
  2118. *
  2119. */
  2120. /**
  2121. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  2122. */
  2123. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  2124. dma_addr_t dma_addr)
  2125. {
  2126. return cpu_to_le32((u32)dma_addr);
  2127. }
  2128. /**
  2129. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  2130. *
  2131. * If there are slots in the RX queue that need to be restocked,
  2132. * and we have free pre-allocated buffers, fill the ranks as much
  2133. * as we can, pulling from rx_free.
  2134. *
  2135. * This moves the 'write' index forward to catch up with 'processed', and
  2136. * also updates the memory address in the firmware to reference the new
  2137. * target buffer.
  2138. */
  2139. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  2140. {
  2141. struct iwl_rx_queue *rxq = &priv->rxq;
  2142. struct list_head *element;
  2143. struct iwl_rx_mem_buffer *rxb;
  2144. unsigned long flags;
  2145. int write, rc;
  2146. spin_lock_irqsave(&rxq->lock, flags);
  2147. write = rxq->write & ~0x7;
  2148. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  2149. /* Get next free Rx buffer, remove from free list */
  2150. element = rxq->rx_free.next;
  2151. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  2152. list_del(element);
  2153. /* Point to Rx buffer via next RBD in circular buffer */
  2154. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  2155. rxq->queue[rxq->write] = rxb;
  2156. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  2157. rxq->free_count--;
  2158. }
  2159. spin_unlock_irqrestore(&rxq->lock, flags);
  2160. /* If the pre-allocated buffer pool is dropping low, schedule to
  2161. * refill it */
  2162. if (rxq->free_count <= RX_LOW_WATERMARK)
  2163. queue_work(priv->workqueue, &priv->rx_replenish);
  2164. /* If we've added more space for the firmware to place data, tell it.
  2165. * Increment device's write pointer in multiples of 8. */
  2166. if ((write != (rxq->write & ~0x7))
  2167. || (abs(rxq->write - rxq->read) > 7)) {
  2168. spin_lock_irqsave(&rxq->lock, flags);
  2169. rxq->need_update = 1;
  2170. spin_unlock_irqrestore(&rxq->lock, flags);
  2171. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  2172. if (rc)
  2173. return rc;
  2174. }
  2175. return 0;
  2176. }
  2177. /**
  2178. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  2179. *
  2180. * When moving to rx_free an SKB is allocated for the slot.
  2181. *
  2182. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  2183. * This is called as a scheduled work item (except for during initialization)
  2184. */
  2185. static void iwl3945_rx_allocate(struct iwl_priv *priv)
  2186. {
  2187. struct iwl_rx_queue *rxq = &priv->rxq;
  2188. struct list_head *element;
  2189. struct iwl_rx_mem_buffer *rxb;
  2190. unsigned long flags;
  2191. spin_lock_irqsave(&rxq->lock, flags);
  2192. while (!list_empty(&rxq->rx_used)) {
  2193. element = rxq->rx_used.next;
  2194. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  2195. /* Alloc a new receive buffer */
  2196. rxb->skb =
  2197. alloc_skb(priv->hw_params.rx_buf_size,
  2198. __GFP_NOWARN | GFP_ATOMIC);
  2199. if (!rxb->skb) {
  2200. if (net_ratelimit())
  2201. IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
  2202. /* We don't reschedule replenish work here -- we will
  2203. * call the restock method and if it still needs
  2204. * more buffers it will schedule replenish */
  2205. break;
  2206. }
  2207. /* If radiotap head is required, reserve some headroom here.
  2208. * The physical head count is a variable rx_stats->phy_count.
  2209. * We reserve 4 bytes here. Plus these extra bytes, the
  2210. * headroom of the physical head should be enough for the
  2211. * radiotap head that iwl3945 supported. See iwl3945_rt.
  2212. */
  2213. skb_reserve(rxb->skb, 4);
  2214. priv->alloc_rxb_skb++;
  2215. list_del(element);
  2216. /* Get physical address of RB/SKB */
  2217. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  2218. rxb->skb->data,
  2219. priv->hw_params.rx_buf_size,
  2220. PCI_DMA_FROMDEVICE);
  2221. list_add_tail(&rxb->list, &rxq->rx_free);
  2222. rxq->free_count++;
  2223. }
  2224. spin_unlock_irqrestore(&rxq->lock, flags);
  2225. }
  2226. /*
  2227. * this should be called while priv->lock is locked
  2228. */
  2229. static void __iwl3945_rx_replenish(void *data)
  2230. {
  2231. struct iwl_priv *priv = data;
  2232. iwl3945_rx_allocate(priv);
  2233. iwl3945_rx_queue_restock(priv);
  2234. }
  2235. void iwl3945_rx_replenish(void *data)
  2236. {
  2237. struct iwl_priv *priv = data;
  2238. unsigned long flags;
  2239. iwl3945_rx_allocate(priv);
  2240. spin_lock_irqsave(&priv->lock, flags);
  2241. iwl3945_rx_queue_restock(priv);
  2242. spin_unlock_irqrestore(&priv->lock, flags);
  2243. }
  2244. /* Convert linear signal-to-noise ratio into dB */
  2245. static u8 ratio2dB[100] = {
  2246. /* 0 1 2 3 4 5 6 7 8 9 */
  2247. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  2248. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  2249. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  2250. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  2251. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  2252. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  2253. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  2254. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  2255. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  2256. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  2257. };
  2258. /* Calculates a relative dB value from a ratio of linear
  2259. * (i.e. not dB) signal levels.
  2260. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  2261. int iwl3945_calc_db_from_ratio(int sig_ratio)
  2262. {
  2263. /* 1000:1 or higher just report as 60 dB */
  2264. if (sig_ratio >= 1000)
  2265. return 60;
  2266. /* 100:1 or higher, divide by 10 and use table,
  2267. * add 20 dB to make up for divide by 10 */
  2268. if (sig_ratio >= 100)
  2269. return 20 + (int)ratio2dB[sig_ratio/10];
  2270. /* We shouldn't see this */
  2271. if (sig_ratio < 1)
  2272. return 0;
  2273. /* Use table for ratios 1:1 - 99:1 */
  2274. return (int)ratio2dB[sig_ratio];
  2275. }
  2276. #define PERFECT_RSSI (-20) /* dBm */
  2277. #define WORST_RSSI (-95) /* dBm */
  2278. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  2279. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  2280. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  2281. * about formulas used below. */
  2282. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  2283. {
  2284. int sig_qual;
  2285. int degradation = PERFECT_RSSI - rssi_dbm;
  2286. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  2287. * as indicator; formula is (signal dbm - noise dbm).
  2288. * SNR at or above 40 is a great signal (100%).
  2289. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  2290. * Weakest usable signal is usually 10 - 15 dB SNR. */
  2291. if (noise_dbm) {
  2292. if (rssi_dbm - noise_dbm >= 40)
  2293. return 100;
  2294. else if (rssi_dbm < noise_dbm)
  2295. return 0;
  2296. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  2297. /* Else use just the signal level.
  2298. * This formula is a least squares fit of data points collected and
  2299. * compared with a reference system that had a percentage (%) display
  2300. * for signal quality. */
  2301. } else
  2302. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  2303. (15 * RSSI_RANGE + 62 * degradation)) /
  2304. (RSSI_RANGE * RSSI_RANGE);
  2305. if (sig_qual > 100)
  2306. sig_qual = 100;
  2307. else if (sig_qual < 1)
  2308. sig_qual = 0;
  2309. return sig_qual;
  2310. }
  2311. /**
  2312. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  2313. *
  2314. * Uses the priv->rx_handlers callback function array to invoke
  2315. * the appropriate handlers, including command responses,
  2316. * frame-received notifications, and other notifications.
  2317. */
  2318. static void iwl3945_rx_handle(struct iwl_priv *priv)
  2319. {
  2320. struct iwl_rx_mem_buffer *rxb;
  2321. struct iwl_rx_packet *pkt;
  2322. struct iwl_rx_queue *rxq = &priv->rxq;
  2323. u32 r, i;
  2324. int reclaim;
  2325. unsigned long flags;
  2326. u8 fill_rx = 0;
  2327. u32 count = 8;
  2328. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  2329. * buffer that the driver may process (last buffer filled by ucode). */
  2330. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  2331. i = rxq->read;
  2332. if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  2333. fill_rx = 1;
  2334. /* Rx interrupt, but nothing sent from uCode */
  2335. if (i == r)
  2336. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  2337. while (i != r) {
  2338. rxb = rxq->queue[i];
  2339. /* If an RXB doesn't have a Rx queue slot associated with it,
  2340. * then a bug has been introduced in the queue refilling
  2341. * routines -- catch it here */
  2342. BUG_ON(rxb == NULL);
  2343. rxq->queue[i] = NULL;
  2344. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
  2345. priv->hw_params.rx_buf_size,
  2346. PCI_DMA_FROMDEVICE);
  2347. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2348. /* Reclaim a command buffer only if this packet is a response
  2349. * to a (driver-originated) command.
  2350. * If the packet (e.g. Rx frame) originated from uCode,
  2351. * there is no command buffer to reclaim.
  2352. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  2353. * but apparently a few don't get set; catch them here. */
  2354. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  2355. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  2356. (pkt->hdr.cmd != REPLY_TX);
  2357. /* Based on type of command response or notification,
  2358. * handle those that need handling via function in
  2359. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  2360. if (priv->rx_handlers[pkt->hdr.cmd]) {
  2361. IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  2362. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  2363. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  2364. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  2365. } else {
  2366. /* No handling needed */
  2367. IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  2368. "r %d i %d No handler needed for %s, 0x%02x\n",
  2369. r, i, get_cmd_string(pkt->hdr.cmd),
  2370. pkt->hdr.cmd);
  2371. }
  2372. if (reclaim) {
  2373. /* Invoke any callbacks, transfer the skb to caller, and
  2374. * fire off the (possibly) blocking iwl_send_cmd()
  2375. * as we reclaim the driver command queue */
  2376. if (rxb && rxb->skb)
  2377. iwl3945_tx_cmd_complete(priv, rxb);
  2378. else
  2379. IWL_WARN(priv, "Claim null rxb?\n");
  2380. }
  2381. /* For now we just don't re-use anything. We can tweak this
  2382. * later to try and re-use notification packets and SKBs that
  2383. * fail to Rx correctly */
  2384. if (rxb->skb != NULL) {
  2385. priv->alloc_rxb_skb--;
  2386. dev_kfree_skb_any(rxb->skb);
  2387. rxb->skb = NULL;
  2388. }
  2389. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  2390. priv->hw_params.rx_buf_size,
  2391. PCI_DMA_FROMDEVICE);
  2392. spin_lock_irqsave(&rxq->lock, flags);
  2393. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  2394. spin_unlock_irqrestore(&rxq->lock, flags);
  2395. i = (i + 1) & RX_QUEUE_MASK;
  2396. /* If there are a lot of unused frames,
  2397. * restock the Rx queue so ucode won't assert. */
  2398. if (fill_rx) {
  2399. count++;
  2400. if (count >= 8) {
  2401. priv->rxq.read = i;
  2402. __iwl3945_rx_replenish(priv);
  2403. count = 0;
  2404. }
  2405. }
  2406. }
  2407. /* Backtrack one entry */
  2408. priv->rxq.read = i;
  2409. iwl3945_rx_queue_restock(priv);
  2410. }
  2411. #ifdef CONFIG_IWL3945_DEBUG
  2412. static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv,
  2413. struct iwl3945_rxon_cmd *rxon)
  2414. {
  2415. IWL_DEBUG_RADIO("RX CONFIG:\n");
  2416. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  2417. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  2418. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  2419. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  2420. le32_to_cpu(rxon->filter_flags));
  2421. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  2422. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  2423. rxon->ofdm_basic_rates);
  2424. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  2425. IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
  2426. IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  2427. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  2428. }
  2429. #endif
  2430. static void iwl3945_enable_interrupts(struct iwl_priv *priv)
  2431. {
  2432. IWL_DEBUG_ISR("Enabling interrupts\n");
  2433. set_bit(STATUS_INT_ENABLED, &priv->status);
  2434. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  2435. }
  2436. /* call this function to flush any scheduled tasklet */
  2437. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  2438. {
  2439. /* wait to make sure we flush pending tasklet*/
  2440. synchronize_irq(priv->pci_dev->irq);
  2441. tasklet_kill(&priv->irq_tasklet);
  2442. }
  2443. static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
  2444. {
  2445. clear_bit(STATUS_INT_ENABLED, &priv->status);
  2446. /* disable interrupts from uCode/NIC to host */
  2447. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  2448. /* acknowledge/clear/reset any interrupts still pending
  2449. * from uCode or flow handler (Rx/Tx DMA) */
  2450. iwl_write32(priv, CSR_INT, 0xffffffff);
  2451. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  2452. IWL_DEBUG_ISR("Disabled interrupts\n");
  2453. }
  2454. static const char *desc_lookup(int i)
  2455. {
  2456. switch (i) {
  2457. case 1:
  2458. return "FAIL";
  2459. case 2:
  2460. return "BAD_PARAM";
  2461. case 3:
  2462. return "BAD_CHECKSUM";
  2463. case 4:
  2464. return "NMI_INTERRUPT";
  2465. case 5:
  2466. return "SYSASSERT";
  2467. case 6:
  2468. return "FATAL_ERROR";
  2469. }
  2470. return "UNKNOWN";
  2471. }
  2472. #define ERROR_START_OFFSET (1 * sizeof(u32))
  2473. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  2474. static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  2475. {
  2476. u32 i;
  2477. u32 desc, time, count, base, data1;
  2478. u32 blink1, blink2, ilink1, ilink2;
  2479. int rc;
  2480. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  2481. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  2482. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  2483. return;
  2484. }
  2485. rc = iwl_grab_nic_access(priv);
  2486. if (rc) {
  2487. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  2488. return;
  2489. }
  2490. count = iwl_read_targ_mem(priv, base);
  2491. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  2492. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  2493. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  2494. priv->status, count);
  2495. }
  2496. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  2497. "ilink1 nmiPC Line\n");
  2498. for (i = ERROR_START_OFFSET;
  2499. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  2500. i += ERROR_ELEM_SIZE) {
  2501. desc = iwl_read_targ_mem(priv, base + i);
  2502. time =
  2503. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  2504. blink1 =
  2505. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  2506. blink2 =
  2507. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  2508. ilink1 =
  2509. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  2510. ilink2 =
  2511. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  2512. data1 =
  2513. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  2514. IWL_ERR(priv,
  2515. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  2516. desc_lookup(desc), desc, time, blink1, blink2,
  2517. ilink1, ilink2, data1);
  2518. }
  2519. iwl_release_nic_access(priv);
  2520. }
  2521. #define EVENT_START_OFFSET (6 * sizeof(u32))
  2522. /**
  2523. * iwl3945_print_event_log - Dump error event log to syslog
  2524. *
  2525. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  2526. */
  2527. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  2528. u32 num_events, u32 mode)
  2529. {
  2530. u32 i;
  2531. u32 base; /* SRAM byte address of event log header */
  2532. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  2533. u32 ptr; /* SRAM byte address of log data */
  2534. u32 ev, time, data; /* event log data */
  2535. if (num_events == 0)
  2536. return;
  2537. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  2538. if (mode == 0)
  2539. event_size = 2 * sizeof(u32);
  2540. else
  2541. event_size = 3 * sizeof(u32);
  2542. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  2543. /* "time" is actually "data" for mode 0 (no timestamp).
  2544. * place event id # at far right for easier visual parsing. */
  2545. for (i = 0; i < num_events; i++) {
  2546. ev = iwl_read_targ_mem(priv, ptr);
  2547. ptr += sizeof(u32);
  2548. time = iwl_read_targ_mem(priv, ptr);
  2549. ptr += sizeof(u32);
  2550. if (mode == 0) {
  2551. /* data, ev */
  2552. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  2553. } else {
  2554. data = iwl_read_targ_mem(priv, ptr);
  2555. ptr += sizeof(u32);
  2556. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  2557. }
  2558. }
  2559. }
  2560. static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  2561. {
  2562. int rc;
  2563. u32 base; /* SRAM byte address of event log header */
  2564. u32 capacity; /* event log capacity in # entries */
  2565. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  2566. u32 num_wraps; /* # times uCode wrapped to top of log */
  2567. u32 next_entry; /* index of next entry to be written by uCode */
  2568. u32 size; /* # entries that we'll print */
  2569. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  2570. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  2571. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  2572. return;
  2573. }
  2574. rc = iwl_grab_nic_access(priv);
  2575. if (rc) {
  2576. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  2577. return;
  2578. }
  2579. /* event log header */
  2580. capacity = iwl_read_targ_mem(priv, base);
  2581. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  2582. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  2583. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  2584. size = num_wraps ? capacity : next_entry;
  2585. /* bail out if nothing in log */
  2586. if (size == 0) {
  2587. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  2588. iwl_release_nic_access(priv);
  2589. return;
  2590. }
  2591. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  2592. size, num_wraps);
  2593. /* if uCode has wrapped back to top of log, start at the oldest entry,
  2594. * i.e the next one that uCode would fill. */
  2595. if (num_wraps)
  2596. iwl3945_print_event_log(priv, next_entry,
  2597. capacity - next_entry, mode);
  2598. /* (then/else) start at top of log */
  2599. iwl3945_print_event_log(priv, 0, next_entry, mode);
  2600. iwl_release_nic_access(priv);
  2601. }
  2602. /**
  2603. * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
  2604. */
  2605. static void iwl3945_irq_handle_error(struct iwl_priv *priv)
  2606. {
  2607. /* Set the FW error flag -- cleared on iwl3945_down */
  2608. set_bit(STATUS_FW_ERROR, &priv->status);
  2609. /* Cancel currently queued command. */
  2610. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  2611. #ifdef CONFIG_IWL3945_DEBUG
  2612. if (priv->debug_level & IWL_DL_FW_ERRORS) {
  2613. iwl3945_dump_nic_error_log(priv);
  2614. iwl3945_dump_nic_event_log(priv);
  2615. iwl3945_print_rx_config_cmd(priv, &priv->staging39_rxon);
  2616. }
  2617. #endif
  2618. wake_up_interruptible(&priv->wait_command_queue);
  2619. /* Keep the restart process from trying to send host
  2620. * commands by clearing the INIT status bit */
  2621. clear_bit(STATUS_READY, &priv->status);
  2622. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2623. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  2624. "Restarting adapter due to uCode error.\n");
  2625. if (iwl3945_is_associated(priv)) {
  2626. memcpy(&priv->recovery39_rxon, &priv->active39_rxon,
  2627. sizeof(priv->recovery39_rxon));
  2628. priv->error_recovering = 1;
  2629. }
  2630. queue_work(priv->workqueue, &priv->restart);
  2631. }
  2632. }
  2633. static void iwl3945_error_recovery(struct iwl_priv *priv)
  2634. {
  2635. unsigned long flags;
  2636. memcpy(&priv->staging39_rxon, &priv->recovery39_rxon,
  2637. sizeof(priv->staging39_rxon));
  2638. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2639. iwl3945_commit_rxon(priv);
  2640. iwl3945_add_station(priv, priv->bssid, 1, 0);
  2641. spin_lock_irqsave(&priv->lock, flags);
  2642. priv->assoc_id = le16_to_cpu(priv->staging39_rxon.assoc_id);
  2643. priv->error_recovering = 0;
  2644. spin_unlock_irqrestore(&priv->lock, flags);
  2645. }
  2646. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  2647. {
  2648. u32 inta, handled = 0;
  2649. u32 inta_fh;
  2650. unsigned long flags;
  2651. #ifdef CONFIG_IWL3945_DEBUG
  2652. u32 inta_mask;
  2653. #endif
  2654. spin_lock_irqsave(&priv->lock, flags);
  2655. /* Ack/clear/reset pending uCode interrupts.
  2656. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  2657. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  2658. inta = iwl_read32(priv, CSR_INT);
  2659. iwl_write32(priv, CSR_INT, inta);
  2660. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  2661. * Any new interrupts that happen after this, either while we're
  2662. * in this tasklet, or later, will show up in next ISR/tasklet. */
  2663. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  2664. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  2665. #ifdef CONFIG_IWL3945_DEBUG
  2666. if (priv->debug_level & IWL_DL_ISR) {
  2667. /* just for debug */
  2668. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  2669. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  2670. inta, inta_mask, inta_fh);
  2671. }
  2672. #endif
  2673. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  2674. * atomic, make sure that inta covers all the interrupts that
  2675. * we've discovered, even if FH interrupt came in just after
  2676. * reading CSR_INT. */
  2677. if (inta_fh & CSR39_FH_INT_RX_MASK)
  2678. inta |= CSR_INT_BIT_FH_RX;
  2679. if (inta_fh & CSR39_FH_INT_TX_MASK)
  2680. inta |= CSR_INT_BIT_FH_TX;
  2681. /* Now service all interrupt bits discovered above. */
  2682. if (inta & CSR_INT_BIT_HW_ERR) {
  2683. IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
  2684. /* Tell the device to stop sending interrupts */
  2685. iwl3945_disable_interrupts(priv);
  2686. iwl3945_irq_handle_error(priv);
  2687. handled |= CSR_INT_BIT_HW_ERR;
  2688. spin_unlock_irqrestore(&priv->lock, flags);
  2689. return;
  2690. }
  2691. #ifdef CONFIG_IWL3945_DEBUG
  2692. if (priv->debug_level & (IWL_DL_ISR)) {
  2693. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  2694. if (inta & CSR_INT_BIT_SCD)
  2695. IWL_DEBUG_ISR("Scheduler finished to transmit "
  2696. "the frame/frames.\n");
  2697. /* Alive notification via Rx interrupt will do the real work */
  2698. if (inta & CSR_INT_BIT_ALIVE)
  2699. IWL_DEBUG_ISR("Alive interrupt\n");
  2700. }
  2701. #endif
  2702. /* Safely ignore these bits for debug checks below */
  2703. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  2704. /* Error detected by uCode */
  2705. if (inta & CSR_INT_BIT_SW_ERR) {
  2706. IWL_ERR(priv, "Microcode SW error detected. "
  2707. "Restarting 0x%X.\n", inta);
  2708. iwl3945_irq_handle_error(priv);
  2709. handled |= CSR_INT_BIT_SW_ERR;
  2710. }
  2711. /* uCode wakes up after power-down sleep */
  2712. if (inta & CSR_INT_BIT_WAKEUP) {
  2713. IWL_DEBUG_ISR("Wakeup interrupt\n");
  2714. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  2715. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  2716. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  2717. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  2718. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  2719. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  2720. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  2721. handled |= CSR_INT_BIT_WAKEUP;
  2722. }
  2723. /* All uCode command responses, including Tx command responses,
  2724. * Rx "responses" (frame-received notification), and other
  2725. * notifications from uCode come through here*/
  2726. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  2727. iwl3945_rx_handle(priv);
  2728. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  2729. }
  2730. if (inta & CSR_INT_BIT_FH_TX) {
  2731. IWL_DEBUG_ISR("Tx interrupt\n");
  2732. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  2733. if (!iwl_grab_nic_access(priv)) {
  2734. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  2735. (FH39_SRVC_CHNL), 0x0);
  2736. iwl_release_nic_access(priv);
  2737. }
  2738. handled |= CSR_INT_BIT_FH_TX;
  2739. }
  2740. if (inta & ~handled)
  2741. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  2742. if (inta & ~CSR_INI_SET_MASK) {
  2743. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  2744. inta & ~CSR_INI_SET_MASK);
  2745. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  2746. }
  2747. /* Re-enable all interrupts */
  2748. /* only Re-enable if disabled by irq */
  2749. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  2750. iwl3945_enable_interrupts(priv);
  2751. #ifdef CONFIG_IWL3945_DEBUG
  2752. if (priv->debug_level & (IWL_DL_ISR)) {
  2753. inta = iwl_read32(priv, CSR_INT);
  2754. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  2755. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  2756. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  2757. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  2758. }
  2759. #endif
  2760. spin_unlock_irqrestore(&priv->lock, flags);
  2761. }
  2762. static irqreturn_t iwl3945_isr(int irq, void *data)
  2763. {
  2764. struct iwl_priv *priv = data;
  2765. u32 inta, inta_mask;
  2766. u32 inta_fh;
  2767. if (!priv)
  2768. return IRQ_NONE;
  2769. spin_lock(&priv->lock);
  2770. /* Disable (but don't clear!) interrupts here to avoid
  2771. * back-to-back ISRs and sporadic interrupts from our NIC.
  2772. * If we have something to service, the tasklet will re-enable ints.
  2773. * If we *don't* have something, we'll re-enable before leaving here. */
  2774. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  2775. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  2776. /* Discover which interrupts are active/pending */
  2777. inta = iwl_read32(priv, CSR_INT);
  2778. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  2779. /* Ignore interrupt if there's nothing in NIC to service.
  2780. * This may be due to IRQ shared with another device,
  2781. * or due to sporadic interrupts thrown from our NIC. */
  2782. if (!inta && !inta_fh) {
  2783. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  2784. goto none;
  2785. }
  2786. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  2787. /* Hardware disappeared */
  2788. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  2789. goto unplugged;
  2790. }
  2791. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  2792. inta, inta_mask, inta_fh);
  2793. inta &= ~CSR_INT_BIT_SCD;
  2794. /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
  2795. if (likely(inta || inta_fh))
  2796. tasklet_schedule(&priv->irq_tasklet);
  2797. unplugged:
  2798. spin_unlock(&priv->lock);
  2799. return IRQ_HANDLED;
  2800. none:
  2801. /* re-enable interrupts here since we don't have anything to service. */
  2802. /* only Re-enable if disabled by irq */
  2803. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  2804. iwl3945_enable_interrupts(priv);
  2805. spin_unlock(&priv->lock);
  2806. return IRQ_NONE;
  2807. }
  2808. /************************** EEPROM BANDS ****************************
  2809. *
  2810. * The iwl3945_eeprom_band definitions below provide the mapping from the
  2811. * EEPROM contents to the specific channel number supported for each
  2812. * band.
  2813. *
  2814. * For example, iwl3945_priv->eeprom39.band_3_channels[4] from the band_3
  2815. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  2816. * The specific geography and calibration information for that channel
  2817. * is contained in the eeprom map itself.
  2818. *
  2819. * During init, we copy the eeprom information and channel map
  2820. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  2821. *
  2822. * channel_map_24/52 provides the index in the channel_info array for a
  2823. * given channel. We have to have two separate maps as there is channel
  2824. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  2825. * band_2
  2826. *
  2827. * A value of 0xff stored in the channel_map indicates that the channel
  2828. * is not supported by the hardware at all.
  2829. *
  2830. * A value of 0xfe in the channel_map indicates that the channel is not
  2831. * valid for Tx with the current hardware. This means that
  2832. * while the system can tune and receive on a given channel, it may not
  2833. * be able to associate or transmit any frames on that
  2834. * channel. There is no corresponding channel information for that
  2835. * entry.
  2836. *
  2837. *********************************************************************/
  2838. /* 2.4 GHz */
  2839. static const u8 iwl3945_eeprom_band_1[14] = {
  2840. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  2841. };
  2842. /* 5.2 GHz bands */
  2843. static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
  2844. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  2845. };
  2846. static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
  2847. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  2848. };
  2849. static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
  2850. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  2851. };
  2852. static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
  2853. 145, 149, 153, 157, 161, 165
  2854. };
  2855. static void iwl3945_init_band_reference(const struct iwl_priv *priv, int band,
  2856. int *eeprom_ch_count,
  2857. const struct iwl_eeprom_channel
  2858. **eeprom_ch_info,
  2859. const u8 **eeprom_ch_index)
  2860. {
  2861. switch (band) {
  2862. case 1: /* 2.4GHz band */
  2863. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
  2864. *eeprom_ch_info = priv->eeprom39.band_1_channels;
  2865. *eeprom_ch_index = iwl3945_eeprom_band_1;
  2866. break;
  2867. case 2: /* 4.9GHz band */
  2868. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
  2869. *eeprom_ch_info = priv->eeprom39.band_2_channels;
  2870. *eeprom_ch_index = iwl3945_eeprom_band_2;
  2871. break;
  2872. case 3: /* 5.2GHz band */
  2873. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
  2874. *eeprom_ch_info = priv->eeprom39.band_3_channels;
  2875. *eeprom_ch_index = iwl3945_eeprom_band_3;
  2876. break;
  2877. case 4: /* 5.5GHz band */
  2878. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
  2879. *eeprom_ch_info = priv->eeprom39.band_4_channels;
  2880. *eeprom_ch_index = iwl3945_eeprom_band_4;
  2881. break;
  2882. case 5: /* 5.7GHz band */
  2883. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
  2884. *eeprom_ch_info = priv->eeprom39.band_5_channels;
  2885. *eeprom_ch_index = iwl3945_eeprom_band_5;
  2886. break;
  2887. default:
  2888. BUG();
  2889. return;
  2890. }
  2891. }
  2892. /**
  2893. * iwl3945_get_channel_info - Find driver's private channel info
  2894. *
  2895. * Based on band and channel number.
  2896. */
  2897. const struct iwl_channel_info *
  2898. iwl3945_get_channel_info(const struct iwl_priv *priv,
  2899. enum ieee80211_band band, u16 channel)
  2900. {
  2901. int i;
  2902. switch (band) {
  2903. case IEEE80211_BAND_5GHZ:
  2904. for (i = 14; i < priv->channel_count; i++) {
  2905. if (priv->channel_info[i].channel == channel)
  2906. return &priv->channel_info[i];
  2907. }
  2908. break;
  2909. case IEEE80211_BAND_2GHZ:
  2910. if (channel >= 1 && channel <= 14)
  2911. return &priv->channel_info[channel - 1];
  2912. break;
  2913. case IEEE80211_NUM_BANDS:
  2914. WARN_ON(1);
  2915. }
  2916. return NULL;
  2917. }
  2918. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  2919. ? # x " " : "")
  2920. /**
  2921. * iwl3945_init_channel_map - Set up driver's info for all possible channels
  2922. */
  2923. static int iwl3945_init_channel_map(struct iwl_priv *priv)
  2924. {
  2925. int eeprom_ch_count = 0;
  2926. const u8 *eeprom_ch_index = NULL;
  2927. const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
  2928. int band, ch;
  2929. struct iwl_channel_info *ch_info;
  2930. if (priv->channel_count) {
  2931. IWL_DEBUG_INFO("Channel map already initialized.\n");
  2932. return 0;
  2933. }
  2934. if (priv->eeprom39.version < 0x2f) {
  2935. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  2936. priv->eeprom39.version);
  2937. return -EINVAL;
  2938. }
  2939. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  2940. priv->channel_count =
  2941. ARRAY_SIZE(iwl3945_eeprom_band_1) +
  2942. ARRAY_SIZE(iwl3945_eeprom_band_2) +
  2943. ARRAY_SIZE(iwl3945_eeprom_band_3) +
  2944. ARRAY_SIZE(iwl3945_eeprom_band_4) +
  2945. ARRAY_SIZE(iwl3945_eeprom_band_5);
  2946. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  2947. priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
  2948. priv->channel_count, GFP_KERNEL);
  2949. if (!priv->channel_info) {
  2950. IWL_ERR(priv, "Could not allocate channel_info\n");
  2951. priv->channel_count = 0;
  2952. return -ENOMEM;
  2953. }
  2954. ch_info = priv->channel_info;
  2955. /* Loop through the 5 EEPROM bands adding them in order to the
  2956. * channel map we maintain (that contains additional information than
  2957. * what just in the EEPROM) */
  2958. for (band = 1; band <= 5; band++) {
  2959. iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
  2960. &eeprom_ch_info, &eeprom_ch_index);
  2961. /* Loop through each band adding each of the channels */
  2962. for (ch = 0; ch < eeprom_ch_count; ch++) {
  2963. ch_info->channel = eeprom_ch_index[ch];
  2964. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  2965. IEEE80211_BAND_5GHZ;
  2966. /* permanently store EEPROM's channel regulatory flags
  2967. * and max power in channel info database. */
  2968. ch_info->eeprom = eeprom_ch_info[ch];
  2969. /* Copy the run-time flags so they are there even on
  2970. * invalid channels */
  2971. ch_info->flags = eeprom_ch_info[ch].flags;
  2972. if (!(is_channel_valid(ch_info))) {
  2973. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  2974. "No traffic\n",
  2975. ch_info->channel,
  2976. ch_info->flags,
  2977. is_channel_a_band(ch_info) ?
  2978. "5.2" : "2.4");
  2979. ch_info++;
  2980. continue;
  2981. }
  2982. /* Initialize regulatory-based run-time data */
  2983. ch_info->max_power_avg = ch_info->curr_txpow =
  2984. eeprom_ch_info[ch].max_power_avg;
  2985. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  2986. ch_info->min_power = 0;
  2987. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  2988. " %ddBm): Ad-Hoc %ssupported\n",
  2989. ch_info->channel,
  2990. is_channel_a_band(ch_info) ?
  2991. "5.2" : "2.4",
  2992. CHECK_AND_PRINT(VALID),
  2993. CHECK_AND_PRINT(IBSS),
  2994. CHECK_AND_PRINT(ACTIVE),
  2995. CHECK_AND_PRINT(RADAR),
  2996. CHECK_AND_PRINT(WIDE),
  2997. CHECK_AND_PRINT(DFS),
  2998. eeprom_ch_info[ch].flags,
  2999. eeprom_ch_info[ch].max_power_avg,
  3000. ((eeprom_ch_info[ch].
  3001. flags & EEPROM_CHANNEL_IBSS)
  3002. && !(eeprom_ch_info[ch].
  3003. flags & EEPROM_CHANNEL_RADAR))
  3004. ? "" : "not ");
  3005. /* Set the tx_power_user_lmt to the highest power
  3006. * supported by any channel */
  3007. if (eeprom_ch_info[ch].max_power_avg >
  3008. priv->tx_power_user_lmt)
  3009. priv->tx_power_user_lmt =
  3010. eeprom_ch_info[ch].max_power_avg;
  3011. ch_info++;
  3012. }
  3013. }
  3014. /* Set up txpower settings in driver for all channels */
  3015. if (iwl3945_txpower_set_from_eeprom(priv))
  3016. return -EIO;
  3017. return 0;
  3018. }
  3019. /*
  3020. * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
  3021. */
  3022. static void iwl3945_free_channel_map(struct iwl_priv *priv)
  3023. {
  3024. kfree(priv->channel_info);
  3025. priv->channel_count = 0;
  3026. }
  3027. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  3028. enum ieee80211_band band,
  3029. u8 is_active, u8 n_probes,
  3030. struct iwl3945_scan_channel *scan_ch)
  3031. {
  3032. const struct ieee80211_channel *channels = NULL;
  3033. const struct ieee80211_supported_band *sband;
  3034. const struct iwl_channel_info *ch_info;
  3035. u16 passive_dwell = 0;
  3036. u16 active_dwell = 0;
  3037. int added, i;
  3038. sband = iwl_get_hw_mode(priv, band);
  3039. if (!sband)
  3040. return 0;
  3041. channels = sband->channels;
  3042. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  3043. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  3044. if (passive_dwell <= active_dwell)
  3045. passive_dwell = active_dwell + 1;
  3046. for (i = 0, added = 0; i < sband->n_channels; i++) {
  3047. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  3048. continue;
  3049. scan_ch->channel = channels[i].hw_value;
  3050. ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
  3051. if (!is_channel_valid(ch_info)) {
  3052. IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
  3053. scan_ch->channel);
  3054. continue;
  3055. }
  3056. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  3057. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  3058. /* If passive , set up for auto-switch
  3059. * and use long active_dwell time.
  3060. */
  3061. if (!is_active || is_channel_passive(ch_info) ||
  3062. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  3063. scan_ch->type = 0; /* passive */
  3064. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  3065. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  3066. } else {
  3067. scan_ch->type = 1; /* active */
  3068. }
  3069. /* Set direct probe bits. These may be used both for active
  3070. * scan channels (probes gets sent right away),
  3071. * or for passive channels (probes get se sent only after
  3072. * hearing clear Rx packet).*/
  3073. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  3074. if (n_probes)
  3075. scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
  3076. } else {
  3077. /* uCode v1 does not allow setting direct probe bits on
  3078. * passive channel. */
  3079. if ((scan_ch->type & 1) && n_probes)
  3080. scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
  3081. }
  3082. /* Set txpower levels to defaults */
  3083. scan_ch->tpc.dsp_atten = 110;
  3084. /* scan_pwr_info->tpc.dsp_atten; */
  3085. /*scan_pwr_info->tpc.tx_gain; */
  3086. if (band == IEEE80211_BAND_5GHZ)
  3087. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  3088. else {
  3089. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  3090. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  3091. * power level:
  3092. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  3093. */
  3094. }
  3095. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  3096. scan_ch->channel,
  3097. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  3098. (scan_ch->type & 1) ?
  3099. active_dwell : passive_dwell);
  3100. scan_ch++;
  3101. added++;
  3102. }
  3103. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  3104. return added;
  3105. }
  3106. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  3107. struct ieee80211_rate *rates)
  3108. {
  3109. int i;
  3110. for (i = 0; i < IWL_RATE_COUNT; i++) {
  3111. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  3112. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  3113. rates[i].hw_value_short = i;
  3114. rates[i].flags = 0;
  3115. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  3116. /*
  3117. * If CCK != 1M then set short preamble rate flag.
  3118. */
  3119. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  3120. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  3121. }
  3122. }
  3123. }
  3124. /**
  3125. * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
  3126. */
  3127. static int iwl3945_init_geos(struct iwl_priv *priv)
  3128. {
  3129. struct iwl_channel_info *ch;
  3130. struct ieee80211_supported_band *sband;
  3131. struct ieee80211_channel *channels;
  3132. struct ieee80211_channel *geo_ch;
  3133. struct ieee80211_rate *rates;
  3134. int i = 0;
  3135. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  3136. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  3137. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  3138. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  3139. return 0;
  3140. }
  3141. channels = kzalloc(sizeof(struct ieee80211_channel) *
  3142. priv->channel_count, GFP_KERNEL);
  3143. if (!channels)
  3144. return -ENOMEM;
  3145. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  3146. GFP_KERNEL);
  3147. if (!rates) {
  3148. kfree(channels);
  3149. return -ENOMEM;
  3150. }
  3151. /* 5.2GHz channels start after the 2.4GHz channels */
  3152. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  3153. sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
  3154. /* just OFDM */
  3155. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  3156. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  3157. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  3158. sband->channels = channels;
  3159. /* OFDM & CCK */
  3160. sband->bitrates = rates;
  3161. sband->n_bitrates = IWL_RATE_COUNT;
  3162. priv->ieee_channels = channels;
  3163. priv->ieee_rates = rates;
  3164. iwl3945_init_hw_rates(priv, rates);
  3165. for (i = 0; i < priv->channel_count; i++) {
  3166. ch = &priv->channel_info[i];
  3167. /* FIXME: might be removed if scan is OK*/
  3168. if (!is_channel_valid(ch))
  3169. continue;
  3170. if (is_channel_a_band(ch))
  3171. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  3172. else
  3173. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  3174. geo_ch = &sband->channels[sband->n_channels++];
  3175. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  3176. geo_ch->max_power = ch->max_power_avg;
  3177. geo_ch->max_antenna_gain = 0xff;
  3178. geo_ch->hw_value = ch->channel;
  3179. if (is_channel_valid(ch)) {
  3180. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  3181. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  3182. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  3183. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  3184. if (ch->flags & EEPROM_CHANNEL_RADAR)
  3185. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  3186. if (ch->max_power_avg > priv->tx_power_channel_lmt)
  3187. priv->tx_power_channel_lmt =
  3188. ch->max_power_avg;
  3189. } else {
  3190. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  3191. }
  3192. /* Save flags for reg domain usage */
  3193. geo_ch->orig_flags = geo_ch->flags;
  3194. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  3195. ch->channel, geo_ch->center_freq,
  3196. is_channel_a_band(ch) ? "5.2" : "2.4",
  3197. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  3198. "restricted" : "valid",
  3199. geo_ch->flags);
  3200. }
  3201. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  3202. priv->cfg->sku & IWL_SKU_A) {
  3203. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  3204. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  3205. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  3206. priv->cfg->sku &= ~IWL_SKU_A;
  3207. }
  3208. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  3209. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  3210. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  3211. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3212. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3213. &priv->bands[IEEE80211_BAND_2GHZ];
  3214. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3215. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3216. &priv->bands[IEEE80211_BAND_5GHZ];
  3217. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  3218. return 0;
  3219. }
  3220. /*
  3221. * iwl3945_free_geos - undo allocations in iwl3945_init_geos
  3222. */
  3223. static void iwl3945_free_geos(struct iwl_priv *priv)
  3224. {
  3225. kfree(priv->ieee_channels);
  3226. kfree(priv->ieee_rates);
  3227. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  3228. }
  3229. /******************************************************************************
  3230. *
  3231. * uCode download functions
  3232. *
  3233. ******************************************************************************/
  3234. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  3235. {
  3236. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  3237. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  3238. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  3239. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  3240. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  3241. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  3242. }
  3243. /**
  3244. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  3245. * looking at all data.
  3246. */
  3247. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  3248. {
  3249. u32 val;
  3250. u32 save_len = len;
  3251. int rc = 0;
  3252. u32 errcnt;
  3253. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  3254. rc = iwl_grab_nic_access(priv);
  3255. if (rc)
  3256. return rc;
  3257. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  3258. IWL39_RTC_INST_LOWER_BOUND);
  3259. errcnt = 0;
  3260. for (; len > 0; len -= sizeof(u32), image++) {
  3261. /* read data comes through single port, auto-incr addr */
  3262. /* NOTE: Use the debugless read so we don't flood kernel log
  3263. * if IWL_DL_IO is set */
  3264. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  3265. if (val != le32_to_cpu(*image)) {
  3266. IWL_ERR(priv, "uCode INST section is invalid at "
  3267. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  3268. save_len - len, val, le32_to_cpu(*image));
  3269. rc = -EIO;
  3270. errcnt++;
  3271. if (errcnt >= 20)
  3272. break;
  3273. }
  3274. }
  3275. iwl_release_nic_access(priv);
  3276. if (!errcnt)
  3277. IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
  3278. return rc;
  3279. }
  3280. /**
  3281. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  3282. * using sample data 100 bytes apart. If these sample points are good,
  3283. * it's a pretty good bet that everything between them is good, too.
  3284. */
  3285. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  3286. {
  3287. u32 val;
  3288. int rc = 0;
  3289. u32 errcnt = 0;
  3290. u32 i;
  3291. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  3292. rc = iwl_grab_nic_access(priv);
  3293. if (rc)
  3294. return rc;
  3295. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  3296. /* read data comes through single port, auto-incr addr */
  3297. /* NOTE: Use the debugless read so we don't flood kernel log
  3298. * if IWL_DL_IO is set */
  3299. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  3300. i + IWL39_RTC_INST_LOWER_BOUND);
  3301. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  3302. if (val != le32_to_cpu(*image)) {
  3303. #if 0 /* Enable this if you want to see details */
  3304. IWL_ERR(priv, "uCode INST section is invalid at "
  3305. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  3306. i, val, *image);
  3307. #endif
  3308. rc = -EIO;
  3309. errcnt++;
  3310. if (errcnt >= 3)
  3311. break;
  3312. }
  3313. }
  3314. iwl_release_nic_access(priv);
  3315. return rc;
  3316. }
  3317. /**
  3318. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  3319. * and verify its contents
  3320. */
  3321. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  3322. {
  3323. __le32 *image;
  3324. u32 len;
  3325. int rc = 0;
  3326. /* Try bootstrap */
  3327. image = (__le32 *)priv->ucode_boot.v_addr;
  3328. len = priv->ucode_boot.len;
  3329. rc = iwl3945_verify_inst_sparse(priv, image, len);
  3330. if (rc == 0) {
  3331. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  3332. return 0;
  3333. }
  3334. /* Try initialize */
  3335. image = (__le32 *)priv->ucode_init.v_addr;
  3336. len = priv->ucode_init.len;
  3337. rc = iwl3945_verify_inst_sparse(priv, image, len);
  3338. if (rc == 0) {
  3339. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  3340. return 0;
  3341. }
  3342. /* Try runtime/protocol */
  3343. image = (__le32 *)priv->ucode_code.v_addr;
  3344. len = priv->ucode_code.len;
  3345. rc = iwl3945_verify_inst_sparse(priv, image, len);
  3346. if (rc == 0) {
  3347. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  3348. return 0;
  3349. }
  3350. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  3351. /* Since nothing seems to match, show first several data entries in
  3352. * instruction SRAM, so maybe visual inspection will give a clue.
  3353. * Selection of bootstrap image (vs. other images) is arbitrary. */
  3354. image = (__le32 *)priv->ucode_boot.v_addr;
  3355. len = priv->ucode_boot.len;
  3356. rc = iwl3945_verify_inst_full(priv, image, len);
  3357. return rc;
  3358. }
  3359. static void iwl3945_nic_start(struct iwl_priv *priv)
  3360. {
  3361. /* Remove all resets to allow NIC to operate */
  3362. iwl_write32(priv, CSR_RESET, 0);
  3363. }
  3364. /**
  3365. * iwl3945_read_ucode - Read uCode images from disk file.
  3366. *
  3367. * Copy into buffers for card to fetch via bus-mastering
  3368. */
  3369. static int iwl3945_read_ucode(struct iwl_priv *priv)
  3370. {
  3371. struct iwl_ucode *ucode;
  3372. int ret = -EINVAL, index;
  3373. const struct firmware *ucode_raw;
  3374. /* firmware file name contains uCode/driver compatibility version */
  3375. const char *name_pre = priv->cfg->fw_name_pre;
  3376. const unsigned int api_max = priv->cfg->ucode_api_max;
  3377. const unsigned int api_min = priv->cfg->ucode_api_min;
  3378. char buf[25];
  3379. u8 *src;
  3380. size_t len;
  3381. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  3382. /* Ask kernel firmware_class module to get the boot firmware off disk.
  3383. * request_firmware() is synchronous, file is in memory on return. */
  3384. for (index = api_max; index >= api_min; index--) {
  3385. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  3386. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  3387. if (ret < 0) {
  3388. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  3389. buf, ret);
  3390. if (ret == -ENOENT)
  3391. continue;
  3392. else
  3393. goto error;
  3394. } else {
  3395. if (index < api_max)
  3396. IWL_ERR(priv, "Loaded firmware %s, "
  3397. "which is deprecated. "
  3398. " Please use API v%u instead.\n",
  3399. buf, api_max);
  3400. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  3401. buf, ucode_raw->size);
  3402. break;
  3403. }
  3404. }
  3405. if (ret < 0)
  3406. goto error;
  3407. /* Make sure that we got at least our header! */
  3408. if (ucode_raw->size < sizeof(*ucode)) {
  3409. IWL_ERR(priv, "File size way too small!\n");
  3410. ret = -EINVAL;
  3411. goto err_release;
  3412. }
  3413. /* Data from ucode file: header followed by uCode images */
  3414. ucode = (void *)ucode_raw->data;
  3415. priv->ucode_ver = le32_to_cpu(ucode->ver);
  3416. api_ver = IWL_UCODE_API(priv->ucode_ver);
  3417. inst_size = le32_to_cpu(ucode->inst_size);
  3418. data_size = le32_to_cpu(ucode->data_size);
  3419. init_size = le32_to_cpu(ucode->init_size);
  3420. init_data_size = le32_to_cpu(ucode->init_data_size);
  3421. boot_size = le32_to_cpu(ucode->boot_size);
  3422. /* api_ver should match the api version forming part of the
  3423. * firmware filename ... but we don't check for that and only rely
  3424. * on the API version read from firware header from here on forward */
  3425. if (api_ver < api_min || api_ver > api_max) {
  3426. IWL_ERR(priv, "Driver unable to support your firmware API. "
  3427. "Driver supports v%u, firmware is v%u.\n",
  3428. api_max, api_ver);
  3429. priv->ucode_ver = 0;
  3430. ret = -EINVAL;
  3431. goto err_release;
  3432. }
  3433. if (api_ver != api_max)
  3434. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  3435. "got %u. New firmware can be obtained "
  3436. "from http://www.intellinuxwireless.org.\n",
  3437. api_max, api_ver);
  3438. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  3439. IWL_UCODE_MAJOR(priv->ucode_ver),
  3440. IWL_UCODE_MINOR(priv->ucode_ver),
  3441. IWL_UCODE_API(priv->ucode_ver),
  3442. IWL_UCODE_SERIAL(priv->ucode_ver));
  3443. IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
  3444. priv->ucode_ver);
  3445. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
  3446. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
  3447. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
  3448. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
  3449. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
  3450. /* Verify size of file vs. image size info in file's header */
  3451. if (ucode_raw->size < sizeof(*ucode) +
  3452. inst_size + data_size + init_size +
  3453. init_data_size + boot_size) {
  3454. IWL_DEBUG_INFO("uCode file size %d too small\n",
  3455. (int)ucode_raw->size);
  3456. ret = -EINVAL;
  3457. goto err_release;
  3458. }
  3459. /* Verify that uCode images will fit in card's SRAM */
  3460. if (inst_size > IWL39_MAX_INST_SIZE) {
  3461. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  3462. inst_size);
  3463. ret = -EINVAL;
  3464. goto err_release;
  3465. }
  3466. if (data_size > IWL39_MAX_DATA_SIZE) {
  3467. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  3468. data_size);
  3469. ret = -EINVAL;
  3470. goto err_release;
  3471. }
  3472. if (init_size > IWL39_MAX_INST_SIZE) {
  3473. IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
  3474. init_size);
  3475. ret = -EINVAL;
  3476. goto err_release;
  3477. }
  3478. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  3479. IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
  3480. init_data_size);
  3481. ret = -EINVAL;
  3482. goto err_release;
  3483. }
  3484. if (boot_size > IWL39_MAX_BSM_SIZE) {
  3485. IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
  3486. boot_size);
  3487. ret = -EINVAL;
  3488. goto err_release;
  3489. }
  3490. /* Allocate ucode buffers for card's bus-master loading ... */
  3491. /* Runtime instructions and 2 copies of data:
  3492. * 1) unmodified from disk
  3493. * 2) backup cache for save/restore during power-downs */
  3494. priv->ucode_code.len = inst_size;
  3495. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  3496. priv->ucode_data.len = data_size;
  3497. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  3498. priv->ucode_data_backup.len = data_size;
  3499. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  3500. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  3501. !priv->ucode_data_backup.v_addr)
  3502. goto err_pci_alloc;
  3503. /* Initialization instructions and data */
  3504. if (init_size && init_data_size) {
  3505. priv->ucode_init.len = init_size;
  3506. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  3507. priv->ucode_init_data.len = init_data_size;
  3508. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  3509. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  3510. goto err_pci_alloc;
  3511. }
  3512. /* Bootstrap (instructions only, no data) */
  3513. if (boot_size) {
  3514. priv->ucode_boot.len = boot_size;
  3515. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  3516. if (!priv->ucode_boot.v_addr)
  3517. goto err_pci_alloc;
  3518. }
  3519. /* Copy images into buffers for card's bus-master reads ... */
  3520. /* Runtime instructions (first block of data in file) */
  3521. src = &ucode->data[0];
  3522. len = priv->ucode_code.len;
  3523. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  3524. memcpy(priv->ucode_code.v_addr, src, len);
  3525. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  3526. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  3527. /* Runtime data (2nd block)
  3528. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  3529. src = &ucode->data[inst_size];
  3530. len = priv->ucode_data.len;
  3531. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  3532. memcpy(priv->ucode_data.v_addr, src, len);
  3533. memcpy(priv->ucode_data_backup.v_addr, src, len);
  3534. /* Initialization instructions (3rd block) */
  3535. if (init_size) {
  3536. src = &ucode->data[inst_size + data_size];
  3537. len = priv->ucode_init.len;
  3538. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  3539. len);
  3540. memcpy(priv->ucode_init.v_addr, src, len);
  3541. }
  3542. /* Initialization data (4th block) */
  3543. if (init_data_size) {
  3544. src = &ucode->data[inst_size + data_size + init_size];
  3545. len = priv->ucode_init_data.len;
  3546. IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
  3547. (int)len);
  3548. memcpy(priv->ucode_init_data.v_addr, src, len);
  3549. }
  3550. /* Bootstrap instructions (5th block) */
  3551. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  3552. len = priv->ucode_boot.len;
  3553. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
  3554. (int)len);
  3555. memcpy(priv->ucode_boot.v_addr, src, len);
  3556. /* We have our copies now, allow OS release its copies */
  3557. release_firmware(ucode_raw);
  3558. return 0;
  3559. err_pci_alloc:
  3560. IWL_ERR(priv, "failed to allocate pci memory\n");
  3561. ret = -ENOMEM;
  3562. iwl3945_dealloc_ucode_pci(priv);
  3563. err_release:
  3564. release_firmware(ucode_raw);
  3565. error:
  3566. return ret;
  3567. }
  3568. /**
  3569. * iwl3945_set_ucode_ptrs - Set uCode address location
  3570. *
  3571. * Tell initialization uCode where to find runtime uCode.
  3572. *
  3573. * BSM registers initially contain pointers to initialization uCode.
  3574. * We need to replace them to load runtime uCode inst and data,
  3575. * and to save runtime data when powering down.
  3576. */
  3577. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  3578. {
  3579. dma_addr_t pinst;
  3580. dma_addr_t pdata;
  3581. int rc = 0;
  3582. unsigned long flags;
  3583. /* bits 31:0 for 3945 */
  3584. pinst = priv->ucode_code.p_addr;
  3585. pdata = priv->ucode_data_backup.p_addr;
  3586. spin_lock_irqsave(&priv->lock, flags);
  3587. rc = iwl_grab_nic_access(priv);
  3588. if (rc) {
  3589. spin_unlock_irqrestore(&priv->lock, flags);
  3590. return rc;
  3591. }
  3592. /* Tell bootstrap uCode where to find image to load */
  3593. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  3594. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  3595. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  3596. priv->ucode_data.len);
  3597. /* Inst byte count must be last to set up, bit 31 signals uCode
  3598. * that all new ptr/size info is in place */
  3599. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  3600. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  3601. iwl_release_nic_access(priv);
  3602. spin_unlock_irqrestore(&priv->lock, flags);
  3603. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  3604. return rc;
  3605. }
  3606. /**
  3607. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  3608. *
  3609. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  3610. *
  3611. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  3612. */
  3613. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  3614. {
  3615. /* Check alive response for "valid" sign from uCode */
  3616. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  3617. /* We had an error bringing up the hardware, so take it
  3618. * all the way back down so we can try again */
  3619. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  3620. goto restart;
  3621. }
  3622. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  3623. * This is a paranoid check, because we would not have gotten the
  3624. * "initialize" alive if code weren't properly loaded. */
  3625. if (iwl3945_verify_ucode(priv)) {
  3626. /* Runtime instruction load was bad;
  3627. * take it all the way back down so we can try again */
  3628. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  3629. goto restart;
  3630. }
  3631. /* Send pointers to protocol/runtime uCode image ... init code will
  3632. * load and launch runtime uCode, which will send us another "Alive"
  3633. * notification. */
  3634. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3635. if (iwl3945_set_ucode_ptrs(priv)) {
  3636. /* Runtime instruction load won't happen;
  3637. * take it all the way back down so we can try again */
  3638. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  3639. goto restart;
  3640. }
  3641. return;
  3642. restart:
  3643. queue_work(priv->workqueue, &priv->restart);
  3644. }
  3645. /* temporary */
  3646. static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
  3647. struct sk_buff *skb);
  3648. /**
  3649. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  3650. * from protocol/runtime uCode (initialization uCode's
  3651. * Alive gets handled by iwl3945_init_alive_start()).
  3652. */
  3653. static void iwl3945_alive_start(struct iwl_priv *priv)
  3654. {
  3655. int rc = 0;
  3656. int thermal_spin = 0;
  3657. u32 rfkill;
  3658. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3659. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  3660. /* We had an error bringing up the hardware, so take it
  3661. * all the way back down so we can try again */
  3662. IWL_DEBUG_INFO("Alive failed.\n");
  3663. goto restart;
  3664. }
  3665. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  3666. * This is a paranoid check, because we would not have gotten the
  3667. * "runtime" alive if code weren't properly loaded. */
  3668. if (iwl3945_verify_ucode(priv)) {
  3669. /* Runtime instruction load was bad;
  3670. * take it all the way back down so we can try again */
  3671. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  3672. goto restart;
  3673. }
  3674. iwl3945_clear_stations_table(priv);
  3675. rc = iwl_grab_nic_access(priv);
  3676. if (rc) {
  3677. IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
  3678. return;
  3679. }
  3680. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  3681. IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
  3682. iwl_release_nic_access(priv);
  3683. if (rfkill & 0x1) {
  3684. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3685. /* if RFKILL is not on, then wait for thermal
  3686. * sensor in adapter to kick in */
  3687. while (iwl3945_hw_get_temperature(priv) == 0) {
  3688. thermal_spin++;
  3689. udelay(10);
  3690. }
  3691. if (thermal_spin)
  3692. IWL_DEBUG_INFO("Thermal calibration took %dus\n",
  3693. thermal_spin * 10);
  3694. } else
  3695. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3696. /* After the ALIVE response, we can send commands to 3945 uCode */
  3697. set_bit(STATUS_ALIVE, &priv->status);
  3698. /* Clear out the uCode error bit if it is set */
  3699. clear_bit(STATUS_FW_ERROR, &priv->status);
  3700. if (iwl_is_rfkill(priv))
  3701. return;
  3702. ieee80211_wake_queues(priv->hw);
  3703. priv->active_rate = priv->rates_mask;
  3704. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  3705. iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  3706. if (iwl3945_is_associated(priv)) {
  3707. struct iwl3945_rxon_cmd *active_rxon =
  3708. (struct iwl3945_rxon_cmd *)(&priv->active39_rxon);
  3709. memcpy(&priv->staging39_rxon, &priv->active39_rxon,
  3710. sizeof(priv->staging39_rxon));
  3711. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3712. } else {
  3713. /* Initialize our rx_config data */
  3714. iwl3945_connection_init_rx_config(priv, priv->iw_mode);
  3715. memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  3716. }
  3717. /* Configure Bluetooth device coexistence support */
  3718. iwl3945_send_bt_config(priv);
  3719. /* Configure the adapter for unassociated operation */
  3720. iwl3945_commit_rxon(priv);
  3721. iwl3945_reg_txpower_periodic(priv);
  3722. iwl3945_led_register(priv);
  3723. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  3724. set_bit(STATUS_READY, &priv->status);
  3725. wake_up_interruptible(&priv->wait_command_queue);
  3726. if (priv->error_recovering)
  3727. iwl3945_error_recovery(priv);
  3728. /* reassociate for ADHOC mode */
  3729. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  3730. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  3731. priv->vif);
  3732. if (beacon)
  3733. iwl3945_mac_beacon_update(priv->hw, beacon);
  3734. }
  3735. return;
  3736. restart:
  3737. queue_work(priv->workqueue, &priv->restart);
  3738. }
  3739. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  3740. static void __iwl3945_down(struct iwl_priv *priv)
  3741. {
  3742. unsigned long flags;
  3743. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  3744. struct ieee80211_conf *conf = NULL;
  3745. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  3746. conf = ieee80211_get_hw_conf(priv->hw);
  3747. if (!exit_pending)
  3748. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3749. iwl3945_led_unregister(priv);
  3750. iwl3945_clear_stations_table(priv);
  3751. /* Unblock any waiting calls */
  3752. wake_up_interruptible_all(&priv->wait_command_queue);
  3753. /* Wipe out the EXIT_PENDING status bit if we are not actually
  3754. * exiting the module */
  3755. if (!exit_pending)
  3756. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  3757. /* stop and reset the on-board processor */
  3758. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3759. /* tell the device to stop sending interrupts */
  3760. spin_lock_irqsave(&priv->lock, flags);
  3761. iwl3945_disable_interrupts(priv);
  3762. spin_unlock_irqrestore(&priv->lock, flags);
  3763. iwl_synchronize_irq(priv);
  3764. if (priv->mac80211_registered)
  3765. ieee80211_stop_queues(priv->hw);
  3766. /* If we have not previously called iwl3945_init() then
  3767. * clear all bits but the RF Kill and SUSPEND bits and return */
  3768. if (!iwl_is_init(priv)) {
  3769. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  3770. STATUS_RF_KILL_HW |
  3771. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  3772. STATUS_RF_KILL_SW |
  3773. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  3774. STATUS_GEO_CONFIGURED |
  3775. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  3776. STATUS_IN_SUSPEND |
  3777. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  3778. STATUS_EXIT_PENDING;
  3779. goto exit;
  3780. }
  3781. /* ...otherwise clear out all the status bits but the RF Kill and
  3782. * SUSPEND bits and continue taking the NIC down. */
  3783. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  3784. STATUS_RF_KILL_HW |
  3785. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  3786. STATUS_RF_KILL_SW |
  3787. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  3788. STATUS_GEO_CONFIGURED |
  3789. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  3790. STATUS_IN_SUSPEND |
  3791. test_bit(STATUS_FW_ERROR, &priv->status) <<
  3792. STATUS_FW_ERROR |
  3793. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  3794. STATUS_EXIT_PENDING;
  3795. priv->cfg->ops->lib->apm_ops.reset(priv);
  3796. spin_lock_irqsave(&priv->lock, flags);
  3797. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3798. spin_unlock_irqrestore(&priv->lock, flags);
  3799. iwl3945_hw_txq_ctx_stop(priv);
  3800. iwl3945_hw_rxq_stop(priv);
  3801. spin_lock_irqsave(&priv->lock, flags);
  3802. if (!iwl_grab_nic_access(priv)) {
  3803. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  3804. APMG_CLK_VAL_DMA_CLK_RQT);
  3805. iwl_release_nic_access(priv);
  3806. }
  3807. spin_unlock_irqrestore(&priv->lock, flags);
  3808. udelay(5);
  3809. if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
  3810. priv->cfg->ops->lib->apm_ops.stop(priv);
  3811. else
  3812. priv->cfg->ops->lib->apm_ops.reset(priv);
  3813. exit:
  3814. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  3815. if (priv->ibss_beacon)
  3816. dev_kfree_skb(priv->ibss_beacon);
  3817. priv->ibss_beacon = NULL;
  3818. /* clear out any free frames */
  3819. iwl3945_clear_free_frames(priv);
  3820. }
  3821. static void iwl3945_down(struct iwl_priv *priv)
  3822. {
  3823. mutex_lock(&priv->mutex);
  3824. __iwl3945_down(priv);
  3825. mutex_unlock(&priv->mutex);
  3826. iwl3945_cancel_deferred_work(priv);
  3827. }
  3828. #define MAX_HW_RESTARTS 5
  3829. static int __iwl3945_up(struct iwl_priv *priv)
  3830. {
  3831. int rc, i;
  3832. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3833. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  3834. return -EIO;
  3835. }
  3836. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  3837. IWL_WARN(priv, "Radio disabled by SW RF kill (module "
  3838. "parameter)\n");
  3839. return -ENODEV;
  3840. }
  3841. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  3842. IWL_ERR(priv, "ucode not available for device bring up\n");
  3843. return -EIO;
  3844. }
  3845. /* If platform's RF_KILL switch is NOT set to KILL */
  3846. if (iwl_read32(priv, CSR_GP_CNTRL) &
  3847. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  3848. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3849. else {
  3850. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3851. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  3852. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  3853. return -ENODEV;
  3854. }
  3855. }
  3856. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  3857. rc = iwl3945_hw_nic_init(priv);
  3858. if (rc) {
  3859. IWL_ERR(priv, "Unable to int nic\n");
  3860. return rc;
  3861. }
  3862. /* make sure rfkill handshake bits are cleared */
  3863. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  3864. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3865. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3866. /* clear (again), then enable host interrupts */
  3867. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  3868. iwl3945_enable_interrupts(priv);
  3869. /* really make sure rfkill handshake bits are cleared */
  3870. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  3871. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  3872. /* Copy original ucode data image from disk into backup cache.
  3873. * This will be used to initialize the on-board processor's
  3874. * data SRAM for a clean start when the runtime program first loads. */
  3875. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  3876. priv->ucode_data.len);
  3877. /* We return success when we resume from suspend and rf_kill is on. */
  3878. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  3879. return 0;
  3880. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  3881. iwl3945_clear_stations_table(priv);
  3882. /* load bootstrap state machine,
  3883. * load bootstrap program into processor's memory,
  3884. * prepare to load the "initialize" uCode */
  3885. priv->cfg->ops->lib->load_ucode(priv);
  3886. if (rc) {
  3887. IWL_ERR(priv,
  3888. "Unable to set up bootstrap uCode: %d\n", rc);
  3889. continue;
  3890. }
  3891. /* start card; "initialize" will load runtime ucode */
  3892. iwl3945_nic_start(priv);
  3893. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  3894. return 0;
  3895. }
  3896. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3897. __iwl3945_down(priv);
  3898. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  3899. /* tried to restart and config the device for as long as our
  3900. * patience could withstand */
  3901. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  3902. return -EIO;
  3903. }
  3904. /*****************************************************************************
  3905. *
  3906. * Workqueue callbacks
  3907. *
  3908. *****************************************************************************/
  3909. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  3910. {
  3911. struct iwl_priv *priv =
  3912. container_of(data, struct iwl_priv, init_alive_start.work);
  3913. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  3914. return;
  3915. mutex_lock(&priv->mutex);
  3916. iwl3945_init_alive_start(priv);
  3917. mutex_unlock(&priv->mutex);
  3918. }
  3919. static void iwl3945_bg_alive_start(struct work_struct *data)
  3920. {
  3921. struct iwl_priv *priv =
  3922. container_of(data, struct iwl_priv, alive_start.work);
  3923. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  3924. return;
  3925. mutex_lock(&priv->mutex);
  3926. iwl3945_alive_start(priv);
  3927. mutex_unlock(&priv->mutex);
  3928. }
  3929. static void iwl3945_rfkill_poll(struct work_struct *data)
  3930. {
  3931. struct iwl_priv *priv =
  3932. container_of(data, struct iwl_priv, rfkill_poll.work);
  3933. unsigned long status = priv->status;
  3934. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  3935. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3936. else
  3937. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3938. if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
  3939. queue_work(priv->workqueue, &priv->rf_kill);
  3940. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3941. round_jiffies_relative(2 * HZ));
  3942. }
  3943. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  3944. static void iwl3945_bg_request_scan(struct work_struct *data)
  3945. {
  3946. struct iwl_priv *priv =
  3947. container_of(data, struct iwl_priv, request_scan);
  3948. struct iwl_host_cmd cmd = {
  3949. .id = REPLY_SCAN_CMD,
  3950. .len = sizeof(struct iwl3945_scan_cmd),
  3951. .meta.flags = CMD_SIZE_HUGE,
  3952. };
  3953. int rc = 0;
  3954. struct iwl3945_scan_cmd *scan;
  3955. struct ieee80211_conf *conf = NULL;
  3956. u8 n_probes = 2;
  3957. enum ieee80211_band band;
  3958. DECLARE_SSID_BUF(ssid);
  3959. conf = ieee80211_get_hw_conf(priv->hw);
  3960. mutex_lock(&priv->mutex);
  3961. if (!iwl_is_ready(priv)) {
  3962. IWL_WARN(priv, "request scan called when driver not ready.\n");
  3963. goto done;
  3964. }
  3965. /* Make sure the scan wasn't canceled before this queued work
  3966. * was given the chance to run... */
  3967. if (!test_bit(STATUS_SCANNING, &priv->status))
  3968. goto done;
  3969. /* This should never be called or scheduled if there is currently
  3970. * a scan active in the hardware. */
  3971. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  3972. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  3973. "Ignoring second request.\n");
  3974. rc = -EIO;
  3975. goto done;
  3976. }
  3977. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3978. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  3979. goto done;
  3980. }
  3981. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3982. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  3983. goto done;
  3984. }
  3985. if (iwl_is_rfkill(priv)) {
  3986. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  3987. goto done;
  3988. }
  3989. if (!test_bit(STATUS_READY, &priv->status)) {
  3990. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  3991. goto done;
  3992. }
  3993. if (!priv->scan_bands) {
  3994. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  3995. goto done;
  3996. }
  3997. if (!priv->scan) {
  3998. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  3999. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  4000. if (!priv->scan) {
  4001. rc = -ENOMEM;
  4002. goto done;
  4003. }
  4004. }
  4005. scan = priv->scan;
  4006. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  4007. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  4008. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  4009. if (iwl3945_is_associated(priv)) {
  4010. u16 interval = 0;
  4011. u32 extra;
  4012. u32 suspend_time = 100;
  4013. u32 scan_suspend_time = 100;
  4014. unsigned long flags;
  4015. IWL_DEBUG_INFO("Scanning while associated...\n");
  4016. spin_lock_irqsave(&priv->lock, flags);
  4017. interval = priv->beacon_int;
  4018. spin_unlock_irqrestore(&priv->lock, flags);
  4019. scan->suspend_time = 0;
  4020. scan->max_out_time = cpu_to_le32(200 * 1024);
  4021. if (!interval)
  4022. interval = suspend_time;
  4023. /*
  4024. * suspend time format:
  4025. * 0-19: beacon interval in usec (time before exec.)
  4026. * 20-23: 0
  4027. * 24-31: number of beacons (suspend between channels)
  4028. */
  4029. extra = (suspend_time / interval) << 24;
  4030. scan_suspend_time = 0xFF0FFFFF &
  4031. (extra | ((suspend_time % interval) * 1024));
  4032. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  4033. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  4034. scan_suspend_time, interval);
  4035. }
  4036. /* We should add the ability for user to lock to PASSIVE ONLY */
  4037. if (priv->one_direct_scan) {
  4038. IWL_DEBUG_SCAN
  4039. ("Kicking off one direct scan for '%s'\n",
  4040. print_ssid(ssid, priv->direct_ssid,
  4041. priv->direct_ssid_len));
  4042. scan->direct_scan[0].id = WLAN_EID_SSID;
  4043. scan->direct_scan[0].len = priv->direct_ssid_len;
  4044. memcpy(scan->direct_scan[0].ssid,
  4045. priv->direct_ssid, priv->direct_ssid_len);
  4046. n_probes++;
  4047. } else
  4048. IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
  4049. /* We don't build a direct scan probe request; the uCode will do
  4050. * that based on the direct_mask added to each channel entry */
  4051. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  4052. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  4053. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  4054. /* flags + rate selection */
  4055. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  4056. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  4057. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  4058. scan->good_CRC_th = 0;
  4059. band = IEEE80211_BAND_2GHZ;
  4060. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  4061. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  4062. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  4063. band = IEEE80211_BAND_5GHZ;
  4064. } else {
  4065. IWL_WARN(priv, "Invalid scan band count\n");
  4066. goto done;
  4067. }
  4068. scan->tx_cmd.len = cpu_to_le16(
  4069. iwl_fill_probe_req(priv, band,
  4070. (struct ieee80211_mgmt *)scan->data,
  4071. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  4072. /* select Rx antennas */
  4073. scan->flags |= iwl3945_get_antenna_flags(priv);
  4074. if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
  4075. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  4076. scan->channel_count =
  4077. iwl3945_get_channels_for_scan(priv, band, 1, /* active */
  4078. n_probes,
  4079. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  4080. if (scan->channel_count == 0) {
  4081. IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
  4082. goto done;
  4083. }
  4084. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  4085. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  4086. cmd.data = scan;
  4087. scan->len = cpu_to_le16(cmd.len);
  4088. set_bit(STATUS_SCAN_HW, &priv->status);
  4089. rc = iwl_send_cmd_sync(priv, &cmd);
  4090. if (rc)
  4091. goto done;
  4092. queue_delayed_work(priv->workqueue, &priv->scan_check,
  4093. IWL_SCAN_CHECK_WATCHDOG);
  4094. mutex_unlock(&priv->mutex);
  4095. return;
  4096. done:
  4097. /* can not perform scan make sure we clear scanning
  4098. * bits from status so next scan request can be performed.
  4099. * if we dont clear scanning status bit here all next scan
  4100. * will fail
  4101. */
  4102. clear_bit(STATUS_SCAN_HW, &priv->status);
  4103. clear_bit(STATUS_SCANNING, &priv->status);
  4104. /* inform mac80211 scan aborted */
  4105. queue_work(priv->workqueue, &priv->scan_completed);
  4106. mutex_unlock(&priv->mutex);
  4107. }
  4108. static void iwl3945_bg_up(struct work_struct *data)
  4109. {
  4110. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  4111. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4112. return;
  4113. mutex_lock(&priv->mutex);
  4114. __iwl3945_up(priv);
  4115. mutex_unlock(&priv->mutex);
  4116. iwl_rfkill_set_hw_state(priv);
  4117. }
  4118. static void iwl3945_bg_restart(struct work_struct *data)
  4119. {
  4120. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  4121. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4122. return;
  4123. iwl3945_down(priv);
  4124. queue_work(priv->workqueue, &priv->up);
  4125. }
  4126. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  4127. {
  4128. struct iwl_priv *priv =
  4129. container_of(data, struct iwl_priv, rx_replenish);
  4130. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4131. return;
  4132. mutex_lock(&priv->mutex);
  4133. iwl3945_rx_replenish(priv);
  4134. mutex_unlock(&priv->mutex);
  4135. }
  4136. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  4137. static void iwl3945_post_associate(struct iwl_priv *priv)
  4138. {
  4139. int rc = 0;
  4140. struct ieee80211_conf *conf = NULL;
  4141. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  4142. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  4143. return;
  4144. }
  4145. IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
  4146. priv->assoc_id, priv->active39_rxon.bssid_addr);
  4147. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4148. return;
  4149. if (!priv->vif || !priv->is_open)
  4150. return;
  4151. iwl_scan_cancel_timeout(priv, 200);
  4152. conf = ieee80211_get_hw_conf(priv->hw);
  4153. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4154. iwl3945_commit_rxon(priv);
  4155. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  4156. iwl3945_setup_rxon_timing(priv);
  4157. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  4158. sizeof(priv->rxon_timing), &priv->rxon_timing);
  4159. if (rc)
  4160. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  4161. "Attempting to continue.\n");
  4162. priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  4163. priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  4164. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  4165. priv->assoc_id, priv->beacon_int);
  4166. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  4167. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  4168. else
  4169. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4170. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  4171. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  4172. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  4173. else
  4174. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  4175. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  4176. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  4177. }
  4178. iwl3945_commit_rxon(priv);
  4179. switch (priv->iw_mode) {
  4180. case NL80211_IFTYPE_STATION:
  4181. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  4182. break;
  4183. case NL80211_IFTYPE_ADHOC:
  4184. priv->assoc_id = 1;
  4185. iwl3945_add_station(priv, priv->bssid, 0, 0);
  4186. iwl3945_sync_sta(priv, IWL_STA_ID,
  4187. (priv->band == IEEE80211_BAND_5GHZ) ?
  4188. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  4189. CMD_ASYNC);
  4190. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  4191. iwl3945_send_beacon_cmd(priv);
  4192. break;
  4193. default:
  4194. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  4195. __func__, priv->iw_mode);
  4196. break;
  4197. }
  4198. iwl3945_activate_qos(priv, 0);
  4199. /* we have just associated, don't start scan too early */
  4200. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  4201. }
  4202. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
  4203. /*****************************************************************************
  4204. *
  4205. * mac80211 entry point functions
  4206. *
  4207. *****************************************************************************/
  4208. #define UCODE_READY_TIMEOUT (2 * HZ)
  4209. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  4210. {
  4211. struct iwl_priv *priv = hw->priv;
  4212. int ret;
  4213. IWL_DEBUG_MAC80211("enter\n");
  4214. /* we should be verifying the device is ready to be opened */
  4215. mutex_lock(&priv->mutex);
  4216. memset(&priv->staging39_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
  4217. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  4218. * ucode filename and max sizes are card-specific. */
  4219. if (!priv->ucode_code.len) {
  4220. ret = iwl3945_read_ucode(priv);
  4221. if (ret) {
  4222. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  4223. mutex_unlock(&priv->mutex);
  4224. goto out_release_irq;
  4225. }
  4226. }
  4227. ret = __iwl3945_up(priv);
  4228. mutex_unlock(&priv->mutex);
  4229. iwl_rfkill_set_hw_state(priv);
  4230. if (ret)
  4231. goto out_release_irq;
  4232. IWL_DEBUG_INFO("Start UP work.\n");
  4233. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  4234. return 0;
  4235. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  4236. * mac80211 will not be run successfully. */
  4237. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  4238. test_bit(STATUS_READY, &priv->status),
  4239. UCODE_READY_TIMEOUT);
  4240. if (!ret) {
  4241. if (!test_bit(STATUS_READY, &priv->status)) {
  4242. IWL_ERR(priv,
  4243. "Wait for START_ALIVE timeout after %dms.\n",
  4244. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  4245. ret = -ETIMEDOUT;
  4246. goto out_release_irq;
  4247. }
  4248. }
  4249. /* ucode is running and will send rfkill notifications,
  4250. * no need to poll the killswitch state anymore */
  4251. cancel_delayed_work(&priv->rfkill_poll);
  4252. priv->is_open = 1;
  4253. IWL_DEBUG_MAC80211("leave\n");
  4254. return 0;
  4255. out_release_irq:
  4256. priv->is_open = 0;
  4257. IWL_DEBUG_MAC80211("leave - failed\n");
  4258. return ret;
  4259. }
  4260. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  4261. {
  4262. struct iwl_priv *priv = hw->priv;
  4263. IWL_DEBUG_MAC80211("enter\n");
  4264. if (!priv->is_open) {
  4265. IWL_DEBUG_MAC80211("leave - skip\n");
  4266. return;
  4267. }
  4268. priv->is_open = 0;
  4269. if (iwl_is_ready_rf(priv)) {
  4270. /* stop mac, cancel any scan request and clear
  4271. * RXON_FILTER_ASSOC_MSK BIT
  4272. */
  4273. mutex_lock(&priv->mutex);
  4274. iwl_scan_cancel_timeout(priv, 100);
  4275. mutex_unlock(&priv->mutex);
  4276. }
  4277. iwl3945_down(priv);
  4278. flush_workqueue(priv->workqueue);
  4279. /* start polling the killswitch state again */
  4280. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  4281. round_jiffies_relative(2 * HZ));
  4282. IWL_DEBUG_MAC80211("leave\n");
  4283. }
  4284. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  4285. {
  4286. struct iwl_priv *priv = hw->priv;
  4287. IWL_DEBUG_MAC80211("enter\n");
  4288. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  4289. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  4290. if (iwl3945_tx_skb(priv, skb))
  4291. dev_kfree_skb_any(skb);
  4292. IWL_DEBUG_MAC80211("leave\n");
  4293. return NETDEV_TX_OK;
  4294. }
  4295. static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
  4296. struct ieee80211_if_init_conf *conf)
  4297. {
  4298. struct iwl_priv *priv = hw->priv;
  4299. unsigned long flags;
  4300. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  4301. if (priv->vif) {
  4302. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  4303. return -EOPNOTSUPP;
  4304. }
  4305. spin_lock_irqsave(&priv->lock, flags);
  4306. priv->vif = conf->vif;
  4307. priv->iw_mode = conf->type;
  4308. spin_unlock_irqrestore(&priv->lock, flags);
  4309. mutex_lock(&priv->mutex);
  4310. if (conf->mac_addr) {
  4311. IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
  4312. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  4313. }
  4314. if (iwl_is_ready(priv))
  4315. iwl3945_set_mode(priv, conf->type);
  4316. mutex_unlock(&priv->mutex);
  4317. IWL_DEBUG_MAC80211("leave\n");
  4318. return 0;
  4319. }
  4320. /**
  4321. * iwl3945_mac_config - mac80211 config callback
  4322. *
  4323. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  4324. * be set inappropriately and the driver currently sets the hardware up to
  4325. * use it whenever needed.
  4326. */
  4327. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
  4328. {
  4329. struct iwl_priv *priv = hw->priv;
  4330. const struct iwl_channel_info *ch_info;
  4331. struct ieee80211_conf *conf = &hw->conf;
  4332. unsigned long flags;
  4333. int ret = 0;
  4334. mutex_lock(&priv->mutex);
  4335. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  4336. if (!iwl_is_ready(priv)) {
  4337. IWL_DEBUG_MAC80211("leave - not ready\n");
  4338. ret = -EIO;
  4339. goto out;
  4340. }
  4341. if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
  4342. test_bit(STATUS_SCANNING, &priv->status))) {
  4343. IWL_DEBUG_MAC80211("leave - scanning\n");
  4344. set_bit(STATUS_CONF_PENDING, &priv->status);
  4345. mutex_unlock(&priv->mutex);
  4346. return 0;
  4347. }
  4348. spin_lock_irqsave(&priv->lock, flags);
  4349. ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
  4350. conf->channel->hw_value);
  4351. if (!is_channel_valid(ch_info)) {
  4352. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
  4353. conf->channel->hw_value, conf->channel->band);
  4354. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  4355. spin_unlock_irqrestore(&priv->lock, flags);
  4356. ret = -EINVAL;
  4357. goto out;
  4358. }
  4359. iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
  4360. iwl3945_set_flags_for_phymode(priv, conf->channel->band);
  4361. /* The list of supported rates and rate mask can be different
  4362. * for each phymode; since the phymode may have changed, reset
  4363. * the rate mask to what mac80211 lists */
  4364. iwl3945_set_rate(priv);
  4365. spin_unlock_irqrestore(&priv->lock, flags);
  4366. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  4367. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  4368. iwl3945_hw_channel_switch(priv, conf->channel);
  4369. goto out;
  4370. }
  4371. #endif
  4372. iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
  4373. if (!conf->radio_enabled) {
  4374. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  4375. goto out;
  4376. }
  4377. if (iwl_is_rfkill(priv)) {
  4378. IWL_DEBUG_MAC80211("leave - RF kill\n");
  4379. ret = -EIO;
  4380. goto out;
  4381. }
  4382. iwl3945_set_rate(priv);
  4383. if (memcmp(&priv->active39_rxon,
  4384. &priv->staging39_rxon, sizeof(priv->staging39_rxon)))
  4385. iwl3945_commit_rxon(priv);
  4386. else
  4387. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  4388. IWL_DEBUG_MAC80211("leave\n");
  4389. out:
  4390. clear_bit(STATUS_CONF_PENDING, &priv->status);
  4391. mutex_unlock(&priv->mutex);
  4392. return ret;
  4393. }
  4394. static void iwl3945_config_ap(struct iwl_priv *priv)
  4395. {
  4396. int rc = 0;
  4397. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4398. return;
  4399. /* The following should be done only at AP bring up */
  4400. if (!(iwl3945_is_associated(priv))) {
  4401. /* RXON - unassoc (to set timing command) */
  4402. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4403. iwl3945_commit_rxon(priv);
  4404. /* RXON Timing */
  4405. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  4406. iwl3945_setup_rxon_timing(priv);
  4407. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  4408. sizeof(priv->rxon_timing),
  4409. &priv->rxon_timing);
  4410. if (rc)
  4411. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  4412. "Attempting to continue.\n");
  4413. /* FIXME: what should be the assoc_id for AP? */
  4414. priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  4415. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  4416. priv->staging39_rxon.flags |=
  4417. RXON_FLG_SHORT_PREAMBLE_MSK;
  4418. else
  4419. priv->staging39_rxon.flags &=
  4420. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4421. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  4422. if (priv->assoc_capability &
  4423. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  4424. priv->staging39_rxon.flags |=
  4425. RXON_FLG_SHORT_SLOT_MSK;
  4426. else
  4427. priv->staging39_rxon.flags &=
  4428. ~RXON_FLG_SHORT_SLOT_MSK;
  4429. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  4430. priv->staging39_rxon.flags &=
  4431. ~RXON_FLG_SHORT_SLOT_MSK;
  4432. }
  4433. /* restore RXON assoc */
  4434. priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  4435. iwl3945_commit_rxon(priv);
  4436. iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
  4437. }
  4438. iwl3945_send_beacon_cmd(priv);
  4439. /* FIXME - we need to add code here to detect a totally new
  4440. * configuration, reset the AP, unassoc, rxon timing, assoc,
  4441. * clear sta table, add BCAST sta... */
  4442. }
  4443. static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
  4444. struct ieee80211_vif *vif,
  4445. struct ieee80211_if_conf *conf)
  4446. {
  4447. struct iwl_priv *priv = hw->priv;
  4448. int rc;
  4449. if (conf == NULL)
  4450. return -EIO;
  4451. if (priv->vif != vif) {
  4452. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  4453. return 0;
  4454. }
  4455. /* handle this temporarily here */
  4456. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  4457. conf->changed & IEEE80211_IFCC_BEACON) {
  4458. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  4459. if (!beacon)
  4460. return -ENOMEM;
  4461. mutex_lock(&priv->mutex);
  4462. rc = iwl3945_mac_beacon_update(hw, beacon);
  4463. mutex_unlock(&priv->mutex);
  4464. if (rc)
  4465. return rc;
  4466. }
  4467. if (!iwl_is_alive(priv))
  4468. return -EAGAIN;
  4469. mutex_lock(&priv->mutex);
  4470. if (conf->bssid)
  4471. IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
  4472. /*
  4473. * very dubious code was here; the probe filtering flag is never set:
  4474. *
  4475. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  4476. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  4477. */
  4478. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  4479. if (!conf->bssid) {
  4480. conf->bssid = priv->mac_addr;
  4481. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  4482. IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
  4483. conf->bssid);
  4484. }
  4485. if (priv->ibss_beacon)
  4486. dev_kfree_skb(priv->ibss_beacon);
  4487. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  4488. }
  4489. if (iwl_is_rfkill(priv))
  4490. goto done;
  4491. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  4492. !is_multicast_ether_addr(conf->bssid)) {
  4493. /* If there is currently a HW scan going on in the background
  4494. * then we need to cancel it else the RXON below will fail. */
  4495. if (iwl_scan_cancel_timeout(priv, 100)) {
  4496. IWL_WARN(priv, "Aborted scan still in progress "
  4497. "after 100ms\n");
  4498. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  4499. mutex_unlock(&priv->mutex);
  4500. return -EAGAIN;
  4501. }
  4502. memcpy(priv->staging39_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  4503. /* TODO: Audit driver for usage of these members and see
  4504. * if mac80211 deprecates them (priv->bssid looks like it
  4505. * shouldn't be there, but I haven't scanned the IBSS code
  4506. * to verify) - jpk */
  4507. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  4508. if (priv->iw_mode == NL80211_IFTYPE_AP)
  4509. iwl3945_config_ap(priv);
  4510. else {
  4511. rc = iwl3945_commit_rxon(priv);
  4512. if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
  4513. iwl3945_add_station(priv,
  4514. priv->active39_rxon.bssid_addr, 1, 0);
  4515. }
  4516. } else {
  4517. iwl_scan_cancel_timeout(priv, 100);
  4518. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4519. iwl3945_commit_rxon(priv);
  4520. }
  4521. done:
  4522. IWL_DEBUG_MAC80211("leave\n");
  4523. mutex_unlock(&priv->mutex);
  4524. return 0;
  4525. }
  4526. static void iwl3945_configure_filter(struct ieee80211_hw *hw,
  4527. unsigned int changed_flags,
  4528. unsigned int *total_flags,
  4529. int mc_count, struct dev_addr_list *mc_list)
  4530. {
  4531. struct iwl_priv *priv = hw->priv;
  4532. __le32 *filter_flags = &priv->staging39_rxon.filter_flags;
  4533. IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
  4534. changed_flags, *total_flags);
  4535. if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
  4536. if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
  4537. *filter_flags |= RXON_FILTER_PROMISC_MSK;
  4538. else
  4539. *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
  4540. }
  4541. if (changed_flags & FIF_ALLMULTI) {
  4542. if (*total_flags & FIF_ALLMULTI)
  4543. *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
  4544. else
  4545. *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
  4546. }
  4547. if (changed_flags & FIF_CONTROL) {
  4548. if (*total_flags & FIF_CONTROL)
  4549. *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
  4550. else
  4551. *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
  4552. }
  4553. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  4554. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  4555. *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
  4556. else
  4557. *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
  4558. }
  4559. /* We avoid iwl_commit_rxon here to commit the new filter flags
  4560. * since mac80211 will call ieee80211_hw_config immediately.
  4561. * (mc_list is not supported at this time). Otherwise, we need to
  4562. * queue a background iwl_commit_rxon work.
  4563. */
  4564. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  4565. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  4566. }
  4567. static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
  4568. struct ieee80211_if_init_conf *conf)
  4569. {
  4570. struct iwl_priv *priv = hw->priv;
  4571. IWL_DEBUG_MAC80211("enter\n");
  4572. mutex_lock(&priv->mutex);
  4573. if (iwl_is_ready_rf(priv)) {
  4574. iwl_scan_cancel_timeout(priv, 100);
  4575. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4576. iwl3945_commit_rxon(priv);
  4577. }
  4578. if (priv->vif == conf->vif) {
  4579. priv->vif = NULL;
  4580. memset(priv->bssid, 0, ETH_ALEN);
  4581. }
  4582. mutex_unlock(&priv->mutex);
  4583. IWL_DEBUG_MAC80211("leave\n");
  4584. }
  4585. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  4586. static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
  4587. struct ieee80211_vif *vif,
  4588. struct ieee80211_bss_conf *bss_conf,
  4589. u32 changes)
  4590. {
  4591. struct iwl_priv *priv = hw->priv;
  4592. IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
  4593. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  4594. IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
  4595. bss_conf->use_short_preamble);
  4596. if (bss_conf->use_short_preamble)
  4597. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  4598. else
  4599. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4600. }
  4601. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  4602. IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
  4603. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  4604. priv->staging39_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  4605. else
  4606. priv->staging39_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  4607. }
  4608. if (changes & BSS_CHANGED_ASSOC) {
  4609. IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
  4610. /* This should never happen as this function should
  4611. * never be called from interrupt context. */
  4612. if (WARN_ON_ONCE(in_interrupt()))
  4613. return;
  4614. if (bss_conf->assoc) {
  4615. priv->assoc_id = bss_conf->aid;
  4616. priv->beacon_int = bss_conf->beacon_int;
  4617. priv->timestamp = bss_conf->timestamp;
  4618. priv->assoc_capability = bss_conf->assoc_capability;
  4619. priv->power_data.dtim_period = bss_conf->dtim_period;
  4620. priv->next_scan_jiffies = jiffies +
  4621. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  4622. mutex_lock(&priv->mutex);
  4623. iwl3945_post_associate(priv);
  4624. mutex_unlock(&priv->mutex);
  4625. } else {
  4626. priv->assoc_id = 0;
  4627. IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
  4628. }
  4629. } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
  4630. IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
  4631. iwl3945_send_rxon_assoc(priv);
  4632. }
  4633. }
  4634. static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  4635. {
  4636. int rc = 0;
  4637. unsigned long flags;
  4638. struct iwl_priv *priv = hw->priv;
  4639. DECLARE_SSID_BUF(ssid_buf);
  4640. IWL_DEBUG_MAC80211("enter\n");
  4641. mutex_lock(&priv->mutex);
  4642. spin_lock_irqsave(&priv->lock, flags);
  4643. if (!iwl_is_ready_rf(priv)) {
  4644. rc = -EIO;
  4645. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  4646. goto out_unlock;
  4647. }
  4648. /* we don't schedule scan within next_scan_jiffies period */
  4649. if (priv->next_scan_jiffies &&
  4650. time_after(priv->next_scan_jiffies, jiffies)) {
  4651. rc = -EAGAIN;
  4652. goto out_unlock;
  4653. }
  4654. /* if we just finished scan ask for delay for a broadcast scan */
  4655. if ((len == 0) && priv->last_scan_jiffies &&
  4656. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
  4657. jiffies)) {
  4658. rc = -EAGAIN;
  4659. goto out_unlock;
  4660. }
  4661. if (len) {
  4662. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  4663. print_ssid(ssid_buf, ssid, len), (int)len);
  4664. priv->one_direct_scan = 1;
  4665. priv->direct_ssid_len = (u8)
  4666. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  4667. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  4668. } else
  4669. priv->one_direct_scan = 0;
  4670. rc = iwl3945_scan_initiate(priv);
  4671. IWL_DEBUG_MAC80211("leave\n");
  4672. out_unlock:
  4673. spin_unlock_irqrestore(&priv->lock, flags);
  4674. mutex_unlock(&priv->mutex);
  4675. return rc;
  4676. }
  4677. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  4678. struct ieee80211_vif *vif,
  4679. struct ieee80211_sta *sta,
  4680. struct ieee80211_key_conf *key)
  4681. {
  4682. struct iwl_priv *priv = hw->priv;
  4683. const u8 *addr;
  4684. int ret;
  4685. u8 sta_id;
  4686. IWL_DEBUG_MAC80211("enter\n");
  4687. if (iwl3945_mod_params.sw_crypto) {
  4688. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  4689. return -EOPNOTSUPP;
  4690. }
  4691. addr = sta ? sta->addr : iwl_bcast_addr;
  4692. sta_id = iwl3945_hw_find_station(priv, addr);
  4693. if (sta_id == IWL_INVALID_STATION) {
  4694. IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
  4695. addr);
  4696. return -EINVAL;
  4697. }
  4698. mutex_lock(&priv->mutex);
  4699. iwl_scan_cancel_timeout(priv, 100);
  4700. switch (cmd) {
  4701. case SET_KEY:
  4702. ret = iwl3945_update_sta_key_info(priv, key, sta_id);
  4703. if (!ret) {
  4704. iwl3945_set_rxon_hwcrypto(priv, 1);
  4705. iwl3945_commit_rxon(priv);
  4706. key->hw_key_idx = sta_id;
  4707. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  4708. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  4709. }
  4710. break;
  4711. case DISABLE_KEY:
  4712. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  4713. if (!ret) {
  4714. iwl3945_set_rxon_hwcrypto(priv, 0);
  4715. iwl3945_commit_rxon(priv);
  4716. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  4717. }
  4718. break;
  4719. default:
  4720. ret = -EINVAL;
  4721. }
  4722. IWL_DEBUG_MAC80211("leave\n");
  4723. mutex_unlock(&priv->mutex);
  4724. return ret;
  4725. }
  4726. static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  4727. const struct ieee80211_tx_queue_params *params)
  4728. {
  4729. struct iwl_priv *priv = hw->priv;
  4730. unsigned long flags;
  4731. int q;
  4732. IWL_DEBUG_MAC80211("enter\n");
  4733. if (!iwl_is_ready_rf(priv)) {
  4734. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  4735. return -EIO;
  4736. }
  4737. if (queue >= AC_NUM) {
  4738. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  4739. return 0;
  4740. }
  4741. q = AC_NUM - 1 - queue;
  4742. spin_lock_irqsave(&priv->lock, flags);
  4743. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  4744. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  4745. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  4746. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  4747. cpu_to_le16((params->txop * 32));
  4748. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  4749. priv->qos_data.qos_active = 1;
  4750. spin_unlock_irqrestore(&priv->lock, flags);
  4751. mutex_lock(&priv->mutex);
  4752. if (priv->iw_mode == NL80211_IFTYPE_AP)
  4753. iwl3945_activate_qos(priv, 1);
  4754. else if (priv->assoc_id && iwl3945_is_associated(priv))
  4755. iwl3945_activate_qos(priv, 0);
  4756. mutex_unlock(&priv->mutex);
  4757. IWL_DEBUG_MAC80211("leave\n");
  4758. return 0;
  4759. }
  4760. static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
  4761. struct ieee80211_tx_queue_stats *stats)
  4762. {
  4763. struct iwl_priv *priv = hw->priv;
  4764. int i, avail;
  4765. struct iwl_tx_queue *txq;
  4766. struct iwl_queue *q;
  4767. unsigned long flags;
  4768. IWL_DEBUG_MAC80211("enter\n");
  4769. if (!iwl_is_ready_rf(priv)) {
  4770. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  4771. return -EIO;
  4772. }
  4773. spin_lock_irqsave(&priv->lock, flags);
  4774. for (i = 0; i < AC_NUM; i++) {
  4775. txq = &priv->txq[i];
  4776. q = &txq->q;
  4777. avail = iwl_queue_space(q);
  4778. stats[i].len = q->n_window - avail;
  4779. stats[i].limit = q->n_window - q->high_mark;
  4780. stats[i].count = q->n_window;
  4781. }
  4782. spin_unlock_irqrestore(&priv->lock, flags);
  4783. IWL_DEBUG_MAC80211("leave\n");
  4784. return 0;
  4785. }
  4786. static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
  4787. {
  4788. struct iwl_priv *priv = hw->priv;
  4789. unsigned long flags;
  4790. mutex_lock(&priv->mutex);
  4791. IWL_DEBUG_MAC80211("enter\n");
  4792. iwl_reset_qos(priv);
  4793. spin_lock_irqsave(&priv->lock, flags);
  4794. priv->assoc_id = 0;
  4795. priv->assoc_capability = 0;
  4796. /* new association get rid of ibss beacon skb */
  4797. if (priv->ibss_beacon)
  4798. dev_kfree_skb(priv->ibss_beacon);
  4799. priv->ibss_beacon = NULL;
  4800. priv->beacon_int = priv->hw->conf.beacon_int;
  4801. priv->timestamp = 0;
  4802. if ((priv->iw_mode == NL80211_IFTYPE_STATION))
  4803. priv->beacon_int = 0;
  4804. spin_unlock_irqrestore(&priv->lock, flags);
  4805. if (!iwl_is_ready_rf(priv)) {
  4806. IWL_DEBUG_MAC80211("leave - not ready\n");
  4807. mutex_unlock(&priv->mutex);
  4808. return;
  4809. }
  4810. /* we are restarting association process
  4811. * clear RXON_FILTER_ASSOC_MSK bit
  4812. */
  4813. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  4814. iwl_scan_cancel_timeout(priv, 100);
  4815. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4816. iwl3945_commit_rxon(priv);
  4817. }
  4818. /* Per mac80211.h: This is only used in IBSS mode... */
  4819. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  4820. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  4821. mutex_unlock(&priv->mutex);
  4822. return;
  4823. }
  4824. iwl3945_set_rate(priv);
  4825. mutex_unlock(&priv->mutex);
  4826. IWL_DEBUG_MAC80211("leave\n");
  4827. }
  4828. static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  4829. {
  4830. struct iwl_priv *priv = hw->priv;
  4831. unsigned long flags;
  4832. IWL_DEBUG_MAC80211("enter\n");
  4833. if (!iwl_is_ready_rf(priv)) {
  4834. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  4835. return -EIO;
  4836. }
  4837. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  4838. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  4839. return -EIO;
  4840. }
  4841. spin_lock_irqsave(&priv->lock, flags);
  4842. if (priv->ibss_beacon)
  4843. dev_kfree_skb(priv->ibss_beacon);
  4844. priv->ibss_beacon = skb;
  4845. priv->assoc_id = 0;
  4846. IWL_DEBUG_MAC80211("leave\n");
  4847. spin_unlock_irqrestore(&priv->lock, flags);
  4848. iwl_reset_qos(priv);
  4849. iwl3945_post_associate(priv);
  4850. return 0;
  4851. }
  4852. /*****************************************************************************
  4853. *
  4854. * sysfs attributes
  4855. *
  4856. *****************************************************************************/
  4857. #ifdef CONFIG_IWL3945_DEBUG
  4858. /*
  4859. * The following adds a new attribute to the sysfs representation
  4860. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  4861. * used for controlling the debug level.
  4862. *
  4863. * See the level definitions in iwl for details.
  4864. */
  4865. static ssize_t show_debug_level(struct device *d,
  4866. struct device_attribute *attr, char *buf)
  4867. {
  4868. struct iwl_priv *priv = d->driver_data;
  4869. return sprintf(buf, "0x%08X\n", priv->debug_level);
  4870. }
  4871. static ssize_t store_debug_level(struct device *d,
  4872. struct device_attribute *attr,
  4873. const char *buf, size_t count)
  4874. {
  4875. struct iwl_priv *priv = d->driver_data;
  4876. unsigned long val;
  4877. int ret;
  4878. ret = strict_strtoul(buf, 0, &val);
  4879. if (ret)
  4880. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  4881. else
  4882. priv->debug_level = val;
  4883. return strnlen(buf, count);
  4884. }
  4885. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  4886. show_debug_level, store_debug_level);
  4887. #endif /* CONFIG_IWL3945_DEBUG */
  4888. static ssize_t show_temperature(struct device *d,
  4889. struct device_attribute *attr, char *buf)
  4890. {
  4891. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4892. if (!iwl_is_alive(priv))
  4893. return -EAGAIN;
  4894. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  4895. }
  4896. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  4897. static ssize_t show_tx_power(struct device *d,
  4898. struct device_attribute *attr, char *buf)
  4899. {
  4900. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4901. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  4902. }
  4903. static ssize_t store_tx_power(struct device *d,
  4904. struct device_attribute *attr,
  4905. const char *buf, size_t count)
  4906. {
  4907. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4908. char *p = (char *)buf;
  4909. u32 val;
  4910. val = simple_strtoul(p, &p, 10);
  4911. if (p == buf)
  4912. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  4913. else
  4914. iwl3945_hw_reg_set_txpower(priv, val);
  4915. return count;
  4916. }
  4917. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  4918. static ssize_t show_flags(struct device *d,
  4919. struct device_attribute *attr, char *buf)
  4920. {
  4921. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4922. return sprintf(buf, "0x%04X\n", priv->active39_rxon.flags);
  4923. }
  4924. static ssize_t store_flags(struct device *d,
  4925. struct device_attribute *attr,
  4926. const char *buf, size_t count)
  4927. {
  4928. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4929. u32 flags = simple_strtoul(buf, NULL, 0);
  4930. mutex_lock(&priv->mutex);
  4931. if (le32_to_cpu(priv->staging39_rxon.flags) != flags) {
  4932. /* Cancel any currently running scans... */
  4933. if (iwl_scan_cancel_timeout(priv, 100))
  4934. IWL_WARN(priv, "Could not cancel scan.\n");
  4935. else {
  4936. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  4937. flags);
  4938. priv->staging39_rxon.flags = cpu_to_le32(flags);
  4939. iwl3945_commit_rxon(priv);
  4940. }
  4941. }
  4942. mutex_unlock(&priv->mutex);
  4943. return count;
  4944. }
  4945. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  4946. static ssize_t show_filter_flags(struct device *d,
  4947. struct device_attribute *attr, char *buf)
  4948. {
  4949. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4950. return sprintf(buf, "0x%04X\n",
  4951. le32_to_cpu(priv->active39_rxon.filter_flags));
  4952. }
  4953. static ssize_t store_filter_flags(struct device *d,
  4954. struct device_attribute *attr,
  4955. const char *buf, size_t count)
  4956. {
  4957. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4958. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  4959. mutex_lock(&priv->mutex);
  4960. if (le32_to_cpu(priv->staging39_rxon.filter_flags) != filter_flags) {
  4961. /* Cancel any currently running scans... */
  4962. if (iwl_scan_cancel_timeout(priv, 100))
  4963. IWL_WARN(priv, "Could not cancel scan.\n");
  4964. else {
  4965. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  4966. "0x%04X\n", filter_flags);
  4967. priv->staging39_rxon.filter_flags =
  4968. cpu_to_le32(filter_flags);
  4969. iwl3945_commit_rxon(priv);
  4970. }
  4971. }
  4972. mutex_unlock(&priv->mutex);
  4973. return count;
  4974. }
  4975. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  4976. store_filter_flags);
  4977. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  4978. static ssize_t show_measurement(struct device *d,
  4979. struct device_attribute *attr, char *buf)
  4980. {
  4981. struct iwl_priv *priv = dev_get_drvdata(d);
  4982. struct iwl_spectrum_notification measure_report;
  4983. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  4984. u8 *data = (u8 *)&measure_report;
  4985. unsigned long flags;
  4986. spin_lock_irqsave(&priv->lock, flags);
  4987. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  4988. spin_unlock_irqrestore(&priv->lock, flags);
  4989. return 0;
  4990. }
  4991. memcpy(&measure_report, &priv->measure_report, size);
  4992. priv->measurement_status = 0;
  4993. spin_unlock_irqrestore(&priv->lock, flags);
  4994. while (size && (PAGE_SIZE - len)) {
  4995. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  4996. PAGE_SIZE - len, 1);
  4997. len = strlen(buf);
  4998. if (PAGE_SIZE - len)
  4999. buf[len++] = '\n';
  5000. ofs += 16;
  5001. size -= min(size, 16U);
  5002. }
  5003. return len;
  5004. }
  5005. static ssize_t store_measurement(struct device *d,
  5006. struct device_attribute *attr,
  5007. const char *buf, size_t count)
  5008. {
  5009. struct iwl_priv *priv = dev_get_drvdata(d);
  5010. struct ieee80211_measurement_params params = {
  5011. .channel = le16_to_cpu(priv->active39_rxon.channel),
  5012. .start_time = cpu_to_le64(priv->last_tsf),
  5013. .duration = cpu_to_le16(1),
  5014. };
  5015. u8 type = IWL_MEASURE_BASIC;
  5016. u8 buffer[32];
  5017. u8 channel;
  5018. if (count) {
  5019. char *p = buffer;
  5020. strncpy(buffer, buf, min(sizeof(buffer), count));
  5021. channel = simple_strtoul(p, NULL, 0);
  5022. if (channel)
  5023. params.channel = channel;
  5024. p = buffer;
  5025. while (*p && *p != ' ')
  5026. p++;
  5027. if (*p)
  5028. type = simple_strtoul(p + 1, NULL, 0);
  5029. }
  5030. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  5031. "channel %d (for '%s')\n", type, params.channel, buf);
  5032. iwl3945_get_measurement(priv, &params, type);
  5033. return count;
  5034. }
  5035. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  5036. show_measurement, store_measurement);
  5037. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  5038. static ssize_t store_retry_rate(struct device *d,
  5039. struct device_attribute *attr,
  5040. const char *buf, size_t count)
  5041. {
  5042. struct iwl_priv *priv = dev_get_drvdata(d);
  5043. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  5044. if (priv->retry_rate <= 0)
  5045. priv->retry_rate = 1;
  5046. return count;
  5047. }
  5048. static ssize_t show_retry_rate(struct device *d,
  5049. struct device_attribute *attr, char *buf)
  5050. {
  5051. struct iwl_priv *priv = dev_get_drvdata(d);
  5052. return sprintf(buf, "%d", priv->retry_rate);
  5053. }
  5054. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  5055. store_retry_rate);
  5056. static ssize_t store_power_level(struct device *d,
  5057. struct device_attribute *attr,
  5058. const char *buf, size_t count)
  5059. {
  5060. struct iwl_priv *priv = dev_get_drvdata(d);
  5061. int rc;
  5062. int mode;
  5063. mode = simple_strtoul(buf, NULL, 0);
  5064. mutex_lock(&priv->mutex);
  5065. if (!iwl_is_ready(priv)) {
  5066. rc = -EAGAIN;
  5067. goto out;
  5068. }
  5069. if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
  5070. (mode == IWL39_POWER_AC))
  5071. mode = IWL39_POWER_AC;
  5072. else
  5073. mode |= IWL_POWER_ENABLED;
  5074. if (mode != priv->power_mode) {
  5075. rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  5076. if (rc) {
  5077. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  5078. goto out;
  5079. }
  5080. priv->power_mode = mode;
  5081. }
  5082. rc = count;
  5083. out:
  5084. mutex_unlock(&priv->mutex);
  5085. return rc;
  5086. }
  5087. #define MAX_WX_STRING 80
  5088. /* Values are in microsecond */
  5089. static const s32 timeout_duration[] = {
  5090. 350000,
  5091. 250000,
  5092. 75000,
  5093. 37000,
  5094. 25000,
  5095. };
  5096. static const s32 period_duration[] = {
  5097. 400000,
  5098. 700000,
  5099. 1000000,
  5100. 1000000,
  5101. 1000000
  5102. };
  5103. static ssize_t show_power_level(struct device *d,
  5104. struct device_attribute *attr, char *buf)
  5105. {
  5106. struct iwl_priv *priv = dev_get_drvdata(d);
  5107. int level = IWL_POWER_LEVEL(priv->power_mode);
  5108. char *p = buf;
  5109. p += sprintf(p, "%d ", level);
  5110. switch (level) {
  5111. case IWL_POWER_MODE_CAM:
  5112. case IWL39_POWER_AC:
  5113. p += sprintf(p, "(AC)");
  5114. break;
  5115. case IWL39_POWER_BATTERY:
  5116. p += sprintf(p, "(BATTERY)");
  5117. break;
  5118. default:
  5119. p += sprintf(p,
  5120. "(Timeout %dms, Period %dms)",
  5121. timeout_duration[level - 1] / 1000,
  5122. period_duration[level - 1] / 1000);
  5123. }
  5124. if (!(priv->power_mode & IWL_POWER_ENABLED))
  5125. p += sprintf(p, " OFF\n");
  5126. else
  5127. p += sprintf(p, " \n");
  5128. return p - buf + 1;
  5129. }
  5130. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  5131. store_power_level);
  5132. static ssize_t show_channels(struct device *d,
  5133. struct device_attribute *attr, char *buf)
  5134. {
  5135. /* all this shit doesn't belong into sysfs anyway */
  5136. return 0;
  5137. }
  5138. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  5139. static ssize_t show_statistics(struct device *d,
  5140. struct device_attribute *attr, char *buf)
  5141. {
  5142. struct iwl_priv *priv = dev_get_drvdata(d);
  5143. u32 size = sizeof(struct iwl3945_notif_statistics);
  5144. u32 len = 0, ofs = 0;
  5145. u8 *data = (u8 *)&priv->statistics_39;
  5146. int rc = 0;
  5147. if (!iwl_is_alive(priv))
  5148. return -EAGAIN;
  5149. mutex_lock(&priv->mutex);
  5150. rc = iwl3945_send_statistics_request(priv);
  5151. mutex_unlock(&priv->mutex);
  5152. if (rc) {
  5153. len = sprintf(buf,
  5154. "Error sending statistics request: 0x%08X\n", rc);
  5155. return len;
  5156. }
  5157. while (size && (PAGE_SIZE - len)) {
  5158. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  5159. PAGE_SIZE - len, 1);
  5160. len = strlen(buf);
  5161. if (PAGE_SIZE - len)
  5162. buf[len++] = '\n';
  5163. ofs += 16;
  5164. size -= min(size, 16U);
  5165. }
  5166. return len;
  5167. }
  5168. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  5169. static ssize_t show_antenna(struct device *d,
  5170. struct device_attribute *attr, char *buf)
  5171. {
  5172. struct iwl_priv *priv = dev_get_drvdata(d);
  5173. if (!iwl_is_alive(priv))
  5174. return -EAGAIN;
  5175. return sprintf(buf, "%d\n", priv->antenna);
  5176. }
  5177. static ssize_t store_antenna(struct device *d,
  5178. struct device_attribute *attr,
  5179. const char *buf, size_t count)
  5180. {
  5181. int ant;
  5182. struct iwl_priv *priv = dev_get_drvdata(d);
  5183. if (count == 0)
  5184. return 0;
  5185. if (sscanf(buf, "%1i", &ant) != 1) {
  5186. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  5187. return count;
  5188. }
  5189. if ((ant >= 0) && (ant <= 2)) {
  5190. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  5191. priv->antenna = (enum iwl3945_antenna)ant;
  5192. } else
  5193. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  5194. return count;
  5195. }
  5196. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  5197. static ssize_t show_status(struct device *d,
  5198. struct device_attribute *attr, char *buf)
  5199. {
  5200. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5201. if (!iwl_is_alive(priv))
  5202. return -EAGAIN;
  5203. return sprintf(buf, "0x%08x\n", (int)priv->status);
  5204. }
  5205. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  5206. static ssize_t dump_error_log(struct device *d,
  5207. struct device_attribute *attr,
  5208. const char *buf, size_t count)
  5209. {
  5210. char *p = (char *)buf;
  5211. if (p[0] == '1')
  5212. iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  5213. return strnlen(buf, count);
  5214. }
  5215. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  5216. static ssize_t dump_event_log(struct device *d,
  5217. struct device_attribute *attr,
  5218. const char *buf, size_t count)
  5219. {
  5220. char *p = (char *)buf;
  5221. if (p[0] == '1')
  5222. iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  5223. return strnlen(buf, count);
  5224. }
  5225. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  5226. /*****************************************************************************
  5227. *
  5228. * driver setup and tear down
  5229. *
  5230. *****************************************************************************/
  5231. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  5232. {
  5233. priv->workqueue = create_workqueue(DRV_NAME);
  5234. init_waitqueue_head(&priv->wait_command_queue);
  5235. INIT_WORK(&priv->up, iwl3945_bg_up);
  5236. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  5237. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  5238. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  5239. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  5240. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  5241. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  5242. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  5243. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  5244. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  5245. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  5246. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  5247. iwl3945_hw_setup_deferred_work(priv);
  5248. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  5249. iwl3945_irq_tasklet, (unsigned long)priv);
  5250. }
  5251. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  5252. {
  5253. iwl3945_hw_cancel_deferred_work(priv);
  5254. cancel_delayed_work_sync(&priv->init_alive_start);
  5255. cancel_delayed_work(&priv->scan_check);
  5256. cancel_delayed_work(&priv->alive_start);
  5257. cancel_work_sync(&priv->beacon_update);
  5258. }
  5259. static struct attribute *iwl3945_sysfs_entries[] = {
  5260. &dev_attr_antenna.attr,
  5261. &dev_attr_channels.attr,
  5262. &dev_attr_dump_errors.attr,
  5263. &dev_attr_dump_events.attr,
  5264. &dev_attr_flags.attr,
  5265. &dev_attr_filter_flags.attr,
  5266. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  5267. &dev_attr_measurement.attr,
  5268. #endif
  5269. &dev_attr_power_level.attr,
  5270. &dev_attr_retry_rate.attr,
  5271. &dev_attr_statistics.attr,
  5272. &dev_attr_status.attr,
  5273. &dev_attr_temperature.attr,
  5274. &dev_attr_tx_power.attr,
  5275. #ifdef CONFIG_IWL3945_DEBUG
  5276. &dev_attr_debug_level.attr,
  5277. #endif
  5278. NULL
  5279. };
  5280. static struct attribute_group iwl3945_attribute_group = {
  5281. .name = NULL, /* put in device directory */
  5282. .attrs = iwl3945_sysfs_entries,
  5283. };
  5284. static struct ieee80211_ops iwl3945_hw_ops = {
  5285. .tx = iwl3945_mac_tx,
  5286. .start = iwl3945_mac_start,
  5287. .stop = iwl3945_mac_stop,
  5288. .add_interface = iwl3945_mac_add_interface,
  5289. .remove_interface = iwl3945_mac_remove_interface,
  5290. .config = iwl3945_mac_config,
  5291. .config_interface = iwl3945_mac_config_interface,
  5292. .configure_filter = iwl3945_configure_filter,
  5293. .set_key = iwl3945_mac_set_key,
  5294. .get_tx_stats = iwl3945_mac_get_tx_stats,
  5295. .conf_tx = iwl3945_mac_conf_tx,
  5296. .reset_tsf = iwl3945_mac_reset_tsf,
  5297. .bss_info_changed = iwl3945_bss_info_changed,
  5298. .hw_scan = iwl3945_mac_hw_scan
  5299. };
  5300. static int iwl3945_init_drv(struct iwl_priv *priv)
  5301. {
  5302. int ret;
  5303. priv->retry_rate = 1;
  5304. priv->ibss_beacon = NULL;
  5305. spin_lock_init(&priv->lock);
  5306. spin_lock_init(&priv->power_data.lock);
  5307. spin_lock_init(&priv->sta_lock);
  5308. spin_lock_init(&priv->hcmd_lock);
  5309. INIT_LIST_HEAD(&priv->free_frames);
  5310. mutex_init(&priv->mutex);
  5311. /* Clear the driver's (not device's) station table */
  5312. iwl3945_clear_stations_table(priv);
  5313. priv->data_retry_limit = -1;
  5314. priv->ieee_channels = NULL;
  5315. priv->ieee_rates = NULL;
  5316. priv->band = IEEE80211_BAND_2GHZ;
  5317. priv->iw_mode = NL80211_IFTYPE_STATION;
  5318. iwl_reset_qos(priv);
  5319. priv->qos_data.qos_active = 0;
  5320. priv->qos_data.qos_cap.val = 0;
  5321. priv->rates_mask = IWL_RATES_MASK;
  5322. /* If power management is turned on, default to AC mode */
  5323. priv->power_mode = IWL39_POWER_AC;
  5324. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  5325. ret = iwl3945_init_channel_map(priv);
  5326. if (ret) {
  5327. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  5328. goto err;
  5329. }
  5330. ret = iwl3945_init_geos(priv);
  5331. if (ret) {
  5332. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  5333. goto err_free_channel_map;
  5334. }
  5335. return 0;
  5336. err_free_channel_map:
  5337. iwl3945_free_channel_map(priv);
  5338. err:
  5339. return ret;
  5340. }
  5341. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  5342. {
  5343. int err = 0;
  5344. struct iwl_priv *priv;
  5345. struct ieee80211_hw *hw;
  5346. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  5347. unsigned long flags;
  5348. /***********************
  5349. * 1. Allocating HW data
  5350. * ********************/
  5351. /* mac80211 allocates memory for this device instance, including
  5352. * space for this driver's private structure */
  5353. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  5354. if (hw == NULL) {
  5355. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  5356. err = -ENOMEM;
  5357. goto out;
  5358. }
  5359. priv = hw->priv;
  5360. SET_IEEE80211_DEV(hw, &pdev->dev);
  5361. if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
  5362. (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
  5363. IWL_ERR(priv,
  5364. "invalid queues_num, should be between %d and %d\n",
  5365. IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
  5366. err = -EINVAL;
  5367. goto out;
  5368. }
  5369. /*
  5370. * Disabling hardware scan means that mac80211 will perform scans
  5371. * "the hard way", rather than using device's scan.
  5372. */
  5373. if (iwl3945_mod_params.disable_hw_scan) {
  5374. IWL_DEBUG_INFO("Disabling hw_scan\n");
  5375. iwl3945_hw_ops.hw_scan = NULL;
  5376. }
  5377. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  5378. priv->cfg = cfg;
  5379. priv->pci_dev = pdev;
  5380. #ifdef CONFIG_IWL3945_DEBUG
  5381. priv->debug_level = iwl3945_mod_params.debug;
  5382. atomic_set(&priv->restrict_refcnt, 0);
  5383. #endif
  5384. hw->rate_control_algorithm = "iwl-3945-rs";
  5385. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  5386. /* Select antenna (may be helpful if only one antenna is connected) */
  5387. priv->antenna = (enum iwl3945_antenna)iwl3945_mod_params.antenna;
  5388. /* Tell mac80211 our characteristics */
  5389. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  5390. IEEE80211_HW_NOISE_DBM;
  5391. hw->wiphy->interface_modes =
  5392. BIT(NL80211_IFTYPE_STATION) |
  5393. BIT(NL80211_IFTYPE_ADHOC);
  5394. hw->wiphy->custom_regulatory = true;
  5395. /* 4 EDCA QOS priorities */
  5396. hw->queues = 4;
  5397. /***************************
  5398. * 2. Initializing PCI bus
  5399. * *************************/
  5400. if (pci_enable_device(pdev)) {
  5401. err = -ENODEV;
  5402. goto out_ieee80211_free_hw;
  5403. }
  5404. pci_set_master(pdev);
  5405. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  5406. if (!err)
  5407. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  5408. if (err) {
  5409. IWL_WARN(priv, "No suitable DMA available.\n");
  5410. goto out_pci_disable_device;
  5411. }
  5412. pci_set_drvdata(pdev, priv);
  5413. err = pci_request_regions(pdev, DRV_NAME);
  5414. if (err)
  5415. goto out_pci_disable_device;
  5416. /***********************
  5417. * 3. Read REV Register
  5418. * ********************/
  5419. priv->hw_base = pci_iomap(pdev, 0, 0);
  5420. if (!priv->hw_base) {
  5421. err = -ENODEV;
  5422. goto out_pci_release_regions;
  5423. }
  5424. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  5425. (unsigned long long) pci_resource_len(pdev, 0));
  5426. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  5427. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  5428. * PCI Tx retries from interfering with C3 CPU state */
  5429. pci_write_config_byte(pdev, 0x41, 0x00);
  5430. /* amp init */
  5431. err = priv->cfg->ops->lib->apm_ops.init(priv);
  5432. if (err < 0) {
  5433. IWL_DEBUG_INFO("Failed to init APMG\n");
  5434. goto out_iounmap;
  5435. }
  5436. /***********************
  5437. * 4. Read EEPROM
  5438. * ********************/
  5439. /* Read the EEPROM */
  5440. err = iwl3945_eeprom_init(priv);
  5441. if (err) {
  5442. IWL_ERR(priv, "Unable to init EEPROM\n");
  5443. goto out_remove_sysfs;
  5444. }
  5445. /* MAC Address location in EEPROM same for 3945/4965 */
  5446. get_eeprom_mac(priv, priv->mac_addr);
  5447. IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
  5448. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5449. /***********************
  5450. * 5. Setup HW Constants
  5451. * ********************/
  5452. /* Device-specific setup */
  5453. if (iwl3945_hw_set_hw_params(priv)) {
  5454. IWL_ERR(priv, "failed to set hw settings\n");
  5455. goto out_iounmap;
  5456. }
  5457. /***********************
  5458. * 6. Setup priv
  5459. * ********************/
  5460. err = iwl3945_init_drv(priv);
  5461. if (err) {
  5462. IWL_ERR(priv, "initializing driver failed\n");
  5463. goto out_free_geos;
  5464. }
  5465. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  5466. priv->cfg->name);
  5467. /***********************************
  5468. * 7. Initialize Module Parameters
  5469. * **********************************/
  5470. /* Initialize module parameter values here */
  5471. /* Disable radio (SW RF KILL) via parameter when loading driver */
  5472. if (iwl3945_mod_params.disable) {
  5473. set_bit(STATUS_RF_KILL_SW, &priv->status);
  5474. IWL_DEBUG_INFO("Radio disabled.\n");
  5475. }
  5476. /***********************
  5477. * 8. Setup Services
  5478. * ********************/
  5479. spin_lock_irqsave(&priv->lock, flags);
  5480. iwl3945_disable_interrupts(priv);
  5481. spin_unlock_irqrestore(&priv->lock, flags);
  5482. pci_enable_msi(priv->pci_dev);
  5483. err = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
  5484. DRV_NAME, priv);
  5485. if (err) {
  5486. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  5487. goto out_disable_msi;
  5488. }
  5489. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  5490. if (err) {
  5491. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  5492. goto out_release_irq;
  5493. }
  5494. iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
  5495. iwl3945_setup_deferred_work(priv);
  5496. iwl3945_setup_rx_handlers(priv);
  5497. /*********************************
  5498. * 9. Setup and Register mac80211
  5499. * *******************************/
  5500. err = ieee80211_register_hw(priv->hw);
  5501. if (err) {
  5502. IWL_ERR(priv, "Failed to register network device: %d\n", err);
  5503. goto out_remove_sysfs;
  5504. }
  5505. priv->hw->conf.beacon_int = 100;
  5506. priv->mac80211_registered = 1;
  5507. err = iwl_rfkill_init(priv);
  5508. if (err)
  5509. IWL_ERR(priv, "Unable to initialize RFKILL system. "
  5510. "Ignoring error: %d\n", err);
  5511. /* Start monitoring the killswitch */
  5512. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  5513. 2 * HZ);
  5514. return 0;
  5515. out_remove_sysfs:
  5516. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  5517. out_free_geos:
  5518. iwl3945_free_geos(priv);
  5519. out_release_irq:
  5520. free_irq(priv->pci_dev->irq, priv);
  5521. destroy_workqueue(priv->workqueue);
  5522. priv->workqueue = NULL;
  5523. iwl3945_unset_hw_params(priv);
  5524. out_disable_msi:
  5525. pci_disable_msi(priv->pci_dev);
  5526. out_iounmap:
  5527. pci_iounmap(pdev, priv->hw_base);
  5528. out_pci_release_regions:
  5529. pci_release_regions(pdev);
  5530. out_pci_disable_device:
  5531. pci_disable_device(pdev);
  5532. pci_set_drvdata(pdev, NULL);
  5533. out_ieee80211_free_hw:
  5534. ieee80211_free_hw(priv->hw);
  5535. out:
  5536. return err;
  5537. }
  5538. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  5539. {
  5540. struct iwl_priv *priv = pci_get_drvdata(pdev);
  5541. unsigned long flags;
  5542. if (!priv)
  5543. return;
  5544. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  5545. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5546. if (priv->mac80211_registered) {
  5547. ieee80211_unregister_hw(priv->hw);
  5548. priv->mac80211_registered = 0;
  5549. } else {
  5550. iwl3945_down(priv);
  5551. }
  5552. /* make sure we flush any pending irq or
  5553. * tasklet for the driver
  5554. */
  5555. spin_lock_irqsave(&priv->lock, flags);
  5556. iwl3945_disable_interrupts(priv);
  5557. spin_unlock_irqrestore(&priv->lock, flags);
  5558. iwl_synchronize_irq(priv);
  5559. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  5560. iwl_rfkill_unregister(priv);
  5561. cancel_delayed_work(&priv->rfkill_poll);
  5562. iwl3945_dealloc_ucode_pci(priv);
  5563. if (priv->rxq.bd)
  5564. iwl_rx_queue_free(priv, &priv->rxq);
  5565. iwl3945_hw_txq_ctx_free(priv);
  5566. iwl3945_unset_hw_params(priv);
  5567. iwl3945_clear_stations_table(priv);
  5568. /*netif_stop_queue(dev); */
  5569. flush_workqueue(priv->workqueue);
  5570. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  5571. * priv->workqueue... so we can't take down the workqueue
  5572. * until now... */
  5573. destroy_workqueue(priv->workqueue);
  5574. priv->workqueue = NULL;
  5575. free_irq(pdev->irq, priv);
  5576. pci_disable_msi(pdev);
  5577. pci_iounmap(pdev, priv->hw_base);
  5578. pci_release_regions(pdev);
  5579. pci_disable_device(pdev);
  5580. pci_set_drvdata(pdev, NULL);
  5581. iwl3945_free_channel_map(priv);
  5582. iwl3945_free_geos(priv);
  5583. kfree(priv->scan);
  5584. if (priv->ibss_beacon)
  5585. dev_kfree_skb(priv->ibss_beacon);
  5586. ieee80211_free_hw(priv->hw);
  5587. }
  5588. #ifdef CONFIG_PM
  5589. static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  5590. {
  5591. struct iwl_priv *priv = pci_get_drvdata(pdev);
  5592. if (priv->is_open) {
  5593. set_bit(STATUS_IN_SUSPEND, &priv->status);
  5594. iwl3945_mac_stop(priv->hw);
  5595. priv->is_open = 1;
  5596. }
  5597. pci_save_state(pdev);
  5598. pci_disable_device(pdev);
  5599. pci_set_power_state(pdev, PCI_D3hot);
  5600. return 0;
  5601. }
  5602. static int iwl3945_pci_resume(struct pci_dev *pdev)
  5603. {
  5604. struct iwl_priv *priv = pci_get_drvdata(pdev);
  5605. pci_set_power_state(pdev, PCI_D0);
  5606. pci_enable_device(pdev);
  5607. pci_restore_state(pdev);
  5608. if (priv->is_open)
  5609. iwl3945_mac_start(priv->hw);
  5610. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  5611. return 0;
  5612. }
  5613. #endif /* CONFIG_PM */
  5614. /*****************************************************************************
  5615. *
  5616. * driver and module entry point
  5617. *
  5618. *****************************************************************************/
  5619. static struct pci_driver iwl3945_driver = {
  5620. .name = DRV_NAME,
  5621. .id_table = iwl3945_hw_card_ids,
  5622. .probe = iwl3945_pci_probe,
  5623. .remove = __devexit_p(iwl3945_pci_remove),
  5624. #ifdef CONFIG_PM
  5625. .suspend = iwl3945_pci_suspend,
  5626. .resume = iwl3945_pci_resume,
  5627. #endif
  5628. };
  5629. static int __init iwl3945_init(void)
  5630. {
  5631. int ret;
  5632. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  5633. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  5634. ret = iwl3945_rate_control_register();
  5635. if (ret) {
  5636. printk(KERN_ERR DRV_NAME
  5637. "Unable to register rate control algorithm: %d\n", ret);
  5638. return ret;
  5639. }
  5640. ret = pci_register_driver(&iwl3945_driver);
  5641. if (ret) {
  5642. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  5643. goto error_register;
  5644. }
  5645. return ret;
  5646. error_register:
  5647. iwl3945_rate_control_unregister();
  5648. return ret;
  5649. }
  5650. static void __exit iwl3945_exit(void)
  5651. {
  5652. pci_unregister_driver(&iwl3945_driver);
  5653. iwl3945_rate_control_unregister();
  5654. }
  5655. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  5656. module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
  5657. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  5658. module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
  5659. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  5660. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
  5661. MODULE_PARM_DESC(swcrypto,
  5662. "using software crypto (default 1 [software])\n");
  5663. module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
  5664. MODULE_PARM_DESC(debug, "debug output mask");
  5665. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
  5666. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  5667. module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
  5668. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  5669. module_exit(iwl3945_exit);
  5670. module_init(iwl3945_init);