mx3_camera.c 35 KB

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  1. /*
  2. * V4L2 Driver for i.MX3x camera host
  3. *
  4. * Copyright (C) 2008
  5. * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/version.h>
  14. #include <linux/videodev2.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/clk.h>
  17. #include <linux/vmalloc.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/sched.h>
  20. #include <media/v4l2-common.h>
  21. #include <media/v4l2-dev.h>
  22. #include <media/videobuf-dma-contig.h>
  23. #include <media/soc_camera.h>
  24. #include <media/soc_mediabus.h>
  25. #include <mach/ipu.h>
  26. #include <mach/mx3_camera.h>
  27. #include <mach/dma.h>
  28. #define MX3_CAM_DRV_NAME "mx3-camera"
  29. /* CMOS Sensor Interface Registers */
  30. #define CSI_REG_START 0x60
  31. #define CSI_SENS_CONF (0x60 - CSI_REG_START)
  32. #define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START)
  33. #define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START)
  34. #define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START)
  35. #define CSI_TST_CTRL (0x70 - CSI_REG_START)
  36. #define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START)
  37. #define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START)
  38. #define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START)
  39. #define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START)
  40. #define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START)
  41. #define CSI_SENS_CONF_VSYNC_POL_SHIFT 0
  42. #define CSI_SENS_CONF_HSYNC_POL_SHIFT 1
  43. #define CSI_SENS_CONF_DATA_POL_SHIFT 2
  44. #define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3
  45. #define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4
  46. #define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7
  47. #define CSI_SENS_CONF_DATA_FMT_SHIFT 8
  48. #define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10
  49. #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
  50. #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
  51. #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  52. #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  53. #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  54. #define MAX_VIDEO_MEM 16
  55. struct mx3_camera_buffer {
  56. /* common v4l buffer stuff -- must be first */
  57. struct videobuf_buffer vb;
  58. enum v4l2_mbus_pixelcode code;
  59. /* One descriptot per scatterlist (per frame) */
  60. struct dma_async_tx_descriptor *txd;
  61. /* We have to "build" a scatterlist ourselves - one element per frame */
  62. struct scatterlist sg;
  63. };
  64. /**
  65. * struct mx3_camera_dev - i.MX3x camera (CSI) object
  66. * @dev: camera device, to which the coherent buffer is attached
  67. * @icd: currently attached camera sensor
  68. * @clk: pointer to clock
  69. * @base: remapped register base address
  70. * @pdata: platform data
  71. * @platform_flags: platform flags
  72. * @mclk: master clock frequency in Hz
  73. * @capture: list of capture videobuffers
  74. * @lock: protects video buffer lists
  75. * @active: active video buffer
  76. * @idmac_channel: array of pointers to IPU DMAC DMA channels
  77. * @soc_host: embedded soc_host object
  78. */
  79. struct mx3_camera_dev {
  80. /*
  81. * i.MX3x is only supposed to handle one camera on its Camera Sensor
  82. * Interface. If anyone ever builds hardware to enable more than one
  83. * camera _simultaneously_, they will have to modify this driver too
  84. */
  85. struct soc_camera_device *icd;
  86. struct clk *clk;
  87. void __iomem *base;
  88. struct mx3_camera_pdata *pdata;
  89. unsigned long platform_flags;
  90. unsigned long mclk;
  91. struct list_head capture;
  92. spinlock_t lock; /* Protects video buffer lists */
  93. struct mx3_camera_buffer *active;
  94. /* IDMAC / dmaengine interface */
  95. struct idmac_channel *idmac_channel[1]; /* We need one channel */
  96. struct soc_camera_host soc_host;
  97. };
  98. struct dma_chan_request {
  99. struct mx3_camera_dev *mx3_cam;
  100. enum ipu_channel id;
  101. };
  102. static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg)
  103. {
  104. return __raw_readl(mx3->base + reg);
  105. }
  106. static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg)
  107. {
  108. __raw_writel(value, mx3->base + reg);
  109. }
  110. /* Called from the IPU IDMAC ISR */
  111. static void mx3_cam_dma_done(void *arg)
  112. {
  113. struct idmac_tx_desc *desc = to_tx_desc(arg);
  114. struct dma_chan *chan = desc->txd.chan;
  115. struct idmac_channel *ichannel = to_idmac_chan(chan);
  116. struct mx3_camera_dev *mx3_cam = ichannel->client;
  117. struct videobuf_buffer *vb;
  118. dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n",
  119. desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0);
  120. spin_lock(&mx3_cam->lock);
  121. if (mx3_cam->active) {
  122. vb = &mx3_cam->active->vb;
  123. list_del_init(&vb->queue);
  124. vb->state = VIDEOBUF_DONE;
  125. do_gettimeofday(&vb->ts);
  126. vb->field_count++;
  127. wake_up(&vb->done);
  128. }
  129. if (list_empty(&mx3_cam->capture)) {
  130. mx3_cam->active = NULL;
  131. spin_unlock(&mx3_cam->lock);
  132. /*
  133. * stop capture - without further buffers IPU_CHA_BUF0_RDY will
  134. * not get updated
  135. */
  136. return;
  137. }
  138. mx3_cam->active = list_entry(mx3_cam->capture.next,
  139. struct mx3_camera_buffer, vb.queue);
  140. mx3_cam->active->vb.state = VIDEOBUF_ACTIVE;
  141. spin_unlock(&mx3_cam->lock);
  142. }
  143. static void free_buffer(struct videobuf_queue *vq, struct mx3_camera_buffer *buf)
  144. {
  145. struct soc_camera_device *icd = vq->priv_data;
  146. struct videobuf_buffer *vb = &buf->vb;
  147. struct dma_async_tx_descriptor *txd = buf->txd;
  148. struct idmac_channel *ichan;
  149. BUG_ON(in_interrupt());
  150. dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  151. vb, vb->baddr, vb->bsize);
  152. /*
  153. * This waits until this buffer is out of danger, i.e., until it is no
  154. * longer in STATE_QUEUED or STATE_ACTIVE
  155. */
  156. videobuf_waiton(vq, vb, 0, 0);
  157. if (txd) {
  158. ichan = to_idmac_chan(txd->chan);
  159. async_tx_ack(txd);
  160. }
  161. videobuf_dma_contig_free(vq, vb);
  162. buf->txd = NULL;
  163. vb->state = VIDEOBUF_NEEDS_INIT;
  164. }
  165. /*
  166. * Videobuf operations
  167. */
  168. /*
  169. * Calculate the __buffer__ (not data) size and number of buffers.
  170. * Called with .vb_lock held
  171. */
  172. static int mx3_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
  173. unsigned int *size)
  174. {
  175. struct soc_camera_device *icd = vq->priv_data;
  176. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  177. struct mx3_camera_dev *mx3_cam = ici->priv;
  178. int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
  179. icd->current_fmt->host_fmt);
  180. if (bytes_per_line < 0)
  181. return bytes_per_line;
  182. if (!mx3_cam->idmac_channel[0])
  183. return -EINVAL;
  184. *size = bytes_per_line * icd->user_height;
  185. if (!*count)
  186. *count = 32;
  187. if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
  188. *count = MAX_VIDEO_MEM * 1024 * 1024 / *size;
  189. return 0;
  190. }
  191. /* Called with .vb_lock held */
  192. static int mx3_videobuf_prepare(struct videobuf_queue *vq,
  193. struct videobuf_buffer *vb, enum v4l2_field field)
  194. {
  195. struct soc_camera_device *icd = vq->priv_data;
  196. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  197. struct mx3_camera_dev *mx3_cam = ici->priv;
  198. struct mx3_camera_buffer *buf =
  199. container_of(vb, struct mx3_camera_buffer, vb);
  200. size_t new_size;
  201. int ret;
  202. int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
  203. icd->current_fmt->host_fmt);
  204. if (bytes_per_line < 0)
  205. return bytes_per_line;
  206. new_size = bytes_per_line * icd->user_height;
  207. /*
  208. * I think, in buf_prepare you only have to protect global data,
  209. * the actual buffer is yours
  210. */
  211. if (buf->code != icd->current_fmt->code ||
  212. vb->width != icd->user_width ||
  213. vb->height != icd->user_height ||
  214. vb->field != field) {
  215. buf->code = icd->current_fmt->code;
  216. vb->width = icd->user_width;
  217. vb->height = icd->user_height;
  218. vb->field = field;
  219. if (vb->state != VIDEOBUF_NEEDS_INIT)
  220. free_buffer(vq, buf);
  221. }
  222. if (vb->baddr && vb->bsize < new_size) {
  223. /* User provided buffer, but it is too small */
  224. ret = -ENOMEM;
  225. goto out;
  226. }
  227. if (vb->state == VIDEOBUF_NEEDS_INIT) {
  228. struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
  229. struct scatterlist *sg = &buf->sg;
  230. /*
  231. * The total size of video-buffers that will be allocated / mapped.
  232. * *size that we calculated in videobuf_setup gets assigned to
  233. * vb->bsize, and now we use the same calculation to get vb->size.
  234. */
  235. vb->size = new_size;
  236. /* This actually (allocates and) maps buffers */
  237. ret = videobuf_iolock(vq, vb, NULL);
  238. if (ret)
  239. goto fail;
  240. /*
  241. * We will have to configure the IDMAC channel. It has two slots
  242. * for DMA buffers, we shall enter the first two buffers there,
  243. * and then submit new buffers in DMA-ready interrupts
  244. */
  245. sg_init_table(sg, 1);
  246. sg_dma_address(sg) = videobuf_to_dma_contig(vb);
  247. sg_dma_len(sg) = vb->size;
  248. buf->txd = ichan->dma_chan.device->device_prep_slave_sg(
  249. &ichan->dma_chan, sg, 1, DMA_FROM_DEVICE,
  250. DMA_PREP_INTERRUPT);
  251. if (!buf->txd) {
  252. ret = -EIO;
  253. goto fail;
  254. }
  255. buf->txd->callback_param = buf->txd;
  256. buf->txd->callback = mx3_cam_dma_done;
  257. vb->state = VIDEOBUF_PREPARED;
  258. }
  259. return 0;
  260. fail:
  261. free_buffer(vq, buf);
  262. out:
  263. return ret;
  264. }
  265. static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
  266. {
  267. /* Add more formats as need arises and test possibilities appear... */
  268. switch (fourcc) {
  269. case V4L2_PIX_FMT_RGB565:
  270. return IPU_PIX_FMT_RGB565;
  271. case V4L2_PIX_FMT_RGB24:
  272. return IPU_PIX_FMT_RGB24;
  273. case V4L2_PIX_FMT_RGB332:
  274. return IPU_PIX_FMT_RGB332;
  275. case V4L2_PIX_FMT_YUV422P:
  276. return IPU_PIX_FMT_YVU422P;
  277. default:
  278. return IPU_PIX_FMT_GENERIC;
  279. }
  280. }
  281. /*
  282. * Called with .vb_lock mutex held and
  283. * under spinlock_irqsave(&mx3_cam->lock, ...)
  284. */
  285. static void mx3_videobuf_queue(struct videobuf_queue *vq,
  286. struct videobuf_buffer *vb)
  287. {
  288. struct soc_camera_device *icd = vq->priv_data;
  289. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  290. struct mx3_camera_dev *mx3_cam = ici->priv;
  291. struct mx3_camera_buffer *buf =
  292. container_of(vb, struct mx3_camera_buffer, vb);
  293. struct dma_async_tx_descriptor *txd = buf->txd;
  294. struct idmac_channel *ichan = to_idmac_chan(txd->chan);
  295. struct idmac_video_param *video = &ichan->params.video;
  296. dma_cookie_t cookie;
  297. u32 fourcc = icd->current_fmt->host_fmt->fourcc;
  298. BUG_ON(!irqs_disabled());
  299. /* This is the configuration of one sg-element */
  300. video->out_pixel_fmt = fourcc_to_ipu_pix(fourcc);
  301. video->out_width = icd->user_width;
  302. video->out_height = icd->user_height;
  303. video->out_stride = icd->user_width;
  304. #ifdef DEBUG
  305. /* helps to see what DMA actually has written */
  306. memset((void *)vb->baddr, 0xaa, vb->bsize);
  307. #endif
  308. list_add_tail(&vb->queue, &mx3_cam->capture);
  309. if (!mx3_cam->active) {
  310. mx3_cam->active = buf;
  311. vb->state = VIDEOBUF_ACTIVE;
  312. } else {
  313. vb->state = VIDEOBUF_QUEUED;
  314. }
  315. spin_unlock_irq(&mx3_cam->lock);
  316. cookie = txd->tx_submit(txd);
  317. dev_dbg(icd->dev.parent, "Submitted cookie %d DMA 0x%08x\n",
  318. cookie, sg_dma_address(&buf->sg));
  319. spin_lock_irq(&mx3_cam->lock);
  320. if (cookie >= 0)
  321. return;
  322. /* Submit error */
  323. vb->state = VIDEOBUF_PREPARED;
  324. list_del_init(&vb->queue);
  325. if (mx3_cam->active == buf)
  326. mx3_cam->active = NULL;
  327. }
  328. /* Called with .vb_lock held */
  329. static void mx3_videobuf_release(struct videobuf_queue *vq,
  330. struct videobuf_buffer *vb)
  331. {
  332. struct soc_camera_device *icd = vq->priv_data;
  333. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  334. struct mx3_camera_dev *mx3_cam = ici->priv;
  335. struct mx3_camera_buffer *buf =
  336. container_of(vb, struct mx3_camera_buffer, vb);
  337. unsigned long flags;
  338. dev_dbg(icd->dev.parent,
  339. "Release%s DMA 0x%08x (state %d), queue %sempty\n",
  340. mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg),
  341. vb->state, list_empty(&vb->queue) ? "" : "not ");
  342. spin_lock_irqsave(&mx3_cam->lock, flags);
  343. if ((vb->state == VIDEOBUF_ACTIVE || vb->state == VIDEOBUF_QUEUED) &&
  344. !list_empty(&vb->queue)) {
  345. vb->state = VIDEOBUF_ERROR;
  346. list_del_init(&vb->queue);
  347. if (mx3_cam->active == buf)
  348. mx3_cam->active = NULL;
  349. }
  350. spin_unlock_irqrestore(&mx3_cam->lock, flags);
  351. free_buffer(vq, buf);
  352. }
  353. static struct videobuf_queue_ops mx3_videobuf_ops = {
  354. .buf_setup = mx3_videobuf_setup,
  355. .buf_prepare = mx3_videobuf_prepare,
  356. .buf_queue = mx3_videobuf_queue,
  357. .buf_release = mx3_videobuf_release,
  358. };
  359. static void mx3_camera_init_videobuf(struct videobuf_queue *q,
  360. struct soc_camera_device *icd)
  361. {
  362. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  363. struct mx3_camera_dev *mx3_cam = ici->priv;
  364. videobuf_queue_dma_contig_init(q, &mx3_videobuf_ops, icd->dev.parent,
  365. &mx3_cam->lock,
  366. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  367. V4L2_FIELD_NONE,
  368. sizeof(struct mx3_camera_buffer), icd,
  369. NULL);
  370. }
  371. /* First part of ipu_csi_init_interface() */
  372. static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam,
  373. struct soc_camera_device *icd)
  374. {
  375. u32 conf;
  376. long rate;
  377. /* Set default size: ipu_csi_set_window_size() */
  378. csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE);
  379. /* ...and position to 0:0: ipu_csi_set_window_pos() */
  380. conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
  381. csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL);
  382. /* We use only gated clock synchronisation mode so far */
  383. conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT;
  384. /* Set generic data, platform-biggest bus-width */
  385. conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
  386. if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
  387. conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  388. else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
  389. conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  390. else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
  391. conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  392. else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
  393. conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  394. if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC)
  395. conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT;
  396. if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC)
  397. conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT;
  398. if (mx3_cam->platform_flags & MX3_CAMERA_DP)
  399. conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
  400. if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
  401. conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
  402. if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
  403. conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
  404. if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
  405. conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
  406. /* ipu_csi_init_interface() */
  407. csi_reg_write(mx3_cam, conf, CSI_SENS_CONF);
  408. clk_enable(mx3_cam->clk);
  409. rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk);
  410. dev_dbg(icd->dev.parent, "Set SENS_CONF to %x, rate %ld\n", conf, rate);
  411. if (rate)
  412. clk_set_rate(mx3_cam->clk, rate);
  413. }
  414. /* Called with .video_lock held */
  415. static int mx3_camera_add_device(struct soc_camera_device *icd)
  416. {
  417. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  418. struct mx3_camera_dev *mx3_cam = ici->priv;
  419. if (mx3_cam->icd)
  420. return -EBUSY;
  421. mx3_camera_activate(mx3_cam, icd);
  422. mx3_cam->icd = icd;
  423. dev_info(icd->dev.parent, "MX3 Camera driver attached to camera %d\n",
  424. icd->devnum);
  425. return 0;
  426. }
  427. /* Called with .video_lock held */
  428. static void mx3_camera_remove_device(struct soc_camera_device *icd)
  429. {
  430. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  431. struct mx3_camera_dev *mx3_cam = ici->priv;
  432. struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
  433. BUG_ON(icd != mx3_cam->icd);
  434. if (*ichan) {
  435. dma_release_channel(&(*ichan)->dma_chan);
  436. *ichan = NULL;
  437. }
  438. clk_disable(mx3_cam->clk);
  439. mx3_cam->icd = NULL;
  440. dev_info(icd->dev.parent, "MX3 Camera driver detached from camera %d\n",
  441. icd->devnum);
  442. }
  443. static bool channel_change_requested(struct soc_camera_device *icd,
  444. struct v4l2_rect *rect)
  445. {
  446. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  447. struct mx3_camera_dev *mx3_cam = ici->priv;
  448. struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
  449. /* Do buffers have to be re-allocated or channel re-configured? */
  450. return ichan && rect->width * rect->height >
  451. icd->user_width * icd->user_height;
  452. }
  453. static int test_platform_param(struct mx3_camera_dev *mx3_cam,
  454. unsigned char buswidth, unsigned long *flags)
  455. {
  456. /*
  457. * Platform specified synchronization and pixel clock polarities are
  458. * only a recommendation and are only used during probing. MX3x
  459. * camera interface only works in master mode, i.e., uses HSYNC and
  460. * VSYNC signals from the sensor
  461. */
  462. *flags = SOCAM_MASTER |
  463. SOCAM_HSYNC_ACTIVE_HIGH |
  464. SOCAM_HSYNC_ACTIVE_LOW |
  465. SOCAM_VSYNC_ACTIVE_HIGH |
  466. SOCAM_VSYNC_ACTIVE_LOW |
  467. SOCAM_PCLK_SAMPLE_RISING |
  468. SOCAM_PCLK_SAMPLE_FALLING |
  469. SOCAM_DATA_ACTIVE_HIGH |
  470. SOCAM_DATA_ACTIVE_LOW;
  471. /*
  472. * If requested data width is supported by the platform, use it or any
  473. * possible lower value - i.MX31 is smart enough to schift bits
  474. */
  475. if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
  476. *flags |= SOCAM_DATAWIDTH_15 | SOCAM_DATAWIDTH_10 |
  477. SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
  478. else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
  479. *flags |= SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8 |
  480. SOCAM_DATAWIDTH_4;
  481. else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
  482. *flags |= SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
  483. else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)
  484. *flags |= SOCAM_DATAWIDTH_4;
  485. switch (buswidth) {
  486. case 15:
  487. if (!(*flags & SOCAM_DATAWIDTH_15))
  488. return -EINVAL;
  489. break;
  490. case 10:
  491. if (!(*flags & SOCAM_DATAWIDTH_10))
  492. return -EINVAL;
  493. break;
  494. case 8:
  495. if (!(*flags & SOCAM_DATAWIDTH_8))
  496. return -EINVAL;
  497. break;
  498. case 4:
  499. if (!(*flags & SOCAM_DATAWIDTH_4))
  500. return -EINVAL;
  501. break;
  502. default:
  503. dev_warn(mx3_cam->soc_host.v4l2_dev.dev,
  504. "Unsupported bus width %d\n", buswidth);
  505. return -EINVAL;
  506. }
  507. return 0;
  508. }
  509. static int mx3_camera_try_bus_param(struct soc_camera_device *icd,
  510. const unsigned int depth)
  511. {
  512. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  513. struct mx3_camera_dev *mx3_cam = ici->priv;
  514. unsigned long bus_flags, camera_flags;
  515. int ret = test_platform_param(mx3_cam, depth, &bus_flags);
  516. dev_dbg(icd->dev.parent, "request bus width %d bit: %d\n", depth, ret);
  517. if (ret < 0)
  518. return ret;
  519. camera_flags = icd->ops->query_bus_param(icd);
  520. ret = soc_camera_bus_param_compatible(camera_flags, bus_flags);
  521. if (ret < 0)
  522. dev_warn(icd->dev.parent,
  523. "Flags incompatible: camera %lx, host %lx\n",
  524. camera_flags, bus_flags);
  525. return ret;
  526. }
  527. static bool chan_filter(struct dma_chan *chan, void *arg)
  528. {
  529. struct dma_chan_request *rq = arg;
  530. struct mx3_camera_pdata *pdata;
  531. if (!imx_dma_is_ipu(chan))
  532. return false;
  533. if (!rq)
  534. return false;
  535. pdata = rq->mx3_cam->soc_host.v4l2_dev.dev->platform_data;
  536. return rq->id == chan->chan_id &&
  537. pdata->dma_dev == chan->device->dev;
  538. }
  539. static const struct soc_mbus_pixelfmt mx3_camera_formats[] = {
  540. {
  541. .fourcc = V4L2_PIX_FMT_SBGGR8,
  542. .name = "Bayer BGGR (sRGB) 8 bit",
  543. .bits_per_sample = 8,
  544. .packing = SOC_MBUS_PACKING_NONE,
  545. .order = SOC_MBUS_ORDER_LE,
  546. }, {
  547. .fourcc = V4L2_PIX_FMT_GREY,
  548. .name = "Monochrome 8 bit",
  549. .bits_per_sample = 8,
  550. .packing = SOC_MBUS_PACKING_NONE,
  551. .order = SOC_MBUS_ORDER_LE,
  552. },
  553. };
  554. /* This will be corrected as we get more formats */
  555. static bool mx3_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt)
  556. {
  557. return fmt->packing == SOC_MBUS_PACKING_NONE ||
  558. (fmt->bits_per_sample == 8 &&
  559. fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) ||
  560. (fmt->bits_per_sample > 8 &&
  561. fmt->packing == SOC_MBUS_PACKING_EXTEND16);
  562. }
  563. static int mx3_camera_get_formats(struct soc_camera_device *icd, unsigned int idx,
  564. struct soc_camera_format_xlate *xlate)
  565. {
  566. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  567. struct device *dev = icd->dev.parent;
  568. int formats = 0, ret;
  569. enum v4l2_mbus_pixelcode code;
  570. const struct soc_mbus_pixelfmt *fmt;
  571. ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code);
  572. if (ret < 0)
  573. /* No more formats */
  574. return 0;
  575. fmt = soc_mbus_get_fmtdesc(code);
  576. if (!fmt) {
  577. dev_err(icd->dev.parent,
  578. "Invalid format code #%u: %d\n", idx, code);
  579. return 0;
  580. }
  581. /* This also checks support for the requested bits-per-sample */
  582. ret = mx3_camera_try_bus_param(icd, fmt->bits_per_sample);
  583. if (ret < 0)
  584. return 0;
  585. switch (code) {
  586. case V4L2_MBUS_FMT_SBGGR10_1X10:
  587. formats++;
  588. if (xlate) {
  589. xlate->host_fmt = &mx3_camera_formats[0];
  590. xlate->code = code;
  591. xlate++;
  592. dev_dbg(dev, "Providing format %s using code %d\n",
  593. mx3_camera_formats[0].name, code);
  594. }
  595. break;
  596. case V4L2_MBUS_FMT_Y10_1X10:
  597. formats++;
  598. if (xlate) {
  599. xlate->host_fmt = &mx3_camera_formats[1];
  600. xlate->code = code;
  601. xlate++;
  602. dev_dbg(dev, "Providing format %s using code %d\n",
  603. mx3_camera_formats[1].name, code);
  604. }
  605. break;
  606. default:
  607. if (!mx3_camera_packing_supported(fmt))
  608. return 0;
  609. }
  610. /* Generic pass-through */
  611. formats++;
  612. if (xlate) {
  613. xlate->host_fmt = fmt;
  614. xlate->code = code;
  615. xlate++;
  616. dev_dbg(dev, "Providing format %x in pass-through mode\n",
  617. xlate->host_fmt->fourcc);
  618. }
  619. return formats;
  620. }
  621. static void configure_geometry(struct mx3_camera_dev *mx3_cam,
  622. unsigned int width, unsigned int height)
  623. {
  624. u32 ctrl, width_field, height_field;
  625. /* Setup frame size - this cannot be changed on-the-fly... */
  626. width_field = width - 1;
  627. height_field = height - 1;
  628. csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE);
  629. csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1);
  630. csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2);
  631. csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE);
  632. /* ...and position */
  633. ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
  634. /* Sensor does the cropping */
  635. csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL);
  636. }
  637. static int acquire_dma_channel(struct mx3_camera_dev *mx3_cam)
  638. {
  639. dma_cap_mask_t mask;
  640. struct dma_chan *chan;
  641. struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
  642. /* We have to use IDMAC_IC_7 for Bayer / generic data */
  643. struct dma_chan_request rq = {.mx3_cam = mx3_cam,
  644. .id = IDMAC_IC_7};
  645. if (*ichan) {
  646. struct videobuf_buffer *vb, *_vb;
  647. dma_release_channel(&(*ichan)->dma_chan);
  648. *ichan = NULL;
  649. mx3_cam->active = NULL;
  650. list_for_each_entry_safe(vb, _vb, &mx3_cam->capture, queue) {
  651. list_del_init(&vb->queue);
  652. vb->state = VIDEOBUF_ERROR;
  653. wake_up(&vb->done);
  654. }
  655. }
  656. dma_cap_zero(mask);
  657. dma_cap_set(DMA_SLAVE, mask);
  658. dma_cap_set(DMA_PRIVATE, mask);
  659. chan = dma_request_channel(mask, chan_filter, &rq);
  660. if (!chan)
  661. return -EBUSY;
  662. *ichan = to_idmac_chan(chan);
  663. (*ichan)->client = mx3_cam;
  664. return 0;
  665. }
  666. /*
  667. * FIXME: learn to use stride != width, then we can keep stride properly aligned
  668. * and support arbitrary (even) widths.
  669. */
  670. static inline void stride_align(__u32 *width)
  671. {
  672. if (((*width + 7) & ~7) < 4096)
  673. *width = (*width + 7) & ~7;
  674. else
  675. *width = *width & ~7;
  676. }
  677. /*
  678. * As long as we don't implement host-side cropping and scaling, we can use
  679. * default g_crop and cropcap from soc_camera.c
  680. */
  681. static int mx3_camera_set_crop(struct soc_camera_device *icd,
  682. struct v4l2_crop *a)
  683. {
  684. struct v4l2_rect *rect = &a->c;
  685. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  686. struct mx3_camera_dev *mx3_cam = ici->priv;
  687. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  688. struct v4l2_mbus_framefmt mf;
  689. int ret;
  690. soc_camera_limit_side(&rect->left, &rect->width, 0, 2, 4096);
  691. soc_camera_limit_side(&rect->top, &rect->height, 0, 2, 4096);
  692. ret = v4l2_subdev_call(sd, video, s_crop, a);
  693. if (ret < 0)
  694. return ret;
  695. /* The capture device might have changed its output */
  696. ret = v4l2_subdev_call(sd, video, g_mbus_fmt, &mf);
  697. if (ret < 0)
  698. return ret;
  699. if (mf.width & 7) {
  700. /* Ouch! We can only handle 8-byte aligned width... */
  701. stride_align(&mf.width);
  702. ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
  703. if (ret < 0)
  704. return ret;
  705. }
  706. if (mf.width != icd->user_width || mf.height != icd->user_height) {
  707. /*
  708. * We now know pixel formats and can decide upon DMA-channel(s)
  709. * So far only direct camera-to-memory is supported
  710. */
  711. if (channel_change_requested(icd, rect)) {
  712. ret = acquire_dma_channel(mx3_cam);
  713. if (ret < 0)
  714. return ret;
  715. }
  716. configure_geometry(mx3_cam, mf.width, mf.height);
  717. }
  718. dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n",
  719. mf.width, mf.height);
  720. icd->user_width = mf.width;
  721. icd->user_height = mf.height;
  722. return ret;
  723. }
  724. static int mx3_camera_set_fmt(struct soc_camera_device *icd,
  725. struct v4l2_format *f)
  726. {
  727. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  728. struct mx3_camera_dev *mx3_cam = ici->priv;
  729. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  730. const struct soc_camera_format_xlate *xlate;
  731. struct v4l2_pix_format *pix = &f->fmt.pix;
  732. struct v4l2_mbus_framefmt mf;
  733. int ret;
  734. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  735. if (!xlate) {
  736. dev_warn(icd->dev.parent, "Format %x not found\n",
  737. pix->pixelformat);
  738. return -EINVAL;
  739. }
  740. stride_align(&pix->width);
  741. dev_dbg(icd->dev.parent, "Set format %dx%d\n", pix->width, pix->height);
  742. ret = acquire_dma_channel(mx3_cam);
  743. if (ret < 0)
  744. return ret;
  745. /*
  746. * Might have to perform a complete interface initialisation like in
  747. * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
  748. * mxc_v4l2_s_fmt()
  749. */
  750. configure_geometry(mx3_cam, pix->width, pix->height);
  751. mf.width = pix->width;
  752. mf.height = pix->height;
  753. mf.field = pix->field;
  754. mf.colorspace = pix->colorspace;
  755. mf.code = xlate->code;
  756. ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
  757. if (ret < 0)
  758. return ret;
  759. if (mf.code != xlate->code)
  760. return -EINVAL;
  761. pix->width = mf.width;
  762. pix->height = mf.height;
  763. pix->field = mf.field;
  764. pix->colorspace = mf.colorspace;
  765. icd->current_fmt = xlate;
  766. dev_dbg(icd->dev.parent, "Sensor set %dx%d\n", pix->width, pix->height);
  767. return ret;
  768. }
  769. static int mx3_camera_try_fmt(struct soc_camera_device *icd,
  770. struct v4l2_format *f)
  771. {
  772. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  773. const struct soc_camera_format_xlate *xlate;
  774. struct v4l2_pix_format *pix = &f->fmt.pix;
  775. struct v4l2_mbus_framefmt mf;
  776. __u32 pixfmt = pix->pixelformat;
  777. int ret;
  778. xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
  779. if (pixfmt && !xlate) {
  780. dev_warn(icd->dev.parent, "Format %x not found\n", pixfmt);
  781. return -EINVAL;
  782. }
  783. /* limit to MX3 hardware capabilities */
  784. if (pix->height > 4096)
  785. pix->height = 4096;
  786. if (pix->width > 4096)
  787. pix->width = 4096;
  788. pix->bytesperline = soc_mbus_bytes_per_line(pix->width,
  789. xlate->host_fmt);
  790. if (pix->bytesperline < 0)
  791. return pix->bytesperline;
  792. pix->sizeimage = pix->height * pix->bytesperline;
  793. /* limit to sensor capabilities */
  794. mf.width = pix->width;
  795. mf.height = pix->height;
  796. mf.field = pix->field;
  797. mf.colorspace = pix->colorspace;
  798. mf.code = xlate->code;
  799. ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
  800. if (ret < 0)
  801. return ret;
  802. pix->width = mf.width;
  803. pix->height = mf.height;
  804. pix->colorspace = mf.colorspace;
  805. switch (mf.field) {
  806. case V4L2_FIELD_ANY:
  807. pix->field = V4L2_FIELD_NONE;
  808. break;
  809. case V4L2_FIELD_NONE:
  810. break;
  811. default:
  812. dev_err(icd->dev.parent, "Field type %d unsupported.\n",
  813. mf.field);
  814. ret = -EINVAL;
  815. }
  816. return ret;
  817. }
  818. static int mx3_camera_reqbufs(struct soc_camera_device *icd,
  819. struct v4l2_requestbuffers *p)
  820. {
  821. return 0;
  822. }
  823. static unsigned int mx3_camera_poll(struct file *file, poll_table *pt)
  824. {
  825. struct soc_camera_device *icd = file->private_data;
  826. return videobuf_poll_stream(file, &icd->vb_vidq, pt);
  827. }
  828. static int mx3_camera_querycap(struct soc_camera_host *ici,
  829. struct v4l2_capability *cap)
  830. {
  831. /* cap->name is set by the firendly caller:-> */
  832. strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card));
  833. cap->version = KERNEL_VERSION(0, 2, 2);
  834. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  835. return 0;
  836. }
  837. static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
  838. {
  839. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  840. struct mx3_camera_dev *mx3_cam = ici->priv;
  841. unsigned long bus_flags, camera_flags, common_flags;
  842. u32 dw, sens_conf;
  843. const struct soc_mbus_pixelfmt *fmt;
  844. int buswidth;
  845. int ret;
  846. const struct soc_camera_format_xlate *xlate;
  847. struct device *dev = icd->dev.parent;
  848. fmt = soc_mbus_get_fmtdesc(icd->current_fmt->code);
  849. if (!fmt)
  850. return -EINVAL;
  851. buswidth = fmt->bits_per_sample;
  852. ret = test_platform_param(mx3_cam, buswidth, &bus_flags);
  853. xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
  854. if (!xlate) {
  855. dev_warn(dev, "Format %x not found\n", pixfmt);
  856. return -EINVAL;
  857. }
  858. dev_dbg(dev, "requested bus width %d bit: %d\n", buswidth, ret);
  859. if (ret < 0)
  860. return ret;
  861. camera_flags = icd->ops->query_bus_param(icd);
  862. common_flags = soc_camera_bus_param_compatible(camera_flags, bus_flags);
  863. dev_dbg(dev, "Flags cam: 0x%lx host: 0x%lx common: 0x%lx\n",
  864. camera_flags, bus_flags, common_flags);
  865. if (!common_flags) {
  866. dev_dbg(dev, "no common flags");
  867. return -EINVAL;
  868. }
  869. /* Make choices, based on platform preferences */
  870. if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) &&
  871. (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) {
  872. if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
  873. common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH;
  874. else
  875. common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW;
  876. }
  877. if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
  878. (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
  879. if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
  880. common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
  881. else
  882. common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
  883. }
  884. if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
  885. (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
  886. if (mx3_cam->platform_flags & MX3_CAMERA_DP)
  887. common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
  888. else
  889. common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
  890. }
  891. if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
  892. (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
  893. if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
  894. common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
  895. else
  896. common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
  897. }
  898. /*
  899. * Make the camera work in widest common mode, we'll take care of
  900. * the rest
  901. */
  902. if (common_flags & SOCAM_DATAWIDTH_15)
  903. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  904. SOCAM_DATAWIDTH_15;
  905. else if (common_flags & SOCAM_DATAWIDTH_10)
  906. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  907. SOCAM_DATAWIDTH_10;
  908. else if (common_flags & SOCAM_DATAWIDTH_8)
  909. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  910. SOCAM_DATAWIDTH_8;
  911. else
  912. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  913. SOCAM_DATAWIDTH_4;
  914. ret = icd->ops->set_bus_param(icd, common_flags);
  915. if (ret < 0) {
  916. dev_dbg(dev, "camera set_bus_param(%lx) returned %d\n",
  917. common_flags, ret);
  918. return ret;
  919. }
  920. /*
  921. * So far only gated clock mode is supported. Add a line
  922. * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
  923. * below and select the required mode when supporting other
  924. * synchronisation protocols.
  925. */
  926. sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) &
  927. ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) |
  928. (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) |
  929. (1 << CSI_SENS_CONF_DATA_POL_SHIFT) |
  930. (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) |
  931. (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
  932. (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
  933. /* TODO: Support RGB and YUV formats */
  934. /* This has been set in mx3_camera_activate(), but we clear it above */
  935. sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
  936. if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
  937. sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
  938. if (common_flags & SOCAM_HSYNC_ACTIVE_LOW)
  939. sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
  940. if (common_flags & SOCAM_VSYNC_ACTIVE_LOW)
  941. sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
  942. if (common_flags & SOCAM_DATA_ACTIVE_LOW)
  943. sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
  944. /* Just do what we're asked to do */
  945. switch (xlate->host_fmt->bits_per_sample) {
  946. case 4:
  947. dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  948. break;
  949. case 8:
  950. dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  951. break;
  952. case 10:
  953. dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  954. break;
  955. default:
  956. /*
  957. * Actually it can only be 15 now, default is just to silence
  958. * compiler warnings
  959. */
  960. case 15:
  961. dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  962. }
  963. csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF);
  964. dev_dbg(dev, "Set SENS_CONF to %x\n", sens_conf | dw);
  965. return 0;
  966. }
  967. static struct soc_camera_host_ops mx3_soc_camera_host_ops = {
  968. .owner = THIS_MODULE,
  969. .add = mx3_camera_add_device,
  970. .remove = mx3_camera_remove_device,
  971. .set_crop = mx3_camera_set_crop,
  972. .set_fmt = mx3_camera_set_fmt,
  973. .try_fmt = mx3_camera_try_fmt,
  974. .get_formats = mx3_camera_get_formats,
  975. .init_videobuf = mx3_camera_init_videobuf,
  976. .reqbufs = mx3_camera_reqbufs,
  977. .poll = mx3_camera_poll,
  978. .querycap = mx3_camera_querycap,
  979. .set_bus_param = mx3_camera_set_bus_param,
  980. };
  981. static int __devinit mx3_camera_probe(struct platform_device *pdev)
  982. {
  983. struct mx3_camera_dev *mx3_cam;
  984. struct resource *res;
  985. void __iomem *base;
  986. int err = 0;
  987. struct soc_camera_host *soc_host;
  988. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  989. if (!res) {
  990. err = -ENODEV;
  991. goto egetres;
  992. }
  993. mx3_cam = vmalloc(sizeof(*mx3_cam));
  994. if (!mx3_cam) {
  995. dev_err(&pdev->dev, "Could not allocate mx3 camera object\n");
  996. err = -ENOMEM;
  997. goto ealloc;
  998. }
  999. memset(mx3_cam, 0, sizeof(*mx3_cam));
  1000. mx3_cam->clk = clk_get(&pdev->dev, NULL);
  1001. if (IS_ERR(mx3_cam->clk)) {
  1002. err = PTR_ERR(mx3_cam->clk);
  1003. goto eclkget;
  1004. }
  1005. mx3_cam->pdata = pdev->dev.platform_data;
  1006. mx3_cam->platform_flags = mx3_cam->pdata->flags;
  1007. if (!(mx3_cam->platform_flags & (MX3_CAMERA_DATAWIDTH_4 |
  1008. MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10 |
  1009. MX3_CAMERA_DATAWIDTH_15))) {
  1010. /*
  1011. * Platform hasn't set available data widths. This is bad.
  1012. * Warn and use a default.
  1013. */
  1014. dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
  1015. "data widths, using default 8 bit\n");
  1016. mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8;
  1017. }
  1018. mx3_cam->mclk = mx3_cam->pdata->mclk_10khz * 10000;
  1019. if (!mx3_cam->mclk) {
  1020. dev_warn(&pdev->dev,
  1021. "mclk_10khz == 0! Please, fix your platform data. "
  1022. "Using default 20MHz\n");
  1023. mx3_cam->mclk = 20000000;
  1024. }
  1025. /* list of video-buffers */
  1026. INIT_LIST_HEAD(&mx3_cam->capture);
  1027. spin_lock_init(&mx3_cam->lock);
  1028. base = ioremap(res->start, resource_size(res));
  1029. if (!base) {
  1030. pr_err("Couldn't map %x@%x\n", resource_size(res), res->start);
  1031. err = -ENOMEM;
  1032. goto eioremap;
  1033. }
  1034. mx3_cam->base = base;
  1035. soc_host = &mx3_cam->soc_host;
  1036. soc_host->drv_name = MX3_CAM_DRV_NAME;
  1037. soc_host->ops = &mx3_soc_camera_host_ops;
  1038. soc_host->priv = mx3_cam;
  1039. soc_host->v4l2_dev.dev = &pdev->dev;
  1040. soc_host->nr = pdev->id;
  1041. err = soc_camera_host_register(soc_host);
  1042. if (err)
  1043. goto ecamhostreg;
  1044. /* IDMAC interface */
  1045. dmaengine_get();
  1046. return 0;
  1047. ecamhostreg:
  1048. iounmap(base);
  1049. eioremap:
  1050. clk_put(mx3_cam->clk);
  1051. eclkget:
  1052. vfree(mx3_cam);
  1053. ealloc:
  1054. egetres:
  1055. return err;
  1056. }
  1057. static int __devexit mx3_camera_remove(struct platform_device *pdev)
  1058. {
  1059. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  1060. struct mx3_camera_dev *mx3_cam = container_of(soc_host,
  1061. struct mx3_camera_dev, soc_host);
  1062. clk_put(mx3_cam->clk);
  1063. soc_camera_host_unregister(soc_host);
  1064. iounmap(mx3_cam->base);
  1065. /*
  1066. * The channel has either not been allocated,
  1067. * or should have been released
  1068. */
  1069. if (WARN_ON(mx3_cam->idmac_channel[0]))
  1070. dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan);
  1071. vfree(mx3_cam);
  1072. dmaengine_put();
  1073. dev_info(&pdev->dev, "i.MX3x Camera driver unloaded\n");
  1074. return 0;
  1075. }
  1076. static struct platform_driver mx3_camera_driver = {
  1077. .driver = {
  1078. .name = MX3_CAM_DRV_NAME,
  1079. },
  1080. .probe = mx3_camera_probe,
  1081. .remove = __devexit_p(mx3_camera_remove),
  1082. };
  1083. static int __init mx3_camera_init(void)
  1084. {
  1085. return platform_driver_register(&mx3_camera_driver);
  1086. }
  1087. static void __exit mx3_camera_exit(void)
  1088. {
  1089. platform_driver_unregister(&mx3_camera_driver);
  1090. }
  1091. module_init(mx3_camera_init);
  1092. module_exit(mx3_camera_exit);
  1093. MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
  1094. MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
  1095. MODULE_LICENSE("GPL v2");
  1096. MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME);