lpfc_sli.c 105 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2007 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <scsi/scsi.h>
  26. #include <scsi/scsi_cmnd.h>
  27. #include <scsi/scsi_device.h>
  28. #include <scsi/scsi_host.h>
  29. #include <scsi/scsi_transport_fc.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. #include "lpfc_debugfs.h"
  39. /*
  40. * Define macro to log: Mailbox command x%x cannot issue Data
  41. * This allows multiple uses of lpfc_msgBlk0311
  42. * w/o perturbing log msg utility.
  43. */
  44. #define LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag) \
  45. lpfc_printf_log(phba, \
  46. KERN_INFO, \
  47. LOG_MBOX | LOG_SLI, \
  48. "(%d):0311 Mailbox command x%x cannot " \
  49. "issue Data: x%x x%x x%x\n", \
  50. pmbox->vport ? pmbox->vport->vpi : 0, \
  51. pmbox->mb.mbxCommand, \
  52. phba->pport->port_state, \
  53. psli->sli_flag, \
  54. flag)
  55. /* There are only four IOCB completion types. */
  56. typedef enum _lpfc_iocb_type {
  57. LPFC_UNKNOWN_IOCB,
  58. LPFC_UNSOL_IOCB,
  59. LPFC_SOL_IOCB,
  60. LPFC_ABORT_IOCB
  61. } lpfc_iocb_type;
  62. /* SLI-2/SLI-3 provide different sized iocbs. Given a pointer
  63. * to the start of the ring, and the slot number of the
  64. * desired iocb entry, calc a pointer to that entry.
  65. */
  66. static inline IOCB_t *
  67. lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  68. {
  69. return (IOCB_t *) (((char *) pring->cmdringaddr) +
  70. pring->cmdidx * phba->iocb_cmd_size);
  71. }
  72. static inline IOCB_t *
  73. lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  74. {
  75. return (IOCB_t *) (((char *) pring->rspringaddr) +
  76. pring->rspidx * phba->iocb_rsp_size);
  77. }
  78. static struct lpfc_iocbq *
  79. __lpfc_sli_get_iocbq(struct lpfc_hba *phba)
  80. {
  81. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  82. struct lpfc_iocbq * iocbq = NULL;
  83. list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
  84. return iocbq;
  85. }
  86. struct lpfc_iocbq *
  87. lpfc_sli_get_iocbq(struct lpfc_hba *phba)
  88. {
  89. struct lpfc_iocbq * iocbq = NULL;
  90. unsigned long iflags;
  91. spin_lock_irqsave(&phba->hbalock, iflags);
  92. iocbq = __lpfc_sli_get_iocbq(phba);
  93. spin_unlock_irqrestore(&phba->hbalock, iflags);
  94. return iocbq;
  95. }
  96. void
  97. __lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  98. {
  99. size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
  100. /*
  101. * Clean all volatile data fields, preserve iotag and node struct.
  102. */
  103. memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
  104. list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
  105. }
  106. void
  107. lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  108. {
  109. unsigned long iflags;
  110. /*
  111. * Clean all volatile data fields, preserve iotag and node struct.
  112. */
  113. spin_lock_irqsave(&phba->hbalock, iflags);
  114. __lpfc_sli_release_iocbq(phba, iocbq);
  115. spin_unlock_irqrestore(&phba->hbalock, iflags);
  116. }
  117. /*
  118. * Translate the iocb command to an iocb command type used to decide the final
  119. * disposition of each completed IOCB.
  120. */
  121. static lpfc_iocb_type
  122. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  123. {
  124. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  125. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  126. return 0;
  127. switch (iocb_cmnd) {
  128. case CMD_XMIT_SEQUENCE_CR:
  129. case CMD_XMIT_SEQUENCE_CX:
  130. case CMD_XMIT_BCAST_CN:
  131. case CMD_XMIT_BCAST_CX:
  132. case CMD_ELS_REQUEST_CR:
  133. case CMD_ELS_REQUEST_CX:
  134. case CMD_CREATE_XRI_CR:
  135. case CMD_CREATE_XRI_CX:
  136. case CMD_GET_RPI_CN:
  137. case CMD_XMIT_ELS_RSP_CX:
  138. case CMD_GET_RPI_CR:
  139. case CMD_FCP_IWRITE_CR:
  140. case CMD_FCP_IWRITE_CX:
  141. case CMD_FCP_IREAD_CR:
  142. case CMD_FCP_IREAD_CX:
  143. case CMD_FCP_ICMND_CR:
  144. case CMD_FCP_ICMND_CX:
  145. case CMD_FCP_TSEND_CX:
  146. case CMD_FCP_TRSP_CX:
  147. case CMD_FCP_TRECEIVE_CX:
  148. case CMD_FCP_AUTO_TRSP_CX:
  149. case CMD_ADAPTER_MSG:
  150. case CMD_ADAPTER_DUMP:
  151. case CMD_XMIT_SEQUENCE64_CR:
  152. case CMD_XMIT_SEQUENCE64_CX:
  153. case CMD_XMIT_BCAST64_CN:
  154. case CMD_XMIT_BCAST64_CX:
  155. case CMD_ELS_REQUEST64_CR:
  156. case CMD_ELS_REQUEST64_CX:
  157. case CMD_FCP_IWRITE64_CR:
  158. case CMD_FCP_IWRITE64_CX:
  159. case CMD_FCP_IREAD64_CR:
  160. case CMD_FCP_IREAD64_CX:
  161. case CMD_FCP_ICMND64_CR:
  162. case CMD_FCP_ICMND64_CX:
  163. case CMD_FCP_TSEND64_CX:
  164. case CMD_FCP_TRSP64_CX:
  165. case CMD_FCP_TRECEIVE64_CX:
  166. case CMD_GEN_REQUEST64_CR:
  167. case CMD_GEN_REQUEST64_CX:
  168. case CMD_XMIT_ELS_RSP64_CX:
  169. type = LPFC_SOL_IOCB;
  170. break;
  171. case CMD_ABORT_XRI_CN:
  172. case CMD_ABORT_XRI_CX:
  173. case CMD_CLOSE_XRI_CN:
  174. case CMD_CLOSE_XRI_CX:
  175. case CMD_XRI_ABORTED_CX:
  176. case CMD_ABORT_MXRI64_CN:
  177. type = LPFC_ABORT_IOCB;
  178. break;
  179. case CMD_RCV_SEQUENCE_CX:
  180. case CMD_RCV_ELS_REQ_CX:
  181. case CMD_RCV_SEQUENCE64_CX:
  182. case CMD_RCV_ELS_REQ64_CX:
  183. case CMD_ASYNC_STATUS:
  184. case CMD_IOCB_RCV_SEQ64_CX:
  185. case CMD_IOCB_RCV_ELS64_CX:
  186. case CMD_IOCB_RCV_CONT64_CX:
  187. type = LPFC_UNSOL_IOCB;
  188. break;
  189. default:
  190. type = LPFC_UNKNOWN_IOCB;
  191. break;
  192. }
  193. return type;
  194. }
  195. static int
  196. lpfc_sli_ring_map(struct lpfc_hba *phba)
  197. {
  198. struct lpfc_sli *psli = &phba->sli;
  199. LPFC_MBOXQ_t *pmb;
  200. MAILBOX_t *pmbox;
  201. int i, rc, ret = 0;
  202. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  203. if (!pmb)
  204. return -ENOMEM;
  205. pmbox = &pmb->mb;
  206. phba->link_state = LPFC_INIT_MBX_CMDS;
  207. for (i = 0; i < psli->num_rings; i++) {
  208. lpfc_config_ring(phba, i, pmb);
  209. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  210. if (rc != MBX_SUCCESS) {
  211. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  212. "0446 Adapter failed to init (%d), "
  213. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  214. "ring %d\n",
  215. rc, pmbox->mbxCommand,
  216. pmbox->mbxStatus, i);
  217. phba->link_state = LPFC_HBA_ERROR;
  218. ret = -ENXIO;
  219. break;
  220. }
  221. }
  222. mempool_free(pmb, phba->mbox_mem_pool);
  223. return ret;
  224. }
  225. static int
  226. lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  227. struct lpfc_iocbq *piocb)
  228. {
  229. list_add_tail(&piocb->list, &pring->txcmplq);
  230. pring->txcmplq_cnt++;
  231. if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
  232. (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
  233. (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
  234. if (!piocb->vport)
  235. BUG();
  236. else
  237. mod_timer(&piocb->vport->els_tmofunc,
  238. jiffies + HZ * (phba->fc_ratov << 1));
  239. }
  240. return 0;
  241. }
  242. static struct lpfc_iocbq *
  243. lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  244. {
  245. struct lpfc_iocbq *cmd_iocb;
  246. list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
  247. if (cmd_iocb != NULL)
  248. pring->txq_cnt--;
  249. return cmd_iocb;
  250. }
  251. static IOCB_t *
  252. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  253. {
  254. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  255. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  256. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  257. uint32_t max_cmd_idx = pring->numCiocb;
  258. if ((pring->next_cmdidx == pring->cmdidx) &&
  259. (++pring->next_cmdidx >= max_cmd_idx))
  260. pring->next_cmdidx = 0;
  261. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  262. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  263. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  264. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  265. "0315 Ring %d issue: portCmdGet %d "
  266. "is bigger then cmd ring %d\n",
  267. pring->ringno,
  268. pring->local_getidx, max_cmd_idx);
  269. phba->link_state = LPFC_HBA_ERROR;
  270. /*
  271. * All error attention handlers are posted to
  272. * worker thread
  273. */
  274. phba->work_ha |= HA_ERATT;
  275. phba->work_hs = HS_FFER3;
  276. /* hbalock should already be held */
  277. if (phba->work_wait)
  278. lpfc_worker_wake_up(phba);
  279. return NULL;
  280. }
  281. if (pring->local_getidx == pring->next_cmdidx)
  282. return NULL;
  283. }
  284. return lpfc_cmd_iocb(phba, pring);
  285. }
  286. uint16_t
  287. lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  288. {
  289. struct lpfc_iocbq **new_arr;
  290. struct lpfc_iocbq **old_arr;
  291. size_t new_len;
  292. struct lpfc_sli *psli = &phba->sli;
  293. uint16_t iotag;
  294. spin_lock_irq(&phba->hbalock);
  295. iotag = psli->last_iotag;
  296. if(++iotag < psli->iocbq_lookup_len) {
  297. psli->last_iotag = iotag;
  298. psli->iocbq_lookup[iotag] = iocbq;
  299. spin_unlock_irq(&phba->hbalock);
  300. iocbq->iotag = iotag;
  301. return iotag;
  302. } else if (psli->iocbq_lookup_len < (0xffff
  303. - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
  304. new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
  305. spin_unlock_irq(&phba->hbalock);
  306. new_arr = kzalloc(new_len * sizeof (struct lpfc_iocbq *),
  307. GFP_KERNEL);
  308. if (new_arr) {
  309. spin_lock_irq(&phba->hbalock);
  310. old_arr = psli->iocbq_lookup;
  311. if (new_len <= psli->iocbq_lookup_len) {
  312. /* highly unprobable case */
  313. kfree(new_arr);
  314. iotag = psli->last_iotag;
  315. if(++iotag < psli->iocbq_lookup_len) {
  316. psli->last_iotag = iotag;
  317. psli->iocbq_lookup[iotag] = iocbq;
  318. spin_unlock_irq(&phba->hbalock);
  319. iocbq->iotag = iotag;
  320. return iotag;
  321. }
  322. spin_unlock_irq(&phba->hbalock);
  323. return 0;
  324. }
  325. if (psli->iocbq_lookup)
  326. memcpy(new_arr, old_arr,
  327. ((psli->last_iotag + 1) *
  328. sizeof (struct lpfc_iocbq *)));
  329. psli->iocbq_lookup = new_arr;
  330. psli->iocbq_lookup_len = new_len;
  331. psli->last_iotag = iotag;
  332. psli->iocbq_lookup[iotag] = iocbq;
  333. spin_unlock_irq(&phba->hbalock);
  334. iocbq->iotag = iotag;
  335. kfree(old_arr);
  336. return iotag;
  337. }
  338. } else
  339. spin_unlock_irq(&phba->hbalock);
  340. lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
  341. "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
  342. psli->last_iotag);
  343. return 0;
  344. }
  345. static void
  346. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  347. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  348. {
  349. /*
  350. * Set up an iotag
  351. */
  352. nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
  353. if (pring->ringno == LPFC_ELS_RING) {
  354. lpfc_debugfs_slow_ring_trc(phba,
  355. "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
  356. *(((uint32_t *) &nextiocb->iocb) + 4),
  357. *(((uint32_t *) &nextiocb->iocb) + 6),
  358. *(((uint32_t *) &nextiocb->iocb) + 7));
  359. }
  360. /*
  361. * Issue iocb command to adapter
  362. */
  363. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
  364. wmb();
  365. pring->stats.iocb_cmd++;
  366. /*
  367. * If there is no completion routine to call, we can release the
  368. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  369. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  370. */
  371. if (nextiocb->iocb_cmpl)
  372. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  373. else
  374. __lpfc_sli_release_iocbq(phba, nextiocb);
  375. /*
  376. * Let the HBA know what IOCB slot will be the next one the
  377. * driver will put a command into.
  378. */
  379. pring->cmdidx = pring->next_cmdidx;
  380. writel(pring->cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
  381. }
  382. static void
  383. lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  384. {
  385. int ringno = pring->ringno;
  386. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  387. wmb();
  388. /*
  389. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  390. * The HBA will tell us when an IOCB entry is available.
  391. */
  392. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  393. readl(phba->CAregaddr); /* flush */
  394. pring->stats.iocb_cmd_full++;
  395. }
  396. static void
  397. lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  398. {
  399. int ringno = pring->ringno;
  400. /*
  401. * Tell the HBA that there is work to do in this ring.
  402. */
  403. wmb();
  404. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  405. readl(phba->CAregaddr); /* flush */
  406. }
  407. static void
  408. lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  409. {
  410. IOCB_t *iocb;
  411. struct lpfc_iocbq *nextiocb;
  412. /*
  413. * Check to see if:
  414. * (a) there is anything on the txq to send
  415. * (b) link is up
  416. * (c) link attention events can be processed (fcp ring only)
  417. * (d) IOCB processing is not blocked by the outstanding mbox command.
  418. */
  419. if (pring->txq_cnt &&
  420. lpfc_is_link_up(phba) &&
  421. (pring->ringno != phba->sli.fcp_ring ||
  422. phba->sli.sli_flag & LPFC_PROCESS_LA)) {
  423. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  424. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  425. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  426. if (iocb)
  427. lpfc_sli_update_ring(phba, pring);
  428. else
  429. lpfc_sli_update_full_ring(phba, pring);
  430. }
  431. return;
  432. }
  433. struct lpfc_hbq_entry *
  434. lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
  435. {
  436. struct hbq_s *hbqp = &phba->hbqs[hbqno];
  437. if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
  438. ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
  439. hbqp->next_hbqPutIdx = 0;
  440. if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
  441. uint32_t raw_index = phba->hbq_get[hbqno];
  442. uint32_t getidx = le32_to_cpu(raw_index);
  443. hbqp->local_hbqGetIdx = getidx;
  444. if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
  445. lpfc_printf_log(phba, KERN_ERR,
  446. LOG_SLI | LOG_VPORT,
  447. "1802 HBQ %d: local_hbqGetIdx "
  448. "%u is > than hbqp->entry_count %u\n",
  449. hbqno, hbqp->local_hbqGetIdx,
  450. hbqp->entry_count);
  451. phba->link_state = LPFC_HBA_ERROR;
  452. return NULL;
  453. }
  454. if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
  455. return NULL;
  456. }
  457. return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
  458. hbqp->hbqPutIdx;
  459. }
  460. void
  461. lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
  462. {
  463. struct lpfc_dmabuf *dmabuf, *next_dmabuf;
  464. struct hbq_dmabuf *hbq_buf;
  465. int i, hbq_count;
  466. hbq_count = lpfc_sli_hbq_count();
  467. /* Return all memory used by all HBQs */
  468. for (i = 0; i < hbq_count; ++i) {
  469. list_for_each_entry_safe(dmabuf, next_dmabuf,
  470. &phba->hbqs[i].hbq_buffer_list, list) {
  471. hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
  472. list_del(&hbq_buf->dbuf.list);
  473. (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
  474. }
  475. phba->hbqs[i].buffer_count = 0;
  476. }
  477. }
  478. static struct lpfc_hbq_entry *
  479. lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
  480. struct hbq_dmabuf *hbq_buf)
  481. {
  482. struct lpfc_hbq_entry *hbqe;
  483. dma_addr_t physaddr = hbq_buf->dbuf.phys;
  484. /* Get next HBQ entry slot to use */
  485. hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
  486. if (hbqe) {
  487. struct hbq_s *hbqp = &phba->hbqs[hbqno];
  488. hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
  489. hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
  490. hbqe->bde.tus.f.bdeSize = hbq_buf->size;
  491. hbqe->bde.tus.f.bdeFlags = 0;
  492. hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
  493. hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
  494. /* Sync SLIM */
  495. hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
  496. writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
  497. /* flush */
  498. readl(phba->hbq_put + hbqno);
  499. list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
  500. }
  501. return hbqe;
  502. }
  503. static struct lpfc_hbq_init lpfc_els_hbq = {
  504. .rn = 1,
  505. .entry_count = 200,
  506. .mask_count = 0,
  507. .profile = 0,
  508. .ring_mask = (1 << LPFC_ELS_RING),
  509. .buffer_count = 0,
  510. .init_count = 20,
  511. .add_count = 5,
  512. };
  513. static struct lpfc_hbq_init lpfc_extra_hbq = {
  514. .rn = 1,
  515. .entry_count = 200,
  516. .mask_count = 0,
  517. .profile = 0,
  518. .ring_mask = (1 << LPFC_EXTRA_RING),
  519. .buffer_count = 0,
  520. .init_count = 0,
  521. .add_count = 5,
  522. };
  523. struct lpfc_hbq_init *lpfc_hbq_defs[] = {
  524. &lpfc_els_hbq,
  525. &lpfc_extra_hbq,
  526. };
  527. static int
  528. lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
  529. {
  530. uint32_t i, start, end;
  531. struct hbq_dmabuf *hbq_buffer;
  532. if (!phba->hbqs[hbqno].hbq_alloc_buffer) {
  533. return 0;
  534. }
  535. start = phba->hbqs[hbqno].buffer_count;
  536. end = count + start;
  537. if (end > lpfc_hbq_defs[hbqno]->entry_count) {
  538. end = lpfc_hbq_defs[hbqno]->entry_count;
  539. }
  540. /* Populate HBQ entries */
  541. for (i = start; i < end; i++) {
  542. hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
  543. if (!hbq_buffer)
  544. return 1;
  545. hbq_buffer->tag = (i | (hbqno << 16));
  546. if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
  547. phba->hbqs[hbqno].buffer_count++;
  548. else
  549. (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
  550. }
  551. return 0;
  552. }
  553. int
  554. lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
  555. {
  556. return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
  557. lpfc_hbq_defs[qno]->add_count));
  558. }
  559. int
  560. lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
  561. {
  562. return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
  563. lpfc_hbq_defs[qno]->init_count));
  564. }
  565. struct hbq_dmabuf *
  566. lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
  567. {
  568. struct lpfc_dmabuf *d_buf;
  569. struct hbq_dmabuf *hbq_buf;
  570. uint32_t hbqno;
  571. hbqno = tag >> 16;
  572. if (hbqno >= LPFC_MAX_HBQS)
  573. return NULL;
  574. list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
  575. hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
  576. if (hbq_buf->tag == tag) {
  577. return hbq_buf;
  578. }
  579. }
  580. lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
  581. "1803 Bad hbq tag. Data: x%x x%x\n",
  582. tag, phba->hbqs[tag >> 16].buffer_count);
  583. return NULL;
  584. }
  585. void
  586. lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
  587. {
  588. uint32_t hbqno;
  589. if (hbq_buffer) {
  590. hbqno = hbq_buffer->tag >> 16;
  591. if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
  592. (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
  593. }
  594. }
  595. }
  596. static int
  597. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  598. {
  599. uint8_t ret;
  600. switch (mbxCommand) {
  601. case MBX_LOAD_SM:
  602. case MBX_READ_NV:
  603. case MBX_WRITE_NV:
  604. case MBX_WRITE_VPARMS:
  605. case MBX_RUN_BIU_DIAG:
  606. case MBX_INIT_LINK:
  607. case MBX_DOWN_LINK:
  608. case MBX_CONFIG_LINK:
  609. case MBX_CONFIG_RING:
  610. case MBX_RESET_RING:
  611. case MBX_READ_CONFIG:
  612. case MBX_READ_RCONFIG:
  613. case MBX_READ_SPARM:
  614. case MBX_READ_STATUS:
  615. case MBX_READ_RPI:
  616. case MBX_READ_XRI:
  617. case MBX_READ_REV:
  618. case MBX_READ_LNK_STAT:
  619. case MBX_REG_LOGIN:
  620. case MBX_UNREG_LOGIN:
  621. case MBX_READ_LA:
  622. case MBX_CLEAR_LA:
  623. case MBX_DUMP_MEMORY:
  624. case MBX_DUMP_CONTEXT:
  625. case MBX_RUN_DIAGS:
  626. case MBX_RESTART:
  627. case MBX_UPDATE_CFG:
  628. case MBX_DOWN_LOAD:
  629. case MBX_DEL_LD_ENTRY:
  630. case MBX_RUN_PROGRAM:
  631. case MBX_SET_MASK:
  632. case MBX_SET_SLIM:
  633. case MBX_UNREG_D_ID:
  634. case MBX_KILL_BOARD:
  635. case MBX_CONFIG_FARP:
  636. case MBX_BEACON:
  637. case MBX_LOAD_AREA:
  638. case MBX_RUN_BIU_DIAG64:
  639. case MBX_CONFIG_PORT:
  640. case MBX_READ_SPARM64:
  641. case MBX_READ_RPI64:
  642. case MBX_REG_LOGIN64:
  643. case MBX_READ_LA64:
  644. case MBX_FLASH_WR_ULA:
  645. case MBX_SET_DEBUG:
  646. case MBX_LOAD_EXP_ROM:
  647. case MBX_ASYNCEVT_ENABLE:
  648. case MBX_REG_VPI:
  649. case MBX_UNREG_VPI:
  650. case MBX_HEARTBEAT:
  651. ret = mbxCommand;
  652. break;
  653. default:
  654. ret = MBX_SHUTDOWN;
  655. break;
  656. }
  657. return ret;
  658. }
  659. static void
  660. lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
  661. {
  662. wait_queue_head_t *pdone_q;
  663. unsigned long drvr_flag;
  664. /*
  665. * If pdone_q is empty, the driver thread gave up waiting and
  666. * continued running.
  667. */
  668. pmboxq->mbox_flag |= LPFC_MBX_WAKE;
  669. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  670. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  671. if (pdone_q)
  672. wake_up_interruptible(pdone_q);
  673. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  674. return;
  675. }
  676. void
  677. lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
  678. {
  679. struct lpfc_dmabuf *mp;
  680. uint16_t rpi;
  681. int rc;
  682. mp = (struct lpfc_dmabuf *) (pmb->context1);
  683. if (mp) {
  684. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  685. kfree(mp);
  686. }
  687. /*
  688. * If a REG_LOGIN succeeded after node is destroyed or node
  689. * is in re-discovery driver need to cleanup the RPI.
  690. */
  691. if (!(phba->pport->load_flag & FC_UNLOADING) &&
  692. pmb->mb.mbxCommand == MBX_REG_LOGIN64 &&
  693. !pmb->mb.mbxStatus) {
  694. rpi = pmb->mb.un.varWords[0];
  695. lpfc_unreg_login(phba, pmb->mb.un.varRegLogin.vpi, rpi, pmb);
  696. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  697. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  698. if (rc != MBX_NOT_FINISHED)
  699. return;
  700. }
  701. mempool_free(pmb, phba->mbox_mem_pool);
  702. return;
  703. }
  704. int
  705. lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
  706. {
  707. MAILBOX_t *pmbox;
  708. LPFC_MBOXQ_t *pmb;
  709. int rc;
  710. LIST_HEAD(cmplq);
  711. phba->sli.slistat.mbox_event++;
  712. /* Get all completed mailboxe buffers into the cmplq */
  713. spin_lock_irq(&phba->hbalock);
  714. list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
  715. spin_unlock_irq(&phba->hbalock);
  716. /* Get a Mailbox buffer to setup mailbox commands for callback */
  717. do {
  718. list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
  719. if (pmb == NULL)
  720. break;
  721. pmbox = &pmb->mb;
  722. if (pmbox->mbxCommand != MBX_HEARTBEAT) {
  723. if (pmb->vport) {
  724. lpfc_debugfs_disc_trc(pmb->vport,
  725. LPFC_DISC_TRC_MBOX_VPORT,
  726. "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
  727. (uint32_t)pmbox->mbxCommand,
  728. pmbox->un.varWords[0],
  729. pmbox->un.varWords[1]);
  730. }
  731. else {
  732. lpfc_debugfs_disc_trc(phba->pport,
  733. LPFC_DISC_TRC_MBOX,
  734. "MBOX cmpl: cmd:x%x mb:x%x x%x",
  735. (uint32_t)pmbox->mbxCommand,
  736. pmbox->un.varWords[0],
  737. pmbox->un.varWords[1]);
  738. }
  739. }
  740. /*
  741. * It is a fatal error if unknown mbox command completion.
  742. */
  743. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  744. MBX_SHUTDOWN) {
  745. /* Unknow mailbox command compl */
  746. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  747. "(%d):0323 Unknown Mailbox command "
  748. "%x Cmpl\n",
  749. pmb->vport ? pmb->vport->vpi : 0,
  750. pmbox->mbxCommand);
  751. phba->link_state = LPFC_HBA_ERROR;
  752. phba->work_hs = HS_FFER3;
  753. lpfc_handle_eratt(phba);
  754. continue;
  755. }
  756. if (pmbox->mbxStatus) {
  757. phba->sli.slistat.mbox_stat_err++;
  758. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  759. /* Mbox cmd cmpl error - RETRYing */
  760. lpfc_printf_log(phba, KERN_INFO,
  761. LOG_MBOX | LOG_SLI,
  762. "(%d):0305 Mbox cmd cmpl "
  763. "error - RETRYing Data: x%x "
  764. "x%x x%x x%x\n",
  765. pmb->vport ? pmb->vport->vpi :0,
  766. pmbox->mbxCommand,
  767. pmbox->mbxStatus,
  768. pmbox->un.varWords[0],
  769. pmb->vport->port_state);
  770. pmbox->mbxStatus = 0;
  771. pmbox->mbxOwner = OWN_HOST;
  772. spin_lock_irq(&phba->hbalock);
  773. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  774. spin_unlock_irq(&phba->hbalock);
  775. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  776. if (rc == MBX_SUCCESS)
  777. continue;
  778. }
  779. }
  780. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  781. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  782. "(%d):0307 Mailbox cmd x%x Cmpl x%p "
  783. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  784. pmb->vport ? pmb->vport->vpi : 0,
  785. pmbox->mbxCommand,
  786. pmb->mbox_cmpl,
  787. *((uint32_t *) pmbox),
  788. pmbox->un.varWords[0],
  789. pmbox->un.varWords[1],
  790. pmbox->un.varWords[2],
  791. pmbox->un.varWords[3],
  792. pmbox->un.varWords[4],
  793. pmbox->un.varWords[5],
  794. pmbox->un.varWords[6],
  795. pmbox->un.varWords[7]);
  796. if (pmb->mbox_cmpl)
  797. pmb->mbox_cmpl(phba,pmb);
  798. } while (1);
  799. return 0;
  800. }
  801. static struct lpfc_dmabuf *
  802. lpfc_sli_replace_hbqbuff(struct lpfc_hba *phba, uint32_t tag)
  803. {
  804. struct hbq_dmabuf *hbq_entry, *new_hbq_entry;
  805. uint32_t hbqno;
  806. void *virt; /* virtual address ptr */
  807. dma_addr_t phys; /* mapped address */
  808. hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
  809. if (hbq_entry == NULL)
  810. return NULL;
  811. list_del(&hbq_entry->dbuf.list);
  812. hbqno = tag >> 16;
  813. new_hbq_entry = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
  814. if (new_hbq_entry == NULL)
  815. return &hbq_entry->dbuf;
  816. new_hbq_entry->tag = -1;
  817. phys = new_hbq_entry->dbuf.phys;
  818. virt = new_hbq_entry->dbuf.virt;
  819. new_hbq_entry->dbuf.phys = hbq_entry->dbuf.phys;
  820. new_hbq_entry->dbuf.virt = hbq_entry->dbuf.virt;
  821. hbq_entry->dbuf.phys = phys;
  822. hbq_entry->dbuf.virt = virt;
  823. lpfc_sli_free_hbq(phba, hbq_entry);
  824. return &new_hbq_entry->dbuf;
  825. }
  826. static int
  827. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  828. struct lpfc_iocbq *saveq)
  829. {
  830. IOCB_t * irsp;
  831. WORD5 * w5p;
  832. uint32_t Rctl, Type;
  833. uint32_t match, i;
  834. match = 0;
  835. irsp = &(saveq->iocb);
  836. if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
  837. if (pring->lpfc_sli_rcv_async_status)
  838. pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
  839. else
  840. lpfc_printf_log(phba,
  841. KERN_WARNING,
  842. LOG_SLI,
  843. "0316 Ring %d handler: unexpected "
  844. "ASYNC_STATUS iocb received evt_code "
  845. "0x%x\n",
  846. pring->ringno,
  847. irsp->un.asyncstat.evt_code);
  848. return 1;
  849. }
  850. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
  851. || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)
  852. || (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)
  853. || (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX)) {
  854. Rctl = FC_ELS_REQ;
  855. Type = FC_ELS_DATA;
  856. } else {
  857. w5p =
  858. (WORD5 *) & (saveq->iocb.un.
  859. ulpWord[5]);
  860. Rctl = w5p->hcsw.Rctl;
  861. Type = w5p->hcsw.Type;
  862. /* Firmware Workaround */
  863. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  864. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
  865. irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
  866. Rctl = FC_ELS_REQ;
  867. Type = FC_ELS_DATA;
  868. w5p->hcsw.Rctl = Rctl;
  869. w5p->hcsw.Type = Type;
  870. }
  871. }
  872. if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
  873. if (irsp->ulpBdeCount != 0)
  874. saveq->context2 = lpfc_sli_replace_hbqbuff(phba,
  875. irsp->un.ulpWord[3]);
  876. if (irsp->ulpBdeCount == 2)
  877. saveq->context3 = lpfc_sli_replace_hbqbuff(phba,
  878. irsp->unsli3.sli3Words[7]);
  879. }
  880. /* unSolicited Responses */
  881. if (pring->prt[0].profile) {
  882. if (pring->prt[0].lpfc_sli_rcv_unsol_event)
  883. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
  884. saveq);
  885. match = 1;
  886. } else {
  887. /* We must search, based on rctl / type
  888. for the right routine */
  889. for (i = 0; i < pring->num_mask;
  890. i++) {
  891. if ((pring->prt[i].rctl ==
  892. Rctl)
  893. && (pring->prt[i].
  894. type == Type)) {
  895. if (pring->prt[i].lpfc_sli_rcv_unsol_event)
  896. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  897. (phba, pring, saveq);
  898. match = 1;
  899. break;
  900. }
  901. }
  902. }
  903. if (match == 0) {
  904. /* Unexpected Rctl / Type received */
  905. /* Ring <ringno> handler: unexpected
  906. Rctl <Rctl> Type <Type> received */
  907. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  908. "0313 Ring %d handler: unexpected Rctl x%x "
  909. "Type x%x received\n",
  910. pring->ringno, Rctl, Type);
  911. }
  912. return 1;
  913. }
  914. static struct lpfc_iocbq *
  915. lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
  916. struct lpfc_sli_ring *pring,
  917. struct lpfc_iocbq *prspiocb)
  918. {
  919. struct lpfc_iocbq *cmd_iocb = NULL;
  920. uint16_t iotag;
  921. iotag = prspiocb->iocb.ulpIoTag;
  922. if (iotag != 0 && iotag <= phba->sli.last_iotag) {
  923. cmd_iocb = phba->sli.iocbq_lookup[iotag];
  924. list_del_init(&cmd_iocb->list);
  925. pring->txcmplq_cnt--;
  926. return cmd_iocb;
  927. }
  928. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  929. "0317 iotag x%x is out off "
  930. "range: max iotag x%x wd0 x%x\n",
  931. iotag, phba->sli.last_iotag,
  932. *(((uint32_t *) &prspiocb->iocb) + 7));
  933. return NULL;
  934. }
  935. static int
  936. lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  937. struct lpfc_iocbq *saveq)
  938. {
  939. struct lpfc_iocbq *cmdiocbp;
  940. int rc = 1;
  941. unsigned long iflag;
  942. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  943. spin_lock_irqsave(&phba->hbalock, iflag);
  944. cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
  945. spin_unlock_irqrestore(&phba->hbalock, iflag);
  946. if (cmdiocbp) {
  947. if (cmdiocbp->iocb_cmpl) {
  948. /*
  949. * Post all ELS completions to the worker thread.
  950. * All other are passed to the completion callback.
  951. */
  952. if (pring->ringno == LPFC_ELS_RING) {
  953. if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) {
  954. cmdiocbp->iocb_flag &=
  955. ~LPFC_DRIVER_ABORTED;
  956. saveq->iocb.ulpStatus =
  957. IOSTAT_LOCAL_REJECT;
  958. saveq->iocb.un.ulpWord[4] =
  959. IOERR_SLI_ABORTED;
  960. }
  961. }
  962. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  963. } else
  964. lpfc_sli_release_iocbq(phba, cmdiocbp);
  965. } else {
  966. /*
  967. * Unknown initiating command based on the response iotag.
  968. * This could be the case on the ELS ring because of
  969. * lpfc_els_abort().
  970. */
  971. if (pring->ringno != LPFC_ELS_RING) {
  972. /*
  973. * Ring <ringno> handler: unexpected completion IoTag
  974. * <IoTag>
  975. */
  976. lpfc_printf_vlog(cmdiocbp->vport, KERN_WARNING, LOG_SLI,
  977. "0322 Ring %d handler: "
  978. "unexpected completion IoTag x%x "
  979. "Data: x%x x%x x%x x%x\n",
  980. pring->ringno,
  981. saveq->iocb.ulpIoTag,
  982. saveq->iocb.ulpStatus,
  983. saveq->iocb.un.ulpWord[4],
  984. saveq->iocb.ulpCommand,
  985. saveq->iocb.ulpContext);
  986. }
  987. }
  988. return rc;
  989. }
  990. static void
  991. lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  992. {
  993. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  994. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  995. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  996. /*
  997. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  998. * rsp ring <portRspMax>
  999. */
  1000. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1001. "0312 Ring %d handler: portRspPut %d "
  1002. "is bigger then rsp ring %d\n",
  1003. pring->ringno, le32_to_cpu(pgp->rspPutInx),
  1004. pring->numRiocb);
  1005. phba->link_state = LPFC_HBA_ERROR;
  1006. /*
  1007. * All error attention handlers are posted to
  1008. * worker thread
  1009. */
  1010. phba->work_ha |= HA_ERATT;
  1011. phba->work_hs = HS_FFER3;
  1012. /* hbalock should already be held */
  1013. if (phba->work_wait)
  1014. lpfc_worker_wake_up(phba);
  1015. return;
  1016. }
  1017. void lpfc_sli_poll_fcp_ring(struct lpfc_hba *phba)
  1018. {
  1019. struct lpfc_sli *psli = &phba->sli;
  1020. struct lpfc_sli_ring *pring = &psli->ring[LPFC_FCP_RING];
  1021. IOCB_t *irsp = NULL;
  1022. IOCB_t *entry = NULL;
  1023. struct lpfc_iocbq *cmdiocbq = NULL;
  1024. struct lpfc_iocbq rspiocbq;
  1025. struct lpfc_pgp *pgp;
  1026. uint32_t status;
  1027. uint32_t portRspPut, portRspMax;
  1028. int type;
  1029. uint32_t rsp_cmpl = 0;
  1030. uint32_t ha_copy;
  1031. unsigned long iflags;
  1032. pring->stats.iocb_event++;
  1033. pgp = (phba->sli_rev == 3) ?
  1034. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1035. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1036. /*
  1037. * The next available response entry should never exceed the maximum
  1038. * entries. If it does, treat it as an adapter hardware error.
  1039. */
  1040. portRspMax = pring->numRiocb;
  1041. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1042. if (unlikely(portRspPut >= portRspMax)) {
  1043. lpfc_sli_rsp_pointers_error(phba, pring);
  1044. return;
  1045. }
  1046. rmb();
  1047. while (pring->rspidx != portRspPut) {
  1048. entry = lpfc_resp_iocb(phba, pring);
  1049. if (++pring->rspidx >= portRspMax)
  1050. pring->rspidx = 0;
  1051. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1052. (uint32_t *) &rspiocbq.iocb,
  1053. phba->iocb_rsp_size);
  1054. irsp = &rspiocbq.iocb;
  1055. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1056. pring->stats.iocb_rsp++;
  1057. rsp_cmpl++;
  1058. if (unlikely(irsp->ulpStatus)) {
  1059. /* Rsp ring <ringno> error: IOCB */
  1060. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1061. "0326 Rsp Ring %d error: IOCB Data: "
  1062. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1063. pring->ringno,
  1064. irsp->un.ulpWord[0],
  1065. irsp->un.ulpWord[1],
  1066. irsp->un.ulpWord[2],
  1067. irsp->un.ulpWord[3],
  1068. irsp->un.ulpWord[4],
  1069. irsp->un.ulpWord[5],
  1070. *(((uint32_t *) irsp) + 6),
  1071. *(((uint32_t *) irsp) + 7));
  1072. }
  1073. switch (type) {
  1074. case LPFC_ABORT_IOCB:
  1075. case LPFC_SOL_IOCB:
  1076. /*
  1077. * Idle exchange closed via ABTS from port. No iocb
  1078. * resources need to be recovered.
  1079. */
  1080. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1081. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1082. "0314 IOCB cmd 0x%x "
  1083. "processed. Skipping "
  1084. "completion",
  1085. irsp->ulpCommand);
  1086. break;
  1087. }
  1088. spin_lock_irqsave(&phba->hbalock, iflags);
  1089. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1090. &rspiocbq);
  1091. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1092. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1093. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1094. &rspiocbq);
  1095. }
  1096. break;
  1097. default:
  1098. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1099. char adaptermsg[LPFC_MAX_ADPTMSG];
  1100. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1101. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1102. MAX_MSG_DATA);
  1103. dev_warn(&((phba->pcidev)->dev),
  1104. "lpfc%d: %s\n",
  1105. phba->brd_no, adaptermsg);
  1106. } else {
  1107. /* Unknown IOCB command */
  1108. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1109. "0321 Unknown IOCB command "
  1110. "Data: x%x, x%x x%x x%x x%x\n",
  1111. type, irsp->ulpCommand,
  1112. irsp->ulpStatus,
  1113. irsp->ulpIoTag,
  1114. irsp->ulpContext);
  1115. }
  1116. break;
  1117. }
  1118. /*
  1119. * The response IOCB has been processed. Update the ring
  1120. * pointer in SLIM. If the port response put pointer has not
  1121. * been updated, sync the pgp->rspPutInx and fetch the new port
  1122. * response put pointer.
  1123. */
  1124. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1125. if (pring->rspidx == portRspPut)
  1126. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1127. }
  1128. ha_copy = readl(phba->HAregaddr);
  1129. ha_copy >>= (LPFC_FCP_RING * 4);
  1130. if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
  1131. spin_lock_irqsave(&phba->hbalock, iflags);
  1132. pring->stats.iocb_rsp_full++;
  1133. status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
  1134. writel(status, phba->CAregaddr);
  1135. readl(phba->CAregaddr);
  1136. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1137. }
  1138. if ((ha_copy & HA_R0CE_RSP) &&
  1139. (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1140. spin_lock_irqsave(&phba->hbalock, iflags);
  1141. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1142. pring->stats.iocb_cmd_empty++;
  1143. /* Force update of the local copy of cmdGetInx */
  1144. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1145. lpfc_sli_resume_iocb(phba, pring);
  1146. if ((pring->lpfc_sli_cmd_available))
  1147. (pring->lpfc_sli_cmd_available) (phba, pring);
  1148. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1149. }
  1150. return;
  1151. }
  1152. /*
  1153. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  1154. * to check it explicitly.
  1155. */
  1156. static int
  1157. lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
  1158. struct lpfc_sli_ring *pring, uint32_t mask)
  1159. {
  1160. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1161. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1162. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1163. IOCB_t *irsp = NULL;
  1164. IOCB_t *entry = NULL;
  1165. struct lpfc_iocbq *cmdiocbq = NULL;
  1166. struct lpfc_iocbq rspiocbq;
  1167. uint32_t status;
  1168. uint32_t portRspPut, portRspMax;
  1169. int rc = 1;
  1170. lpfc_iocb_type type;
  1171. unsigned long iflag;
  1172. uint32_t rsp_cmpl = 0;
  1173. spin_lock_irqsave(&phba->hbalock, iflag);
  1174. pring->stats.iocb_event++;
  1175. /*
  1176. * The next available response entry should never exceed the maximum
  1177. * entries. If it does, treat it as an adapter hardware error.
  1178. */
  1179. portRspMax = pring->numRiocb;
  1180. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1181. if (unlikely(portRspPut >= portRspMax)) {
  1182. lpfc_sli_rsp_pointers_error(phba, pring);
  1183. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1184. return 1;
  1185. }
  1186. rmb();
  1187. while (pring->rspidx != portRspPut) {
  1188. /*
  1189. * Fetch an entry off the ring and copy it into a local data
  1190. * structure. The copy involves a byte-swap since the
  1191. * network byte order and pci byte orders are different.
  1192. */
  1193. entry = lpfc_resp_iocb(phba, pring);
  1194. phba->last_completion_time = jiffies;
  1195. if (++pring->rspidx >= portRspMax)
  1196. pring->rspidx = 0;
  1197. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1198. (uint32_t *) &rspiocbq.iocb,
  1199. phba->iocb_rsp_size);
  1200. INIT_LIST_HEAD(&(rspiocbq.list));
  1201. irsp = &rspiocbq.iocb;
  1202. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1203. pring->stats.iocb_rsp++;
  1204. rsp_cmpl++;
  1205. if (unlikely(irsp->ulpStatus)) {
  1206. /*
  1207. * If resource errors reported from HBA, reduce
  1208. * queuedepths of the SCSI device.
  1209. */
  1210. if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
  1211. (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
  1212. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1213. lpfc_adjust_queue_depth(phba);
  1214. spin_lock_irqsave(&phba->hbalock, iflag);
  1215. }
  1216. /* Rsp ring <ringno> error: IOCB */
  1217. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1218. "0336 Rsp Ring %d error: IOCB Data: "
  1219. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1220. pring->ringno,
  1221. irsp->un.ulpWord[0],
  1222. irsp->un.ulpWord[1],
  1223. irsp->un.ulpWord[2],
  1224. irsp->un.ulpWord[3],
  1225. irsp->un.ulpWord[4],
  1226. irsp->un.ulpWord[5],
  1227. *(((uint32_t *) irsp) + 6),
  1228. *(((uint32_t *) irsp) + 7));
  1229. }
  1230. switch (type) {
  1231. case LPFC_ABORT_IOCB:
  1232. case LPFC_SOL_IOCB:
  1233. /*
  1234. * Idle exchange closed via ABTS from port. No iocb
  1235. * resources need to be recovered.
  1236. */
  1237. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1238. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1239. "0333 IOCB cmd 0x%x"
  1240. " processed. Skipping"
  1241. " completion\n",
  1242. irsp->ulpCommand);
  1243. break;
  1244. }
  1245. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1246. &rspiocbq);
  1247. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1248. if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
  1249. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1250. &rspiocbq);
  1251. } else {
  1252. spin_unlock_irqrestore(&phba->hbalock,
  1253. iflag);
  1254. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1255. &rspiocbq);
  1256. spin_lock_irqsave(&phba->hbalock,
  1257. iflag);
  1258. }
  1259. }
  1260. break;
  1261. case LPFC_UNSOL_IOCB:
  1262. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1263. lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
  1264. spin_lock_irqsave(&phba->hbalock, iflag);
  1265. break;
  1266. default:
  1267. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1268. char adaptermsg[LPFC_MAX_ADPTMSG];
  1269. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1270. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1271. MAX_MSG_DATA);
  1272. dev_warn(&((phba->pcidev)->dev),
  1273. "lpfc%d: %s\n",
  1274. phba->brd_no, adaptermsg);
  1275. } else {
  1276. /* Unknown IOCB command */
  1277. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1278. "0334 Unknown IOCB command "
  1279. "Data: x%x, x%x x%x x%x x%x\n",
  1280. type, irsp->ulpCommand,
  1281. irsp->ulpStatus,
  1282. irsp->ulpIoTag,
  1283. irsp->ulpContext);
  1284. }
  1285. break;
  1286. }
  1287. /*
  1288. * The response IOCB has been processed. Update the ring
  1289. * pointer in SLIM. If the port response put pointer has not
  1290. * been updated, sync the pgp->rspPutInx and fetch the new port
  1291. * response put pointer.
  1292. */
  1293. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1294. if (pring->rspidx == portRspPut)
  1295. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1296. }
  1297. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  1298. pring->stats.iocb_rsp_full++;
  1299. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1300. writel(status, phba->CAregaddr);
  1301. readl(phba->CAregaddr);
  1302. }
  1303. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1304. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1305. pring->stats.iocb_cmd_empty++;
  1306. /* Force update of the local copy of cmdGetInx */
  1307. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1308. lpfc_sli_resume_iocb(phba, pring);
  1309. if ((pring->lpfc_sli_cmd_available))
  1310. (pring->lpfc_sli_cmd_available) (phba, pring);
  1311. }
  1312. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1313. return rc;
  1314. }
  1315. int
  1316. lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
  1317. struct lpfc_sli_ring *pring, uint32_t mask)
  1318. {
  1319. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1320. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1321. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1322. IOCB_t *entry;
  1323. IOCB_t *irsp = NULL;
  1324. struct lpfc_iocbq *rspiocbp = NULL;
  1325. struct lpfc_iocbq *next_iocb;
  1326. struct lpfc_iocbq *cmdiocbp;
  1327. struct lpfc_iocbq *saveq;
  1328. uint8_t iocb_cmd_type;
  1329. lpfc_iocb_type type;
  1330. uint32_t status, free_saveq;
  1331. uint32_t portRspPut, portRspMax;
  1332. int rc = 1;
  1333. unsigned long iflag;
  1334. spin_lock_irqsave(&phba->hbalock, iflag);
  1335. pring->stats.iocb_event++;
  1336. /*
  1337. * The next available response entry should never exceed the maximum
  1338. * entries. If it does, treat it as an adapter hardware error.
  1339. */
  1340. portRspMax = pring->numRiocb;
  1341. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1342. if (portRspPut >= portRspMax) {
  1343. /*
  1344. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1345. * rsp ring <portRspMax>
  1346. */
  1347. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1348. "0303 Ring %d handler: portRspPut %d "
  1349. "is bigger then rsp ring %d\n",
  1350. pring->ringno, portRspPut, portRspMax);
  1351. phba->link_state = LPFC_HBA_ERROR;
  1352. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1353. phba->work_hs = HS_FFER3;
  1354. lpfc_handle_eratt(phba);
  1355. return 1;
  1356. }
  1357. rmb();
  1358. while (pring->rspidx != portRspPut) {
  1359. /*
  1360. * Build a completion list and call the appropriate handler.
  1361. * The process is to get the next available response iocb, get
  1362. * a free iocb from the list, copy the response data into the
  1363. * free iocb, insert to the continuation list, and update the
  1364. * next response index to slim. This process makes response
  1365. * iocb's in the ring available to DMA as fast as possible but
  1366. * pays a penalty for a copy operation. Since the iocb is
  1367. * only 32 bytes, this penalty is considered small relative to
  1368. * the PCI reads for register values and a slim write. When
  1369. * the ulpLe field is set, the entire Command has been
  1370. * received.
  1371. */
  1372. entry = lpfc_resp_iocb(phba, pring);
  1373. phba->last_completion_time = jiffies;
  1374. rspiocbp = __lpfc_sli_get_iocbq(phba);
  1375. if (rspiocbp == NULL) {
  1376. printk(KERN_ERR "%s: out of buffers! Failing "
  1377. "completion.\n", __FUNCTION__);
  1378. break;
  1379. }
  1380. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
  1381. phba->iocb_rsp_size);
  1382. irsp = &rspiocbp->iocb;
  1383. if (++pring->rspidx >= portRspMax)
  1384. pring->rspidx = 0;
  1385. if (pring->ringno == LPFC_ELS_RING) {
  1386. lpfc_debugfs_slow_ring_trc(phba,
  1387. "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
  1388. *(((uint32_t *) irsp) + 4),
  1389. *(((uint32_t *) irsp) + 6),
  1390. *(((uint32_t *) irsp) + 7));
  1391. }
  1392. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1393. if (list_empty(&(pring->iocb_continueq))) {
  1394. list_add(&rspiocbp->list, &(pring->iocb_continueq));
  1395. } else {
  1396. list_add_tail(&rspiocbp->list,
  1397. &(pring->iocb_continueq));
  1398. }
  1399. pring->iocb_continueq_cnt++;
  1400. if (irsp->ulpLe) {
  1401. /*
  1402. * By default, the driver expects to free all resources
  1403. * associated with this iocb completion.
  1404. */
  1405. free_saveq = 1;
  1406. saveq = list_get_first(&pring->iocb_continueq,
  1407. struct lpfc_iocbq, list);
  1408. irsp = &(saveq->iocb);
  1409. list_del_init(&pring->iocb_continueq);
  1410. pring->iocb_continueq_cnt = 0;
  1411. pring->stats.iocb_rsp++;
  1412. /*
  1413. * If resource errors reported from HBA, reduce
  1414. * queuedepths of the SCSI device.
  1415. */
  1416. if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
  1417. (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
  1418. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1419. lpfc_adjust_queue_depth(phba);
  1420. spin_lock_irqsave(&phba->hbalock, iflag);
  1421. }
  1422. if (irsp->ulpStatus) {
  1423. /* Rsp ring <ringno> error: IOCB */
  1424. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1425. "0328 Rsp Ring %d error: "
  1426. "IOCB Data: "
  1427. "x%x x%x x%x x%x "
  1428. "x%x x%x x%x x%x "
  1429. "x%x x%x x%x x%x "
  1430. "x%x x%x x%x x%x\n",
  1431. pring->ringno,
  1432. irsp->un.ulpWord[0],
  1433. irsp->un.ulpWord[1],
  1434. irsp->un.ulpWord[2],
  1435. irsp->un.ulpWord[3],
  1436. irsp->un.ulpWord[4],
  1437. irsp->un.ulpWord[5],
  1438. *(((uint32_t *) irsp) + 6),
  1439. *(((uint32_t *) irsp) + 7),
  1440. *(((uint32_t *) irsp) + 8),
  1441. *(((uint32_t *) irsp) + 9),
  1442. *(((uint32_t *) irsp) + 10),
  1443. *(((uint32_t *) irsp) + 11),
  1444. *(((uint32_t *) irsp) + 12),
  1445. *(((uint32_t *) irsp) + 13),
  1446. *(((uint32_t *) irsp) + 14),
  1447. *(((uint32_t *) irsp) + 15));
  1448. }
  1449. /*
  1450. * Fetch the IOCB command type and call the correct
  1451. * completion routine. Solicited and Unsolicited
  1452. * IOCBs on the ELS ring get freed back to the
  1453. * lpfc_iocb_list by the discovery kernel thread.
  1454. */
  1455. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1456. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1457. if (type == LPFC_SOL_IOCB) {
  1458. spin_unlock_irqrestore(&phba->hbalock,
  1459. iflag);
  1460. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1461. saveq);
  1462. spin_lock_irqsave(&phba->hbalock, iflag);
  1463. } else if (type == LPFC_UNSOL_IOCB) {
  1464. spin_unlock_irqrestore(&phba->hbalock,
  1465. iflag);
  1466. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1467. saveq);
  1468. spin_lock_irqsave(&phba->hbalock, iflag);
  1469. } else if (type == LPFC_ABORT_IOCB) {
  1470. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1471. ((cmdiocbp =
  1472. lpfc_sli_iocbq_lookup(phba, pring,
  1473. saveq)))) {
  1474. /* Call the specified completion
  1475. routine */
  1476. if (cmdiocbp->iocb_cmpl) {
  1477. spin_unlock_irqrestore(
  1478. &phba->hbalock,
  1479. iflag);
  1480. (cmdiocbp->iocb_cmpl) (phba,
  1481. cmdiocbp, saveq);
  1482. spin_lock_irqsave(
  1483. &phba->hbalock,
  1484. iflag);
  1485. } else
  1486. __lpfc_sli_release_iocbq(phba,
  1487. cmdiocbp);
  1488. }
  1489. } else if (type == LPFC_UNKNOWN_IOCB) {
  1490. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1491. char adaptermsg[LPFC_MAX_ADPTMSG];
  1492. memset(adaptermsg, 0,
  1493. LPFC_MAX_ADPTMSG);
  1494. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1495. MAX_MSG_DATA);
  1496. dev_warn(&((phba->pcidev)->dev),
  1497. "lpfc%d: %s\n",
  1498. phba->brd_no, adaptermsg);
  1499. } else {
  1500. /* Unknown IOCB command */
  1501. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1502. "0335 Unknown IOCB "
  1503. "command Data: x%x "
  1504. "x%x x%x x%x\n",
  1505. irsp->ulpCommand,
  1506. irsp->ulpStatus,
  1507. irsp->ulpIoTag,
  1508. irsp->ulpContext);
  1509. }
  1510. }
  1511. if (free_saveq) {
  1512. list_for_each_entry_safe(rspiocbp, next_iocb,
  1513. &saveq->list, list) {
  1514. list_del(&rspiocbp->list);
  1515. __lpfc_sli_release_iocbq(phba,
  1516. rspiocbp);
  1517. }
  1518. __lpfc_sli_release_iocbq(phba, saveq);
  1519. }
  1520. rspiocbp = NULL;
  1521. }
  1522. /*
  1523. * If the port response put pointer has not been updated, sync
  1524. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1525. * response put pointer.
  1526. */
  1527. if (pring->rspidx == portRspPut) {
  1528. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1529. }
  1530. } /* while (pring->rspidx != portRspPut) */
  1531. if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
  1532. /* At least one response entry has been freed */
  1533. pring->stats.iocb_rsp_full++;
  1534. /* SET RxRE_RSP in Chip Att register */
  1535. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1536. writel(status, phba->CAregaddr);
  1537. readl(phba->CAregaddr); /* flush */
  1538. }
  1539. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1540. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1541. pring->stats.iocb_cmd_empty++;
  1542. /* Force update of the local copy of cmdGetInx */
  1543. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1544. lpfc_sli_resume_iocb(phba, pring);
  1545. if ((pring->lpfc_sli_cmd_available))
  1546. (pring->lpfc_sli_cmd_available) (phba, pring);
  1547. }
  1548. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1549. return rc;
  1550. }
  1551. void
  1552. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1553. {
  1554. LIST_HEAD(completions);
  1555. struct lpfc_iocbq *iocb, *next_iocb;
  1556. IOCB_t *cmd = NULL;
  1557. if (pring->ringno == LPFC_ELS_RING) {
  1558. lpfc_fabric_abort_hba(phba);
  1559. }
  1560. /* Error everything on txq and txcmplq
  1561. * First do the txq.
  1562. */
  1563. spin_lock_irq(&phba->hbalock);
  1564. list_splice_init(&pring->txq, &completions);
  1565. pring->txq_cnt = 0;
  1566. /* Next issue ABTS for everything on the txcmplq */
  1567. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
  1568. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  1569. spin_unlock_irq(&phba->hbalock);
  1570. while (!list_empty(&completions)) {
  1571. iocb = list_get_first(&completions, struct lpfc_iocbq, list);
  1572. cmd = &iocb->iocb;
  1573. list_del_init(&iocb->list);
  1574. if (!iocb->iocb_cmpl)
  1575. lpfc_sli_release_iocbq(phba, iocb);
  1576. else {
  1577. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1578. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1579. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1580. }
  1581. }
  1582. }
  1583. int
  1584. lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
  1585. {
  1586. uint32_t status;
  1587. int i = 0;
  1588. int retval = 0;
  1589. /* Read the HBA Host Status Register */
  1590. status = readl(phba->HSregaddr);
  1591. /*
  1592. * Check status register every 100ms for 5 retries, then every
  1593. * 500ms for 5, then every 2.5 sec for 5, then reset board and
  1594. * every 2.5 sec for 4.
  1595. * Break our of the loop if errors occurred during init.
  1596. */
  1597. while (((status & mask) != mask) &&
  1598. !(status & HS_FFERM) &&
  1599. i++ < 20) {
  1600. if (i <= 5)
  1601. msleep(10);
  1602. else if (i <= 10)
  1603. msleep(500);
  1604. else
  1605. msleep(2500);
  1606. if (i == 15) {
  1607. /* Do post */
  1608. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1609. lpfc_sli_brdrestart(phba);
  1610. }
  1611. /* Read the HBA Host Status Register */
  1612. status = readl(phba->HSregaddr);
  1613. }
  1614. /* Check to see if any errors occurred during init */
  1615. if ((status & HS_FFERM) || (i >= 20)) {
  1616. phba->link_state = LPFC_HBA_ERROR;
  1617. retval = 1;
  1618. }
  1619. return retval;
  1620. }
  1621. #define BARRIER_TEST_PATTERN (0xdeadbeef)
  1622. void lpfc_reset_barrier(struct lpfc_hba *phba)
  1623. {
  1624. uint32_t __iomem *resp_buf;
  1625. uint32_t __iomem *mbox_buf;
  1626. volatile uint32_t mbox;
  1627. uint32_t hc_copy;
  1628. int i;
  1629. uint8_t hdrtype;
  1630. pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
  1631. if (hdrtype != 0x80 ||
  1632. (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
  1633. FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
  1634. return;
  1635. /*
  1636. * Tell the other part of the chip to suspend temporarily all
  1637. * its DMA activity.
  1638. */
  1639. resp_buf = phba->MBslimaddr;
  1640. /* Disable the error attention */
  1641. hc_copy = readl(phba->HCregaddr);
  1642. writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
  1643. readl(phba->HCregaddr); /* flush */
  1644. phba->link_flag |= LS_IGNORE_ERATT;
  1645. if (readl(phba->HAregaddr) & HA_ERATT) {
  1646. /* Clear Chip error bit */
  1647. writel(HA_ERATT, phba->HAregaddr);
  1648. phba->pport->stopped = 1;
  1649. }
  1650. mbox = 0;
  1651. ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
  1652. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
  1653. writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
  1654. mbox_buf = phba->MBslimaddr;
  1655. writel(mbox, mbox_buf);
  1656. for (i = 0;
  1657. readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
  1658. mdelay(1);
  1659. if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
  1660. if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
  1661. phba->pport->stopped)
  1662. goto restore_hc;
  1663. else
  1664. goto clear_errat;
  1665. }
  1666. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
  1667. for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
  1668. mdelay(1);
  1669. clear_errat:
  1670. while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
  1671. mdelay(1);
  1672. if (readl(phba->HAregaddr) & HA_ERATT) {
  1673. writel(HA_ERATT, phba->HAregaddr);
  1674. phba->pport->stopped = 1;
  1675. }
  1676. restore_hc:
  1677. phba->link_flag &= ~LS_IGNORE_ERATT;
  1678. writel(hc_copy, phba->HCregaddr);
  1679. readl(phba->HCregaddr); /* flush */
  1680. }
  1681. int
  1682. lpfc_sli_brdkill(struct lpfc_hba *phba)
  1683. {
  1684. struct lpfc_sli *psli;
  1685. LPFC_MBOXQ_t *pmb;
  1686. uint32_t status;
  1687. uint32_t ha_copy;
  1688. int retval;
  1689. int i = 0;
  1690. psli = &phba->sli;
  1691. /* Kill HBA */
  1692. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1693. "0329 Kill HBA Data: x%x x%x\n",
  1694. phba->pport->port_state, psli->sli_flag);
  1695. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1696. if (!pmb)
  1697. return 1;
  1698. /* Disable the error attention */
  1699. spin_lock_irq(&phba->hbalock);
  1700. status = readl(phba->HCregaddr);
  1701. status &= ~HC_ERINT_ENA;
  1702. writel(status, phba->HCregaddr);
  1703. readl(phba->HCregaddr); /* flush */
  1704. phba->link_flag |= LS_IGNORE_ERATT;
  1705. spin_unlock_irq(&phba->hbalock);
  1706. lpfc_kill_board(phba, pmb);
  1707. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  1708. retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  1709. if (retval != MBX_SUCCESS) {
  1710. if (retval != MBX_BUSY)
  1711. mempool_free(pmb, phba->mbox_mem_pool);
  1712. spin_lock_irq(&phba->hbalock);
  1713. phba->link_flag &= ~LS_IGNORE_ERATT;
  1714. spin_unlock_irq(&phba->hbalock);
  1715. return 1;
  1716. }
  1717. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  1718. mempool_free(pmb, phba->mbox_mem_pool);
  1719. /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
  1720. * attention every 100ms for 3 seconds. If we don't get ERATT after
  1721. * 3 seconds we still set HBA_ERROR state because the status of the
  1722. * board is now undefined.
  1723. */
  1724. ha_copy = readl(phba->HAregaddr);
  1725. while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
  1726. mdelay(100);
  1727. ha_copy = readl(phba->HAregaddr);
  1728. }
  1729. del_timer_sync(&psli->mbox_tmo);
  1730. if (ha_copy & HA_ERATT) {
  1731. writel(HA_ERATT, phba->HAregaddr);
  1732. phba->pport->stopped = 1;
  1733. }
  1734. spin_lock_irq(&phba->hbalock);
  1735. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1736. phba->link_flag &= ~LS_IGNORE_ERATT;
  1737. spin_unlock_irq(&phba->hbalock);
  1738. psli->mbox_active = NULL;
  1739. lpfc_hba_down_post(phba);
  1740. phba->link_state = LPFC_HBA_ERROR;
  1741. return ha_copy & HA_ERATT ? 0 : 1;
  1742. }
  1743. int
  1744. lpfc_sli_brdreset(struct lpfc_hba *phba)
  1745. {
  1746. struct lpfc_sli *psli;
  1747. struct lpfc_sli_ring *pring;
  1748. uint16_t cfg_value;
  1749. int i;
  1750. psli = &phba->sli;
  1751. /* Reset HBA */
  1752. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1753. "0325 Reset HBA Data: x%x x%x\n",
  1754. phba->pport->port_state, psli->sli_flag);
  1755. /* perform board reset */
  1756. phba->fc_eventTag = 0;
  1757. phba->pport->fc_myDID = 0;
  1758. phba->pport->fc_prevDID = 0;
  1759. /* Turn off parity checking and serr during the physical reset */
  1760. pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
  1761. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1762. (cfg_value &
  1763. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1764. psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
  1765. /* Now toggle INITFF bit in the Host Control Register */
  1766. writel(HC_INITFF, phba->HCregaddr);
  1767. mdelay(1);
  1768. readl(phba->HCregaddr); /* flush */
  1769. writel(0, phba->HCregaddr);
  1770. readl(phba->HCregaddr); /* flush */
  1771. /* Restore PCI cmd register */
  1772. pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
  1773. /* Initialize relevant SLI info */
  1774. for (i = 0; i < psli->num_rings; i++) {
  1775. pring = &psli->ring[i];
  1776. pring->flag = 0;
  1777. pring->rspidx = 0;
  1778. pring->next_cmdidx = 0;
  1779. pring->local_getidx = 0;
  1780. pring->cmdidx = 0;
  1781. pring->missbufcnt = 0;
  1782. }
  1783. phba->link_state = LPFC_WARM_START;
  1784. return 0;
  1785. }
  1786. int
  1787. lpfc_sli_brdrestart(struct lpfc_hba *phba)
  1788. {
  1789. MAILBOX_t *mb;
  1790. struct lpfc_sli *psli;
  1791. uint16_t skip_post;
  1792. volatile uint32_t word0;
  1793. void __iomem *to_slim;
  1794. spin_lock_irq(&phba->hbalock);
  1795. psli = &phba->sli;
  1796. /* Restart HBA */
  1797. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1798. "0337 Restart HBA Data: x%x x%x\n",
  1799. phba->pport->port_state, psli->sli_flag);
  1800. word0 = 0;
  1801. mb = (MAILBOX_t *) &word0;
  1802. mb->mbxCommand = MBX_RESTART;
  1803. mb->mbxHc = 1;
  1804. lpfc_reset_barrier(phba);
  1805. to_slim = phba->MBslimaddr;
  1806. writel(*(uint32_t *) mb, to_slim);
  1807. readl(to_slim); /* flush */
  1808. /* Only skip post after fc_ffinit is completed */
  1809. if (phba->pport->port_state) {
  1810. skip_post = 1;
  1811. word0 = 1; /* This is really setting up word1 */
  1812. } else {
  1813. skip_post = 0;
  1814. word0 = 0; /* This is really setting up word1 */
  1815. }
  1816. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1817. writel(*(uint32_t *) mb, to_slim);
  1818. readl(to_slim); /* flush */
  1819. lpfc_sli_brdreset(phba);
  1820. phba->pport->stopped = 0;
  1821. phba->link_state = LPFC_INIT_START;
  1822. spin_unlock_irq(&phba->hbalock);
  1823. memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
  1824. psli->stats_start = get_seconds();
  1825. if (skip_post)
  1826. mdelay(100);
  1827. else
  1828. mdelay(2000);
  1829. lpfc_hba_down_post(phba);
  1830. return 0;
  1831. }
  1832. static int
  1833. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1834. {
  1835. uint32_t status, i = 0;
  1836. /* Read the HBA Host Status Register */
  1837. status = readl(phba->HSregaddr);
  1838. /* Check status register to see what current state is */
  1839. i = 0;
  1840. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1841. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1842. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1843. * 4.
  1844. */
  1845. if (i++ >= 20) {
  1846. /* Adapter failed to init, timeout, status reg
  1847. <status> */
  1848. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1849. "0436 Adapter failed to init, "
  1850. "timeout, status reg x%x\n", status);
  1851. phba->link_state = LPFC_HBA_ERROR;
  1852. return -ETIMEDOUT;
  1853. }
  1854. /* Check to see if any errors occurred during init */
  1855. if (status & HS_FFERM) {
  1856. /* ERROR: During chipset initialization */
  1857. /* Adapter failed to init, chipset, status reg
  1858. <status> */
  1859. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1860. "0437 Adapter failed to init, "
  1861. "chipset, status reg x%x\n", status);
  1862. phba->link_state = LPFC_HBA_ERROR;
  1863. return -EIO;
  1864. }
  1865. if (i <= 5) {
  1866. msleep(10);
  1867. } else if (i <= 10) {
  1868. msleep(500);
  1869. } else {
  1870. msleep(2500);
  1871. }
  1872. if (i == 15) {
  1873. /* Do post */
  1874. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1875. lpfc_sli_brdrestart(phba);
  1876. }
  1877. /* Read the HBA Host Status Register */
  1878. status = readl(phba->HSregaddr);
  1879. }
  1880. /* Check to see if any errors occurred during init */
  1881. if (status & HS_FFERM) {
  1882. /* ERROR: During chipset initialization */
  1883. /* Adapter failed to init, chipset, status reg <status> */
  1884. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1885. "0438 Adapter failed to init, chipset, "
  1886. "status reg x%x\n", status);
  1887. phba->link_state = LPFC_HBA_ERROR;
  1888. return -EIO;
  1889. }
  1890. /* Clear all interrupt enable conditions */
  1891. writel(0, phba->HCregaddr);
  1892. readl(phba->HCregaddr); /* flush */
  1893. /* setup host attn register */
  1894. writel(0xffffffff, phba->HAregaddr);
  1895. readl(phba->HAregaddr); /* flush */
  1896. return 0;
  1897. }
  1898. int
  1899. lpfc_sli_hbq_count(void)
  1900. {
  1901. return ARRAY_SIZE(lpfc_hbq_defs);
  1902. }
  1903. static int
  1904. lpfc_sli_hbq_entry_count(void)
  1905. {
  1906. int hbq_count = lpfc_sli_hbq_count();
  1907. int count = 0;
  1908. int i;
  1909. for (i = 0; i < hbq_count; ++i)
  1910. count += lpfc_hbq_defs[i]->entry_count;
  1911. return count;
  1912. }
  1913. int
  1914. lpfc_sli_hbq_size(void)
  1915. {
  1916. return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
  1917. }
  1918. static int
  1919. lpfc_sli_hbq_setup(struct lpfc_hba *phba)
  1920. {
  1921. int hbq_count = lpfc_sli_hbq_count();
  1922. LPFC_MBOXQ_t *pmb;
  1923. MAILBOX_t *pmbox;
  1924. uint32_t hbqno;
  1925. uint32_t hbq_entry_index;
  1926. /* Get a Mailbox buffer to setup mailbox
  1927. * commands for HBA initialization
  1928. */
  1929. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1930. if (!pmb)
  1931. return -ENOMEM;
  1932. pmbox = &pmb->mb;
  1933. /* Initialize the struct lpfc_sli_hbq structure for each hbq */
  1934. phba->link_state = LPFC_INIT_MBX_CMDS;
  1935. hbq_entry_index = 0;
  1936. for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
  1937. phba->hbqs[hbqno].next_hbqPutIdx = 0;
  1938. phba->hbqs[hbqno].hbqPutIdx = 0;
  1939. phba->hbqs[hbqno].local_hbqGetIdx = 0;
  1940. phba->hbqs[hbqno].entry_count =
  1941. lpfc_hbq_defs[hbqno]->entry_count;
  1942. lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
  1943. hbq_entry_index, pmb);
  1944. hbq_entry_index += phba->hbqs[hbqno].entry_count;
  1945. if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
  1946. /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
  1947. mbxStatus <status>, ring <num> */
  1948. lpfc_printf_log(phba, KERN_ERR,
  1949. LOG_SLI | LOG_VPORT,
  1950. "1805 Adapter failed to init. "
  1951. "Data: x%x x%x x%x\n",
  1952. pmbox->mbxCommand,
  1953. pmbox->mbxStatus, hbqno);
  1954. phba->link_state = LPFC_HBA_ERROR;
  1955. mempool_free(pmb, phba->mbox_mem_pool);
  1956. return ENXIO;
  1957. }
  1958. }
  1959. phba->hbq_count = hbq_count;
  1960. mempool_free(pmb, phba->mbox_mem_pool);
  1961. /* Initially populate or replenish the HBQs */
  1962. for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
  1963. if (lpfc_sli_hbqbuf_init_hbqs(phba, hbqno))
  1964. return -ENOMEM;
  1965. }
  1966. return 0;
  1967. }
  1968. static int
  1969. lpfc_do_config_port(struct lpfc_hba *phba, int sli_mode)
  1970. {
  1971. LPFC_MBOXQ_t *pmb;
  1972. uint32_t resetcount = 0, rc = 0, done = 0;
  1973. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1974. if (!pmb) {
  1975. phba->link_state = LPFC_HBA_ERROR;
  1976. return -ENOMEM;
  1977. }
  1978. phba->sli_rev = sli_mode;
  1979. while (resetcount < 2 && !done) {
  1980. spin_lock_irq(&phba->hbalock);
  1981. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1982. spin_unlock_irq(&phba->hbalock);
  1983. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1984. lpfc_sli_brdrestart(phba);
  1985. msleep(2500);
  1986. rc = lpfc_sli_chipset_init(phba);
  1987. if (rc)
  1988. break;
  1989. spin_lock_irq(&phba->hbalock);
  1990. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1991. spin_unlock_irq(&phba->hbalock);
  1992. resetcount++;
  1993. /* Call pre CONFIG_PORT mailbox command initialization. A
  1994. * value of 0 means the call was successful. Any other
  1995. * nonzero value is a failure, but if ERESTART is returned,
  1996. * the driver may reset the HBA and try again.
  1997. */
  1998. rc = lpfc_config_port_prep(phba);
  1999. if (rc == -ERESTART) {
  2000. phba->link_state = LPFC_LINK_UNKNOWN;
  2001. continue;
  2002. } else if (rc) {
  2003. break;
  2004. }
  2005. phba->link_state = LPFC_INIT_MBX_CMDS;
  2006. lpfc_config_port(phba, pmb);
  2007. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  2008. if (rc != MBX_SUCCESS) {
  2009. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2010. "0442 Adapter failed to init, mbxCmd x%x "
  2011. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  2012. pmb->mb.mbxCommand, pmb->mb.mbxStatus, 0);
  2013. spin_lock_irq(&phba->hbalock);
  2014. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  2015. spin_unlock_irq(&phba->hbalock);
  2016. rc = -ENXIO;
  2017. } else {
  2018. done = 1;
  2019. phba->max_vpi = (phba->max_vpi &&
  2020. pmb->mb.un.varCfgPort.gmv) != 0
  2021. ? pmb->mb.un.varCfgPort.max_vpi
  2022. : 0;
  2023. }
  2024. }
  2025. if (!done) {
  2026. rc = -EINVAL;
  2027. goto do_prep_failed;
  2028. }
  2029. if ((pmb->mb.un.varCfgPort.sli_mode == 3) &&
  2030. (!pmb->mb.un.varCfgPort.cMA)) {
  2031. rc = -ENXIO;
  2032. goto do_prep_failed;
  2033. }
  2034. return rc;
  2035. do_prep_failed:
  2036. mempool_free(pmb, phba->mbox_mem_pool);
  2037. return rc;
  2038. }
  2039. int
  2040. lpfc_sli_hba_setup(struct lpfc_hba *phba)
  2041. {
  2042. uint32_t rc;
  2043. int mode = 3;
  2044. switch (lpfc_sli_mode) {
  2045. case 2:
  2046. if (phba->cfg_enable_npiv) {
  2047. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2048. "1824 NPIV enabled: Override lpfc_sli_mode "
  2049. "parameter (%d) to auto (0).\n",
  2050. lpfc_sli_mode);
  2051. break;
  2052. }
  2053. mode = 2;
  2054. break;
  2055. case 0:
  2056. case 3:
  2057. break;
  2058. default:
  2059. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2060. "1819 Unrecognized lpfc_sli_mode "
  2061. "parameter: %d.\n", lpfc_sli_mode);
  2062. break;
  2063. }
  2064. rc = lpfc_do_config_port(phba, mode);
  2065. if (rc && lpfc_sli_mode == 3)
  2066. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2067. "1820 Unable to select SLI-3. "
  2068. "Not supported by adapter.\n");
  2069. if (rc && mode != 2)
  2070. rc = lpfc_do_config_port(phba, 2);
  2071. if (rc)
  2072. goto lpfc_sli_hba_setup_error;
  2073. if (phba->sli_rev == 3) {
  2074. phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
  2075. phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
  2076. phba->sli3_options |= LPFC_SLI3_ENABLED;
  2077. phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
  2078. } else {
  2079. phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
  2080. phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
  2081. phba->sli3_options = 0;
  2082. }
  2083. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  2084. "0444 Firmware in SLI %x mode. Max_vpi %d\n",
  2085. phba->sli_rev, phba->max_vpi);
  2086. rc = lpfc_sli_ring_map(phba);
  2087. if (rc)
  2088. goto lpfc_sli_hba_setup_error;
  2089. /* Init HBQs */
  2090. if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
  2091. rc = lpfc_sli_hbq_setup(phba);
  2092. if (rc)
  2093. goto lpfc_sli_hba_setup_error;
  2094. }
  2095. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  2096. rc = lpfc_config_port_post(phba);
  2097. if (rc)
  2098. goto lpfc_sli_hba_setup_error;
  2099. return rc;
  2100. lpfc_sli_hba_setup_error:
  2101. phba->link_state = LPFC_HBA_ERROR;
  2102. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  2103. "0445 Firmware initialization failed\n");
  2104. return rc;
  2105. }
  2106. /*! lpfc_mbox_timeout
  2107. *
  2108. * \pre
  2109. * \post
  2110. * \param hba Pointer to per struct lpfc_hba structure
  2111. * \param l1 Pointer to the driver's mailbox queue.
  2112. * \return
  2113. * void
  2114. *
  2115. * \b Description:
  2116. *
  2117. * This routine handles mailbox timeout events at timer interrupt context.
  2118. */
  2119. void
  2120. lpfc_mbox_timeout(unsigned long ptr)
  2121. {
  2122. struct lpfc_hba *phba = (struct lpfc_hba *) ptr;
  2123. unsigned long iflag;
  2124. uint32_t tmo_posted;
  2125. spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
  2126. tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
  2127. if (!tmo_posted)
  2128. phba->pport->work_port_events |= WORKER_MBOX_TMO;
  2129. spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
  2130. if (!tmo_posted) {
  2131. spin_lock_irqsave(&phba->hbalock, iflag);
  2132. if (phba->work_wait)
  2133. lpfc_worker_wake_up(phba);
  2134. spin_unlock_irqrestore(&phba->hbalock, iflag);
  2135. }
  2136. }
  2137. void
  2138. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  2139. {
  2140. LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
  2141. MAILBOX_t *mb = &pmbox->mb;
  2142. struct lpfc_sli *psli = &phba->sli;
  2143. struct lpfc_sli_ring *pring;
  2144. if (!(phba->pport->work_port_events & WORKER_MBOX_TMO)) {
  2145. return;
  2146. }
  2147. /* Mbox cmd <mbxCommand> timeout */
  2148. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  2149. "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
  2150. mb->mbxCommand,
  2151. phba->pport->port_state,
  2152. phba->sli.sli_flag,
  2153. phba->sli.mbox_active);
  2154. /* Setting state unknown so lpfc_sli_abort_iocb_ring
  2155. * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
  2156. * it to fail all oustanding SCSI IO.
  2157. */
  2158. spin_lock_irq(&phba->pport->work_port_lock);
  2159. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  2160. spin_unlock_irq(&phba->pport->work_port_lock);
  2161. spin_lock_irq(&phba->hbalock);
  2162. phba->link_state = LPFC_LINK_UNKNOWN;
  2163. phba->pport->fc_flag |= FC_ESTABLISH_LINK;
  2164. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  2165. spin_unlock_irq(&phba->hbalock);
  2166. pring = &psli->ring[psli->fcp_ring];
  2167. lpfc_sli_abort_iocb_ring(phba, pring);
  2168. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  2169. "0316 Resetting board due to mailbox timeout\n");
  2170. /*
  2171. * lpfc_offline calls lpfc_sli_hba_down which will clean up
  2172. * on oustanding mailbox commands.
  2173. */
  2174. lpfc_offline_prep(phba);
  2175. lpfc_offline(phba);
  2176. lpfc_sli_brdrestart(phba);
  2177. if (lpfc_online(phba) == 0) /* Initialize the HBA */
  2178. mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
  2179. lpfc_unblock_mgmt_io(phba);
  2180. return;
  2181. }
  2182. int
  2183. lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
  2184. {
  2185. MAILBOX_t *mb;
  2186. struct lpfc_sli *psli = &phba->sli;
  2187. uint32_t status, evtctr;
  2188. uint32_t ha_copy;
  2189. int i;
  2190. unsigned long drvr_flag = 0;
  2191. volatile uint32_t word0, ldata;
  2192. void __iomem *to_slim;
  2193. if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
  2194. pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
  2195. if(!pmbox->vport) {
  2196. lpfc_printf_log(phba, KERN_ERR,
  2197. LOG_MBOX | LOG_VPORT,
  2198. "1806 Mbox x%x failed. No vport\n",
  2199. pmbox->mb.mbxCommand);
  2200. dump_stack();
  2201. return MBXERR_ERROR;
  2202. }
  2203. }
  2204. /* If the PCI channel is in offline state, do not post mbox. */
  2205. if (unlikely(pci_channel_offline(phba->pcidev)))
  2206. return MBX_NOT_FINISHED;
  2207. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  2208. psli = &phba->sli;
  2209. mb = &pmbox->mb;
  2210. status = MBX_SUCCESS;
  2211. if (phba->link_state == LPFC_HBA_ERROR) {
  2212. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2213. /* Mbox command <mbxCommand> cannot issue */
  2214. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
  2215. return MBX_NOT_FINISHED;
  2216. }
  2217. if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
  2218. !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
  2219. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2220. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
  2221. return MBX_NOT_FINISHED;
  2222. }
  2223. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  2224. /* Polling for a mbox command when another one is already active
  2225. * is not allowed in SLI. Also, the driver must have established
  2226. * SLI2 mode to queue and process multiple mbox commands.
  2227. */
  2228. if (flag & MBX_POLL) {
  2229. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2230. /* Mbox command <mbxCommand> cannot issue */
  2231. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2232. return MBX_NOT_FINISHED;
  2233. }
  2234. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  2235. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2236. /* Mbox command <mbxCommand> cannot issue */
  2237. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2238. return MBX_NOT_FINISHED;
  2239. }
  2240. /* Another mailbox command is still being processed, queue this
  2241. * command to be processed later.
  2242. */
  2243. lpfc_mbox_put(phba, pmbox);
  2244. /* Mbox cmd issue - BUSY */
  2245. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  2246. "(%d):0308 Mbox cmd issue - BUSY Data: "
  2247. "x%x x%x x%x x%x\n",
  2248. pmbox->vport ? pmbox->vport->vpi : 0xffffff,
  2249. mb->mbxCommand, phba->pport->port_state,
  2250. psli->sli_flag, flag);
  2251. psli->slistat.mbox_busy++;
  2252. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2253. if (pmbox->vport) {
  2254. lpfc_debugfs_disc_trc(pmbox->vport,
  2255. LPFC_DISC_TRC_MBOX_VPORT,
  2256. "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
  2257. (uint32_t)mb->mbxCommand,
  2258. mb->un.varWords[0], mb->un.varWords[1]);
  2259. }
  2260. else {
  2261. lpfc_debugfs_disc_trc(phba->pport,
  2262. LPFC_DISC_TRC_MBOX,
  2263. "MBOX Bsy: cmd:x%x mb:x%x x%x",
  2264. (uint32_t)mb->mbxCommand,
  2265. mb->un.varWords[0], mb->un.varWords[1]);
  2266. }
  2267. return MBX_BUSY;
  2268. }
  2269. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  2270. /* If we are not polling, we MUST be in SLI2 mode */
  2271. if (flag != MBX_POLL) {
  2272. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
  2273. (mb->mbxCommand != MBX_KILL_BOARD)) {
  2274. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2275. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2276. /* Mbox command <mbxCommand> cannot issue */
  2277. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2278. return MBX_NOT_FINISHED;
  2279. }
  2280. /* timeout active mbox command */
  2281. mod_timer(&psli->mbox_tmo, (jiffies +
  2282. (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
  2283. }
  2284. /* Mailbox cmd <cmd> issue */
  2285. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  2286. "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
  2287. "x%x\n",
  2288. pmbox->vport ? pmbox->vport->vpi : 0,
  2289. mb->mbxCommand, phba->pport->port_state,
  2290. psli->sli_flag, flag);
  2291. if (mb->mbxCommand != MBX_HEARTBEAT) {
  2292. if (pmbox->vport) {
  2293. lpfc_debugfs_disc_trc(pmbox->vport,
  2294. LPFC_DISC_TRC_MBOX_VPORT,
  2295. "MBOX Send vport: cmd:x%x mb:x%x x%x",
  2296. (uint32_t)mb->mbxCommand,
  2297. mb->un.varWords[0], mb->un.varWords[1]);
  2298. }
  2299. else {
  2300. lpfc_debugfs_disc_trc(phba->pport,
  2301. LPFC_DISC_TRC_MBOX,
  2302. "MBOX Send: cmd:x%x mb:x%x x%x",
  2303. (uint32_t)mb->mbxCommand,
  2304. mb->un.varWords[0], mb->un.varWords[1]);
  2305. }
  2306. }
  2307. psli->slistat.mbox_cmd++;
  2308. evtctr = psli->slistat.mbox_event;
  2309. /* next set own bit for the adapter and copy over command word */
  2310. mb->mbxOwner = OWN_CHIP;
  2311. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2312. /* First copy command data to host SLIM area */
  2313. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
  2314. } else {
  2315. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2316. /* copy command data into host mbox for cmpl */
  2317. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
  2318. MAILBOX_CMD_SIZE);
  2319. }
  2320. /* First copy mbox command data to HBA SLIM, skip past first
  2321. word */
  2322. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  2323. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  2324. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  2325. /* Next copy over first word, with mbxOwner set */
  2326. ldata = *((volatile uint32_t *)mb);
  2327. to_slim = phba->MBslimaddr;
  2328. writel(ldata, to_slim);
  2329. readl(to_slim); /* flush */
  2330. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2331. /* switch over to host mailbox */
  2332. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  2333. }
  2334. }
  2335. wmb();
  2336. /* interrupt board to doit right away */
  2337. writel(CA_MBATT, phba->CAregaddr);
  2338. readl(phba->CAregaddr); /* flush */
  2339. switch (flag) {
  2340. case MBX_NOWAIT:
  2341. /* Don't wait for it to finish, just return */
  2342. psli->mbox_active = pmbox;
  2343. break;
  2344. case MBX_POLL:
  2345. psli->mbox_active = NULL;
  2346. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2347. /* First read mbox status word */
  2348. word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
  2349. word0 = le32_to_cpu(word0);
  2350. } else {
  2351. /* First read mbox status word */
  2352. word0 = readl(phba->MBslimaddr);
  2353. }
  2354. /* Read the HBA Host Attention Register */
  2355. ha_copy = readl(phba->HAregaddr);
  2356. i = lpfc_mbox_tmo_val(phba, mb->mbxCommand);
  2357. i *= 1000; /* Convert to ms */
  2358. /* Wait for command to complete */
  2359. while (((word0 & OWN_CHIP) == OWN_CHIP) ||
  2360. (!(ha_copy & HA_MBATT) &&
  2361. (phba->link_state > LPFC_WARM_START))) {
  2362. if (i-- <= 0) {
  2363. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2364. spin_unlock_irqrestore(&phba->hbalock,
  2365. drvr_flag);
  2366. return MBX_NOT_FINISHED;
  2367. }
  2368. /* Check if we took a mbox interrupt while we were
  2369. polling */
  2370. if (((word0 & OWN_CHIP) != OWN_CHIP)
  2371. && (evtctr != psli->slistat.mbox_event))
  2372. break;
  2373. spin_unlock_irqrestore(&phba->hbalock,
  2374. drvr_flag);
  2375. msleep(1);
  2376. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  2377. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2378. /* First copy command data */
  2379. word0 = *((volatile uint32_t *)
  2380. &phba->slim2p->mbx);
  2381. word0 = le32_to_cpu(word0);
  2382. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2383. MAILBOX_t *slimmb;
  2384. volatile uint32_t slimword0;
  2385. /* Check real SLIM for any errors */
  2386. slimword0 = readl(phba->MBslimaddr);
  2387. slimmb = (MAILBOX_t *) & slimword0;
  2388. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  2389. && slimmb->mbxStatus) {
  2390. psli->sli_flag &=
  2391. ~LPFC_SLI2_ACTIVE;
  2392. word0 = slimword0;
  2393. }
  2394. }
  2395. } else {
  2396. /* First copy command data */
  2397. word0 = readl(phba->MBslimaddr);
  2398. }
  2399. /* Read the HBA Host Attention Register */
  2400. ha_copy = readl(phba->HAregaddr);
  2401. }
  2402. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2403. /* copy results back to user */
  2404. lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
  2405. MAILBOX_CMD_SIZE);
  2406. } else {
  2407. /* First copy command data */
  2408. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  2409. MAILBOX_CMD_SIZE);
  2410. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  2411. pmbox->context2) {
  2412. lpfc_memcpy_from_slim((void *)pmbox->context2,
  2413. phba->MBslimaddr + DMP_RSP_OFFSET,
  2414. mb->un.varDmp.word_cnt);
  2415. }
  2416. }
  2417. writel(HA_MBATT, phba->HAregaddr);
  2418. readl(phba->HAregaddr); /* flush */
  2419. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2420. status = mb->mbxStatus;
  2421. }
  2422. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2423. return status;
  2424. }
  2425. /*
  2426. * Caller needs to hold lock.
  2427. */
  2428. static void
  2429. __lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2430. struct lpfc_iocbq *piocb)
  2431. {
  2432. /* Insert the caller's iocb in the txq tail for later processing. */
  2433. list_add_tail(&piocb->list, &pring->txq);
  2434. pring->txq_cnt++;
  2435. }
  2436. static struct lpfc_iocbq *
  2437. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2438. struct lpfc_iocbq **piocb)
  2439. {
  2440. struct lpfc_iocbq * nextiocb;
  2441. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  2442. if (!nextiocb) {
  2443. nextiocb = *piocb;
  2444. *piocb = NULL;
  2445. }
  2446. return nextiocb;
  2447. }
  2448. /*
  2449. * Lockless version of lpfc_sli_issue_iocb.
  2450. */
  2451. static int
  2452. __lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2453. struct lpfc_iocbq *piocb, uint32_t flag)
  2454. {
  2455. struct lpfc_iocbq *nextiocb;
  2456. IOCB_t *iocb;
  2457. if (piocb->iocb_cmpl && (!piocb->vport) &&
  2458. (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
  2459. (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
  2460. lpfc_printf_log(phba, KERN_ERR,
  2461. LOG_SLI | LOG_VPORT,
  2462. "1807 IOCB x%x failed. No vport\n",
  2463. piocb->iocb.ulpCommand);
  2464. dump_stack();
  2465. return IOCB_ERROR;
  2466. }
  2467. /* If the PCI channel is in offline state, do not post iocbs. */
  2468. if (unlikely(pci_channel_offline(phba->pcidev)))
  2469. return IOCB_ERROR;
  2470. /*
  2471. * We should never get an IOCB if we are in a < LINK_DOWN state
  2472. */
  2473. if (unlikely(phba->link_state < LPFC_LINK_DOWN))
  2474. return IOCB_ERROR;
  2475. /*
  2476. * Check to see if we are blocking IOCB processing because of a
  2477. * outstanding event.
  2478. */
  2479. if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
  2480. goto iocb_busy;
  2481. if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
  2482. /*
  2483. * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
  2484. * can be issued if the link is not up.
  2485. */
  2486. switch (piocb->iocb.ulpCommand) {
  2487. case CMD_QUE_RING_BUF_CN:
  2488. case CMD_QUE_RING_BUF64_CN:
  2489. /*
  2490. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  2491. * completion, iocb_cmpl MUST be 0.
  2492. */
  2493. if (piocb->iocb_cmpl)
  2494. piocb->iocb_cmpl = NULL;
  2495. /*FALLTHROUGH*/
  2496. case CMD_CREATE_XRI_CR:
  2497. case CMD_CLOSE_XRI_CN:
  2498. case CMD_CLOSE_XRI_CX:
  2499. break;
  2500. default:
  2501. goto iocb_busy;
  2502. }
  2503. /*
  2504. * For FCP commands, we must be in a state where we can process link
  2505. * attention events.
  2506. */
  2507. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  2508. !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
  2509. goto iocb_busy;
  2510. }
  2511. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  2512. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  2513. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  2514. if (iocb)
  2515. lpfc_sli_update_ring(phba, pring);
  2516. else
  2517. lpfc_sli_update_full_ring(phba, pring);
  2518. if (!piocb)
  2519. return IOCB_SUCCESS;
  2520. goto out_busy;
  2521. iocb_busy:
  2522. pring->stats.iocb_cmd_delay++;
  2523. out_busy:
  2524. if (!(flag & SLI_IOCB_RET_IOCB)) {
  2525. __lpfc_sli_ringtx_put(phba, pring, piocb);
  2526. return IOCB_SUCCESS;
  2527. }
  2528. return IOCB_BUSY;
  2529. }
  2530. int
  2531. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2532. struct lpfc_iocbq *piocb, uint32_t flag)
  2533. {
  2534. unsigned long iflags;
  2535. int rc;
  2536. spin_lock_irqsave(&phba->hbalock, iflags);
  2537. rc = __lpfc_sli_issue_iocb(phba, pring, piocb, flag);
  2538. spin_unlock_irqrestore(&phba->hbalock, iflags);
  2539. return rc;
  2540. }
  2541. static int
  2542. lpfc_extra_ring_setup( struct lpfc_hba *phba)
  2543. {
  2544. struct lpfc_sli *psli;
  2545. struct lpfc_sli_ring *pring;
  2546. psli = &phba->sli;
  2547. /* Adjust cmd/rsp ring iocb entries more evenly */
  2548. /* Take some away from the FCP ring */
  2549. pring = &psli->ring[psli->fcp_ring];
  2550. pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2551. pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2552. pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2553. pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2554. /* and give them to the extra ring */
  2555. pring = &psli->ring[psli->extra_ring];
  2556. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2557. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2558. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2559. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2560. /* Setup default profile for this ring */
  2561. pring->iotag_max = 4096;
  2562. pring->num_mask = 1;
  2563. pring->prt[0].profile = 0; /* Mask 0 */
  2564. pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
  2565. pring->prt[0].type = phba->cfg_multi_ring_type;
  2566. pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
  2567. return 0;
  2568. }
  2569. static void
  2570. lpfc_sli_async_event_handler(struct lpfc_hba * phba,
  2571. struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
  2572. {
  2573. IOCB_t *icmd;
  2574. uint16_t evt_code;
  2575. uint16_t temp;
  2576. struct temp_event temp_event_data;
  2577. struct Scsi_Host *shost;
  2578. icmd = &iocbq->iocb;
  2579. evt_code = icmd->un.asyncstat.evt_code;
  2580. temp = icmd->ulpContext;
  2581. if ((evt_code != ASYNC_TEMP_WARN) &&
  2582. (evt_code != ASYNC_TEMP_SAFE)) {
  2583. lpfc_printf_log(phba,
  2584. KERN_ERR,
  2585. LOG_SLI,
  2586. "0327 Ring %d handler: unexpected ASYNC_STATUS"
  2587. " evt_code 0x%x\n",
  2588. pring->ringno,
  2589. icmd->un.asyncstat.evt_code);
  2590. return;
  2591. }
  2592. temp_event_data.data = (uint32_t)temp;
  2593. temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
  2594. if (evt_code == ASYNC_TEMP_WARN) {
  2595. temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
  2596. lpfc_printf_log(phba,
  2597. KERN_WARNING,
  2598. LOG_TEMP,
  2599. "0339 Adapter is very hot, please take "
  2600. "corrective action. temperature : %d Celsius\n",
  2601. temp);
  2602. }
  2603. if (evt_code == ASYNC_TEMP_SAFE) {
  2604. temp_event_data.event_code = LPFC_NORMAL_TEMP;
  2605. lpfc_printf_log(phba,
  2606. KERN_INFO,
  2607. LOG_TEMP,
  2608. "0340 Adapter temperature is OK now. "
  2609. "temperature : %d Celsius\n",
  2610. temp);
  2611. }
  2612. /* Send temperature change event to applications */
  2613. shost = lpfc_shost_from_vport(phba->pport);
  2614. fc_host_post_vendor_event(shost, fc_get_event_number(),
  2615. sizeof(temp_event_data), (char *) &temp_event_data,
  2616. SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
  2617. }
  2618. int
  2619. lpfc_sli_setup(struct lpfc_hba *phba)
  2620. {
  2621. int i, totiocbsize = 0;
  2622. struct lpfc_sli *psli = &phba->sli;
  2623. struct lpfc_sli_ring *pring;
  2624. psli->num_rings = MAX_CONFIGURED_RINGS;
  2625. psli->sli_flag = 0;
  2626. psli->fcp_ring = LPFC_FCP_RING;
  2627. psli->next_ring = LPFC_FCP_NEXT_RING;
  2628. psli->extra_ring = LPFC_EXTRA_RING;
  2629. psli->iocbq_lookup = NULL;
  2630. psli->iocbq_lookup_len = 0;
  2631. psli->last_iotag = 0;
  2632. for (i = 0; i < psli->num_rings; i++) {
  2633. pring = &psli->ring[i];
  2634. switch (i) {
  2635. case LPFC_FCP_RING: /* ring 0 - FCP */
  2636. /* numCiocb and numRiocb are used in config_port */
  2637. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  2638. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  2639. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2640. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2641. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2642. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2643. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2644. SLI3_IOCB_CMD_SIZE :
  2645. SLI2_IOCB_CMD_SIZE;
  2646. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2647. SLI3_IOCB_RSP_SIZE :
  2648. SLI2_IOCB_RSP_SIZE;
  2649. pring->iotag_ctr = 0;
  2650. pring->iotag_max =
  2651. (phba->cfg_hba_queue_depth * 2);
  2652. pring->fast_iotag = pring->iotag_max;
  2653. pring->num_mask = 0;
  2654. break;
  2655. case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
  2656. /* numCiocb and numRiocb are used in config_port */
  2657. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  2658. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  2659. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2660. SLI3_IOCB_CMD_SIZE :
  2661. SLI2_IOCB_CMD_SIZE;
  2662. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2663. SLI3_IOCB_RSP_SIZE :
  2664. SLI2_IOCB_RSP_SIZE;
  2665. pring->iotag_max = phba->cfg_hba_queue_depth;
  2666. pring->num_mask = 0;
  2667. break;
  2668. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  2669. /* numCiocb and numRiocb are used in config_port */
  2670. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  2671. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  2672. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2673. SLI3_IOCB_CMD_SIZE :
  2674. SLI2_IOCB_CMD_SIZE;
  2675. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2676. SLI3_IOCB_RSP_SIZE :
  2677. SLI2_IOCB_RSP_SIZE;
  2678. pring->fast_iotag = 0;
  2679. pring->iotag_ctr = 0;
  2680. pring->iotag_max = 4096;
  2681. pring->lpfc_sli_rcv_async_status =
  2682. lpfc_sli_async_event_handler;
  2683. pring->num_mask = 4;
  2684. pring->prt[0].profile = 0; /* Mask 0 */
  2685. pring->prt[0].rctl = FC_ELS_REQ;
  2686. pring->prt[0].type = FC_ELS_DATA;
  2687. pring->prt[0].lpfc_sli_rcv_unsol_event =
  2688. lpfc_els_unsol_event;
  2689. pring->prt[1].profile = 0; /* Mask 1 */
  2690. pring->prt[1].rctl = FC_ELS_RSP;
  2691. pring->prt[1].type = FC_ELS_DATA;
  2692. pring->prt[1].lpfc_sli_rcv_unsol_event =
  2693. lpfc_els_unsol_event;
  2694. pring->prt[2].profile = 0; /* Mask 2 */
  2695. /* NameServer Inquiry */
  2696. pring->prt[2].rctl = FC_UNSOL_CTL;
  2697. /* NameServer */
  2698. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  2699. pring->prt[2].lpfc_sli_rcv_unsol_event =
  2700. lpfc_ct_unsol_event;
  2701. pring->prt[3].profile = 0; /* Mask 3 */
  2702. /* NameServer response */
  2703. pring->prt[3].rctl = FC_SOL_CTL;
  2704. /* NameServer */
  2705. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  2706. pring->prt[3].lpfc_sli_rcv_unsol_event =
  2707. lpfc_ct_unsol_event;
  2708. break;
  2709. }
  2710. totiocbsize += (pring->numCiocb * pring->sizeCiocb) +
  2711. (pring->numRiocb * pring->sizeRiocb);
  2712. }
  2713. if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
  2714. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  2715. printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
  2716. "SLI2 SLIM Data: x%x x%lx\n",
  2717. phba->brd_no, totiocbsize,
  2718. (unsigned long) MAX_SLIM_IOCB_SIZE);
  2719. }
  2720. if (phba->cfg_multi_ring_support == 2)
  2721. lpfc_extra_ring_setup(phba);
  2722. return 0;
  2723. }
  2724. int
  2725. lpfc_sli_queue_setup(struct lpfc_hba *phba)
  2726. {
  2727. struct lpfc_sli *psli;
  2728. struct lpfc_sli_ring *pring;
  2729. int i;
  2730. psli = &phba->sli;
  2731. spin_lock_irq(&phba->hbalock);
  2732. INIT_LIST_HEAD(&psli->mboxq);
  2733. INIT_LIST_HEAD(&psli->mboxq_cmpl);
  2734. /* Initialize list headers for txq and txcmplq as double linked lists */
  2735. for (i = 0; i < psli->num_rings; i++) {
  2736. pring = &psli->ring[i];
  2737. pring->ringno = i;
  2738. pring->next_cmdidx = 0;
  2739. pring->local_getidx = 0;
  2740. pring->cmdidx = 0;
  2741. INIT_LIST_HEAD(&pring->txq);
  2742. INIT_LIST_HEAD(&pring->txcmplq);
  2743. INIT_LIST_HEAD(&pring->iocb_continueq);
  2744. INIT_LIST_HEAD(&pring->postbufq);
  2745. }
  2746. spin_unlock_irq(&phba->hbalock);
  2747. return 1;
  2748. }
  2749. int
  2750. lpfc_sli_host_down(struct lpfc_vport *vport)
  2751. {
  2752. LIST_HEAD(completions);
  2753. struct lpfc_hba *phba = vport->phba;
  2754. struct lpfc_sli *psli = &phba->sli;
  2755. struct lpfc_sli_ring *pring;
  2756. struct lpfc_iocbq *iocb, *next_iocb;
  2757. int i;
  2758. unsigned long flags = 0;
  2759. uint16_t prev_pring_flag;
  2760. lpfc_cleanup_discovery_resources(vport);
  2761. spin_lock_irqsave(&phba->hbalock, flags);
  2762. for (i = 0; i < psli->num_rings; i++) {
  2763. pring = &psli->ring[i];
  2764. prev_pring_flag = pring->flag;
  2765. if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
  2766. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2767. /*
  2768. * Error everything on the txq since these iocbs have not been
  2769. * given to the FW yet.
  2770. */
  2771. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  2772. if (iocb->vport != vport)
  2773. continue;
  2774. list_move_tail(&iocb->list, &completions);
  2775. pring->txq_cnt--;
  2776. }
  2777. /* Next issue ABTS for everything on the txcmplq */
  2778. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
  2779. list) {
  2780. if (iocb->vport != vport)
  2781. continue;
  2782. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  2783. }
  2784. pring->flag = prev_pring_flag;
  2785. }
  2786. spin_unlock_irqrestore(&phba->hbalock, flags);
  2787. while (!list_empty(&completions)) {
  2788. list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
  2789. if (!iocb->iocb_cmpl)
  2790. lpfc_sli_release_iocbq(phba, iocb);
  2791. else {
  2792. iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
  2793. iocb->iocb.un.ulpWord[4] = IOERR_SLI_DOWN;
  2794. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2795. }
  2796. }
  2797. return 1;
  2798. }
  2799. int
  2800. lpfc_sli_hba_down(struct lpfc_hba *phba)
  2801. {
  2802. LIST_HEAD(completions);
  2803. struct lpfc_sli *psli = &phba->sli;
  2804. struct lpfc_sli_ring *pring;
  2805. LPFC_MBOXQ_t *pmb;
  2806. struct lpfc_iocbq *iocb;
  2807. IOCB_t *cmd = NULL;
  2808. int i;
  2809. unsigned long flags = 0;
  2810. lpfc_hba_down_prep(phba);
  2811. lpfc_fabric_abort_hba(phba);
  2812. spin_lock_irqsave(&phba->hbalock, flags);
  2813. for (i = 0; i < psli->num_rings; i++) {
  2814. pring = &psli->ring[i];
  2815. if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
  2816. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2817. /*
  2818. * Error everything on the txq since these iocbs have not been
  2819. * given to the FW yet.
  2820. */
  2821. list_splice_init(&pring->txq, &completions);
  2822. pring->txq_cnt = 0;
  2823. }
  2824. spin_unlock_irqrestore(&phba->hbalock, flags);
  2825. while (!list_empty(&completions)) {
  2826. list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
  2827. cmd = &iocb->iocb;
  2828. if (!iocb->iocb_cmpl)
  2829. lpfc_sli_release_iocbq(phba, iocb);
  2830. else {
  2831. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2832. cmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  2833. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2834. }
  2835. }
  2836. /* Return any active mbox cmds */
  2837. del_timer_sync(&psli->mbox_tmo);
  2838. spin_lock_irqsave(&phba->hbalock, flags);
  2839. spin_lock(&phba->pport->work_port_lock);
  2840. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  2841. spin_unlock(&phba->pport->work_port_lock);
  2842. if (psli->mbox_active) {
  2843. list_add_tail(&psli->mbox_active->list, &completions);
  2844. psli->mbox_active = NULL;
  2845. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2846. }
  2847. /* Return any pending or completed mbox cmds */
  2848. list_splice_init(&phba->sli.mboxq, &completions);
  2849. list_splice_init(&phba->sli.mboxq_cmpl, &completions);
  2850. INIT_LIST_HEAD(&psli->mboxq);
  2851. INIT_LIST_HEAD(&psli->mboxq_cmpl);
  2852. spin_unlock_irqrestore(&phba->hbalock, flags);
  2853. while (!list_empty(&completions)) {
  2854. list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
  2855. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2856. if (pmb->mbox_cmpl) {
  2857. pmb->mbox_cmpl(phba,pmb);
  2858. }
  2859. }
  2860. return 1;
  2861. }
  2862. void
  2863. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2864. {
  2865. uint32_t *src = srcp;
  2866. uint32_t *dest = destp;
  2867. uint32_t ldata;
  2868. int i;
  2869. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2870. ldata = *src;
  2871. ldata = le32_to_cpu(ldata);
  2872. *dest = ldata;
  2873. src++;
  2874. dest++;
  2875. }
  2876. }
  2877. int
  2878. lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2879. struct lpfc_dmabuf *mp)
  2880. {
  2881. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2882. later */
  2883. spin_lock_irq(&phba->hbalock);
  2884. list_add_tail(&mp->list, &pring->postbufq);
  2885. pring->postbufq_cnt++;
  2886. spin_unlock_irq(&phba->hbalock);
  2887. return 0;
  2888. }
  2889. struct lpfc_dmabuf *
  2890. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2891. dma_addr_t phys)
  2892. {
  2893. struct lpfc_dmabuf *mp, *next_mp;
  2894. struct list_head *slp = &pring->postbufq;
  2895. /* Search postbufq, from the begining, looking for a match on phys */
  2896. spin_lock_irq(&phba->hbalock);
  2897. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  2898. if (mp->phys == phys) {
  2899. list_del_init(&mp->list);
  2900. pring->postbufq_cnt--;
  2901. spin_unlock_irq(&phba->hbalock);
  2902. return mp;
  2903. }
  2904. }
  2905. spin_unlock_irq(&phba->hbalock);
  2906. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2907. "0410 Cannot find virtual addr for mapped buf on "
  2908. "ring %d Data x%llx x%p x%p x%x\n",
  2909. pring->ringno, (unsigned long long)phys,
  2910. slp->next, slp->prev, pring->postbufq_cnt);
  2911. return NULL;
  2912. }
  2913. static void
  2914. lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  2915. struct lpfc_iocbq *rspiocb)
  2916. {
  2917. IOCB_t *irsp = &rspiocb->iocb;
  2918. uint16_t abort_iotag, abort_context;
  2919. struct lpfc_iocbq *abort_iocb;
  2920. struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
  2921. abort_iocb = NULL;
  2922. if (irsp->ulpStatus) {
  2923. abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
  2924. abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
  2925. spin_lock_irq(&phba->hbalock);
  2926. if (abort_iotag != 0 && abort_iotag <= phba->sli.last_iotag)
  2927. abort_iocb = phba->sli.iocbq_lookup[abort_iotag];
  2928. lpfc_printf_log(phba, KERN_INFO, LOG_ELS | LOG_SLI,
  2929. "0327 Cannot abort els iocb %p "
  2930. "with tag %x context %x, abort status %x, "
  2931. "abort code %x\n",
  2932. abort_iocb, abort_iotag, abort_context,
  2933. irsp->ulpStatus, irsp->un.ulpWord[4]);
  2934. /*
  2935. * make sure we have the right iocbq before taking it
  2936. * off the txcmplq and try to call completion routine.
  2937. */
  2938. if (!abort_iocb ||
  2939. abort_iocb->iocb.ulpContext != abort_context ||
  2940. (abort_iocb->iocb_flag & LPFC_DRIVER_ABORTED) == 0)
  2941. spin_unlock_irq(&phba->hbalock);
  2942. else {
  2943. list_del_init(&abort_iocb->list);
  2944. pring->txcmplq_cnt--;
  2945. spin_unlock_irq(&phba->hbalock);
  2946. abort_iocb->iocb_flag &= ~LPFC_DRIVER_ABORTED;
  2947. abort_iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
  2948. abort_iocb->iocb.un.ulpWord[4] = IOERR_SLI_ABORTED;
  2949. (abort_iocb->iocb_cmpl)(phba, abort_iocb, abort_iocb);
  2950. }
  2951. }
  2952. lpfc_sli_release_iocbq(phba, cmdiocb);
  2953. return;
  2954. }
  2955. static void
  2956. lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  2957. struct lpfc_iocbq *rspiocb)
  2958. {
  2959. IOCB_t *irsp = &rspiocb->iocb;
  2960. /* ELS cmd tag <ulpIoTag> completes */
  2961. lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
  2962. "0133 Ignoring ELS cmd tag x%x completion Data: "
  2963. "x%x x%x x%x\n",
  2964. irsp->ulpIoTag, irsp->ulpStatus,
  2965. irsp->un.ulpWord[4], irsp->ulpTimeout);
  2966. if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
  2967. lpfc_ct_free_iocb(phba, cmdiocb);
  2968. else
  2969. lpfc_els_free_iocb(phba, cmdiocb);
  2970. return;
  2971. }
  2972. int
  2973. lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2974. struct lpfc_iocbq *cmdiocb)
  2975. {
  2976. struct lpfc_vport *vport = cmdiocb->vport;
  2977. struct lpfc_iocbq *abtsiocbp;
  2978. IOCB_t *icmd = NULL;
  2979. IOCB_t *iabt = NULL;
  2980. int retval = IOCB_ERROR;
  2981. /*
  2982. * There are certain command types we don't want to abort. And we
  2983. * don't want to abort commands that are already in the process of
  2984. * being aborted.
  2985. */
  2986. icmd = &cmdiocb->iocb;
  2987. if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
  2988. icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
  2989. (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
  2990. return 0;
  2991. /* If we're unloading, don't abort iocb on the ELS ring, but change the
  2992. * callback so that nothing happens when it finishes.
  2993. */
  2994. if ((vport->load_flag & FC_UNLOADING) &&
  2995. (pring->ringno == LPFC_ELS_RING)) {
  2996. if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
  2997. cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
  2998. else
  2999. cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
  3000. goto abort_iotag_exit;
  3001. }
  3002. /* issue ABTS for this IOCB based on iotag */
  3003. abtsiocbp = __lpfc_sli_get_iocbq(phba);
  3004. if (abtsiocbp == NULL)
  3005. return 0;
  3006. /* This signals the response to set the correct status
  3007. * before calling the completion handler.
  3008. */
  3009. cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
  3010. iabt = &abtsiocbp->iocb;
  3011. iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
  3012. iabt->un.acxri.abortContextTag = icmd->ulpContext;
  3013. iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
  3014. iabt->ulpLe = 1;
  3015. iabt->ulpClass = icmd->ulpClass;
  3016. if (phba->link_state >= LPFC_LINK_UP)
  3017. iabt->ulpCommand = CMD_ABORT_XRI_CN;
  3018. else
  3019. iabt->ulpCommand = CMD_CLOSE_XRI_CN;
  3020. abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
  3021. lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
  3022. "0339 Abort xri x%x, original iotag x%x, "
  3023. "abort cmd iotag x%x\n",
  3024. iabt->un.acxri.abortContextTag,
  3025. iabt->un.acxri.abortIoTag, abtsiocbp->iotag);
  3026. retval = __lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0);
  3027. abort_iotag_exit:
  3028. /*
  3029. * Caller to this routine should check for IOCB_ERROR
  3030. * and handle it properly. This routine no longer removes
  3031. * iocb off txcmplq and call compl in case of IOCB_ERROR.
  3032. */
  3033. return retval;
  3034. }
  3035. static int
  3036. lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
  3037. uint16_t tgt_id, uint64_t lun_id,
  3038. lpfc_ctx_cmd ctx_cmd)
  3039. {
  3040. struct lpfc_scsi_buf *lpfc_cmd;
  3041. struct scsi_cmnd *cmnd;
  3042. int rc = 1;
  3043. if (!(iocbq->iocb_flag & LPFC_IO_FCP))
  3044. return rc;
  3045. if (iocbq->vport != vport)
  3046. return rc;
  3047. lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
  3048. cmnd = lpfc_cmd->pCmd;
  3049. if (cmnd == NULL)
  3050. return rc;
  3051. switch (ctx_cmd) {
  3052. case LPFC_CTX_LUN:
  3053. if ((cmnd->device->id == tgt_id) &&
  3054. (cmnd->device->lun == lun_id))
  3055. rc = 0;
  3056. break;
  3057. case LPFC_CTX_TGT:
  3058. if (cmnd->device->id == tgt_id)
  3059. rc = 0;
  3060. break;
  3061. case LPFC_CTX_HOST:
  3062. rc = 0;
  3063. break;
  3064. default:
  3065. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  3066. __FUNCTION__, ctx_cmd);
  3067. break;
  3068. }
  3069. return rc;
  3070. }
  3071. int
  3072. lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
  3073. lpfc_ctx_cmd ctx_cmd)
  3074. {
  3075. struct lpfc_hba *phba = vport->phba;
  3076. struct lpfc_iocbq *iocbq;
  3077. int sum, i;
  3078. for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
  3079. iocbq = phba->sli.iocbq_lookup[i];
  3080. if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
  3081. ctx_cmd) == 0)
  3082. sum++;
  3083. }
  3084. return sum;
  3085. }
  3086. void
  3087. lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  3088. struct lpfc_iocbq *rspiocb)
  3089. {
  3090. lpfc_sli_release_iocbq(phba, cmdiocb);
  3091. return;
  3092. }
  3093. int
  3094. lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
  3095. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
  3096. {
  3097. struct lpfc_hba *phba = vport->phba;
  3098. struct lpfc_iocbq *iocbq;
  3099. struct lpfc_iocbq *abtsiocb;
  3100. IOCB_t *cmd = NULL;
  3101. int errcnt = 0, ret_val = 0;
  3102. int i;
  3103. for (i = 1; i <= phba->sli.last_iotag; i++) {
  3104. iocbq = phba->sli.iocbq_lookup[i];
  3105. if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
  3106. abort_cmd) != 0)
  3107. continue;
  3108. /* issue ABTS for this IOCB based on iotag */
  3109. abtsiocb = lpfc_sli_get_iocbq(phba);
  3110. if (abtsiocb == NULL) {
  3111. errcnt++;
  3112. continue;
  3113. }
  3114. cmd = &iocbq->iocb;
  3115. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  3116. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  3117. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  3118. abtsiocb->iocb.ulpLe = 1;
  3119. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  3120. abtsiocb->vport = phba->pport;
  3121. if (lpfc_is_link_up(phba))
  3122. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  3123. else
  3124. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  3125. /* Setup callback routine and issue the command. */
  3126. abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
  3127. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  3128. if (ret_val == IOCB_ERROR) {
  3129. lpfc_sli_release_iocbq(phba, abtsiocb);
  3130. errcnt++;
  3131. continue;
  3132. }
  3133. }
  3134. return errcnt;
  3135. }
  3136. static void
  3137. lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
  3138. struct lpfc_iocbq *cmdiocbq,
  3139. struct lpfc_iocbq *rspiocbq)
  3140. {
  3141. wait_queue_head_t *pdone_q;
  3142. unsigned long iflags;
  3143. spin_lock_irqsave(&phba->hbalock, iflags);
  3144. cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
  3145. if (cmdiocbq->context2 && rspiocbq)
  3146. memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
  3147. &rspiocbq->iocb, sizeof(IOCB_t));
  3148. pdone_q = cmdiocbq->context_un.wait_queue;
  3149. if (pdone_q)
  3150. wake_up(pdone_q);
  3151. spin_unlock_irqrestore(&phba->hbalock, iflags);
  3152. return;
  3153. }
  3154. /*
  3155. * Issue the caller's iocb and wait for its completion, but no longer than the
  3156. * caller's timeout. Note that iocb_flags is cleared before the
  3157. * lpfc_sli_issue_call since the wake routine sets a unique value and by
  3158. * definition this is a wait function.
  3159. */
  3160. int
  3161. lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
  3162. struct lpfc_sli_ring *pring,
  3163. struct lpfc_iocbq *piocb,
  3164. struct lpfc_iocbq *prspiocbq,
  3165. uint32_t timeout)
  3166. {
  3167. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  3168. long timeleft, timeout_req = 0;
  3169. int retval = IOCB_SUCCESS;
  3170. uint32_t creg_val;
  3171. /*
  3172. * If the caller has provided a response iocbq buffer, then context2
  3173. * is NULL or its an error.
  3174. */
  3175. if (prspiocbq) {
  3176. if (piocb->context2)
  3177. return IOCB_ERROR;
  3178. piocb->context2 = prspiocbq;
  3179. }
  3180. piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
  3181. piocb->context_un.wait_queue = &done_q;
  3182. piocb->iocb_flag &= ~LPFC_IO_WAKE;
  3183. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  3184. creg_val = readl(phba->HCregaddr);
  3185. creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
  3186. writel(creg_val, phba->HCregaddr);
  3187. readl(phba->HCregaddr); /* flush */
  3188. }
  3189. retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
  3190. if (retval == IOCB_SUCCESS) {
  3191. timeout_req = timeout * HZ;
  3192. timeleft = wait_event_timeout(done_q,
  3193. piocb->iocb_flag & LPFC_IO_WAKE,
  3194. timeout_req);
  3195. if (piocb->iocb_flag & LPFC_IO_WAKE) {
  3196. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3197. "0331 IOCB wake signaled\n");
  3198. } else if (timeleft == 0) {
  3199. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  3200. "0338 IOCB wait timeout error - no "
  3201. "wake response Data x%x\n", timeout);
  3202. retval = IOCB_TIMEDOUT;
  3203. } else {
  3204. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  3205. "0330 IOCB wake NOT set, "
  3206. "Data x%x x%lx\n",
  3207. timeout, (timeleft / jiffies));
  3208. retval = IOCB_TIMEDOUT;
  3209. }
  3210. } else {
  3211. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3212. ":0332 IOCB wait issue failed, Data x%x\n",
  3213. retval);
  3214. retval = IOCB_ERROR;
  3215. }
  3216. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  3217. creg_val = readl(phba->HCregaddr);
  3218. creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
  3219. writel(creg_val, phba->HCregaddr);
  3220. readl(phba->HCregaddr); /* flush */
  3221. }
  3222. if (prspiocbq)
  3223. piocb->context2 = NULL;
  3224. piocb->context_un.wait_queue = NULL;
  3225. piocb->iocb_cmpl = NULL;
  3226. return retval;
  3227. }
  3228. int
  3229. lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
  3230. uint32_t timeout)
  3231. {
  3232. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  3233. int retval;
  3234. unsigned long flag;
  3235. /* The caller must leave context1 empty. */
  3236. if (pmboxq->context1)
  3237. return MBX_NOT_FINISHED;
  3238. /* setup wake call as IOCB callback */
  3239. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  3240. /* setup context field to pass wait_queue pointer to wake function */
  3241. pmboxq->context1 = &done_q;
  3242. /* now issue the command */
  3243. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  3244. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  3245. wait_event_interruptible_timeout(done_q,
  3246. pmboxq->mbox_flag & LPFC_MBX_WAKE,
  3247. timeout * HZ);
  3248. spin_lock_irqsave(&phba->hbalock, flag);
  3249. pmboxq->context1 = NULL;
  3250. /*
  3251. * if LPFC_MBX_WAKE flag is set the mailbox is completed
  3252. * else do not free the resources.
  3253. */
  3254. if (pmboxq->mbox_flag & LPFC_MBX_WAKE)
  3255. retval = MBX_SUCCESS;
  3256. else {
  3257. retval = MBX_TIMEOUT;
  3258. pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  3259. }
  3260. spin_unlock_irqrestore(&phba->hbalock, flag);
  3261. }
  3262. return retval;
  3263. }
  3264. int
  3265. lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
  3266. {
  3267. struct lpfc_vport *vport = phba->pport;
  3268. int i = 0;
  3269. uint32_t ha_copy;
  3270. while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !vport->stopped) {
  3271. if (i++ > LPFC_MBOX_TMO * 1000)
  3272. return 1;
  3273. /*
  3274. * Call lpfc_sli_handle_mb_event only if a mailbox cmd
  3275. * did finish. This way we won't get the misleading
  3276. * "Stray Mailbox Interrupt" message.
  3277. */
  3278. spin_lock_irq(&phba->hbalock);
  3279. ha_copy = phba->work_ha;
  3280. phba->work_ha &= ~HA_MBATT;
  3281. spin_unlock_irq(&phba->hbalock);
  3282. if (ha_copy & HA_MBATT)
  3283. if (lpfc_sli_handle_mb_event(phba) == 0)
  3284. i = 0;
  3285. msleep(1);
  3286. }
  3287. return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
  3288. }
  3289. irqreturn_t
  3290. lpfc_intr_handler(int irq, void *dev_id)
  3291. {
  3292. struct lpfc_hba *phba;
  3293. uint32_t ha_copy;
  3294. uint32_t work_ha_copy;
  3295. unsigned long status;
  3296. uint32_t control;
  3297. MAILBOX_t *mbox, *pmbox;
  3298. struct lpfc_vport *vport;
  3299. struct lpfc_nodelist *ndlp;
  3300. struct lpfc_dmabuf *mp;
  3301. LPFC_MBOXQ_t *pmb;
  3302. int rc;
  3303. /*
  3304. * Get the driver's phba structure from the dev_id and
  3305. * assume the HBA is not interrupting.
  3306. */
  3307. phba = (struct lpfc_hba *) dev_id;
  3308. if (unlikely(!phba))
  3309. return IRQ_NONE;
  3310. /* If the pci channel is offline, ignore all the interrupts. */
  3311. if (unlikely(pci_channel_offline(phba->pcidev)))
  3312. return IRQ_NONE;
  3313. phba->sli.slistat.sli_intr++;
  3314. /*
  3315. * Call the HBA to see if it is interrupting. If not, don't claim
  3316. * the interrupt
  3317. */
  3318. /* Ignore all interrupts during initialization. */
  3319. if (unlikely(phba->link_state < LPFC_LINK_DOWN))
  3320. return IRQ_NONE;
  3321. /*
  3322. * Read host attention register to determine interrupt source
  3323. * Clear Attention Sources, except Error Attention (to
  3324. * preserve status) and Link Attention
  3325. */
  3326. spin_lock(&phba->hbalock);
  3327. ha_copy = readl(phba->HAregaddr);
  3328. /* If somebody is waiting to handle an eratt don't process it
  3329. * here. The brdkill function will do this.
  3330. */
  3331. if (phba->link_flag & LS_IGNORE_ERATT)
  3332. ha_copy &= ~HA_ERATT;
  3333. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  3334. readl(phba->HAregaddr); /* flush */
  3335. spin_unlock(&phba->hbalock);
  3336. if (unlikely(!ha_copy))
  3337. return IRQ_NONE;
  3338. work_ha_copy = ha_copy & phba->work_ha_mask;
  3339. if (unlikely(work_ha_copy)) {
  3340. if (work_ha_copy & HA_LATT) {
  3341. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  3342. /*
  3343. * Turn off Link Attention interrupts
  3344. * until CLEAR_LA done
  3345. */
  3346. spin_lock(&phba->hbalock);
  3347. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  3348. control = readl(phba->HCregaddr);
  3349. control &= ~HC_LAINT_ENA;
  3350. writel(control, phba->HCregaddr);
  3351. readl(phba->HCregaddr); /* flush */
  3352. spin_unlock(&phba->hbalock);
  3353. }
  3354. else
  3355. work_ha_copy &= ~HA_LATT;
  3356. }
  3357. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  3358. /*
  3359. * Turn off Slow Rings interrupts, LPFC_ELS_RING is
  3360. * the only slow ring.
  3361. */
  3362. status = (work_ha_copy &
  3363. (HA_RXMASK << (4*LPFC_ELS_RING)));
  3364. status >>= (4*LPFC_ELS_RING);
  3365. if (status & HA_RXMASK) {
  3366. spin_lock(&phba->hbalock);
  3367. control = readl(phba->HCregaddr);
  3368. lpfc_debugfs_slow_ring_trc(phba,
  3369. "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
  3370. control, status,
  3371. (uint32_t)phba->sli.slistat.sli_intr);
  3372. if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
  3373. lpfc_debugfs_slow_ring_trc(phba,
  3374. "ISR Disable ring:"
  3375. "pwork:x%x hawork:x%x wait:x%x",
  3376. phba->work_ha, work_ha_copy,
  3377. (uint32_t)((unsigned long)
  3378. phba->work_wait));
  3379. control &=
  3380. ~(HC_R0INT_ENA << LPFC_ELS_RING);
  3381. writel(control, phba->HCregaddr);
  3382. readl(phba->HCregaddr); /* flush */
  3383. }
  3384. else {
  3385. lpfc_debugfs_slow_ring_trc(phba,
  3386. "ISR slow ring: pwork:"
  3387. "x%x hawork:x%x wait:x%x",
  3388. phba->work_ha, work_ha_copy,
  3389. (uint32_t)((unsigned long)
  3390. phba->work_wait));
  3391. }
  3392. spin_unlock(&phba->hbalock);
  3393. }
  3394. }
  3395. if (work_ha_copy & HA_ERATT) {
  3396. phba->link_state = LPFC_HBA_ERROR;
  3397. /*
  3398. * There was a link/board error. Read the
  3399. * status register to retrieve the error event
  3400. * and process it.
  3401. */
  3402. phba->sli.slistat.err_attn_event++;
  3403. /* Save status info */
  3404. phba->work_hs = readl(phba->HSregaddr);
  3405. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  3406. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  3407. /* Clear Chip error bit */
  3408. writel(HA_ERATT, phba->HAregaddr);
  3409. readl(phba->HAregaddr); /* flush */
  3410. phba->pport->stopped = 1;
  3411. }
  3412. if ((work_ha_copy & HA_MBATT) &&
  3413. (phba->sli.mbox_active)) {
  3414. pmb = phba->sli.mbox_active;
  3415. pmbox = &pmb->mb;
  3416. mbox = &phba->slim2p->mbx;
  3417. vport = pmb->vport;
  3418. /* First check out the status word */
  3419. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
  3420. if (pmbox->mbxOwner != OWN_HOST) {
  3421. /*
  3422. * Stray Mailbox Interrupt, mbxCommand <cmd>
  3423. * mbxStatus <status>
  3424. */
  3425. lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX |
  3426. LOG_SLI,
  3427. "(%d):0304 Stray Mailbox "
  3428. "Interrupt mbxCommand x%x "
  3429. "mbxStatus x%x\n",
  3430. (vport ? vport->vpi : 0),
  3431. pmbox->mbxCommand,
  3432. pmbox->mbxStatus);
  3433. }
  3434. phba->last_completion_time = jiffies;
  3435. del_timer_sync(&phba->sli.mbox_tmo);
  3436. phba->sli.mbox_active = NULL;
  3437. if (pmb->mbox_cmpl) {
  3438. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  3439. MAILBOX_CMD_SIZE);
  3440. }
  3441. if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
  3442. pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
  3443. lpfc_debugfs_disc_trc(vport,
  3444. LPFC_DISC_TRC_MBOX_VPORT,
  3445. "MBOX dflt rpi: : status:x%x rpi:x%x",
  3446. (uint32_t)pmbox->mbxStatus,
  3447. pmbox->un.varWords[0], 0);
  3448. if ( !pmbox->mbxStatus) {
  3449. mp = (struct lpfc_dmabuf *)
  3450. (pmb->context1);
  3451. ndlp = (struct lpfc_nodelist *)
  3452. pmb->context2;
  3453. /* Reg_LOGIN of dflt RPI was successful.
  3454. * new lets get rid of the RPI using the
  3455. * same mbox buffer.
  3456. */
  3457. lpfc_unreg_login(phba, vport->vpi,
  3458. pmbox->un.varWords[0], pmb);
  3459. pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
  3460. pmb->context1 = mp;
  3461. pmb->context2 = ndlp;
  3462. pmb->vport = vport;
  3463. spin_lock(&phba->hbalock);
  3464. phba->sli.sli_flag &=
  3465. ~LPFC_SLI_MBOX_ACTIVE;
  3466. spin_unlock(&phba->hbalock);
  3467. goto send_current_mbox;
  3468. }
  3469. }
  3470. spin_lock(&phba->pport->work_port_lock);
  3471. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  3472. spin_unlock(&phba->pport->work_port_lock);
  3473. lpfc_mbox_cmpl_put(phba, pmb);
  3474. }
  3475. if ((work_ha_copy & HA_MBATT) &&
  3476. (phba->sli.mbox_active == NULL)) {
  3477. send_next_mbox:
  3478. spin_lock(&phba->hbalock);
  3479. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  3480. pmb = lpfc_mbox_get(phba);
  3481. spin_unlock(&phba->hbalock);
  3482. send_current_mbox:
  3483. /* Process next mailbox command if there is one */
  3484. if (pmb != NULL) {
  3485. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  3486. if (rc == MBX_NOT_FINISHED) {
  3487. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  3488. lpfc_mbox_cmpl_put(phba, pmb);
  3489. goto send_next_mbox;
  3490. }
  3491. }
  3492. }
  3493. spin_lock(&phba->hbalock);
  3494. phba->work_ha |= work_ha_copy;
  3495. if (phba->work_wait)
  3496. lpfc_worker_wake_up(phba);
  3497. spin_unlock(&phba->hbalock);
  3498. }
  3499. ha_copy &= ~(phba->work_ha_mask);
  3500. /*
  3501. * Process all events on FCP ring. Take the optimized path for
  3502. * FCP IO. Any other IO is slow path and is handled by
  3503. * the worker thread.
  3504. */
  3505. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  3506. status >>= (4*LPFC_FCP_RING);
  3507. if (status & HA_RXMASK)
  3508. lpfc_sli_handle_fast_ring_event(phba,
  3509. &phba->sli.ring[LPFC_FCP_RING],
  3510. status);
  3511. if (phba->cfg_multi_ring_support == 2) {
  3512. /*
  3513. * Process all events on extra ring. Take the optimized path
  3514. * for extra ring IO. Any other IO is slow path and is handled
  3515. * by the worker thread.
  3516. */
  3517. status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
  3518. status >>= (4*LPFC_EXTRA_RING);
  3519. if (status & HA_RXMASK) {
  3520. lpfc_sli_handle_fast_ring_event(phba,
  3521. &phba->sli.ring[LPFC_EXTRA_RING],
  3522. status);
  3523. }
  3524. }
  3525. return IRQ_HANDLED;
  3526. } /* lpfc_intr_handler */