bcmsdh_sdmmc.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620
  1. /*
  2. * Copyright (c) 2010 Broadcom Corporation
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11. * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13. * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14. * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/types.h>
  17. #include <linux/netdevice.h>
  18. #include <linux/mmc/sdio.h>
  19. #include <linux/mmc/core.h>
  20. #include <linux/mmc/sdio_func.h>
  21. #include <linux/mmc/sdio_ids.h>
  22. #include <linux/mmc/card.h>
  23. #include <linux/suspend.h>
  24. #include <linux/errno.h>
  25. #include <linux/sched.h> /* request_irq() */
  26. #include <linux/module.h>
  27. #include <net/cfg80211.h>
  28. #include <defs.h>
  29. #include <brcm_hw_ids.h>
  30. #include <brcmu_utils.h>
  31. #include <brcmu_wifi.h>
  32. #include "sdio_host.h"
  33. #include "dhd.h"
  34. #include "dhd_dbg.h"
  35. #include "wl_cfg80211.h"
  36. #include "dhd_bus.h"
  37. #define SDIO_VENDOR_ID_BROADCOM 0x02d0
  38. #define DMA_ALIGN_MASK 0x03
  39. #define SDIO_DEVICE_ID_BROADCOM_4329 0x4329
  40. #define SDIO_DEVICE_ID_BROADCOM_4330 0x4330
  41. #define SDIO_FUNC1_BLOCKSIZE 64
  42. #define SDIO_FUNC2_BLOCKSIZE 512
  43. /* devices we support, null terminated */
  44. static const struct sdio_device_id brcmf_sdmmc_ids[] = {
  45. {SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4329)},
  46. {SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4330)},
  47. { /* end: all zeroes */ },
  48. };
  49. MODULE_DEVICE_TABLE(sdio, brcmf_sdmmc_ids);
  50. static bool
  51. brcmf_pm_resume_error(struct brcmf_sdio_dev *sdiodev)
  52. {
  53. bool is_err = false;
  54. #ifdef CONFIG_PM_SLEEP
  55. is_err = atomic_read(&sdiodev->suspend);
  56. #endif
  57. return is_err;
  58. }
  59. static void
  60. brcmf_pm_resume_wait(struct brcmf_sdio_dev *sdiodev, wait_queue_head_t *wq)
  61. {
  62. #ifdef CONFIG_PM_SLEEP
  63. int retry = 0;
  64. while (atomic_read(&sdiodev->suspend) && retry++ != 30)
  65. wait_event_timeout(*wq, false, HZ/100);
  66. #endif
  67. }
  68. static inline int brcmf_sdioh_f0_write_byte(struct brcmf_sdio_dev *sdiodev,
  69. uint regaddr, u8 *byte)
  70. {
  71. struct sdio_func *sdfunc = sdiodev->func[0];
  72. int err_ret;
  73. /*
  74. * Can only directly write to some F0 registers.
  75. * Handle F2 enable/disable and Abort command
  76. * as a special case.
  77. */
  78. if (regaddr == SDIO_CCCR_IOEx) {
  79. sdfunc = sdiodev->func[2];
  80. if (sdfunc) {
  81. sdio_claim_host(sdfunc);
  82. if (*byte & SDIO_FUNC_ENABLE_2) {
  83. /* Enable Function 2 */
  84. err_ret = sdio_enable_func(sdfunc);
  85. if (err_ret)
  86. brcmf_dbg(ERROR,
  87. "enable F2 failed:%d\n",
  88. err_ret);
  89. } else {
  90. /* Disable Function 2 */
  91. err_ret = sdio_disable_func(sdfunc);
  92. if (err_ret)
  93. brcmf_dbg(ERROR,
  94. "Disable F2 failed:%d\n",
  95. err_ret);
  96. }
  97. sdio_release_host(sdfunc);
  98. }
  99. } else if (regaddr == SDIO_CCCR_ABORT) {
  100. sdio_claim_host(sdfunc);
  101. sdio_writeb(sdfunc, *byte, regaddr, &err_ret);
  102. sdio_release_host(sdfunc);
  103. } else if (regaddr < 0xF0) {
  104. brcmf_dbg(ERROR, "F0 Wr:0x%02x: write disallowed\n", regaddr);
  105. err_ret = -EPERM;
  106. } else {
  107. sdio_claim_host(sdfunc);
  108. sdio_f0_writeb(sdfunc, *byte, regaddr, &err_ret);
  109. sdio_release_host(sdfunc);
  110. }
  111. return err_ret;
  112. }
  113. int brcmf_sdioh_request_byte(struct brcmf_sdio_dev *sdiodev, uint rw, uint func,
  114. uint regaddr, u8 *byte)
  115. {
  116. int err_ret;
  117. brcmf_dbg(INFO, "rw=%d, func=%d, addr=0x%05x\n", rw, func, regaddr);
  118. brcmf_pm_resume_wait(sdiodev, &sdiodev->request_byte_wait);
  119. if (brcmf_pm_resume_error(sdiodev))
  120. return -EIO;
  121. if (rw && func == 0) {
  122. /* handle F0 separately */
  123. err_ret = brcmf_sdioh_f0_write_byte(sdiodev, regaddr, byte);
  124. } else {
  125. sdio_claim_host(sdiodev->func[func]);
  126. if (rw) /* CMD52 Write */
  127. sdio_writeb(sdiodev->func[func], *byte, regaddr,
  128. &err_ret);
  129. else if (func == 0) {
  130. *byte = sdio_f0_readb(sdiodev->func[func], regaddr,
  131. &err_ret);
  132. } else {
  133. *byte = sdio_readb(sdiodev->func[func], regaddr,
  134. &err_ret);
  135. }
  136. sdio_release_host(sdiodev->func[func]);
  137. }
  138. if (err_ret)
  139. brcmf_dbg(ERROR, "Failed to %s byte F%d:@0x%05x=%02x, Err: %d\n",
  140. rw ? "write" : "read", func, regaddr, *byte, err_ret);
  141. return err_ret;
  142. }
  143. int brcmf_sdioh_request_word(struct brcmf_sdio_dev *sdiodev,
  144. uint rw, uint func, uint addr, u32 *word,
  145. uint nbytes)
  146. {
  147. int err_ret = -EIO;
  148. if (func == 0) {
  149. brcmf_dbg(ERROR, "Only CMD52 allowed to F0\n");
  150. return -EINVAL;
  151. }
  152. brcmf_dbg(INFO, "rw=%d, func=%d, addr=0x%05x, nbytes=%d\n",
  153. rw, func, addr, nbytes);
  154. brcmf_pm_resume_wait(sdiodev, &sdiodev->request_word_wait);
  155. if (brcmf_pm_resume_error(sdiodev))
  156. return -EIO;
  157. /* Claim host controller */
  158. sdio_claim_host(sdiodev->func[func]);
  159. if (rw) { /* CMD52 Write */
  160. if (nbytes == 4)
  161. sdio_writel(sdiodev->func[func], *word, addr,
  162. &err_ret);
  163. else if (nbytes == 2)
  164. sdio_writew(sdiodev->func[func], (*word & 0xFFFF),
  165. addr, &err_ret);
  166. else
  167. brcmf_dbg(ERROR, "Invalid nbytes: %d\n", nbytes);
  168. } else { /* CMD52 Read */
  169. if (nbytes == 4)
  170. *word = sdio_readl(sdiodev->func[func], addr, &err_ret);
  171. else if (nbytes == 2)
  172. *word = sdio_readw(sdiodev->func[func], addr,
  173. &err_ret) & 0xFFFF;
  174. else
  175. brcmf_dbg(ERROR, "Invalid nbytes: %d\n", nbytes);
  176. }
  177. /* Release host controller */
  178. sdio_release_host(sdiodev->func[func]);
  179. if (err_ret)
  180. brcmf_dbg(ERROR, "Failed to %s word, Err: 0x%08x\n",
  181. rw ? "write" : "read", err_ret);
  182. return err_ret;
  183. }
  184. /* precondition: host controller is claimed */
  185. static int
  186. brcmf_sdioh_request_data(struct brcmf_sdio_dev *sdiodev, uint write, bool fifo,
  187. uint func, uint addr, struct sk_buff *pkt, uint pktlen)
  188. {
  189. int err_ret = 0;
  190. if ((write) && (!fifo)) {
  191. err_ret = sdio_memcpy_toio(sdiodev->func[func], addr,
  192. ((u8 *) (pkt->data)), pktlen);
  193. } else if (write) {
  194. err_ret = sdio_memcpy_toio(sdiodev->func[func], addr,
  195. ((u8 *) (pkt->data)), pktlen);
  196. } else if (fifo) {
  197. err_ret = sdio_readsb(sdiodev->func[func],
  198. ((u8 *) (pkt->data)), addr, pktlen);
  199. } else {
  200. err_ret = sdio_memcpy_fromio(sdiodev->func[func],
  201. ((u8 *) (pkt->data)),
  202. addr, pktlen);
  203. }
  204. return err_ret;
  205. }
  206. /*
  207. * This function takes a queue of packets. The packets on the queue
  208. * are assumed to be properly aligned by the caller.
  209. */
  210. int
  211. brcmf_sdioh_request_chain(struct brcmf_sdio_dev *sdiodev, uint fix_inc,
  212. uint write, uint func, uint addr,
  213. struct sk_buff_head *pktq)
  214. {
  215. bool fifo = (fix_inc == SDIOH_DATA_FIX);
  216. u32 SGCount = 0;
  217. int err_ret = 0;
  218. struct sk_buff *pkt;
  219. brcmf_dbg(TRACE, "Enter\n");
  220. brcmf_pm_resume_wait(sdiodev, &sdiodev->request_chain_wait);
  221. if (brcmf_pm_resume_error(sdiodev))
  222. return -EIO;
  223. /* Claim host controller */
  224. sdio_claim_host(sdiodev->func[func]);
  225. skb_queue_walk(pktq, pkt) {
  226. uint pkt_len = pkt->len;
  227. pkt_len += 3;
  228. pkt_len &= 0xFFFFFFFC;
  229. err_ret = brcmf_sdioh_request_data(sdiodev, write, fifo, func,
  230. addr, pkt, pkt_len);
  231. if (err_ret) {
  232. brcmf_dbg(ERROR, "%s FAILED %p[%d], addr=0x%05x, pkt_len=%d, ERR=0x%08x\n",
  233. write ? "TX" : "RX", pkt, SGCount, addr,
  234. pkt_len, err_ret);
  235. } else {
  236. brcmf_dbg(TRACE, "%s xfr'd %p[%d], addr=0x%05x, len=%d\n",
  237. write ? "TX" : "RX", pkt, SGCount, addr,
  238. pkt_len);
  239. }
  240. if (!fifo)
  241. addr += pkt_len;
  242. SGCount++;
  243. }
  244. /* Release host controller */
  245. sdio_release_host(sdiodev->func[func]);
  246. brcmf_dbg(TRACE, "Exit\n");
  247. return err_ret;
  248. }
  249. /*
  250. * This function takes a single DMA-able packet.
  251. */
  252. int brcmf_sdioh_request_buffer(struct brcmf_sdio_dev *sdiodev,
  253. uint fix_inc, uint write, uint func, uint addr,
  254. struct sk_buff *pkt)
  255. {
  256. int status;
  257. uint pkt_len = pkt->len;
  258. bool fifo = (fix_inc == SDIOH_DATA_FIX);
  259. brcmf_dbg(TRACE, "Enter\n");
  260. if (pkt == NULL)
  261. return -EINVAL;
  262. brcmf_pm_resume_wait(sdiodev, &sdiodev->request_buffer_wait);
  263. if (brcmf_pm_resume_error(sdiodev))
  264. return -EIO;
  265. /* Claim host controller */
  266. sdio_claim_host(sdiodev->func[func]);
  267. pkt_len += 3;
  268. pkt_len &= (uint)~3;
  269. status = brcmf_sdioh_request_data(sdiodev, write, fifo, func,
  270. addr, pkt, pkt_len);
  271. if (status) {
  272. brcmf_dbg(ERROR, "%s FAILED %p, addr=0x%05x, pkt_len=%d, ERR=0x%08x\n",
  273. write ? "TX" : "RX", pkt, addr, pkt_len, status);
  274. } else {
  275. brcmf_dbg(TRACE, "%s xfr'd %p, addr=0x%05x, len=%d\n",
  276. write ? "TX" : "RX", pkt, addr, pkt_len);
  277. }
  278. /* Release host controller */
  279. sdio_release_host(sdiodev->func[func]);
  280. return status;
  281. }
  282. /* Read client card reg */
  283. static int
  284. brcmf_sdioh_card_regread(struct brcmf_sdio_dev *sdiodev, int func, u32 regaddr,
  285. int regsize, u32 *data)
  286. {
  287. if ((func == 0) || (regsize == 1)) {
  288. u8 temp = 0;
  289. brcmf_sdioh_request_byte(sdiodev, SDIOH_READ, func, regaddr,
  290. &temp);
  291. *data = temp;
  292. *data &= 0xff;
  293. brcmf_dbg(DATA, "byte read data=0x%02x\n", *data);
  294. } else {
  295. brcmf_sdioh_request_word(sdiodev, SDIOH_READ, func, regaddr,
  296. data, regsize);
  297. if (regsize == 2)
  298. *data &= 0xffff;
  299. brcmf_dbg(DATA, "word read data=0x%08x\n", *data);
  300. }
  301. return SUCCESS;
  302. }
  303. static int brcmf_sdioh_get_cisaddr(struct brcmf_sdio_dev *sdiodev, u32 regaddr)
  304. {
  305. /* read 24 bits and return valid 17 bit addr */
  306. int i;
  307. u32 scratch, regdata;
  308. __le32 scratch_le;
  309. u8 *ptr = (u8 *)&scratch_le;
  310. for (i = 0; i < 3; i++) {
  311. if ((brcmf_sdioh_card_regread(sdiodev, 0, regaddr, 1,
  312. &regdata)) != SUCCESS)
  313. brcmf_dbg(ERROR, "Can't read!\n");
  314. *ptr++ = (u8) regdata;
  315. regaddr++;
  316. }
  317. /* Only the lower 17-bits are valid */
  318. scratch = le32_to_cpu(scratch_le);
  319. scratch &= 0x0001FFFF;
  320. return scratch;
  321. }
  322. static int brcmf_sdioh_enablefuncs(struct brcmf_sdio_dev *sdiodev)
  323. {
  324. int err_ret;
  325. u32 fbraddr;
  326. u8 func;
  327. brcmf_dbg(TRACE, "\n");
  328. /* Get the Card's common CIS address */
  329. sdiodev->func_cis_ptr[0] = brcmf_sdioh_get_cisaddr(sdiodev,
  330. SDIO_CCCR_CIS);
  331. brcmf_dbg(INFO, "Card's Common CIS Ptr = 0x%x\n",
  332. sdiodev->func_cis_ptr[0]);
  333. /* Get the Card's function CIS (for each function) */
  334. for (fbraddr = SDIO_FBR_BASE(1), func = 1;
  335. func <= sdiodev->num_funcs; func++, fbraddr += SDIOD_FBR_SIZE) {
  336. sdiodev->func_cis_ptr[func] =
  337. brcmf_sdioh_get_cisaddr(sdiodev, SDIO_FBR_CIS + fbraddr);
  338. brcmf_dbg(INFO, "Function %d CIS Ptr = 0x%x\n",
  339. func, sdiodev->func_cis_ptr[func]);
  340. }
  341. /* Enable Function 1 */
  342. sdio_claim_host(sdiodev->func[1]);
  343. err_ret = sdio_enable_func(sdiodev->func[1]);
  344. sdio_release_host(sdiodev->func[1]);
  345. if (err_ret)
  346. brcmf_dbg(ERROR, "Failed to enable F1 Err: 0x%08x\n", err_ret);
  347. return false;
  348. }
  349. /*
  350. * Public entry points & extern's
  351. */
  352. int brcmf_sdioh_attach(struct brcmf_sdio_dev *sdiodev)
  353. {
  354. int err_ret = 0;
  355. brcmf_dbg(TRACE, "\n");
  356. sdiodev->num_funcs = 2;
  357. sdio_claim_host(sdiodev->func[1]);
  358. err_ret = sdio_set_block_size(sdiodev->func[1], SDIO_FUNC1_BLOCKSIZE);
  359. sdio_release_host(sdiodev->func[1]);
  360. if (err_ret) {
  361. brcmf_dbg(ERROR, "Failed to set F1 blocksize\n");
  362. goto out;
  363. }
  364. sdio_claim_host(sdiodev->func[2]);
  365. err_ret = sdio_set_block_size(sdiodev->func[2], SDIO_FUNC2_BLOCKSIZE);
  366. sdio_release_host(sdiodev->func[2]);
  367. if (err_ret) {
  368. brcmf_dbg(ERROR, "Failed to set F2 blocksize\n");
  369. goto out;
  370. }
  371. brcmf_sdioh_enablefuncs(sdiodev);
  372. out:
  373. brcmf_dbg(TRACE, "Done\n");
  374. return err_ret;
  375. }
  376. void brcmf_sdioh_detach(struct brcmf_sdio_dev *sdiodev)
  377. {
  378. brcmf_dbg(TRACE, "\n");
  379. /* Disable Function 2 */
  380. sdio_claim_host(sdiodev->func[2]);
  381. sdio_disable_func(sdiodev->func[2]);
  382. sdio_release_host(sdiodev->func[2]);
  383. /* Disable Function 1 */
  384. sdio_claim_host(sdiodev->func[1]);
  385. sdio_disable_func(sdiodev->func[1]);
  386. sdio_release_host(sdiodev->func[1]);
  387. }
  388. static int brcmf_ops_sdio_probe(struct sdio_func *func,
  389. const struct sdio_device_id *id)
  390. {
  391. int ret = 0;
  392. struct brcmf_sdio_dev *sdiodev;
  393. struct brcmf_bus *bus_if;
  394. brcmf_dbg(TRACE, "Enter\n");
  395. brcmf_dbg(TRACE, "func->class=%x\n", func->class);
  396. brcmf_dbg(TRACE, "sdio_vendor: 0x%04x\n", func->vendor);
  397. brcmf_dbg(TRACE, "sdio_device: 0x%04x\n", func->device);
  398. brcmf_dbg(TRACE, "Function#: 0x%04x\n", func->num);
  399. if (func->num == 1) {
  400. if (dev_get_drvdata(&func->card->dev)) {
  401. brcmf_dbg(ERROR, "card private drvdata occupied\n");
  402. return -ENXIO;
  403. }
  404. bus_if = kzalloc(sizeof(struct brcmf_bus), GFP_KERNEL);
  405. if (!bus_if)
  406. return -ENOMEM;
  407. sdiodev = kzalloc(sizeof(struct brcmf_sdio_dev), GFP_KERNEL);
  408. if (!sdiodev) {
  409. kfree(bus_if);
  410. return -ENOMEM;
  411. }
  412. sdiodev->func[0] = func->card->sdio_func[0];
  413. sdiodev->func[1] = func;
  414. sdiodev->bus_if = bus_if;
  415. bus_if->bus_priv = sdiodev;
  416. bus_if->type = SDIO_BUS;
  417. bus_if->align = BRCMF_SDALIGN;
  418. dev_set_drvdata(&func->card->dev, sdiodev);
  419. atomic_set(&sdiodev->suspend, false);
  420. init_waitqueue_head(&sdiodev->request_byte_wait);
  421. init_waitqueue_head(&sdiodev->request_word_wait);
  422. init_waitqueue_head(&sdiodev->request_chain_wait);
  423. init_waitqueue_head(&sdiodev->request_buffer_wait);
  424. }
  425. if (func->num == 2) {
  426. sdiodev = dev_get_drvdata(&func->card->dev);
  427. if ((!sdiodev) || (sdiodev->func[1]->card != func->card))
  428. return -ENODEV;
  429. sdiodev->func[2] = func;
  430. bus_if = sdiodev->bus_if;
  431. sdiodev->dev = &func->dev;
  432. dev_set_drvdata(&func->dev, bus_if);
  433. brcmf_dbg(TRACE, "F2 found, calling brcmf_sdio_probe...\n");
  434. ret = brcmf_sdio_probe(sdiodev);
  435. }
  436. return ret;
  437. }
  438. static void brcmf_ops_sdio_remove(struct sdio_func *func)
  439. {
  440. struct brcmf_bus *bus_if;
  441. struct brcmf_sdio_dev *sdiodev;
  442. brcmf_dbg(TRACE, "Enter\n");
  443. brcmf_dbg(INFO, "func->class=%x\n", func->class);
  444. brcmf_dbg(INFO, "sdio_vendor: 0x%04x\n", func->vendor);
  445. brcmf_dbg(INFO, "sdio_device: 0x%04x\n", func->device);
  446. brcmf_dbg(INFO, "Function#: 0x%04x\n", func->num);
  447. if (func->num == 2) {
  448. bus_if = dev_get_drvdata(&func->dev);
  449. sdiodev = bus_if->bus_priv;
  450. brcmf_dbg(TRACE, "F2 found, calling brcmf_sdio_remove...\n");
  451. brcmf_sdio_remove(sdiodev);
  452. dev_set_drvdata(&func->card->dev, NULL);
  453. dev_set_drvdata(&func->dev, NULL);
  454. kfree(bus_if);
  455. kfree(sdiodev);
  456. }
  457. }
  458. #ifdef CONFIG_PM_SLEEP
  459. static int brcmf_sdio_suspend(struct device *dev)
  460. {
  461. mmc_pm_flag_t sdio_flags;
  462. struct sdio_func *func = dev_to_sdio_func(dev);
  463. struct brcmf_sdio_dev *sdiodev = dev_get_drvdata(&func->card->dev);
  464. int ret = 0;
  465. brcmf_dbg(TRACE, "\n");
  466. atomic_set(&sdiodev->suspend, true);
  467. sdio_flags = sdio_get_host_pm_caps(sdiodev->func[1]);
  468. if (!(sdio_flags & MMC_PM_KEEP_POWER)) {
  469. brcmf_dbg(ERROR, "Host can't keep power while suspended\n");
  470. return -EINVAL;
  471. }
  472. ret = sdio_set_host_pm_flags(sdiodev->func[1], MMC_PM_KEEP_POWER);
  473. if (ret) {
  474. brcmf_dbg(ERROR, "Failed to set pm_flags\n");
  475. return ret;
  476. }
  477. brcmf_sdio_wdtmr_enable(sdiodev, false);
  478. return ret;
  479. }
  480. static int brcmf_sdio_resume(struct device *dev)
  481. {
  482. struct sdio_func *func = dev_to_sdio_func(dev);
  483. struct brcmf_sdio_dev *sdiodev = dev_get_drvdata(&func->card->dev);
  484. brcmf_sdio_wdtmr_enable(sdiodev, true);
  485. atomic_set(&sdiodev->suspend, false);
  486. return 0;
  487. }
  488. static const struct dev_pm_ops brcmf_sdio_pm_ops = {
  489. .suspend = brcmf_sdio_suspend,
  490. .resume = brcmf_sdio_resume,
  491. };
  492. #endif /* CONFIG_PM_SLEEP */
  493. static struct sdio_driver brcmf_sdmmc_driver = {
  494. .probe = brcmf_ops_sdio_probe,
  495. .remove = brcmf_ops_sdio_remove,
  496. .name = "brcmfmac",
  497. .id_table = brcmf_sdmmc_ids,
  498. #ifdef CONFIG_PM_SLEEP
  499. .drv = {
  500. .pm = &brcmf_sdio_pm_ops,
  501. },
  502. #endif /* CONFIG_PM_SLEEP */
  503. };
  504. static void __exit brcmf_sdio_exit(void)
  505. {
  506. brcmf_dbg(TRACE, "Enter\n");
  507. sdio_unregister_driver(&brcmf_sdmmc_driver);
  508. }
  509. static int __init brcmf_sdio_init(void)
  510. {
  511. int ret;
  512. brcmf_dbg(TRACE, "Enter\n");
  513. ret = sdio_register_driver(&brcmf_sdmmc_driver);
  514. if (ret)
  515. brcmf_dbg(ERROR, "sdio_register_driver failed: %d\n", ret);
  516. return ret;
  517. }
  518. module_init(brcmf_sdio_init);
  519. module_exit(brcmf_sdio_exit);