id.c 6.1 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/id.c
  3. *
  4. * OMAP2 CPU identification code
  5. *
  6. * Copyright (C) 2005 Nokia Corporation
  7. * Written by Tony Lindgren <tony@atomide.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/io.h>
  17. #include <asm/cputype.h>
  18. #include <mach/common.h>
  19. #include <mach/control.h>
  20. #include <mach/cpu.h>
  21. static struct omap_chip_id omap_chip;
  22. /**
  23. * omap_chip_is - test whether currently running OMAP matches a chip type
  24. * @oc: omap_chip_t to test against
  25. *
  26. * Test whether the currently-running OMAP chip matches the supplied
  27. * chip type 'oc'. Returns 1 upon a match; 0 upon failure.
  28. */
  29. int omap_chip_is(struct omap_chip_id oci)
  30. {
  31. return (oci.oc & omap_chip.oc) ? 1 : 0;
  32. }
  33. EXPORT_SYMBOL(omap_chip_is);
  34. /*----------------------------------------------------------------------------*/
  35. #define OMAP_TAP_IDCODE 0x0204
  36. #define OMAP_TAP_DIE_ID_0 0x0218
  37. #define OMAP_TAP_DIE_ID_1 0x021C
  38. #define OMAP_TAP_DIE_ID_2 0x0220
  39. #define OMAP_TAP_DIE_ID_3 0x0224
  40. #define read_tap_reg(reg) __raw_readl(tap_base + (reg))
  41. struct omap_id {
  42. u16 hawkeye; /* Silicon type (Hawkeye id) */
  43. u8 dev; /* Device type from production_id reg */
  44. u32 type; /* Combined type id copied to system_rev */
  45. };
  46. /* Register values to detect the OMAP version */
  47. static struct omap_id omap_ids[] __initdata = {
  48. { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200024 },
  49. { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201024 },
  50. { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202024 },
  51. { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220024 },
  52. { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230024 },
  53. { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300024 },
  54. };
  55. static void __iomem *tap_base;
  56. static u16 tap_prod_id;
  57. void __init omap24xx_check_revision(void)
  58. {
  59. int i, j;
  60. u32 idcode, prod_id;
  61. u16 hawkeye;
  62. u8 dev_type, rev;
  63. idcode = read_tap_reg(OMAP_TAP_IDCODE);
  64. prod_id = read_tap_reg(tap_prod_id);
  65. hawkeye = (idcode >> 12) & 0xffff;
  66. rev = (idcode >> 28) & 0x0f;
  67. dev_type = (prod_id >> 16) & 0x0f;
  68. pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
  69. idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
  70. pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n",
  71. read_tap_reg(OMAP_TAP_DIE_ID_0));
  72. pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
  73. read_tap_reg(OMAP_TAP_DIE_ID_1),
  74. (read_tap_reg(OMAP_TAP_DIE_ID_1) >> 28) & 0xf);
  75. pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n",
  76. read_tap_reg(OMAP_TAP_DIE_ID_2));
  77. pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n",
  78. read_tap_reg(OMAP_TAP_DIE_ID_3));
  79. pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
  80. prod_id, dev_type);
  81. /* Check hawkeye ids */
  82. for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
  83. if (hawkeye == omap_ids[i].hawkeye)
  84. break;
  85. }
  86. if (i == ARRAY_SIZE(omap_ids)) {
  87. printk(KERN_ERR "Unknown OMAP CPU id\n");
  88. return;
  89. }
  90. for (j = i; j < ARRAY_SIZE(omap_ids); j++) {
  91. if (dev_type == omap_ids[j].dev)
  92. break;
  93. }
  94. if (j == ARRAY_SIZE(omap_ids)) {
  95. printk(KERN_ERR "Unknown OMAP device type. "
  96. "Handling it as OMAP%04x\n",
  97. omap_ids[i].type >> 16);
  98. j = i;
  99. }
  100. pr_info("OMAP%04x", system_rev >> 16);
  101. if ((system_rev >> 8) & 0x0f)
  102. pr_info("ES%x", (system_rev >> 12) & 0xf);
  103. pr_info("\n");
  104. }
  105. void __init omap34xx_check_revision(void)
  106. {
  107. u32 cpuid, idcode;
  108. u16 hawkeye;
  109. u8 rev;
  110. char *rev_name = "ES1.0";
  111. /*
  112. * We cannot access revision registers on ES1.0.
  113. * If the processor type is Cortex-A8 and the revision is 0x0
  114. * it means its Cortex r0p0 which is 3430 ES1.0.
  115. */
  116. cpuid = read_cpuid(CPUID_ID);
  117. if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
  118. system_rev = OMAP3430_REV_ES1_0;
  119. goto out;
  120. }
  121. /*
  122. * Detection for 34xx ES2.0 and above can be done with just
  123. * hawkeye and rev. See TRM 1.5.2 Device Identification.
  124. * Note that rev does not map directly to our defined processor
  125. * revision numbers as ES1.0 uses value 0.
  126. */
  127. idcode = read_tap_reg(OMAP_TAP_IDCODE);
  128. hawkeye = (idcode >> 12) & 0xffff;
  129. rev = (idcode >> 28) & 0xff;
  130. if (hawkeye == 0xb7ae) {
  131. switch (rev) {
  132. case 0:
  133. system_rev = OMAP3430_REV_ES2_0;
  134. rev_name = "ES2.0";
  135. break;
  136. case 2:
  137. system_rev = OMAP3430_REV_ES2_1;
  138. rev_name = "ES2.1";
  139. break;
  140. case 3:
  141. system_rev = OMAP3430_REV_ES3_0;
  142. rev_name = "ES3.0";
  143. break;
  144. default:
  145. /* Use the latest known revision as default */
  146. system_rev = OMAP3430_REV_ES3_0;
  147. rev_name = "Unknown revision\n";
  148. }
  149. }
  150. out:
  151. pr_info("OMAP%04x %s\n", system_rev >> 16, rev_name);
  152. }
  153. /*
  154. * Try to detect the exact revision of the omap we're running on
  155. */
  156. void __init omap2_check_revision(void)
  157. {
  158. /*
  159. * At this point we have an idea about the processor revision set
  160. * earlier with omap2_set_globals_tap().
  161. */
  162. if (cpu_is_omap24xx())
  163. omap24xx_check_revision();
  164. else if (cpu_is_omap34xx())
  165. omap34xx_check_revision();
  166. else
  167. pr_err("OMAP revision unknown, please fix!\n");
  168. /*
  169. * OK, now we know the exact revision. Initialize omap_chip bits
  170. * for powerdowmain and clockdomain code.
  171. */
  172. if (cpu_is_omap243x()) {
  173. /* Currently only supports 2430ES2.1 and 2430-all */
  174. omap_chip.oc |= CHIP_IS_OMAP2430;
  175. } else if (cpu_is_omap242x()) {
  176. /* Currently only supports 2420ES2.1.1 and 2420-all */
  177. omap_chip.oc |= CHIP_IS_OMAP2420;
  178. } else if (cpu_is_omap343x()) {
  179. omap_chip.oc = CHIP_IS_OMAP3430;
  180. if (system_rev == OMAP3430_REV_ES1_0)
  181. omap_chip.oc |= CHIP_IS_OMAP3430ES1;
  182. else if (system_rev > OMAP3430_REV_ES1_0)
  183. omap_chip.oc |= CHIP_IS_OMAP3430ES2;
  184. } else {
  185. pr_err("Uninitialized omap_chip, please fix!\n");
  186. }
  187. }
  188. /*
  189. * Set up things for map_io and processor detection later on. Gets called
  190. * pretty much first thing from board init. For multi-omap, this gets
  191. * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to
  192. * detect the exact revision later on in omap2_detect_revision() once map_io
  193. * is done.
  194. */
  195. void __init omap2_set_globals_tap(struct omap_globals *omap2_globals)
  196. {
  197. system_rev = omap2_globals->class;
  198. tap_base = omap2_globals->tap;
  199. if (cpu_is_omap34xx())
  200. tap_prod_id = 0x0210;
  201. else
  202. tap_prod_id = 0x0208;
  203. }