lm90 7.1 KB

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  1. Kernel driver lm90
  2. ==================
  3. Supported chips:
  4. * National Semiconductor LM90
  5. Prefix: 'lm90'
  6. Addresses scanned: I2C 0x4c
  7. Datasheet: Publicly available at the National Semiconductor website
  8. http://www.national.com/pf/LM/LM90.html
  9. * National Semiconductor LM89
  10. Prefix: 'lm99'
  11. Addresses scanned: I2C 0x4c and 0x4d
  12. Datasheet: Publicly available at the National Semiconductor website
  13. http://www.national.com/mpf/LM/LM89.html
  14. * National Semiconductor LM99
  15. Prefix: 'lm99'
  16. Addresses scanned: I2C 0x4c and 0x4d
  17. Datasheet: Publicly available at the National Semiconductor website
  18. http://www.national.com/pf/LM/LM99.html
  19. * National Semiconductor LM86
  20. Prefix: 'lm86'
  21. Addresses scanned: I2C 0x4c
  22. Datasheet: Publicly available at the National Semiconductor website
  23. http://www.national.com/mpf/LM/LM86.html
  24. * Analog Devices ADM1032
  25. Prefix: 'adm1032'
  26. Addresses scanned: I2C 0x4c and 0x4d
  27. Datasheet: Publicly available at the ON Semiconductor website
  28. http://www.onsemi.com/PowerSolutions/product.do?id=ADM1032
  29. * Analog Devices ADT7461
  30. Prefix: 'adt7461'
  31. Addresses scanned: I2C 0x4c and 0x4d
  32. Datasheet: Publicly available at the ON Semiconductor website
  33. http://www.onsemi.com/PowerSolutions/product.do?id=ADT7461
  34. Note: Only if in ADM1032 compatibility mode
  35. * Maxim MAX6657
  36. Prefix: 'max6657'
  37. Addresses scanned: I2C 0x4c
  38. Datasheet: Publicly available at the Maxim website
  39. http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
  40. * Maxim MAX6658
  41. Prefix: 'max6657'
  42. Addresses scanned: I2C 0x4c
  43. Datasheet: Publicly available at the Maxim website
  44. http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
  45. * Maxim MAX6659
  46. Prefix: 'max6657'
  47. Addresses scanned: I2C 0x4c, 0x4d (unsupported 0x4e)
  48. Datasheet: Publicly available at the Maxim website
  49. http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
  50. * Maxim MAX6680
  51. Prefix: 'max6680'
  52. Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
  53. 0x4c, 0x4d and 0x4e
  54. Datasheet: Publicly available at the Maxim website
  55. http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370
  56. * Maxim MAX6681
  57. Prefix: 'max6680'
  58. Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
  59. 0x4c, 0x4d and 0x4e
  60. Datasheet: Publicly available at the Maxim website
  61. http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370
  62. Author: Jean Delvare <khali@linux-fr.org>
  63. Description
  64. -----------
  65. The LM90 is a digital temperature sensor. It senses its own temperature as
  66. well as the temperature of up to one external diode. It is compatible
  67. with many other devices such as the LM86, the LM89, the LM99, the ADM1032,
  68. the MAX6657, MAX6658, MAX6659, MAX6680 and the MAX6681 all of which are
  69. supported by this driver.
  70. Note that there is no easy way to differentiate between the MAX6657,
  71. MAX6658 and MAX6659 variants. The extra address and features of the
  72. MAX6659 are not supported by this driver. The MAX6680 and MAX6681 only
  73. differ in their pinout, therefore they obviously can't (and don't need to)
  74. be distinguished. Additionally, the ADT7461 is supported if found in
  75. ADM1032 compatibility mode.
  76. The specificity of this family of chipsets over the ADM1021/LM84
  77. family is that it features critical limits with hysteresis, and an
  78. increased resolution of the remote temperature measurement.
  79. The different chipsets of the family are not strictly identical, although
  80. very similar. For reference, here comes a non-exhaustive list of specific
  81. features:
  82. LM90:
  83. * Filter and alert configuration register at 0xBF.
  84. * ALERT is triggered by temperatures over critical limits.
  85. LM86 and LM89:
  86. * Same as LM90
  87. * Better external channel accuracy
  88. LM99:
  89. * Same as LM89
  90. * External temperature shifted by 16 degrees down
  91. ADM1032:
  92. * Consecutive alert register at 0x22.
  93. * Conversion averaging.
  94. * Up to 64 conversions/s.
  95. * ALERT is triggered by open remote sensor.
  96. * SMBus PEC support for Write Byte and Receive Byte transactions.
  97. ADT7461:
  98. * Extended temperature range (breaks compatibility)
  99. * Lower resolution for remote temperature
  100. MAX6657 and MAX6658:
  101. * Better local resolution
  102. * Remote sensor type selection
  103. MAX6659:
  104. * Better local resolution
  105. * Selectable address
  106. * Second critical temperature limit
  107. * Remote sensor type selection
  108. MAX6680 and MAX6681:
  109. * Selectable address
  110. * Remote sensor type selection
  111. All temperature values are given in degrees Celsius. Resolution
  112. is 1.0 degree for the local temperature, 0.125 degree for the remote
  113. temperature, except for the MAX6657, MAX6658 and MAX6659 which have a
  114. resolution of 0.125 degree for both temperatures.
  115. Each sensor has its own high and low limits, plus a critical limit.
  116. Additionally, there is a relative hysteresis value common to both critical
  117. values. To make life easier to user-space applications, two absolute values
  118. are exported, one for each channel, but these values are of course linked.
  119. Only the local hysteresis can be set from user-space, and the same delta
  120. applies to the remote hysteresis.
  121. The lm90 driver will not update its values more frequently than every
  122. other second; reading them more often will do no harm, but will return
  123. 'old' values.
  124. PEC Support
  125. -----------
  126. The ADM1032 is the only chip of the family which supports PEC. It does
  127. not support PEC on all transactions though, so some care must be taken.
  128. When reading a register value, the PEC byte is computed and sent by the
  129. ADM1032 chip. However, in the case of a combined transaction (SMBus Read
  130. Byte), the ADM1032 computes the CRC value over only the second half of
  131. the message rather than its entirety, because it thinks the first half
  132. of the message belongs to a different transaction. As a result, the CRC
  133. value differs from what the SMBus master expects, and all reads fail.
  134. For this reason, the lm90 driver will enable PEC for the ADM1032 only if
  135. the bus supports the SMBus Send Byte and Receive Byte transaction types.
  136. These transactions will be used to read register values, instead of
  137. SMBus Read Byte, and PEC will work properly.
  138. Additionally, the ADM1032 doesn't support SMBus Send Byte with PEC.
  139. Instead, it will try to write the PEC value to the register (because the
  140. SMBus Send Byte transaction with PEC is similar to a Write Byte transaction
  141. without PEC), which is not what we want. Thus, PEC is explicitly disabled
  142. on SMBus Send Byte transactions in the lm90 driver.
  143. PEC on byte data transactions represents a significant increase in bandwidth
  144. usage (+33% for writes, +25% for reads) in normal conditions. With the need
  145. to use two SMBus transaction for reads, this overhead jumps to +50%. Worse,
  146. two transactions will typically mean twice as much delay waiting for
  147. transaction completion, effectively doubling the register cache refresh time.
  148. I guess reliability comes at a price, but it's quite expensive this time.
  149. So, as not everyone might enjoy the slowdown, PEC can be disabled through
  150. sysfs. Just write 0 to the "pec" file and PEC will be disabled. Write 1
  151. to that file to enable PEC again.