pasemi_mac.c 30 KB

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  1. /*
  2. * Copyright (C) 2006-2007 PA Semi, Inc
  3. *
  4. * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/init.h>
  20. #include <linux/module.h>
  21. #include <linux/pci.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/dmaengine.h>
  24. #include <linux/delay.h>
  25. #include <linux/netdevice.h>
  26. #include <linux/etherdevice.h>
  27. #include <asm/dma-mapping.h>
  28. #include <linux/in.h>
  29. #include <linux/skbuff.h>
  30. #include <linux/ip.h>
  31. #include <linux/tcp.h>
  32. #include <net/checksum.h>
  33. #include <asm/irq.h>
  34. #include "pasemi_mac.h"
  35. /* TODO list
  36. *
  37. * - Get rid of pci_{read,write}_config(), map registers with ioremap
  38. * for performance
  39. * - PHY support
  40. * - Multicast support
  41. * - Large MTU support
  42. * - Other performance improvements
  43. */
  44. /* Must be a power of two */
  45. #define RX_RING_SIZE 512
  46. #define TX_RING_SIZE 512
  47. #define DEFAULT_MSG_ENABLE \
  48. (NETIF_MSG_DRV | \
  49. NETIF_MSG_PROBE | \
  50. NETIF_MSG_LINK | \
  51. NETIF_MSG_TIMER | \
  52. NETIF_MSG_IFDOWN | \
  53. NETIF_MSG_IFUP | \
  54. NETIF_MSG_RX_ERR | \
  55. NETIF_MSG_TX_ERR)
  56. #define TX_DESC(mac, num) ((mac)->tx->desc[(num) & (TX_RING_SIZE-1)])
  57. #define TX_DESC_INFO(mac, num) ((mac)->tx->desc_info[(num) & (TX_RING_SIZE-1)])
  58. #define RX_DESC(mac, num) ((mac)->rx->desc[(num) & (RX_RING_SIZE-1)])
  59. #define RX_DESC_INFO(mac, num) ((mac)->rx->desc_info[(num) & (RX_RING_SIZE-1)])
  60. #define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
  61. #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
  62. MODULE_LICENSE("GPL");
  63. MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
  64. MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
  65. static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
  66. module_param(debug, int, 0);
  67. MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
  68. static struct pasdma_status *dma_status;
  69. static unsigned int read_iob_reg(struct pasemi_mac *mac, unsigned int reg)
  70. {
  71. unsigned int val;
  72. pci_read_config_dword(mac->iob_pdev, reg, &val);
  73. return val;
  74. }
  75. static void write_iob_reg(struct pasemi_mac *mac, unsigned int reg,
  76. unsigned int val)
  77. {
  78. pci_write_config_dword(mac->iob_pdev, reg, val);
  79. }
  80. static unsigned int read_mac_reg(struct pasemi_mac *mac, unsigned int reg)
  81. {
  82. unsigned int val;
  83. pci_read_config_dword(mac->pdev, reg, &val);
  84. return val;
  85. }
  86. static void write_mac_reg(struct pasemi_mac *mac, unsigned int reg,
  87. unsigned int val)
  88. {
  89. pci_write_config_dword(mac->pdev, reg, val);
  90. }
  91. static unsigned int read_dma_reg(struct pasemi_mac *mac, unsigned int reg)
  92. {
  93. unsigned int val;
  94. pci_read_config_dword(mac->dma_pdev, reg, &val);
  95. return val;
  96. }
  97. static void write_dma_reg(struct pasemi_mac *mac, unsigned int reg,
  98. unsigned int val)
  99. {
  100. pci_write_config_dword(mac->dma_pdev, reg, val);
  101. }
  102. static int pasemi_get_mac_addr(struct pasemi_mac *mac)
  103. {
  104. struct pci_dev *pdev = mac->pdev;
  105. struct device_node *dn = pci_device_to_OF_node(pdev);
  106. int len;
  107. const u8 *maddr;
  108. u8 addr[6];
  109. if (!dn) {
  110. dev_dbg(&pdev->dev,
  111. "No device node for mac, not configuring\n");
  112. return -ENOENT;
  113. }
  114. maddr = of_get_property(dn, "local-mac-address", &len);
  115. if (maddr && len == 6) {
  116. memcpy(mac->mac_addr, maddr, 6);
  117. return 0;
  118. }
  119. /* Some old versions of firmware mistakenly uses mac-address
  120. * (and as a string) instead of a byte array in local-mac-address.
  121. */
  122. if (maddr == NULL)
  123. maddr = of_get_property(dn, "mac-address", NULL);
  124. if (maddr == NULL) {
  125. dev_warn(&pdev->dev,
  126. "no mac address in device tree, not configuring\n");
  127. return -ENOENT;
  128. }
  129. if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
  130. &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
  131. dev_warn(&pdev->dev,
  132. "can't parse mac address, not configuring\n");
  133. return -EINVAL;
  134. }
  135. memcpy(mac->mac_addr, addr, 6);
  136. return 0;
  137. }
  138. static int pasemi_mac_setup_rx_resources(struct net_device *dev)
  139. {
  140. struct pasemi_mac_rxring *ring;
  141. struct pasemi_mac *mac = netdev_priv(dev);
  142. int chan_id = mac->dma_rxch;
  143. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  144. if (!ring)
  145. goto out_ring;
  146. spin_lock_init(&ring->lock);
  147. ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
  148. RX_RING_SIZE, GFP_KERNEL);
  149. if (!ring->desc_info)
  150. goto out_desc_info;
  151. /* Allocate descriptors */
  152. ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
  153. RX_RING_SIZE *
  154. sizeof(struct pas_dma_xct_descr),
  155. &ring->dma, GFP_KERNEL);
  156. if (!ring->desc)
  157. goto out_desc;
  158. memset(ring->desc, 0, RX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
  159. ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
  160. RX_RING_SIZE * sizeof(u64),
  161. &ring->buf_dma, GFP_KERNEL);
  162. if (!ring->buffers)
  163. goto out_buffers;
  164. memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
  165. write_dma_reg(mac, PAS_DMA_RXCHAN_BASEL(chan_id), PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
  166. write_dma_reg(mac, PAS_DMA_RXCHAN_BASEU(chan_id),
  167. PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
  168. PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 2));
  169. write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id),
  170. PAS_DMA_RXCHAN_CFG_HBU(1));
  171. write_dma_reg(mac, PAS_DMA_RXINT_BASEL(mac->dma_if),
  172. PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
  173. write_dma_reg(mac, PAS_DMA_RXINT_BASEU(mac->dma_if),
  174. PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
  175. PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
  176. ring->next_to_fill = 0;
  177. ring->next_to_clean = 0;
  178. snprintf(ring->irq_name, sizeof(ring->irq_name),
  179. "%s rx", dev->name);
  180. mac->rx = ring;
  181. return 0;
  182. out_buffers:
  183. dma_free_coherent(&mac->dma_pdev->dev,
  184. RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
  185. mac->rx->desc, mac->rx->dma);
  186. out_desc:
  187. kfree(ring->desc_info);
  188. out_desc_info:
  189. kfree(ring);
  190. out_ring:
  191. return -ENOMEM;
  192. }
  193. static int pasemi_mac_setup_tx_resources(struct net_device *dev)
  194. {
  195. struct pasemi_mac *mac = netdev_priv(dev);
  196. u32 val;
  197. int chan_id = mac->dma_txch;
  198. struct pasemi_mac_txring *ring;
  199. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  200. if (!ring)
  201. goto out_ring;
  202. spin_lock_init(&ring->lock);
  203. ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
  204. TX_RING_SIZE, GFP_KERNEL);
  205. if (!ring->desc_info)
  206. goto out_desc_info;
  207. /* Allocate descriptors */
  208. ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
  209. TX_RING_SIZE *
  210. sizeof(struct pas_dma_xct_descr),
  211. &ring->dma, GFP_KERNEL);
  212. if (!ring->desc)
  213. goto out_desc;
  214. memset(ring->desc, 0, TX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
  215. write_dma_reg(mac, PAS_DMA_TXCHAN_BASEL(chan_id),
  216. PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
  217. val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
  218. val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 2);
  219. write_dma_reg(mac, PAS_DMA_TXCHAN_BASEU(chan_id), val);
  220. write_dma_reg(mac, PAS_DMA_TXCHAN_CFG(chan_id),
  221. PAS_DMA_TXCHAN_CFG_TY_IFACE |
  222. PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
  223. PAS_DMA_TXCHAN_CFG_UP |
  224. PAS_DMA_TXCHAN_CFG_WT(2));
  225. ring->next_to_use = 0;
  226. ring->next_to_clean = 0;
  227. snprintf(ring->irq_name, sizeof(ring->irq_name),
  228. "%s tx", dev->name);
  229. mac->tx = ring;
  230. return 0;
  231. out_desc:
  232. kfree(ring->desc_info);
  233. out_desc_info:
  234. kfree(ring);
  235. out_ring:
  236. return -ENOMEM;
  237. }
  238. static void pasemi_mac_free_tx_resources(struct net_device *dev)
  239. {
  240. struct pasemi_mac *mac = netdev_priv(dev);
  241. unsigned int i;
  242. struct pasemi_mac_buffer *info;
  243. struct pas_dma_xct_descr *dp;
  244. for (i = 0; i < TX_RING_SIZE; i++) {
  245. info = &TX_DESC_INFO(mac, i);
  246. dp = &TX_DESC(mac, i);
  247. if (info->dma) {
  248. if (info->skb) {
  249. pci_unmap_single(mac->dma_pdev,
  250. info->dma,
  251. info->skb->len,
  252. PCI_DMA_TODEVICE);
  253. dev_kfree_skb_any(info->skb);
  254. }
  255. info->dma = 0;
  256. info->skb = NULL;
  257. dp->mactx = 0;
  258. dp->ptr = 0;
  259. }
  260. }
  261. dma_free_coherent(&mac->dma_pdev->dev,
  262. TX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
  263. mac->tx->desc, mac->tx->dma);
  264. kfree(mac->tx->desc_info);
  265. kfree(mac->tx);
  266. mac->tx = NULL;
  267. }
  268. static void pasemi_mac_free_rx_resources(struct net_device *dev)
  269. {
  270. struct pasemi_mac *mac = netdev_priv(dev);
  271. unsigned int i;
  272. struct pasemi_mac_buffer *info;
  273. struct pas_dma_xct_descr *dp;
  274. for (i = 0; i < RX_RING_SIZE; i++) {
  275. info = &RX_DESC_INFO(mac, i);
  276. dp = &RX_DESC(mac, i);
  277. if (info->skb) {
  278. if (info->dma) {
  279. pci_unmap_single(mac->dma_pdev,
  280. info->dma,
  281. info->skb->len,
  282. PCI_DMA_FROMDEVICE);
  283. dev_kfree_skb_any(info->skb);
  284. }
  285. info->dma = 0;
  286. info->skb = NULL;
  287. dp->macrx = 0;
  288. dp->ptr = 0;
  289. }
  290. }
  291. dma_free_coherent(&mac->dma_pdev->dev,
  292. RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
  293. mac->rx->desc, mac->rx->dma);
  294. dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
  295. mac->rx->buffers, mac->rx->buf_dma);
  296. kfree(mac->rx->desc_info);
  297. kfree(mac->rx);
  298. mac->rx = NULL;
  299. }
  300. static void pasemi_mac_replenish_rx_ring(struct net_device *dev)
  301. {
  302. struct pasemi_mac *mac = netdev_priv(dev);
  303. unsigned int i;
  304. int start = mac->rx->next_to_fill;
  305. unsigned int limit, count;
  306. limit = (mac->rx->next_to_clean + RX_RING_SIZE -
  307. mac->rx->next_to_fill) & (RX_RING_SIZE - 1);
  308. /* Check to see if we're doing first-time setup */
  309. if (unlikely(mac->rx->next_to_clean == 0 && mac->rx->next_to_fill == 0))
  310. limit = RX_RING_SIZE;
  311. if (limit <= 0)
  312. return;
  313. i = start;
  314. for (count = limit; count; count--) {
  315. struct pasemi_mac_buffer *info = &RX_DESC_INFO(mac, i);
  316. u64 *buff = &RX_BUFF(mac, i);
  317. struct sk_buff *skb;
  318. dma_addr_t dma;
  319. /* skb might still be in there for recycle on short receives */
  320. if (info->skb)
  321. skb = info->skb;
  322. else
  323. skb = dev_alloc_skb(BUF_SIZE);
  324. if (unlikely(!skb))
  325. break;
  326. dma = pci_map_single(mac->dma_pdev, skb->data, skb->len,
  327. PCI_DMA_FROMDEVICE);
  328. if (unlikely(dma_mapping_error(dma))) {
  329. dev_kfree_skb_irq(info->skb);
  330. break;
  331. }
  332. info->skb = skb;
  333. info->dma = dma;
  334. *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
  335. i++;
  336. }
  337. wmb();
  338. write_dma_reg(mac, PAS_DMA_RXCHAN_INCR(mac->dma_rxch), limit - count);
  339. write_dma_reg(mac, PAS_DMA_RXINT_INCR(mac->dma_if), limit - count);
  340. mac->rx->next_to_fill += limit - count;
  341. }
  342. static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
  343. {
  344. unsigned int reg, pcnt;
  345. /* Re-enable packet count interrupts: finally
  346. * ack the packet count interrupt we got in rx_intr.
  347. */
  348. pcnt = *mac->rx_status & PAS_STATUS_PCNT_M;
  349. reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
  350. write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
  351. }
  352. static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
  353. {
  354. unsigned int reg, pcnt;
  355. /* Re-enable packet count interrupts */
  356. pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
  357. reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
  358. write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
  359. }
  360. static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
  361. {
  362. unsigned int n;
  363. int count;
  364. struct pas_dma_xct_descr *dp;
  365. struct pasemi_mac_buffer *info;
  366. struct sk_buff *skb;
  367. unsigned int i, len;
  368. u64 macrx;
  369. dma_addr_t dma;
  370. spin_lock(&mac->rx->lock);
  371. n = mac->rx->next_to_clean;
  372. for (count = limit; count; count--) {
  373. rmb();
  374. dp = &RX_DESC(mac, n);
  375. macrx = dp->macrx;
  376. if (!(macrx & XCT_MACRX_O))
  377. break;
  378. info = NULL;
  379. /* We have to scan for our skb since there's no way
  380. * to back-map them from the descriptor, and if we
  381. * have several receive channels then they might not
  382. * show up in the same order as they were put on the
  383. * interface ring.
  384. */
  385. dma = (dp->ptr & XCT_PTR_ADDR_M);
  386. for (i = n; i < (n + RX_RING_SIZE); i++) {
  387. info = &RX_DESC_INFO(mac, i);
  388. if (info->dma == dma)
  389. break;
  390. }
  391. skb = info->skb;
  392. info->dma = 0;
  393. pci_unmap_single(mac->dma_pdev, dma, skb->len,
  394. PCI_DMA_FROMDEVICE);
  395. len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
  396. if (len < 256) {
  397. struct sk_buff *new_skb =
  398. netdev_alloc_skb(mac->netdev, len + NET_IP_ALIGN);
  399. if (new_skb) {
  400. skb_reserve(new_skb, NET_IP_ALIGN);
  401. memcpy(new_skb->data - NET_IP_ALIGN,
  402. skb->data - NET_IP_ALIGN,
  403. len + NET_IP_ALIGN);
  404. /* save the skb in buffer_info as good */
  405. skb = new_skb;
  406. }
  407. /* else just continue with the old one */
  408. } else
  409. info->skb = NULL;
  410. skb_put(skb, len);
  411. skb->protocol = eth_type_trans(skb, mac->netdev);
  412. if ((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK) {
  413. skb->ip_summed = CHECKSUM_COMPLETE;
  414. skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
  415. XCT_MACRX_CSUM_S;
  416. } else
  417. skb->ip_summed = CHECKSUM_NONE;
  418. mac->stats.rx_bytes += len;
  419. mac->stats.rx_packets++;
  420. netif_receive_skb(skb);
  421. dp->ptr = 0;
  422. dp->macrx = 0;
  423. n++;
  424. }
  425. mac->rx->next_to_clean += limit - count;
  426. pasemi_mac_replenish_rx_ring(mac->netdev);
  427. spin_unlock(&mac->rx->lock);
  428. return count;
  429. }
  430. static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
  431. {
  432. int i;
  433. struct pasemi_mac_buffer *info;
  434. struct pas_dma_xct_descr *dp;
  435. int start, count;
  436. int flags;
  437. spin_lock_irqsave(&mac->tx->lock, flags);
  438. start = mac->tx->next_to_clean;
  439. count = 0;
  440. for (i = start; i < mac->tx->next_to_use; i++) {
  441. dp = &TX_DESC(mac, i);
  442. if (!dp || (dp->mactx & XCT_MACTX_O))
  443. break;
  444. count++;
  445. info = &TX_DESC_INFO(mac, i);
  446. pci_unmap_single(mac->dma_pdev, info->dma,
  447. info->skb->len, PCI_DMA_TODEVICE);
  448. dev_kfree_skb_irq(info->skb);
  449. info->skb = NULL;
  450. info->dma = 0;
  451. dp->mactx = 0;
  452. dp->ptr = 0;
  453. }
  454. mac->tx->next_to_clean += count;
  455. spin_unlock_irqrestore(&mac->tx->lock, flags);
  456. netif_wake_queue(mac->netdev);
  457. return count;
  458. }
  459. static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
  460. {
  461. struct net_device *dev = data;
  462. struct pasemi_mac *mac = netdev_priv(dev);
  463. unsigned int reg;
  464. if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
  465. return IRQ_NONE;
  466. if (*mac->rx_status & PAS_STATUS_ERROR)
  467. printk("rx_status reported error\n");
  468. /* Don't reset packet count so it won't fire again but clear
  469. * all others.
  470. */
  471. reg = 0;
  472. if (*mac->rx_status & PAS_STATUS_SOFT)
  473. reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
  474. if (*mac->rx_status & PAS_STATUS_ERROR)
  475. reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
  476. if (*mac->rx_status & PAS_STATUS_TIMER)
  477. reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
  478. netif_rx_schedule(dev, &mac->napi);
  479. write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
  480. return IRQ_HANDLED;
  481. }
  482. static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
  483. {
  484. struct net_device *dev = data;
  485. struct pasemi_mac *mac = netdev_priv(dev);
  486. unsigned int reg, pcnt;
  487. if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
  488. return IRQ_NONE;
  489. pasemi_mac_clean_tx(mac);
  490. pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
  491. reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
  492. if (*mac->tx_status & PAS_STATUS_SOFT)
  493. reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
  494. if (*mac->tx_status & PAS_STATUS_ERROR)
  495. reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
  496. write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
  497. return IRQ_HANDLED;
  498. }
  499. static void pasemi_adjust_link(struct net_device *dev)
  500. {
  501. struct pasemi_mac *mac = netdev_priv(dev);
  502. int msg;
  503. unsigned int flags;
  504. unsigned int new_flags;
  505. if (!mac->phydev->link) {
  506. /* If no link, MAC speed settings don't matter. Just report
  507. * link down and return.
  508. */
  509. if (mac->link && netif_msg_link(mac))
  510. printk(KERN_INFO "%s: Link is down.\n", dev->name);
  511. netif_carrier_off(dev);
  512. mac->link = 0;
  513. return;
  514. } else
  515. netif_carrier_on(dev);
  516. flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
  517. new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
  518. PAS_MAC_CFG_PCFG_TSR_M);
  519. if (!mac->phydev->duplex)
  520. new_flags |= PAS_MAC_CFG_PCFG_HD;
  521. switch (mac->phydev->speed) {
  522. case 1000:
  523. new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
  524. PAS_MAC_CFG_PCFG_TSR_1G;
  525. break;
  526. case 100:
  527. new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
  528. PAS_MAC_CFG_PCFG_TSR_100M;
  529. break;
  530. case 10:
  531. new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
  532. PAS_MAC_CFG_PCFG_TSR_10M;
  533. break;
  534. default:
  535. printk("Unsupported speed %d\n", mac->phydev->speed);
  536. }
  537. /* Print on link or speed/duplex change */
  538. msg = mac->link != mac->phydev->link || flags != new_flags;
  539. mac->duplex = mac->phydev->duplex;
  540. mac->speed = mac->phydev->speed;
  541. mac->link = mac->phydev->link;
  542. if (new_flags != flags)
  543. write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
  544. if (msg && netif_msg_link(mac))
  545. printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
  546. dev->name, mac->speed, mac->duplex ? "full" : "half");
  547. }
  548. static int pasemi_mac_phy_init(struct net_device *dev)
  549. {
  550. struct pasemi_mac *mac = netdev_priv(dev);
  551. struct device_node *dn, *phy_dn;
  552. struct phy_device *phydev;
  553. unsigned int phy_id;
  554. const phandle *ph;
  555. const unsigned int *prop;
  556. struct resource r;
  557. int ret;
  558. dn = pci_device_to_OF_node(mac->pdev);
  559. ph = of_get_property(dn, "phy-handle", NULL);
  560. if (!ph)
  561. return -ENODEV;
  562. phy_dn = of_find_node_by_phandle(*ph);
  563. prop = of_get_property(phy_dn, "reg", NULL);
  564. ret = of_address_to_resource(phy_dn->parent, 0, &r);
  565. if (ret)
  566. goto err;
  567. phy_id = *prop;
  568. snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
  569. of_node_put(phy_dn);
  570. mac->link = 0;
  571. mac->speed = 0;
  572. mac->duplex = -1;
  573. phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
  574. if (IS_ERR(phydev)) {
  575. printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
  576. return PTR_ERR(phydev);
  577. }
  578. mac->phydev = phydev;
  579. return 0;
  580. err:
  581. of_node_put(phy_dn);
  582. return -ENODEV;
  583. }
  584. static int pasemi_mac_open(struct net_device *dev)
  585. {
  586. struct pasemi_mac *mac = netdev_priv(dev);
  587. int base_irq;
  588. unsigned int flags;
  589. int ret;
  590. /* enable rx section */
  591. write_dma_reg(mac, PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
  592. /* enable tx section */
  593. write_dma_reg(mac, PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
  594. flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
  595. PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
  596. PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
  597. write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
  598. flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
  599. PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
  600. flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
  601. write_iob_reg(mac, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
  602. PAS_IOB_DMA_RXCH_CFG_CNTTH(0));
  603. write_iob_reg(mac, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
  604. PAS_IOB_DMA_TXCH_CFG_CNTTH(32));
  605. /* Clear out any residual packet count state from firmware */
  606. pasemi_mac_restart_rx_intr(mac);
  607. pasemi_mac_restart_tx_intr(mac);
  608. /* 0xffffff is max value, about 16ms */
  609. write_iob_reg(mac, PAS_IOB_DMA_COM_TIMEOUTCFG,
  610. PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
  611. write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
  612. ret = pasemi_mac_setup_rx_resources(dev);
  613. if (ret)
  614. goto out_rx_resources;
  615. ret = pasemi_mac_setup_tx_resources(dev);
  616. if (ret)
  617. goto out_tx_resources;
  618. write_mac_reg(mac, PAS_MAC_IPC_CHNL,
  619. PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
  620. PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
  621. /* enable rx if */
  622. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
  623. PAS_DMA_RXINT_RCMDSTA_EN);
  624. /* enable rx channel */
  625. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
  626. PAS_DMA_RXCHAN_CCMDSTA_EN |
  627. PAS_DMA_RXCHAN_CCMDSTA_DU);
  628. /* enable tx channel */
  629. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
  630. PAS_DMA_TXCHAN_TCMDSTA_EN);
  631. pasemi_mac_replenish_rx_ring(dev);
  632. ret = pasemi_mac_phy_init(dev);
  633. /* Some configs don't have PHYs (XAUI etc), so don't complain about
  634. * failed init due to -ENODEV.
  635. */
  636. if (ret && ret != -ENODEV)
  637. dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
  638. netif_start_queue(dev);
  639. napi_enable(&mac->napi);
  640. /* Interrupts are a bit different for our DMA controller: While
  641. * it's got one a regular PCI device header, the interrupt there
  642. * is really the base of the range it's using. Each tx and rx
  643. * channel has it's own interrupt source.
  644. */
  645. base_irq = virq_to_hw(mac->dma_pdev->irq);
  646. mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
  647. mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
  648. ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
  649. mac->tx->irq_name, dev);
  650. if (ret) {
  651. dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
  652. base_irq + mac->dma_txch, ret);
  653. goto out_tx_int;
  654. }
  655. ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
  656. mac->rx->irq_name, dev);
  657. if (ret) {
  658. dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
  659. base_irq + 20 + mac->dma_rxch, ret);
  660. goto out_rx_int;
  661. }
  662. if (mac->phydev)
  663. phy_start(mac->phydev);
  664. return 0;
  665. out_rx_int:
  666. free_irq(mac->tx_irq, dev);
  667. out_tx_int:
  668. napi_disable(&mac->napi);
  669. netif_stop_queue(dev);
  670. pasemi_mac_free_tx_resources(dev);
  671. out_tx_resources:
  672. pasemi_mac_free_rx_resources(dev);
  673. out_rx_resources:
  674. return ret;
  675. }
  676. #define MAX_RETRIES 5000
  677. static int pasemi_mac_close(struct net_device *dev)
  678. {
  679. struct pasemi_mac *mac = netdev_priv(dev);
  680. unsigned int stat;
  681. int retries;
  682. if (mac->phydev) {
  683. phy_stop(mac->phydev);
  684. phy_disconnect(mac->phydev);
  685. }
  686. netif_stop_queue(dev);
  687. napi_disable(&mac->napi);
  688. /* Clean out any pending buffers */
  689. pasemi_mac_clean_tx(mac);
  690. pasemi_mac_clean_rx(mac, RX_RING_SIZE);
  691. /* Disable interface */
  692. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), PAS_DMA_TXCHAN_TCMDSTA_ST);
  693. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), PAS_DMA_RXINT_RCMDSTA_ST);
  694. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), PAS_DMA_RXCHAN_CCMDSTA_ST);
  695. for (retries = 0; retries < MAX_RETRIES; retries++) {
  696. stat = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
  697. if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
  698. break;
  699. cond_resched();
  700. }
  701. if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
  702. dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
  703. for (retries = 0; retries < MAX_RETRIES; retries++) {
  704. stat = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
  705. if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT))
  706. break;
  707. cond_resched();
  708. }
  709. if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
  710. dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
  711. for (retries = 0; retries < MAX_RETRIES; retries++) {
  712. stat = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
  713. if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT))
  714. break;
  715. cond_resched();
  716. }
  717. if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
  718. dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
  719. /* Then, disable the channel. This must be done separately from
  720. * stopping, since you can't disable when active.
  721. */
  722. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
  723. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
  724. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
  725. free_irq(mac->tx_irq, dev);
  726. free_irq(mac->rx_irq, dev);
  727. /* Free resources */
  728. pasemi_mac_free_rx_resources(dev);
  729. pasemi_mac_free_tx_resources(dev);
  730. return 0;
  731. }
  732. static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
  733. {
  734. struct pasemi_mac *mac = netdev_priv(dev);
  735. struct pasemi_mac_txring *txring;
  736. struct pasemi_mac_buffer *info;
  737. struct pas_dma_xct_descr *dp;
  738. u64 dflags;
  739. dma_addr_t map;
  740. int flags;
  741. dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
  742. if (skb->ip_summed == CHECKSUM_PARTIAL) {
  743. const unsigned char *nh = skb_network_header(skb);
  744. switch (ip_hdr(skb)->protocol) {
  745. case IPPROTO_TCP:
  746. dflags |= XCT_MACTX_CSUM_TCP;
  747. dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
  748. dflags |= XCT_MACTX_IPO(nh - skb->data);
  749. break;
  750. case IPPROTO_UDP:
  751. dflags |= XCT_MACTX_CSUM_UDP;
  752. dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
  753. dflags |= XCT_MACTX_IPO(nh - skb->data);
  754. break;
  755. }
  756. }
  757. map = pci_map_single(mac->dma_pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
  758. if (dma_mapping_error(map))
  759. return NETDEV_TX_BUSY;
  760. txring = mac->tx;
  761. spin_lock_irqsave(&txring->lock, flags);
  762. if (txring->next_to_clean - txring->next_to_use == TX_RING_SIZE) {
  763. spin_unlock_irqrestore(&txring->lock, flags);
  764. pasemi_mac_clean_tx(mac);
  765. pasemi_mac_restart_tx_intr(mac);
  766. spin_lock_irqsave(&txring->lock, flags);
  767. if (txring->next_to_clean - txring->next_to_use ==
  768. TX_RING_SIZE) {
  769. /* Still no room -- stop the queue and wait for tx
  770. * intr when there's room.
  771. */
  772. netif_stop_queue(dev);
  773. goto out_err;
  774. }
  775. }
  776. dp = &TX_DESC(mac, txring->next_to_use);
  777. info = &TX_DESC_INFO(mac, txring->next_to_use);
  778. dp->mactx = dflags | XCT_MACTX_LLEN(skb->len);
  779. dp->ptr = XCT_PTR_LEN(skb->len) | XCT_PTR_ADDR(map);
  780. info->dma = map;
  781. info->skb = skb;
  782. txring->next_to_use++;
  783. mac->stats.tx_packets++;
  784. mac->stats.tx_bytes += skb->len;
  785. spin_unlock_irqrestore(&txring->lock, flags);
  786. write_dma_reg(mac, PAS_DMA_TXCHAN_INCR(mac->dma_txch), 1);
  787. return NETDEV_TX_OK;
  788. out_err:
  789. spin_unlock_irqrestore(&txring->lock, flags);
  790. pci_unmap_single(mac->dma_pdev, map, skb->len, PCI_DMA_TODEVICE);
  791. return NETDEV_TX_BUSY;
  792. }
  793. static struct net_device_stats *pasemi_mac_get_stats(struct net_device *dev)
  794. {
  795. struct pasemi_mac *mac = netdev_priv(dev);
  796. return &mac->stats;
  797. }
  798. static void pasemi_mac_set_rx_mode(struct net_device *dev)
  799. {
  800. struct pasemi_mac *mac = netdev_priv(dev);
  801. unsigned int flags;
  802. flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
  803. /* Set promiscuous */
  804. if (dev->flags & IFF_PROMISC)
  805. flags |= PAS_MAC_CFG_PCFG_PR;
  806. else
  807. flags &= ~PAS_MAC_CFG_PCFG_PR;
  808. write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
  809. }
  810. static int pasemi_mac_poll(struct napi_struct *napi, int budget)
  811. {
  812. struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
  813. struct net_device *dev = mac->netdev;
  814. int pkts;
  815. pkts = pasemi_mac_clean_rx(mac, budget);
  816. if (pkts < budget) {
  817. /* all done, no more packets present */
  818. netif_rx_complete(dev, napi);
  819. pasemi_mac_restart_rx_intr(mac);
  820. }
  821. return pkts;
  822. }
  823. static int __devinit
  824. pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  825. {
  826. static int index = 0;
  827. struct net_device *dev;
  828. struct pasemi_mac *mac;
  829. int err;
  830. err = pci_enable_device(pdev);
  831. if (err)
  832. return err;
  833. dev = alloc_etherdev(sizeof(struct pasemi_mac));
  834. if (dev == NULL) {
  835. dev_err(&pdev->dev,
  836. "pasemi_mac: Could not allocate ethernet device.\n");
  837. err = -ENOMEM;
  838. goto out_disable_device;
  839. }
  840. SET_MODULE_OWNER(dev);
  841. pci_set_drvdata(pdev, dev);
  842. SET_NETDEV_DEV(dev, &pdev->dev);
  843. mac = netdev_priv(dev);
  844. mac->pdev = pdev;
  845. mac->netdev = dev;
  846. mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
  847. netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
  848. dev->features = NETIF_F_HW_CSUM;
  849. if (!mac->dma_pdev) {
  850. dev_err(&pdev->dev, "Can't find DMA Controller\n");
  851. err = -ENODEV;
  852. goto out_free_netdev;
  853. }
  854. mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
  855. if (!mac->iob_pdev) {
  856. dev_err(&pdev->dev, "Can't find I/O Bridge\n");
  857. err = -ENODEV;
  858. goto out_put_dma_pdev;
  859. }
  860. /* These should come out of the device tree eventually */
  861. mac->dma_txch = index;
  862. mac->dma_rxch = index;
  863. /* We probe GMAC before XAUI, but the DMA interfaces are
  864. * in XAUI, GMAC order.
  865. */
  866. if (index < 4)
  867. mac->dma_if = index + 2;
  868. else
  869. mac->dma_if = index - 4;
  870. index++;
  871. switch (pdev->device) {
  872. case 0xa005:
  873. mac->type = MAC_TYPE_GMAC;
  874. break;
  875. case 0xa006:
  876. mac->type = MAC_TYPE_XAUI;
  877. break;
  878. default:
  879. err = -ENODEV;
  880. goto out;
  881. }
  882. /* get mac addr from device tree */
  883. if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
  884. err = -ENODEV;
  885. goto out;
  886. }
  887. memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
  888. dev->open = pasemi_mac_open;
  889. dev->stop = pasemi_mac_close;
  890. dev->hard_start_xmit = pasemi_mac_start_tx;
  891. dev->get_stats = pasemi_mac_get_stats;
  892. dev->set_multicast_list = pasemi_mac_set_rx_mode;
  893. /* The dma status structure is located in the I/O bridge, and
  894. * is cache coherent.
  895. */
  896. if (!dma_status)
  897. /* XXXOJN This should come from the device tree */
  898. dma_status = __ioremap(0xfd800000, 0x1000, 0);
  899. mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
  900. mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
  901. mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
  902. /* Enable most messages by default */
  903. mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
  904. err = register_netdev(dev);
  905. if (err) {
  906. dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
  907. err);
  908. goto out;
  909. } else
  910. printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
  911. "hw addr %02x:%02x:%02x:%02x:%02x:%02x\n",
  912. dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
  913. mac->dma_if, mac->dma_txch, mac->dma_rxch,
  914. dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
  915. dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
  916. return err;
  917. out:
  918. pci_dev_put(mac->iob_pdev);
  919. out_put_dma_pdev:
  920. pci_dev_put(mac->dma_pdev);
  921. out_free_netdev:
  922. free_netdev(dev);
  923. out_disable_device:
  924. pci_disable_device(pdev);
  925. return err;
  926. }
  927. static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
  928. {
  929. struct net_device *netdev = pci_get_drvdata(pdev);
  930. struct pasemi_mac *mac;
  931. if (!netdev)
  932. return;
  933. mac = netdev_priv(netdev);
  934. unregister_netdev(netdev);
  935. pci_disable_device(pdev);
  936. pci_dev_put(mac->dma_pdev);
  937. pci_dev_put(mac->iob_pdev);
  938. pci_set_drvdata(pdev, NULL);
  939. free_netdev(netdev);
  940. }
  941. static struct pci_device_id pasemi_mac_pci_tbl[] = {
  942. { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
  943. { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
  944. { },
  945. };
  946. MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
  947. static struct pci_driver pasemi_mac_driver = {
  948. .name = "pasemi_mac",
  949. .id_table = pasemi_mac_pci_tbl,
  950. .probe = pasemi_mac_probe,
  951. .remove = __devexit_p(pasemi_mac_remove),
  952. };
  953. static void __exit pasemi_mac_cleanup_module(void)
  954. {
  955. pci_unregister_driver(&pasemi_mac_driver);
  956. __iounmap(dma_status);
  957. dma_status = NULL;
  958. }
  959. int pasemi_mac_init_module(void)
  960. {
  961. return pci_register_driver(&pasemi_mac_driver);
  962. }
  963. module_init(pasemi_mac_init_module);
  964. module_exit(pasemi_mac_cleanup_module);