generic.c 4.5 KB

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  1. /*
  2. * arch/arm/mach-netx/generic.c
  3. *
  4. * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2
  8. * as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/device.h>
  20. #include <linux/init.h>
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/io.h>
  25. #include <linux/irqchip/arm-vic.h>
  26. #include <linux/reboot.h>
  27. #include <mach/hardware.h>
  28. #include <asm/mach/map.h>
  29. #include <mach/netx-regs.h>
  30. #include <asm/mach/irq.h>
  31. static struct map_desc netx_io_desc[] __initdata = {
  32. {
  33. .virtual = NETX_IO_VIRT,
  34. .pfn = __phys_to_pfn(NETX_IO_PHYS),
  35. .length = NETX_IO_SIZE,
  36. .type = MT_DEVICE
  37. }
  38. };
  39. void __init netx_map_io(void)
  40. {
  41. iotable_init(netx_io_desc, ARRAY_SIZE(netx_io_desc));
  42. }
  43. static struct resource netx_rtc_resources[] = {
  44. [0] = {
  45. .start = 0x00101200,
  46. .end = 0x00101220,
  47. .flags = IORESOURCE_MEM,
  48. },
  49. };
  50. static struct platform_device netx_rtc_device = {
  51. .name = "netx-rtc",
  52. .id = 0,
  53. .num_resources = ARRAY_SIZE(netx_rtc_resources),
  54. .resource = netx_rtc_resources,
  55. };
  56. static struct platform_device *devices[] __initdata = {
  57. &netx_rtc_device,
  58. };
  59. #if 0
  60. #define DEBUG_IRQ(fmt...) printk(fmt)
  61. #else
  62. #define DEBUG_IRQ(fmt...) while (0) {}
  63. #endif
  64. static void
  65. netx_hif_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
  66. {
  67. unsigned int irq = NETX_IRQ_HIF_CHAINED(0);
  68. unsigned int stat;
  69. stat = ((readl(NETX_DPMAS_INT_EN) &
  70. readl(NETX_DPMAS_INT_STAT)) >> 24) & 0x1f;
  71. while (stat) {
  72. if (stat & 1) {
  73. DEBUG_IRQ("handling irq %d\n", irq);
  74. generic_handle_irq(irq);
  75. }
  76. irq++;
  77. stat >>= 1;
  78. }
  79. }
  80. static int
  81. netx_hif_irq_type(struct irq_data *d, unsigned int type)
  82. {
  83. unsigned int val, irq;
  84. val = readl(NETX_DPMAS_IF_CONF1);
  85. irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
  86. if (type & IRQ_TYPE_EDGE_RISING) {
  87. DEBUG_IRQ("rising edges\n");
  88. val |= (1 << 26) << irq;
  89. }
  90. if (type & IRQ_TYPE_EDGE_FALLING) {
  91. DEBUG_IRQ("falling edges\n");
  92. val &= ~((1 << 26) << irq);
  93. }
  94. if (type & IRQ_TYPE_LEVEL_LOW) {
  95. DEBUG_IRQ("low level\n");
  96. val &= ~((1 << 26) << irq);
  97. }
  98. if (type & IRQ_TYPE_LEVEL_HIGH) {
  99. DEBUG_IRQ("high level\n");
  100. val |= (1 << 26) << irq;
  101. }
  102. writel(val, NETX_DPMAS_IF_CONF1);
  103. return 0;
  104. }
  105. static void
  106. netx_hif_ack_irq(struct irq_data *d)
  107. {
  108. unsigned int val, irq;
  109. irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
  110. writel((1 << 24) << irq, NETX_DPMAS_INT_STAT);
  111. val = readl(NETX_DPMAS_INT_EN);
  112. val &= ~((1 << 24) << irq);
  113. writel(val, NETX_DPMAS_INT_EN);
  114. DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
  115. }
  116. static void
  117. netx_hif_mask_irq(struct irq_data *d)
  118. {
  119. unsigned int val, irq;
  120. irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
  121. val = readl(NETX_DPMAS_INT_EN);
  122. val &= ~((1 << 24) << irq);
  123. writel(val, NETX_DPMAS_INT_EN);
  124. DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
  125. }
  126. static void
  127. netx_hif_unmask_irq(struct irq_data *d)
  128. {
  129. unsigned int val, irq;
  130. irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
  131. val = readl(NETX_DPMAS_INT_EN);
  132. val |= (1 << 24) << irq;
  133. writel(val, NETX_DPMAS_INT_EN);
  134. DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
  135. }
  136. static struct irq_chip netx_hif_chip = {
  137. .irq_ack = netx_hif_ack_irq,
  138. .irq_mask = netx_hif_mask_irq,
  139. .irq_unmask = netx_hif_unmask_irq,
  140. .irq_set_type = netx_hif_irq_type,
  141. };
  142. void __init netx_init_irq(void)
  143. {
  144. int irq;
  145. vic_init(io_p2v(NETX_PA_VIC), NETX_IRQ_VIC_START, ~0, 0);
  146. for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
  147. irq_set_chip_and_handler(irq, &netx_hif_chip,
  148. handle_level_irq);
  149. set_irq_flags(irq, IRQF_VALID);
  150. }
  151. writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN);
  152. irq_set_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler);
  153. }
  154. static int __init netx_init(void)
  155. {
  156. return platform_add_devices(devices, ARRAY_SIZE(devices));
  157. }
  158. subsys_initcall(netx_init);
  159. void netx_restart(enum reboot_mode mode, const char *cmd)
  160. {
  161. writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES,
  162. NETX_SYSTEM_RES_CR);
  163. }