traps.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739
  1. /*
  2. * arch/s390/kernel/traps.c
  3. *
  4. * S390 version
  5. * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
  6. * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
  7. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
  8. *
  9. * Derived from "arch/i386/kernel/traps.c"
  10. * Copyright (C) 1991, 1992 Linus Torvalds
  11. */
  12. /*
  13. * 'Traps.c' handles hardware traps and faults after we have saved some
  14. * state in 'asm.s'.
  15. */
  16. #include <linux/sched.h>
  17. #include <linux/kernel.h>
  18. #include <linux/string.h>
  19. #include <linux/errno.h>
  20. #include <linux/ptrace.h>
  21. #include <linux/timer.h>
  22. #include <linux/mm.h>
  23. #include <linux/smp.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/delay.h>
  28. #include <linux/module.h>
  29. #include <linux/kdebug.h>
  30. #include <linux/kallsyms.h>
  31. #include <linux/reboot.h>
  32. #include <linux/kprobes.h>
  33. #include <linux/bug.h>
  34. #include <linux/utsname.h>
  35. #include <asm/system.h>
  36. #include <asm/uaccess.h>
  37. #include <asm/io.h>
  38. #include <asm/atomic.h>
  39. #include <asm/mathemu.h>
  40. #include <asm/cpcmd.h>
  41. #include <asm/s390_ext.h>
  42. #include <asm/lowcore.h>
  43. #include <asm/debug.h>
  44. #include "entry.h"
  45. pgm_check_handler_t *pgm_check_table[128];
  46. #ifdef CONFIG_SYSCTL
  47. #ifdef CONFIG_PROCESS_DEBUG
  48. int sysctl_userprocess_debug = 1;
  49. #else
  50. int sysctl_userprocess_debug = 0;
  51. #endif
  52. #endif
  53. extern pgm_check_handler_t do_protection_exception;
  54. extern pgm_check_handler_t do_dat_exception;
  55. extern pgm_check_handler_t do_asce_exception;
  56. #define stack_pointer ({ void **sp; asm("la %0,0(15)" : "=&d" (sp)); sp; })
  57. #ifndef CONFIG_64BIT
  58. #define FOURLONG "%08lx %08lx %08lx %08lx\n"
  59. static int kstack_depth_to_print = 12;
  60. #else /* CONFIG_64BIT */
  61. #define FOURLONG "%016lx %016lx %016lx %016lx\n"
  62. static int kstack_depth_to_print = 20;
  63. #endif /* CONFIG_64BIT */
  64. /*
  65. * For show_trace we have tree different stack to consider:
  66. * - the panic stack which is used if the kernel stack has overflown
  67. * - the asynchronous interrupt stack (cpu related)
  68. * - the synchronous kernel stack (process related)
  69. * The stack trace can start at any of the three stack and can potentially
  70. * touch all of them. The order is: panic stack, async stack, sync stack.
  71. */
  72. static unsigned long
  73. __show_trace(unsigned long sp, unsigned long low, unsigned long high)
  74. {
  75. struct stack_frame *sf;
  76. struct pt_regs *regs;
  77. while (1) {
  78. sp = sp & PSW_ADDR_INSN;
  79. if (sp < low || sp > high - sizeof(*sf))
  80. return sp;
  81. sf = (struct stack_frame *) sp;
  82. printk("([<%016lx>] ", sf->gprs[8] & PSW_ADDR_INSN);
  83. print_symbol("%s)\n", sf->gprs[8] & PSW_ADDR_INSN);
  84. /* Follow the backchain. */
  85. while (1) {
  86. low = sp;
  87. sp = sf->back_chain & PSW_ADDR_INSN;
  88. if (!sp)
  89. break;
  90. if (sp <= low || sp > high - sizeof(*sf))
  91. return sp;
  92. sf = (struct stack_frame *) sp;
  93. printk(" [<%016lx>] ", sf->gprs[8] & PSW_ADDR_INSN);
  94. print_symbol("%s\n", sf->gprs[8] & PSW_ADDR_INSN);
  95. }
  96. /* Zero backchain detected, check for interrupt frame. */
  97. sp = (unsigned long) (sf + 1);
  98. if (sp <= low || sp > high - sizeof(*regs))
  99. return sp;
  100. regs = (struct pt_regs *) sp;
  101. printk(" [<%016lx>] ", regs->psw.addr & PSW_ADDR_INSN);
  102. print_symbol("%s\n", regs->psw.addr & PSW_ADDR_INSN);
  103. low = sp;
  104. sp = regs->gprs[15];
  105. }
  106. }
  107. void show_trace(struct task_struct *task, unsigned long *stack)
  108. {
  109. register unsigned long __r15 asm ("15");
  110. unsigned long sp;
  111. sp = (unsigned long) stack;
  112. if (!sp)
  113. sp = task ? task->thread.ksp : __r15;
  114. printk("Call Trace:\n");
  115. #ifdef CONFIG_CHECK_STACK
  116. sp = __show_trace(sp, S390_lowcore.panic_stack - 4096,
  117. S390_lowcore.panic_stack);
  118. #endif
  119. sp = __show_trace(sp, S390_lowcore.async_stack - ASYNC_SIZE,
  120. S390_lowcore.async_stack);
  121. if (task)
  122. __show_trace(sp, (unsigned long) task_stack_page(task),
  123. (unsigned long) task_stack_page(task) + THREAD_SIZE);
  124. else
  125. __show_trace(sp, S390_lowcore.thread_info,
  126. S390_lowcore.thread_info + THREAD_SIZE);
  127. printk("\n");
  128. if (!task)
  129. task = current;
  130. debug_show_held_locks(task);
  131. }
  132. void show_stack(struct task_struct *task, unsigned long *sp)
  133. {
  134. register unsigned long * __r15 asm ("15");
  135. unsigned long *stack;
  136. int i;
  137. if (!sp)
  138. stack = task ? (unsigned long *) task->thread.ksp : __r15;
  139. else
  140. stack = sp;
  141. for (i = 0; i < kstack_depth_to_print; i++) {
  142. if (((addr_t) stack & (THREAD_SIZE-1)) == 0)
  143. break;
  144. if (i && ((i * sizeof (long) % 32) == 0))
  145. printk("\n ");
  146. printk("%p ", (void *)*stack++);
  147. }
  148. printk("\n");
  149. show_trace(task, sp);
  150. }
  151. /*
  152. * The architecture-independent dump_stack generator
  153. */
  154. void dump_stack(void)
  155. {
  156. printk("CPU: %d %s %s %.*s\n",
  157. task_thread_info(current)->cpu, print_tainted(),
  158. init_utsname()->release,
  159. (int)strcspn(init_utsname()->version, " "),
  160. init_utsname()->version);
  161. printk("Process %s (pid: %d, task: %p, ksp: %p)\n",
  162. current->comm, current->pid, current,
  163. (void *) current->thread.ksp);
  164. show_stack(NULL, NULL);
  165. }
  166. EXPORT_SYMBOL(dump_stack);
  167. static inline int mask_bits(struct pt_regs *regs, unsigned long bits)
  168. {
  169. return (regs->psw.mask & bits) / ((~bits + 1) & bits);
  170. }
  171. void show_registers(struct pt_regs *regs)
  172. {
  173. char *mode;
  174. mode = (regs->psw.mask & PSW_MASK_PSTATE) ? "User" : "Krnl";
  175. printk("%s PSW : %p %p",
  176. mode, (void *) regs->psw.mask,
  177. (void *) regs->psw.addr);
  178. print_symbol(" (%s)\n", regs->psw.addr & PSW_ADDR_INSN);
  179. printk(" R:%x T:%x IO:%x EX:%x Key:%x M:%x W:%x "
  180. "P:%x AS:%x CC:%x PM:%x", mask_bits(regs, PSW_MASK_PER),
  181. mask_bits(regs, PSW_MASK_DAT), mask_bits(regs, PSW_MASK_IO),
  182. mask_bits(regs, PSW_MASK_EXT), mask_bits(regs, PSW_MASK_KEY),
  183. mask_bits(regs, PSW_MASK_MCHECK), mask_bits(regs, PSW_MASK_WAIT),
  184. mask_bits(regs, PSW_MASK_PSTATE), mask_bits(regs, PSW_MASK_ASC),
  185. mask_bits(regs, PSW_MASK_CC), mask_bits(regs, PSW_MASK_PM));
  186. #ifdef CONFIG_64BIT
  187. printk(" EA:%x", mask_bits(regs, PSW_BASE_BITS));
  188. #endif
  189. printk("\n%s GPRS: " FOURLONG, mode,
  190. regs->gprs[0], regs->gprs[1], regs->gprs[2], regs->gprs[3]);
  191. printk(" " FOURLONG,
  192. regs->gprs[4], regs->gprs[5], regs->gprs[6], regs->gprs[7]);
  193. printk(" " FOURLONG,
  194. regs->gprs[8], regs->gprs[9], regs->gprs[10], regs->gprs[11]);
  195. printk(" " FOURLONG,
  196. regs->gprs[12], regs->gprs[13], regs->gprs[14], regs->gprs[15]);
  197. show_code(regs);
  198. }
  199. /* This is called from fs/proc/array.c */
  200. void task_show_regs(struct seq_file *m, struct task_struct *task)
  201. {
  202. struct pt_regs *regs;
  203. regs = task_pt_regs(task);
  204. seq_printf(m, "task: %p, ksp: %p\n",
  205. task, (void *)task->thread.ksp);
  206. seq_printf(m, "User PSW : %p %p\n",
  207. (void *) regs->psw.mask, (void *)regs->psw.addr);
  208. seq_printf(m, "User GPRS: " FOURLONG,
  209. regs->gprs[0], regs->gprs[1],
  210. regs->gprs[2], regs->gprs[3]);
  211. seq_printf(m, " " FOURLONG,
  212. regs->gprs[4], regs->gprs[5],
  213. regs->gprs[6], regs->gprs[7]);
  214. seq_printf(m, " " FOURLONG,
  215. regs->gprs[8], regs->gprs[9],
  216. regs->gprs[10], regs->gprs[11]);
  217. seq_printf(m, " " FOURLONG,
  218. regs->gprs[12], regs->gprs[13],
  219. regs->gprs[14], regs->gprs[15]);
  220. seq_printf(m, "User ACRS: %08x %08x %08x %08x\n",
  221. task->thread.acrs[0], task->thread.acrs[1],
  222. task->thread.acrs[2], task->thread.acrs[3]);
  223. seq_printf(m, " %08x %08x %08x %08x\n",
  224. task->thread.acrs[4], task->thread.acrs[5],
  225. task->thread.acrs[6], task->thread.acrs[7]);
  226. seq_printf(m, " %08x %08x %08x %08x\n",
  227. task->thread.acrs[8], task->thread.acrs[9],
  228. task->thread.acrs[10], task->thread.acrs[11]);
  229. seq_printf(m, " %08x %08x %08x %08x\n",
  230. task->thread.acrs[12], task->thread.acrs[13],
  231. task->thread.acrs[14], task->thread.acrs[15]);
  232. }
  233. static DEFINE_SPINLOCK(die_lock);
  234. void die(const char * str, struct pt_regs * regs, long err)
  235. {
  236. static int die_counter;
  237. oops_enter();
  238. debug_stop_all();
  239. console_verbose();
  240. spin_lock_irq(&die_lock);
  241. bust_spinlocks(1);
  242. printk("%s: %04lx [#%d] ", str, err & 0xffff, ++die_counter);
  243. #ifdef CONFIG_PREEMPT
  244. printk("PREEMPT ");
  245. #endif
  246. #ifdef CONFIG_SMP
  247. printk("SMP ");
  248. #endif
  249. #ifdef CONFIG_DEBUG_PAGEALLOC
  250. printk("DEBUG_PAGEALLOC");
  251. #endif
  252. printk("\n");
  253. notify_die(DIE_OOPS, str, regs, err, current->thread.trap_no, SIGSEGV);
  254. show_regs(regs);
  255. bust_spinlocks(0);
  256. add_taint(TAINT_DIE);
  257. spin_unlock_irq(&die_lock);
  258. if (in_interrupt())
  259. panic("Fatal exception in interrupt");
  260. if (panic_on_oops)
  261. panic("Fatal exception: panic_on_oops");
  262. oops_exit();
  263. do_exit(SIGSEGV);
  264. }
  265. static void inline
  266. report_user_fault(long interruption_code, struct pt_regs *regs)
  267. {
  268. #if defined(CONFIG_SYSCTL)
  269. if (!sysctl_userprocess_debug)
  270. return;
  271. #endif
  272. #if defined(CONFIG_SYSCTL) || defined(CONFIG_PROCESS_DEBUG)
  273. printk("User process fault: interruption code 0x%lX\n",
  274. interruption_code);
  275. show_regs(regs);
  276. #endif
  277. }
  278. int is_valid_bugaddr(unsigned long addr)
  279. {
  280. return 1;
  281. }
  282. static void __kprobes inline do_trap(long interruption_code, int signr,
  283. char *str, struct pt_regs *regs,
  284. siginfo_t *info)
  285. {
  286. /*
  287. * We got all needed information from the lowcore and can
  288. * now safely switch on interrupts.
  289. */
  290. if (regs->psw.mask & PSW_MASK_PSTATE)
  291. local_irq_enable();
  292. if (notify_die(DIE_TRAP, str, regs, interruption_code,
  293. interruption_code, signr) == NOTIFY_STOP)
  294. return;
  295. if (regs->psw.mask & PSW_MASK_PSTATE) {
  296. struct task_struct *tsk = current;
  297. tsk->thread.trap_no = interruption_code & 0xffff;
  298. force_sig_info(signr, info, tsk);
  299. report_user_fault(interruption_code, regs);
  300. } else {
  301. const struct exception_table_entry *fixup;
  302. fixup = search_exception_tables(regs->psw.addr & PSW_ADDR_INSN);
  303. if (fixup)
  304. regs->psw.addr = fixup->fixup | PSW_ADDR_AMODE;
  305. else {
  306. enum bug_trap_type btt;
  307. btt = report_bug(regs->psw.addr & PSW_ADDR_INSN, regs);
  308. if (btt == BUG_TRAP_TYPE_WARN)
  309. return;
  310. die(str, regs, interruption_code);
  311. }
  312. }
  313. }
  314. static inline void __user *get_check_address(struct pt_regs *regs)
  315. {
  316. return (void __user *)((regs->psw.addr-S390_lowcore.pgm_ilc) & PSW_ADDR_INSN);
  317. }
  318. void __kprobes do_single_step(struct pt_regs *regs)
  319. {
  320. if (notify_die(DIE_SSTEP, "sstep", regs, 0, 0,
  321. SIGTRAP) == NOTIFY_STOP){
  322. return;
  323. }
  324. if ((current->ptrace & PT_PTRACED) != 0)
  325. force_sig(SIGTRAP, current);
  326. }
  327. static void default_trap_handler(struct pt_regs * regs, long interruption_code)
  328. {
  329. if (regs->psw.mask & PSW_MASK_PSTATE) {
  330. local_irq_enable();
  331. do_exit(SIGSEGV);
  332. report_user_fault(interruption_code, regs);
  333. } else
  334. die("Unknown program exception", regs, interruption_code);
  335. }
  336. #define DO_ERROR_INFO(signr, str, name, sicode, siaddr) \
  337. static void name(struct pt_regs * regs, long interruption_code) \
  338. { \
  339. siginfo_t info; \
  340. info.si_signo = signr; \
  341. info.si_errno = 0; \
  342. info.si_code = sicode; \
  343. info.si_addr = siaddr; \
  344. do_trap(interruption_code, signr, str, regs, &info); \
  345. }
  346. DO_ERROR_INFO(SIGILL, "addressing exception", addressing_exception,
  347. ILL_ILLADR, get_check_address(regs))
  348. DO_ERROR_INFO(SIGILL, "execute exception", execute_exception,
  349. ILL_ILLOPN, get_check_address(regs))
  350. DO_ERROR_INFO(SIGFPE, "fixpoint divide exception", divide_exception,
  351. FPE_INTDIV, get_check_address(regs))
  352. DO_ERROR_INFO(SIGFPE, "fixpoint overflow exception", overflow_exception,
  353. FPE_INTOVF, get_check_address(regs))
  354. DO_ERROR_INFO(SIGFPE, "HFP overflow exception", hfp_overflow_exception,
  355. FPE_FLTOVF, get_check_address(regs))
  356. DO_ERROR_INFO(SIGFPE, "HFP underflow exception", hfp_underflow_exception,
  357. FPE_FLTUND, get_check_address(regs))
  358. DO_ERROR_INFO(SIGFPE, "HFP significance exception", hfp_significance_exception,
  359. FPE_FLTRES, get_check_address(regs))
  360. DO_ERROR_INFO(SIGFPE, "HFP divide exception", hfp_divide_exception,
  361. FPE_FLTDIV, get_check_address(regs))
  362. DO_ERROR_INFO(SIGFPE, "HFP square root exception", hfp_sqrt_exception,
  363. FPE_FLTINV, get_check_address(regs))
  364. DO_ERROR_INFO(SIGILL, "operand exception", operand_exception,
  365. ILL_ILLOPN, get_check_address(regs))
  366. DO_ERROR_INFO(SIGILL, "privileged operation", privileged_op,
  367. ILL_PRVOPC, get_check_address(regs))
  368. DO_ERROR_INFO(SIGILL, "special operation exception", special_op_exception,
  369. ILL_ILLOPN, get_check_address(regs))
  370. DO_ERROR_INFO(SIGILL, "translation exception", translation_exception,
  371. ILL_ILLOPN, get_check_address(regs))
  372. static inline void
  373. do_fp_trap(struct pt_regs *regs, void __user *location,
  374. int fpc, long interruption_code)
  375. {
  376. siginfo_t si;
  377. si.si_signo = SIGFPE;
  378. si.si_errno = 0;
  379. si.si_addr = location;
  380. si.si_code = 0;
  381. /* FPC[2] is Data Exception Code */
  382. if ((fpc & 0x00000300) == 0) {
  383. /* bits 6 and 7 of DXC are 0 iff IEEE exception */
  384. if (fpc & 0x8000) /* invalid fp operation */
  385. si.si_code = FPE_FLTINV;
  386. else if (fpc & 0x4000) /* div by 0 */
  387. si.si_code = FPE_FLTDIV;
  388. else if (fpc & 0x2000) /* overflow */
  389. si.si_code = FPE_FLTOVF;
  390. else if (fpc & 0x1000) /* underflow */
  391. si.si_code = FPE_FLTUND;
  392. else if (fpc & 0x0800) /* inexact */
  393. si.si_code = FPE_FLTRES;
  394. }
  395. current->thread.ieee_instruction_pointer = (addr_t) location;
  396. do_trap(interruption_code, SIGFPE,
  397. "floating point exception", regs, &si);
  398. }
  399. static void illegal_op(struct pt_regs * regs, long interruption_code)
  400. {
  401. siginfo_t info;
  402. __u8 opcode[6];
  403. __u16 __user *location;
  404. int signal = 0;
  405. location = get_check_address(regs);
  406. /*
  407. * We got all needed information from the lowcore and can
  408. * now safely switch on interrupts.
  409. */
  410. if (regs->psw.mask & PSW_MASK_PSTATE)
  411. local_irq_enable();
  412. if (regs->psw.mask & PSW_MASK_PSTATE) {
  413. if (get_user(*((__u16 *) opcode), (__u16 __user *) location))
  414. return;
  415. if (*((__u16 *) opcode) == S390_BREAKPOINT_U16) {
  416. if (current->ptrace & PT_PTRACED)
  417. force_sig(SIGTRAP, current);
  418. else
  419. signal = SIGILL;
  420. #ifdef CONFIG_MATHEMU
  421. } else if (opcode[0] == 0xb3) {
  422. if (get_user(*((__u16 *) (opcode+2)), location+1))
  423. return;
  424. signal = math_emu_b3(opcode, regs);
  425. } else if (opcode[0] == 0xed) {
  426. if (get_user(*((__u32 *) (opcode+2)),
  427. (__u32 __user *)(location+1)))
  428. return;
  429. signal = math_emu_ed(opcode, regs);
  430. } else if (*((__u16 *) opcode) == 0xb299) {
  431. if (get_user(*((__u16 *) (opcode+2)), location+1))
  432. return;
  433. signal = math_emu_srnm(opcode, regs);
  434. } else if (*((__u16 *) opcode) == 0xb29c) {
  435. if (get_user(*((__u16 *) (opcode+2)), location+1))
  436. return;
  437. signal = math_emu_stfpc(opcode, regs);
  438. } else if (*((__u16 *) opcode) == 0xb29d) {
  439. if (get_user(*((__u16 *) (opcode+2)), location+1))
  440. return;
  441. signal = math_emu_lfpc(opcode, regs);
  442. #endif
  443. } else
  444. signal = SIGILL;
  445. } else {
  446. /*
  447. * If we get an illegal op in kernel mode, send it through the
  448. * kprobes notifier. If kprobes doesn't pick it up, SIGILL
  449. */
  450. if (notify_die(DIE_BPT, "bpt", regs, interruption_code,
  451. 3, SIGTRAP) != NOTIFY_STOP)
  452. signal = SIGILL;
  453. }
  454. #ifdef CONFIG_MATHEMU
  455. if (signal == SIGFPE)
  456. do_fp_trap(regs, location,
  457. current->thread.fp_regs.fpc, interruption_code);
  458. else if (signal == SIGSEGV) {
  459. info.si_signo = signal;
  460. info.si_errno = 0;
  461. info.si_code = SEGV_MAPERR;
  462. info.si_addr = (void __user *) location;
  463. do_trap(interruption_code, signal,
  464. "user address fault", regs, &info);
  465. } else
  466. #endif
  467. if (signal) {
  468. info.si_signo = signal;
  469. info.si_errno = 0;
  470. info.si_code = ILL_ILLOPC;
  471. info.si_addr = (void __user *) location;
  472. do_trap(interruption_code, signal,
  473. "illegal operation", regs, &info);
  474. }
  475. }
  476. #ifdef CONFIG_MATHEMU
  477. asmlinkage void
  478. specification_exception(struct pt_regs * regs, long interruption_code)
  479. {
  480. __u8 opcode[6];
  481. __u16 __user *location = NULL;
  482. int signal = 0;
  483. location = (__u16 __user *) get_check_address(regs);
  484. /*
  485. * We got all needed information from the lowcore and can
  486. * now safely switch on interrupts.
  487. */
  488. if (regs->psw.mask & PSW_MASK_PSTATE)
  489. local_irq_enable();
  490. if (regs->psw.mask & PSW_MASK_PSTATE) {
  491. get_user(*((__u16 *) opcode), location);
  492. switch (opcode[0]) {
  493. case 0x28: /* LDR Rx,Ry */
  494. signal = math_emu_ldr(opcode);
  495. break;
  496. case 0x38: /* LER Rx,Ry */
  497. signal = math_emu_ler(opcode);
  498. break;
  499. case 0x60: /* STD R,D(X,B) */
  500. get_user(*((__u16 *) (opcode+2)), location+1);
  501. signal = math_emu_std(opcode, regs);
  502. break;
  503. case 0x68: /* LD R,D(X,B) */
  504. get_user(*((__u16 *) (opcode+2)), location+1);
  505. signal = math_emu_ld(opcode, regs);
  506. break;
  507. case 0x70: /* STE R,D(X,B) */
  508. get_user(*((__u16 *) (opcode+2)), location+1);
  509. signal = math_emu_ste(opcode, regs);
  510. break;
  511. case 0x78: /* LE R,D(X,B) */
  512. get_user(*((__u16 *) (opcode+2)), location+1);
  513. signal = math_emu_le(opcode, regs);
  514. break;
  515. default:
  516. signal = SIGILL;
  517. break;
  518. }
  519. } else
  520. signal = SIGILL;
  521. if (signal == SIGFPE)
  522. do_fp_trap(regs, location,
  523. current->thread.fp_regs.fpc, interruption_code);
  524. else if (signal) {
  525. siginfo_t info;
  526. info.si_signo = signal;
  527. info.si_errno = 0;
  528. info.si_code = ILL_ILLOPN;
  529. info.si_addr = location;
  530. do_trap(interruption_code, signal,
  531. "specification exception", regs, &info);
  532. }
  533. }
  534. #else
  535. DO_ERROR_INFO(SIGILL, "specification exception", specification_exception,
  536. ILL_ILLOPN, get_check_address(regs));
  537. #endif
  538. static void data_exception(struct pt_regs * regs, long interruption_code)
  539. {
  540. __u16 __user *location;
  541. int signal = 0;
  542. location = get_check_address(regs);
  543. /*
  544. * We got all needed information from the lowcore and can
  545. * now safely switch on interrupts.
  546. */
  547. if (regs->psw.mask & PSW_MASK_PSTATE)
  548. local_irq_enable();
  549. if (MACHINE_HAS_IEEE)
  550. asm volatile("stfpc %0" : "=m" (current->thread.fp_regs.fpc));
  551. #ifdef CONFIG_MATHEMU
  552. else if (regs->psw.mask & PSW_MASK_PSTATE) {
  553. __u8 opcode[6];
  554. get_user(*((__u16 *) opcode), location);
  555. switch (opcode[0]) {
  556. case 0x28: /* LDR Rx,Ry */
  557. signal = math_emu_ldr(opcode);
  558. break;
  559. case 0x38: /* LER Rx,Ry */
  560. signal = math_emu_ler(opcode);
  561. break;
  562. case 0x60: /* STD R,D(X,B) */
  563. get_user(*((__u16 *) (opcode+2)), location+1);
  564. signal = math_emu_std(opcode, regs);
  565. break;
  566. case 0x68: /* LD R,D(X,B) */
  567. get_user(*((__u16 *) (opcode+2)), location+1);
  568. signal = math_emu_ld(opcode, regs);
  569. break;
  570. case 0x70: /* STE R,D(X,B) */
  571. get_user(*((__u16 *) (opcode+2)), location+1);
  572. signal = math_emu_ste(opcode, regs);
  573. break;
  574. case 0x78: /* LE R,D(X,B) */
  575. get_user(*((__u16 *) (opcode+2)), location+1);
  576. signal = math_emu_le(opcode, regs);
  577. break;
  578. case 0xb3:
  579. get_user(*((__u16 *) (opcode+2)), location+1);
  580. signal = math_emu_b3(opcode, regs);
  581. break;
  582. case 0xed:
  583. get_user(*((__u32 *) (opcode+2)),
  584. (__u32 __user *)(location+1));
  585. signal = math_emu_ed(opcode, regs);
  586. break;
  587. case 0xb2:
  588. if (opcode[1] == 0x99) {
  589. get_user(*((__u16 *) (opcode+2)), location+1);
  590. signal = math_emu_srnm(opcode, regs);
  591. } else if (opcode[1] == 0x9c) {
  592. get_user(*((__u16 *) (opcode+2)), location+1);
  593. signal = math_emu_stfpc(opcode, regs);
  594. } else if (opcode[1] == 0x9d) {
  595. get_user(*((__u16 *) (opcode+2)), location+1);
  596. signal = math_emu_lfpc(opcode, regs);
  597. } else
  598. signal = SIGILL;
  599. break;
  600. default:
  601. signal = SIGILL;
  602. break;
  603. }
  604. }
  605. #endif
  606. if (current->thread.fp_regs.fpc & FPC_DXC_MASK)
  607. signal = SIGFPE;
  608. else
  609. signal = SIGILL;
  610. if (signal == SIGFPE)
  611. do_fp_trap(regs, location,
  612. current->thread.fp_regs.fpc, interruption_code);
  613. else if (signal) {
  614. siginfo_t info;
  615. info.si_signo = signal;
  616. info.si_errno = 0;
  617. info.si_code = ILL_ILLOPN;
  618. info.si_addr = location;
  619. do_trap(interruption_code, signal,
  620. "data exception", regs, &info);
  621. }
  622. }
  623. static void space_switch_exception(struct pt_regs * regs, long int_code)
  624. {
  625. siginfo_t info;
  626. /* Set user psw back to home space mode. */
  627. if (regs->psw.mask & PSW_MASK_PSTATE)
  628. regs->psw.mask |= PSW_ASC_HOME;
  629. /* Send SIGILL. */
  630. info.si_signo = SIGILL;
  631. info.si_errno = 0;
  632. info.si_code = ILL_PRVOPC;
  633. info.si_addr = get_check_address(regs);
  634. do_trap(int_code, SIGILL, "space switch event", regs, &info);
  635. }
  636. asmlinkage void kernel_stack_overflow(struct pt_regs * regs)
  637. {
  638. bust_spinlocks(1);
  639. printk("Kernel stack overflow.\n");
  640. show_regs(regs);
  641. bust_spinlocks(0);
  642. panic("Corrupt kernel stack, can't continue.");
  643. }
  644. /* init is done in lowcore.S and head.S */
  645. void __init trap_init(void)
  646. {
  647. int i;
  648. for (i = 0; i < 128; i++)
  649. pgm_check_table[i] = &default_trap_handler;
  650. pgm_check_table[1] = &illegal_op;
  651. pgm_check_table[2] = &privileged_op;
  652. pgm_check_table[3] = &execute_exception;
  653. pgm_check_table[4] = &do_protection_exception;
  654. pgm_check_table[5] = &addressing_exception;
  655. pgm_check_table[6] = &specification_exception;
  656. pgm_check_table[7] = &data_exception;
  657. pgm_check_table[8] = &overflow_exception;
  658. pgm_check_table[9] = &divide_exception;
  659. pgm_check_table[0x0A] = &overflow_exception;
  660. pgm_check_table[0x0B] = &divide_exception;
  661. pgm_check_table[0x0C] = &hfp_overflow_exception;
  662. pgm_check_table[0x0D] = &hfp_underflow_exception;
  663. pgm_check_table[0x0E] = &hfp_significance_exception;
  664. pgm_check_table[0x0F] = &hfp_divide_exception;
  665. pgm_check_table[0x10] = &do_dat_exception;
  666. pgm_check_table[0x11] = &do_dat_exception;
  667. pgm_check_table[0x12] = &translation_exception;
  668. pgm_check_table[0x13] = &special_op_exception;
  669. #ifdef CONFIG_64BIT
  670. pgm_check_table[0x38] = &do_asce_exception;
  671. pgm_check_table[0x39] = &do_dat_exception;
  672. pgm_check_table[0x3A] = &do_dat_exception;
  673. pgm_check_table[0x3B] = &do_dat_exception;
  674. #endif /* CONFIG_64BIT */
  675. pgm_check_table[0x15] = &operand_exception;
  676. pgm_check_table[0x1C] = &space_switch_exception;
  677. pgm_check_table[0x1D] = &hfp_sqrt_exception;
  678. pfault_irq_init();
  679. }