mainstone.c 15 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/mainstone.c
  3. *
  4. * Support for the Intel HCDDBBVA0 Development Platform.
  5. * (go figure how they came up with such name...)
  6. *
  7. * Author: Nicolas Pitre
  8. * Created: Nov 05, 2002
  9. * Copyright: MontaVista Software Inc.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/sysdev.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/sched.h>
  20. #include <linux/bitops.h>
  21. #include <linux/fb.h>
  22. #include <linux/ioport.h>
  23. #include <linux/mtd/mtd.h>
  24. #include <linux/mtd/partitions.h>
  25. #include <linux/input.h>
  26. #include <linux/gpio_keys.h>
  27. #include <linux/pwm_backlight.h>
  28. #include <linux/smc91x.h>
  29. #include <asm/types.h>
  30. #include <asm/setup.h>
  31. #include <asm/memory.h>
  32. #include <asm/mach-types.h>
  33. #include <mach/hardware.h>
  34. #include <asm/irq.h>
  35. #include <asm/sizes.h>
  36. #include <asm/mach/arch.h>
  37. #include <asm/mach/map.h>
  38. #include <asm/mach/irq.h>
  39. #include <asm/mach/flash.h>
  40. #include <mach/pxa27x.h>
  41. #include <mach/gpio.h>
  42. #include <mach/mainstone.h>
  43. #include <mach/audio.h>
  44. #include <mach/pxafb.h>
  45. #include <plat/i2c.h>
  46. #include <mach/mmc.h>
  47. #include <mach/irda.h>
  48. #include <mach/ohci.h>
  49. #include <plat/pxa27x_keypad.h>
  50. #include <mach/smemc.h>
  51. #include "generic.h"
  52. #include "devices.h"
  53. static unsigned long mainstone_pin_config[] = {
  54. /* Chip Select */
  55. GPIO15_nCS_1,
  56. /* LCD - 16bpp Active TFT */
  57. GPIOxx_LCD_TFT_16BPP,
  58. GPIO16_PWM0_OUT, /* Backlight */
  59. /* MMC */
  60. GPIO32_MMC_CLK,
  61. GPIO112_MMC_CMD,
  62. GPIO92_MMC_DAT_0,
  63. GPIO109_MMC_DAT_1,
  64. GPIO110_MMC_DAT_2,
  65. GPIO111_MMC_DAT_3,
  66. /* USB Host Port 1 */
  67. GPIO88_USBH1_PWR,
  68. GPIO89_USBH1_PEN,
  69. /* PC Card */
  70. GPIO48_nPOE,
  71. GPIO49_nPWE,
  72. GPIO50_nPIOR,
  73. GPIO51_nPIOW,
  74. GPIO85_nPCE_1,
  75. GPIO54_nPCE_2,
  76. GPIO79_PSKTSEL,
  77. GPIO55_nPREG,
  78. GPIO56_nPWAIT,
  79. GPIO57_nIOIS16,
  80. /* AC97 */
  81. GPIO28_AC97_BITCLK,
  82. GPIO29_AC97_SDATA_IN_0,
  83. GPIO30_AC97_SDATA_OUT,
  84. GPIO31_AC97_SYNC,
  85. GPIO45_AC97_SYSCLK,
  86. /* Keypad */
  87. GPIO93_KP_DKIN_0,
  88. GPIO94_KP_DKIN_1,
  89. GPIO95_KP_DKIN_2,
  90. GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
  91. GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
  92. GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
  93. GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
  94. GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
  95. GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
  96. GPIO103_KP_MKOUT_0,
  97. GPIO104_KP_MKOUT_1,
  98. GPIO105_KP_MKOUT_2,
  99. GPIO106_KP_MKOUT_3,
  100. GPIO107_KP_MKOUT_4,
  101. GPIO108_KP_MKOUT_5,
  102. GPIO96_KP_MKOUT_6,
  103. /* I2C */
  104. GPIO117_I2C_SCL,
  105. GPIO118_I2C_SDA,
  106. /* GPIO */
  107. GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
  108. };
  109. static unsigned long mainstone_irq_enabled;
  110. static void mainstone_mask_irq(unsigned int irq)
  111. {
  112. int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  113. MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
  114. }
  115. static void mainstone_unmask_irq(unsigned int irq)
  116. {
  117. int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  118. /* the irq can be acknowledged only if deasserted, so it's done here */
  119. MST_INTSETCLR &= ~(1 << mainstone_irq);
  120. MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
  121. }
  122. static struct irq_chip mainstone_irq_chip = {
  123. .name = "FPGA",
  124. .ack = mainstone_mask_irq,
  125. .mask = mainstone_mask_irq,
  126. .unmask = mainstone_unmask_irq,
  127. };
  128. static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
  129. {
  130. unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
  131. do {
  132. desc->chip->ack(irq); /* clear useless edge notification */
  133. if (likely(pending)) {
  134. irq = MAINSTONE_IRQ(0) + __ffs(pending);
  135. generic_handle_irq(irq);
  136. }
  137. pending = MST_INTSETCLR & mainstone_irq_enabled;
  138. } while (pending);
  139. }
  140. static void __init mainstone_init_irq(void)
  141. {
  142. int irq;
  143. pxa27x_init_irq();
  144. /* setup extra Mainstone irqs */
  145. for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
  146. set_irq_chip(irq, &mainstone_irq_chip);
  147. set_irq_handler(irq, handle_level_irq);
  148. if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
  149. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
  150. else
  151. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  152. }
  153. set_irq_flags(MAINSTONE_IRQ(8), 0);
  154. set_irq_flags(MAINSTONE_IRQ(12), 0);
  155. MST_INTMSKENA = 0;
  156. MST_INTSETCLR = 0;
  157. set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
  158. set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
  159. }
  160. #ifdef CONFIG_PM
  161. static int mainstone_irq_resume(struct sys_device *dev)
  162. {
  163. MST_INTMSKENA = mainstone_irq_enabled;
  164. return 0;
  165. }
  166. static struct sysdev_class mainstone_irq_sysclass = {
  167. .name = "cpld_irq",
  168. .resume = mainstone_irq_resume,
  169. };
  170. static struct sys_device mainstone_irq_device = {
  171. .cls = &mainstone_irq_sysclass,
  172. };
  173. static int __init mainstone_irq_device_init(void)
  174. {
  175. int ret = -ENODEV;
  176. if (machine_is_mainstone()) {
  177. ret = sysdev_class_register(&mainstone_irq_sysclass);
  178. if (ret == 0)
  179. ret = sysdev_register(&mainstone_irq_device);
  180. }
  181. return ret;
  182. }
  183. device_initcall(mainstone_irq_device_init);
  184. #endif
  185. static struct resource smc91x_resources[] = {
  186. [0] = {
  187. .start = (MST_ETH_PHYS + 0x300),
  188. .end = (MST_ETH_PHYS + 0xfffff),
  189. .flags = IORESOURCE_MEM,
  190. },
  191. [1] = {
  192. .start = MAINSTONE_IRQ(3),
  193. .end = MAINSTONE_IRQ(3),
  194. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  195. }
  196. };
  197. static struct smc91x_platdata mainstone_smc91x_info = {
  198. .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
  199. SMC91X_NOWAIT | SMC91X_USE_DMA,
  200. };
  201. static struct platform_device smc91x_device = {
  202. .name = "smc91x",
  203. .id = 0,
  204. .num_resources = ARRAY_SIZE(smc91x_resources),
  205. .resource = smc91x_resources,
  206. .dev = {
  207. .platform_data = &mainstone_smc91x_info,
  208. },
  209. };
  210. static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
  211. {
  212. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  213. MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
  214. return 0;
  215. }
  216. static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
  217. {
  218. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  219. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  220. }
  221. static long mst_audio_suspend_mask;
  222. static void mst_audio_suspend(void *priv)
  223. {
  224. mst_audio_suspend_mask = MST_MSCWR2;
  225. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  226. }
  227. static void mst_audio_resume(void *priv)
  228. {
  229. MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
  230. }
  231. static pxa2xx_audio_ops_t mst_audio_ops = {
  232. .startup = mst_audio_startup,
  233. .shutdown = mst_audio_shutdown,
  234. .suspend = mst_audio_suspend,
  235. .resume = mst_audio_resume,
  236. };
  237. static struct resource flash_resources[] = {
  238. [0] = {
  239. .start = PXA_CS0_PHYS,
  240. .end = PXA_CS0_PHYS + SZ_64M - 1,
  241. .flags = IORESOURCE_MEM,
  242. },
  243. [1] = {
  244. .start = PXA_CS1_PHYS,
  245. .end = PXA_CS1_PHYS + SZ_64M - 1,
  246. .flags = IORESOURCE_MEM,
  247. },
  248. };
  249. static struct mtd_partition mainstoneflash0_partitions[] = {
  250. {
  251. .name = "Bootloader",
  252. .size = 0x00040000,
  253. .offset = 0,
  254. .mask_flags = MTD_WRITEABLE /* force read-only */
  255. },{
  256. .name = "Kernel",
  257. .size = 0x00400000,
  258. .offset = 0x00040000,
  259. },{
  260. .name = "Filesystem",
  261. .size = MTDPART_SIZ_FULL,
  262. .offset = 0x00440000
  263. }
  264. };
  265. static struct flash_platform_data mst_flash_data[2] = {
  266. {
  267. .map_name = "cfi_probe",
  268. .parts = mainstoneflash0_partitions,
  269. .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions),
  270. }, {
  271. .map_name = "cfi_probe",
  272. .parts = NULL,
  273. .nr_parts = 0,
  274. }
  275. };
  276. static struct platform_device mst_flash_device[2] = {
  277. {
  278. .name = "pxa2xx-flash",
  279. .id = 0,
  280. .dev = {
  281. .platform_data = &mst_flash_data[0],
  282. },
  283. .resource = &flash_resources[0],
  284. .num_resources = 1,
  285. },
  286. {
  287. .name = "pxa2xx-flash",
  288. .id = 1,
  289. .dev = {
  290. .platform_data = &mst_flash_data[1],
  291. },
  292. .resource = &flash_resources[1],
  293. .num_resources = 1,
  294. },
  295. };
  296. #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
  297. static struct platform_pwm_backlight_data mainstone_backlight_data = {
  298. .pwm_id = 0,
  299. .max_brightness = 1023,
  300. .dft_brightness = 1023,
  301. .pwm_period_ns = 78770,
  302. };
  303. static struct platform_device mainstone_backlight_device = {
  304. .name = "pwm-backlight",
  305. .dev = {
  306. .parent = &pxa27x_device_pwm0.dev,
  307. .platform_data = &mainstone_backlight_data,
  308. },
  309. };
  310. static void __init mainstone_backlight_register(void)
  311. {
  312. int ret = platform_device_register(&mainstone_backlight_device);
  313. if (ret)
  314. printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret);
  315. }
  316. #else
  317. #define mainstone_backlight_register() do { } while (0)
  318. #endif
  319. static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
  320. .pixclock = 50000,
  321. .xres = 640,
  322. .yres = 480,
  323. .bpp = 16,
  324. .hsync_len = 1,
  325. .left_margin = 0x9f,
  326. .right_margin = 1,
  327. .vsync_len = 44,
  328. .upper_margin = 0,
  329. .lower_margin = 0,
  330. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  331. };
  332. static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
  333. .pixclock = 110000,
  334. .xres = 240,
  335. .yres = 320,
  336. .bpp = 16,
  337. .hsync_len = 4,
  338. .left_margin = 8,
  339. .right_margin = 20,
  340. .vsync_len = 3,
  341. .upper_margin = 1,
  342. .lower_margin = 10,
  343. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  344. };
  345. static struct pxafb_mach_info mainstone_pxafb_info = {
  346. .num_modes = 1,
  347. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  348. };
  349. static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
  350. {
  351. int err;
  352. /* make sure SD/Memory Stick multiplexer's signals
  353. * are routed to MMC controller
  354. */
  355. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  356. err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
  357. "MMC card detect", data);
  358. if (err)
  359. printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
  360. return err;
  361. }
  362. static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
  363. {
  364. struct pxamci_platform_data* p_d = dev->platform_data;
  365. if (( 1 << vdd) & p_d->ocr_mask) {
  366. printk(KERN_DEBUG "%s: on\n", __func__);
  367. MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
  368. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  369. } else {
  370. printk(KERN_DEBUG "%s: off\n", __func__);
  371. MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
  372. }
  373. }
  374. static void mainstone_mci_exit(struct device *dev, void *data)
  375. {
  376. free_irq(MAINSTONE_MMC_IRQ, data);
  377. }
  378. static struct pxamci_platform_data mainstone_mci_platform_data = {
  379. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  380. .init = mainstone_mci_init,
  381. .setpower = mainstone_mci_setpower,
  382. .exit = mainstone_mci_exit,
  383. .gpio_card_detect = -1,
  384. .gpio_card_ro = -1,
  385. .gpio_power = -1,
  386. };
  387. static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
  388. {
  389. unsigned long flags;
  390. local_irq_save(flags);
  391. if (mode & IR_SIRMODE) {
  392. MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
  393. } else if (mode & IR_FIRMODE) {
  394. MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
  395. }
  396. pxa2xx_transceiver_mode(dev, mode);
  397. if (mode & IR_OFF) {
  398. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
  399. } else {
  400. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
  401. }
  402. local_irq_restore(flags);
  403. }
  404. static struct pxaficp_platform_data mainstone_ficp_platform_data = {
  405. .gpio_pwdown = -1,
  406. .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
  407. .transceiver_mode = mainstone_irda_transceiver_mode,
  408. };
  409. static struct gpio_keys_button gpio_keys_button[] = {
  410. [0] = {
  411. .desc = "wakeup",
  412. .code = KEY_SUSPEND,
  413. .type = EV_KEY,
  414. .gpio = 1,
  415. .wakeup = 1,
  416. },
  417. };
  418. static struct gpio_keys_platform_data mainstone_gpio_keys = {
  419. .buttons = gpio_keys_button,
  420. .nbuttons = 1,
  421. };
  422. static struct platform_device mst_gpio_keys_device = {
  423. .name = "gpio-keys",
  424. .id = -1,
  425. .dev = {
  426. .platform_data = &mainstone_gpio_keys,
  427. },
  428. };
  429. static struct platform_device *platform_devices[] __initdata = {
  430. &smc91x_device,
  431. &mst_flash_device[0],
  432. &mst_flash_device[1],
  433. &mst_gpio_keys_device,
  434. };
  435. static struct pxaohci_platform_data mainstone_ohci_platform_data = {
  436. .port_mode = PMM_PERPORT_MODE,
  437. .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
  438. };
  439. #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
  440. static unsigned int mainstone_matrix_keys[] = {
  441. KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
  442. KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
  443. KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
  444. KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
  445. KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
  446. KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
  447. KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
  448. KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
  449. KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
  450. KEY(0, 4, KEY_DOT), /* . */
  451. KEY(1, 4, KEY_CLOSE), /* @ */
  452. KEY(4, 4, KEY_SLASH),
  453. KEY(5, 4, KEY_BACKSLASH),
  454. KEY(0, 5, KEY_HOME),
  455. KEY(1, 5, KEY_LEFTSHIFT),
  456. KEY(2, 5, KEY_SPACE),
  457. KEY(3, 5, KEY_SPACE),
  458. KEY(4, 5, KEY_ENTER),
  459. KEY(5, 5, KEY_BACKSPACE),
  460. KEY(0, 6, KEY_UP),
  461. KEY(1, 6, KEY_DOWN),
  462. KEY(2, 6, KEY_LEFT),
  463. KEY(3, 6, KEY_RIGHT),
  464. KEY(4, 6, KEY_SELECT),
  465. };
  466. struct pxa27x_keypad_platform_data mainstone_keypad_info = {
  467. .matrix_key_rows = 6,
  468. .matrix_key_cols = 7,
  469. .matrix_key_map = mainstone_matrix_keys,
  470. .matrix_key_map_size = ARRAY_SIZE(mainstone_matrix_keys),
  471. .enable_rotary0 = 1,
  472. .rotary0_up_key = KEY_UP,
  473. .rotary0_down_key = KEY_DOWN,
  474. .debounce_interval = 30,
  475. };
  476. static void __init mainstone_init_keypad(void)
  477. {
  478. pxa_set_keypad_info(&mainstone_keypad_info);
  479. }
  480. #else
  481. static inline void mainstone_init_keypad(void) {}
  482. #endif
  483. static void __init mainstone_init(void)
  484. {
  485. int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
  486. pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
  487. pxa_set_ffuart_info(NULL);
  488. pxa_set_btuart_info(NULL);
  489. pxa_set_stuart_info(NULL);
  490. mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
  491. mst_flash_data[1].width = 4;
  492. /* Compensate for SW7 which swaps the flash banks */
  493. mst_flash_data[SW7].name = "processor-flash";
  494. mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
  495. printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
  496. mst_flash_data[0].name);
  497. /* system bus arbiter setting
  498. * - Core_Park
  499. * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
  500. */
  501. ARB_CNTRL = ARB_CORE_PARK | 0x234;
  502. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  503. /* reading Mainstone's "Virtual Configuration Register"
  504. might be handy to select LCD type here */
  505. if (0)
  506. mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
  507. else
  508. mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
  509. set_pxa_fb_info(&mainstone_pxafb_info);
  510. mainstone_backlight_register();
  511. pxa_set_mci_info(&mainstone_mci_platform_data);
  512. pxa_set_ficp_info(&mainstone_ficp_platform_data);
  513. pxa_set_ohci_info(&mainstone_ohci_platform_data);
  514. pxa_set_i2c_info(NULL);
  515. pxa_set_ac97_info(&mst_audio_ops);
  516. mainstone_init_keypad();
  517. }
  518. static struct map_desc mainstone_io_desc[] __initdata = {
  519. { /* CPLD */
  520. .virtual = MST_FPGA_VIRT,
  521. .pfn = __phys_to_pfn(MST_FPGA_PHYS),
  522. .length = 0x00100000,
  523. .type = MT_DEVICE
  524. }
  525. };
  526. static void __init mainstone_map_io(void)
  527. {
  528. pxa27x_map_io();
  529. iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
  530. /* for use I SRAM as framebuffer. */
  531. PSLR |= 0xF04;
  532. PCFR = 0x66;
  533. }
  534. MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
  535. /* Maintainer: MontaVista Software Inc. */
  536. .boot_params = 0xa0000100, /* BLOB boot parameter setting */
  537. .map_io = mainstone_map_io,
  538. .nr_irqs = MAINSTONE_NR_IRQS,
  539. .init_irq = mainstone_init_irq,
  540. .timer = &pxa_timer,
  541. .init_machine = mainstone_init,
  542. MACHINE_END