Kconfig 4.3 KB

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  1. if ARCH_IXP4XX
  2. config ARCH_SUPPORTS_BIG_ENDIAN
  3. bool
  4. default y
  5. menu "Intel IXP4xx Implementation Options"
  6. comment "IXP4xx Platforms"
  7. # This entry is placed on top because otherwise it would have
  8. # been shown as a submenu.
  9. config MACH_NSLU2
  10. bool
  11. prompt "NSLU2" if !(MACH_IXDP465 || MACH_IXDPG425 || ARCH_IXDP425 || ARCH_ADI_COYOTE || ARCH_AVILA || ARCH_IXCDP1100 || ARCH_PRPMC1100 || MACH_GTWX5715)
  12. help
  13. Say 'Y' here if you want your kernel to support Linksys's
  14. NSLU2 NAS device. For more information on this platform,
  15. see http://www.nslu2-linux.org
  16. config ARCH_AVILA
  17. bool "Avila"
  18. help
  19. Say 'Y' here if you want your kernel to support the Gateworks
  20. Avila Network Platform. For more information on this platform,
  21. see <file:Documentation/arm/IXP4xx>.
  22. config ARCH_ADI_COYOTE
  23. bool "Coyote"
  24. help
  25. Say 'Y' here if you want your kernel to support the ADI
  26. Engineering Coyote Gateway Reference Platform. For more
  27. information on this platform, see <file:Documentation/arm/IXP4xx>.
  28. config ARCH_IXDP425
  29. bool "IXDP425"
  30. help
  31. Say 'Y' here if you want your kernel to support Intel's
  32. IXDP425 Development Platform (Also known as Richfield).
  33. For more information on this platform, see <file:Documentation/arm/IXP4xx>.
  34. config MACH_IXDPG425
  35. bool "IXDPG425"
  36. help
  37. Say 'Y' here if you want your kernel to support Intel's
  38. IXDPG425 Development Platform (Also known as Montajade).
  39. For more information on this platform, see <file:Documentation/arm/IXP4xx>.
  40. config MACH_IXDP465
  41. bool "IXDP465"
  42. help
  43. Say 'Y' here if you want your kernel to support Intel's
  44. IXDP465 Development Platform (Also known as BMP).
  45. For more information on this platform, see <file:Documentation/arm/IXP4xx>.
  46. #
  47. # IXCDP1100 is the exact same HW as IXDP425, but with a different machine
  48. # number from the bootloader due to marketing monkeys, so we just enable it
  49. # by default if IXDP425 is enabled.
  50. #
  51. config ARCH_IXCDP1100
  52. bool
  53. depends on ARCH_IXDP425
  54. default y
  55. config ARCH_PRPMC1100
  56. bool "PrPMC1100"
  57. help
  58. Say 'Y' here if you want your kernel to support the Motorola
  59. PrPCM1100 Processor Mezanine Module. For more information on
  60. this platform, see <file:Documentation/arm/IXP4xx>.
  61. #
  62. # Avila and IXDP share the same source for now. Will change in future
  63. #
  64. config ARCH_IXDP4XX
  65. bool
  66. depends on ARCH_IXDP425 || ARCH_AVILA || MACH_IXDP465
  67. default y
  68. #
  69. # Certain registers and IRQs are only enabled if supporting IXP465 CPUs
  70. #
  71. config CPU_IXP46X
  72. bool
  73. depends on MACH_IXDP465
  74. default y
  75. config MACH_GTWX5715
  76. bool "Gemtek WX5715 (Linksys WRV54G)"
  77. depends on ARCH_IXP4XX
  78. help
  79. This board is currently inside the Linksys WRV54G Gateways.
  80. IXP425 - 266mhz
  81. 32mb SDRAM
  82. 8mb Flash
  83. miniPCI slot 0 does not have a card connector soldered to the board
  84. miniPCI slot 1 has an ISL3880 802.11g card (Prism54)
  85. npe0 is connected to a Kendin KS8995M Switch (4 ports)
  86. npe1 is the "wan" port
  87. "Console" UART is available on J11 as console
  88. "High Speed" UART is n/c (as far as I can tell)
  89. 20 Pin ARM/Xscale JTAG interface on J2
  90. comment "IXP4xx Options"
  91. config IXP4XX_INDIRECT_PCI
  92. bool "Use indirect PCI memory access"
  93. help
  94. IXP4xx provides two methods of accessing PCI memory space:
  95. 1) A direct mapped window from 0x48000000 to 0x4bffffff (64MB).
  96. To access PCI via this space, we simply ioremap() the BAR
  97. into the kernel and we can use the standard read[bwl]/write[bwl]
  98. macros. This is the preferred method due to speed but it
  99. limits the system to just 64MB of PCI memory. This can be
  100. problamatic if using video cards and other memory-heavy devices.
  101. 2) If > 64MB of memory space is required, the IXP4xx can be
  102. configured to use indirect registers to access PCI This allows
  103. for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus.
  104. The disadvantadge of this is that every PCI access requires
  105. three local register accesses plus a spinlock, but in some
  106. cases the performance hit is acceptable. In addition, you cannot
  107. mmap() PCI devices in this case due to the indirect nature
  108. of the PCI window.
  109. By default, the direct method is used. Choose this option if you
  110. need to use the indirect method instead. If you don't know
  111. what you need, leave this option unselected.
  112. endmenu
  113. endif