samsung-pinctrl.txt 7.6 KB

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  1. Samsung GPIO and Pin Mux/Config controller
  2. Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
  3. controller. It controls the input/output settings on the available pads/pins
  4. and also provides ability to multiplex and configure the output of various
  5. on-chip controllers onto these pads.
  6. Required Properties:
  7. - compatible: should be one of the following.
  8. - "samsung,pinctrl-exynos4210": for Exynos4210 compatible pin-controller.
  9. - "samsung,pinctrl-exynos5250": for Exynos5250 compatible pin-controller.
  10. - reg: Base address of the pin controller hardware module and length of
  11. the address space it occupies.
  12. - interrupts: interrupt specifier for the controller. The format and value of
  13. the interrupt specifier depends on the interrupt parent for the controller.
  14. - Pin mux/config groups as child nodes: The pin mux (selecting pin function
  15. mode) and pin config (pull up/down, driver strength) settings are represented
  16. as child nodes of the pin-controller node. There should be atleast one
  17. child node and there is no limit on the count of these child nodes.
  18. The child node should contain a list of pin(s) on which a particular pin
  19. function selection or pin configuration (or both) have to applied. This
  20. list of pins is specified using the property name "samsung,pins". There
  21. should be atleast one pin specfied for this property and there is no upper
  22. limit on the count of pins that can be specified. The pins are specified
  23. using pin names which are derived from the hardware manual of the SoC. As
  24. an example, the pins in GPA0 bank of the pin controller can be represented
  25. as "gpa0-0", "gpa0-1", "gpa0-2" and so on. The names should be in lower case.
  26. The format of the pin names should be (as per the hardware manual)
  27. "[pin bank name]-[pin number within the bank]".
  28. The pin function selection that should be applied on the pins listed in the
  29. child node is specified using the "samsung,pin-function" property. The value
  30. of this property that should be applied to each of the pins listed in the
  31. "samsung,pins" property should be picked from the hardware manual of the SoC
  32. for the specified pin group. This property is optional in the child node if
  33. no specific function selection is desired for the pins listed in the child
  34. node. The value of this property is used as-is to program the pin-controller
  35. function selector register of the pin-bank.
  36. The child node can also optionally specify one or more of the pin
  37. configuration that should be applied on all the pins listed in the
  38. "samsung,pins" property of the child node. The following pin configuration
  39. properties are supported.
  40. - samsung,pin-pud: Pull up/down configuration.
  41. - samsung,pin-drv: Drive strength configuration.
  42. - samsung,pin-pud-pdn: Pull up/down configuration in power down mode.
  43. - samsung,pin-drv-pdn: Drive strength configuration in power down mode.
  44. The values specified by these config properties should be derived from the
  45. hardware manual and these values are programmed as-is into the pin
  46. pull up/down and driver strength register of the pin-controller.
  47. Note: A child should include atleast a pin function selection property or
  48. pin configuration property (one or more) or both.
  49. The client nodes that require a particular pin function selection and/or
  50. pin configuration should use the bindings listed in the "pinctrl-bindings.txt"
  51. file.
  52. External GPIO and Wakeup Interrupts:
  53. The controller supports two types of external interrupts over gpio. The first
  54. is the external gpio interrupt and second is the external wakeup interrupts.
  55. The difference between the two is that the external wakeup interrupts can be
  56. used as system wakeup events.
  57. A. External GPIO Interrupts: For supporting external gpio interrupts, the
  58. following properties should be specified in the pin-controller device node.
  59. - interrupt-controller: identifies the controller node as interrupt-parent.
  60. - #interrupt-cells: the value of this property should be 2.
  61. - First Cell: represents the external gpio interrupt number local to the
  62. external gpio interrupt space of the controller.
  63. - Second Cell: flags to identify the type of the interrupt
  64. - 1 = rising edge triggered
  65. - 2 = falling edge triggered
  66. - 3 = rising and falling edge triggered
  67. - 4 = high level triggered
  68. - 8 = low level triggered
  69. B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
  70. child node representing the external wakeup interrupt controller should be
  71. included in the pin-controller device node. This child node should include
  72. the following properties.
  73. - compatible: identifies the type of the external wakeup interrupt controller
  74. The possible values are:
  75. - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
  76. found on Samsung Exynos4210 SoC.
  77. - interrupt-parent: phandle of the interrupt parent to which the external
  78. wakeup interrupts are forwarded to.
  79. - interrupt-controller: identifies the node as interrupt-parent.
  80. - #interrupt-cells: the value of this property should be 2
  81. - First Cell: represents the external wakeup interrupt number local to
  82. the external wakeup interrupt space of the controller.
  83. - Second Cell: flags to identify the type of the interrupt
  84. - 1 = rising edge triggered
  85. - 2 = falling edge triggered
  86. - 3 = rising and falling edge triggered
  87. - 4 = high level triggered
  88. - 8 = low level triggered
  89. Aliases:
  90. All the pin controller nodes should be represented in the aliases node using
  91. the following format 'pinctrl{n}' where n is a unique number for the alias.
  92. Example 1: A pin-controller node with pin groups.
  93. pinctrl_0: pinctrl@11400000 {
  94. compatible = "samsung,pinctrl-exynos4210";
  95. reg = <0x11400000 0x1000>;
  96. interrupts = <0 47 0>;
  97. uart0_data: uart0-data {
  98. samsung,pins = "gpa0-0", "gpa0-1";
  99. samsung,pin-function = <2>;
  100. samsung,pin-pud = <0>;
  101. samsung,pin-drv = <0>;
  102. };
  103. uart0_fctl: uart0-fctl {
  104. samsung,pins = "gpa0-2", "gpa0-3";
  105. samsung,pin-function = <2>;
  106. samsung,pin-pud = <0>;
  107. samsung,pin-drv = <0>;
  108. };
  109. uart1_data: uart1-data {
  110. samsung,pins = "gpa0-4", "gpa0-5";
  111. samsung,pin-function = <2>;
  112. samsung,pin-pud = <0>;
  113. samsung,pin-drv = <0>;
  114. };
  115. uart1_fctl: uart1-fctl {
  116. samsung,pins = "gpa0-6", "gpa0-7";
  117. samsung,pin-function = <2>;
  118. samsung,pin-pud = <0>;
  119. samsung,pin-drv = <0>;
  120. };
  121. i2c2_bus: i2c2-bus {
  122. samsung,pins = "gpa0-6", "gpa0-7";
  123. samsung,pin-function = <3>;
  124. samsung,pin-pud = <3>;
  125. samsung,pin-drv = <0>;
  126. };
  127. };
  128. Example 2: A pin-controller node with external wakeup interrupt controller node.
  129. pinctrl_1: pinctrl@11000000 {
  130. compatible = "samsung,pinctrl-exynos4210";
  131. reg = <0x11000000 0x1000>;
  132. interrupts = <0 46 0>;
  133. interrupt-controller;
  134. #interrupt-cells = <2>;
  135. wakup_eint: wakeup-interrupt-controller {
  136. compatible = "samsung,exynos4210-wakeup-eint";
  137. interrupt-parent = <&gic>;
  138. interrupt-controller;
  139. #interrupt-cells = <2>;
  140. interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
  141. <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
  142. <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
  143. <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>,
  144. <0 32 0>;
  145. };
  146. };
  147. Example 3: A uart client node that supports 'default' and 'flow-control' states.
  148. uart@13800000 {
  149. compatible = "samsung,exynos4210-uart";
  150. reg = <0x13800000 0x100>;
  151. interrupts = <0 52 0>;
  152. pinctrl-names = "default", "flow-control;
  153. pinctrl-0 = <&uart0_data>;
  154. pinctrl-1 = <&uart0_data &uart0_fctl>;
  155. };
  156. Example 4: Set up the default pin state for uart controller.
  157. static int s3c24xx_serial_probe(struct platform_device *pdev) {
  158. struct pinctrl *pinctrl;
  159. ...
  160. ...
  161. pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
  162. }