cx18-streams.c 24 KB

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  1. /*
  2. * cx18 init/start/stop/exit stream functions
  3. *
  4. * Derived from ivtv-streams.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  22. * 02111-1307 USA
  23. */
  24. #include "cx18-driver.h"
  25. #include "cx18-io.h"
  26. #include "cx18-fileops.h"
  27. #include "cx18-mailbox.h"
  28. #include "cx18-i2c.h"
  29. #include "cx18-queue.h"
  30. #include "cx18-ioctl.h"
  31. #include "cx18-streams.h"
  32. #include "cx18-cards.h"
  33. #include "cx18-scb.h"
  34. #include "cx18-dvb.h"
  35. #define CX18_DSP0_INTERRUPT_MASK 0xd0004C
  36. static struct v4l2_file_operations cx18_v4l2_enc_fops = {
  37. .owner = THIS_MODULE,
  38. .read = cx18_v4l2_read,
  39. .open = cx18_v4l2_open,
  40. /* FIXME change to video_ioctl2 if serialization lock can be removed */
  41. .unlocked_ioctl = cx18_v4l2_ioctl,
  42. .release = cx18_v4l2_close,
  43. .poll = cx18_v4l2_enc_poll,
  44. };
  45. /* offset from 0 to register ts v4l2 minors on */
  46. #define CX18_V4L2_ENC_TS_OFFSET 16
  47. /* offset from 0 to register pcm v4l2 minors on */
  48. #define CX18_V4L2_ENC_PCM_OFFSET 24
  49. /* offset from 0 to register yuv v4l2 minors on */
  50. #define CX18_V4L2_ENC_YUV_OFFSET 32
  51. static struct {
  52. const char *name;
  53. int vfl_type;
  54. int num_offset;
  55. int dma;
  56. enum v4l2_buf_type buf_type;
  57. } cx18_stream_info[] = {
  58. { /* CX18_ENC_STREAM_TYPE_MPG */
  59. "encoder MPEG",
  60. VFL_TYPE_GRABBER, 0,
  61. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  62. },
  63. { /* CX18_ENC_STREAM_TYPE_TS */
  64. "TS",
  65. VFL_TYPE_GRABBER, -1,
  66. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  67. },
  68. { /* CX18_ENC_STREAM_TYPE_YUV */
  69. "encoder YUV",
  70. VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
  71. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  72. },
  73. { /* CX18_ENC_STREAM_TYPE_VBI */
  74. "encoder VBI",
  75. VFL_TYPE_VBI, 0,
  76. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VBI_CAPTURE,
  77. },
  78. { /* CX18_ENC_STREAM_TYPE_PCM */
  79. "encoder PCM audio",
  80. VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
  81. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_PRIVATE,
  82. },
  83. { /* CX18_ENC_STREAM_TYPE_IDX */
  84. "encoder IDX",
  85. VFL_TYPE_GRABBER, -1,
  86. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  87. },
  88. { /* CX18_ENC_STREAM_TYPE_RAD */
  89. "encoder radio",
  90. VFL_TYPE_RADIO, 0,
  91. PCI_DMA_NONE, V4L2_BUF_TYPE_PRIVATE,
  92. },
  93. };
  94. static void cx18_stream_init(struct cx18 *cx, int type)
  95. {
  96. struct cx18_stream *s = &cx->streams[type];
  97. struct video_device *video_dev = s->video_dev;
  98. /* we need to keep video_dev, so restore it afterwards */
  99. memset(s, 0, sizeof(*s));
  100. s->video_dev = video_dev;
  101. /* initialize cx18_stream fields */
  102. s->dvb = NULL;
  103. s->cx = cx;
  104. s->type = type;
  105. s->name = cx18_stream_info[type].name;
  106. s->handle = CX18_INVALID_TASK_HANDLE;
  107. s->dma = cx18_stream_info[type].dma;
  108. s->buffers = cx->stream_buffers[type];
  109. s->buf_size = cx->stream_buf_size[type];
  110. INIT_LIST_HEAD(&s->buf_pool);
  111. s->bufs_per_mdl = 1;
  112. s->mdl_size = s->buf_size * s->bufs_per_mdl;
  113. init_waitqueue_head(&s->waitq);
  114. s->id = -1;
  115. spin_lock_init(&s->q_free.lock);
  116. cx18_queue_init(&s->q_free);
  117. spin_lock_init(&s->q_busy.lock);
  118. cx18_queue_init(&s->q_busy);
  119. spin_lock_init(&s->q_full.lock);
  120. cx18_queue_init(&s->q_full);
  121. spin_lock_init(&s->q_idle.lock);
  122. cx18_queue_init(&s->q_idle);
  123. INIT_WORK(&s->out_work_order, cx18_out_work_handler);
  124. }
  125. static int cx18_prep_dev(struct cx18 *cx, int type)
  126. {
  127. struct cx18_stream *s = &cx->streams[type];
  128. u32 cap = cx->v4l2_cap;
  129. int num_offset = cx18_stream_info[type].num_offset;
  130. int num = cx->instance + cx18_first_minor + num_offset;
  131. /*
  132. * These five fields are always initialized.
  133. * For analog capture related streams, if video_dev == NULL then the
  134. * stream is not in use.
  135. * For the TS stream, if dvb == NULL then the stream is not in use.
  136. * In those cases no other fields but these four can be used.
  137. */
  138. s->video_dev = NULL;
  139. s->dvb = NULL;
  140. s->cx = cx;
  141. s->type = type;
  142. s->name = cx18_stream_info[type].name;
  143. /* Check whether the radio is supported */
  144. if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
  145. return 0;
  146. /* Check whether VBI is supported */
  147. if (type == CX18_ENC_STREAM_TYPE_VBI &&
  148. !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
  149. return 0;
  150. /* User explicitly selected 0 buffers for these streams, so don't
  151. create them. */
  152. if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
  153. cx->stream_buffers[type] == 0) {
  154. CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
  155. return 0;
  156. }
  157. cx18_stream_init(cx, type);
  158. /* Allocate the cx18_dvb struct only for the TS on cards with DTV */
  159. if (type == CX18_ENC_STREAM_TYPE_TS) {
  160. if (cx->card->hw_all & CX18_HW_DVB) {
  161. s->dvb = kzalloc(sizeof(struct cx18_dvb), GFP_KERNEL);
  162. if (s->dvb == NULL) {
  163. CX18_ERR("Couldn't allocate cx18_dvb structure"
  164. " for %s\n", s->name);
  165. return -ENOMEM;
  166. }
  167. } else {
  168. /* Don't need buffers for the TS, if there is no DVB */
  169. s->buffers = 0;
  170. }
  171. }
  172. if (num_offset == -1)
  173. return 0;
  174. /* allocate and initialize the v4l2 video device structure */
  175. s->video_dev = video_device_alloc();
  176. if (s->video_dev == NULL) {
  177. CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
  178. s->name);
  179. return -ENOMEM;
  180. }
  181. snprintf(s->video_dev->name, sizeof(s->video_dev->name), "%s %s",
  182. cx->v4l2_dev.name, s->name);
  183. s->video_dev->num = num;
  184. s->video_dev->v4l2_dev = &cx->v4l2_dev;
  185. s->video_dev->fops = &cx18_v4l2_enc_fops;
  186. s->video_dev->release = video_device_release;
  187. s->video_dev->tvnorms = V4L2_STD_ALL;
  188. cx18_set_funcs(s->video_dev);
  189. return 0;
  190. }
  191. /* Initialize v4l2 variables and register v4l2 devices */
  192. int cx18_streams_setup(struct cx18 *cx)
  193. {
  194. int type, ret;
  195. /* Setup V4L2 Devices */
  196. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  197. /* Prepare device */
  198. ret = cx18_prep_dev(cx, type);
  199. if (ret < 0)
  200. break;
  201. /* Allocate Stream */
  202. ret = cx18_stream_alloc(&cx->streams[type]);
  203. if (ret < 0)
  204. break;
  205. }
  206. if (type == CX18_MAX_STREAMS)
  207. return 0;
  208. /* One or more streams could not be initialized. Clean 'em all up. */
  209. cx18_streams_cleanup(cx, 0);
  210. return ret;
  211. }
  212. static int cx18_reg_dev(struct cx18 *cx, int type)
  213. {
  214. struct cx18_stream *s = &cx->streams[type];
  215. int vfl_type = cx18_stream_info[type].vfl_type;
  216. const char *name;
  217. int num, ret;
  218. if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) {
  219. ret = cx18_dvb_register(s);
  220. if (ret < 0) {
  221. CX18_ERR("DVB failed to register\n");
  222. return ret;
  223. }
  224. }
  225. if (s->video_dev == NULL)
  226. return 0;
  227. num = s->video_dev->num;
  228. /* card number + user defined offset + device offset */
  229. if (type != CX18_ENC_STREAM_TYPE_MPG) {
  230. struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
  231. if (s_mpg->video_dev)
  232. num = s_mpg->video_dev->num
  233. + cx18_stream_info[type].num_offset;
  234. }
  235. video_set_drvdata(s->video_dev, s);
  236. /* Register device. First try the desired minor, then any free one. */
  237. ret = video_register_device_no_warn(s->video_dev, vfl_type, num);
  238. if (ret < 0) {
  239. CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
  240. s->name, num);
  241. video_device_release(s->video_dev);
  242. s->video_dev = NULL;
  243. return ret;
  244. }
  245. name = video_device_node_name(s->video_dev);
  246. switch (vfl_type) {
  247. case VFL_TYPE_GRABBER:
  248. CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
  249. name, s->name, cx->stream_buffers[type],
  250. cx->stream_buf_size[type] / 1024,
  251. (cx->stream_buf_size[type] * 100 / 1024) % 100);
  252. break;
  253. case VFL_TYPE_RADIO:
  254. CX18_INFO("Registered device %s for %s\n", name, s->name);
  255. break;
  256. case VFL_TYPE_VBI:
  257. if (cx->stream_buffers[type])
  258. CX18_INFO("Registered device %s for %s "
  259. "(%d x %d bytes)\n",
  260. name, s->name, cx->stream_buffers[type],
  261. cx->stream_buf_size[type]);
  262. else
  263. CX18_INFO("Registered device %s for %s\n",
  264. name, s->name);
  265. break;
  266. }
  267. return 0;
  268. }
  269. /* Register v4l2 devices */
  270. int cx18_streams_register(struct cx18 *cx)
  271. {
  272. int type;
  273. int err;
  274. int ret = 0;
  275. /* Register V4L2 devices */
  276. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  277. err = cx18_reg_dev(cx, type);
  278. if (err && ret == 0)
  279. ret = err;
  280. }
  281. if (ret == 0)
  282. return 0;
  283. /* One or more streams could not be initialized. Clean 'em all up. */
  284. cx18_streams_cleanup(cx, 1);
  285. return ret;
  286. }
  287. /* Unregister v4l2 devices */
  288. void cx18_streams_cleanup(struct cx18 *cx, int unregister)
  289. {
  290. struct video_device *vdev;
  291. int type;
  292. /* Teardown all streams */
  293. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  294. /* The TS has a cx18_dvb structure, not a video_device */
  295. if (type == CX18_ENC_STREAM_TYPE_TS) {
  296. if (cx->streams[type].dvb != NULL) {
  297. if (unregister)
  298. cx18_dvb_unregister(&cx->streams[type]);
  299. kfree(cx->streams[type].dvb);
  300. cx->streams[type].dvb = NULL;
  301. cx18_stream_free(&cx->streams[type]);
  302. }
  303. continue;
  304. }
  305. /* No struct video_device, but can have buffers allocated */
  306. if (type == CX18_ENC_STREAM_TYPE_IDX) {
  307. if (cx->stream_buffers[type] != 0) {
  308. cx->stream_buffers[type] = 0;
  309. cx18_stream_free(&cx->streams[type]);
  310. }
  311. continue;
  312. }
  313. /* If struct video_device exists, can have buffers allocated */
  314. vdev = cx->streams[type].video_dev;
  315. cx->streams[type].video_dev = NULL;
  316. if (vdev == NULL)
  317. continue;
  318. cx18_stream_free(&cx->streams[type]);
  319. /* Unregister or release device */
  320. if (unregister)
  321. video_unregister_device(vdev);
  322. else
  323. video_device_release(vdev);
  324. }
  325. }
  326. static void cx18_vbi_setup(struct cx18_stream *s)
  327. {
  328. struct cx18 *cx = s->cx;
  329. int raw = cx18_raw_vbi(cx);
  330. u32 data[CX2341X_MBOX_MAX_DATA];
  331. int lines;
  332. if (cx->is_60hz) {
  333. cx->vbi.count = 12;
  334. cx->vbi.start[0] = 10;
  335. cx->vbi.start[1] = 273;
  336. } else { /* PAL/SECAM */
  337. cx->vbi.count = 18;
  338. cx->vbi.start[0] = 6;
  339. cx->vbi.start[1] = 318;
  340. }
  341. /* setup VBI registers */
  342. if (raw)
  343. v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi);
  344. else
  345. v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced);
  346. /*
  347. * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
  348. * VBI when the first analog capture channel starts, as once it starts
  349. * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
  350. * (i.e. for the VBI capture channels). We also send it for each
  351. * analog capture channel anyway just to make sure we get the proper
  352. * behavior
  353. */
  354. if (raw) {
  355. lines = cx->vbi.count * 2;
  356. } else {
  357. /*
  358. * For 525/60 systems, according to the VIP 2 & BT.656 std:
  359. * The EAV RP code's Field bit toggles on line 4, a few lines
  360. * after the Vertcal Blank bit has already toggled.
  361. * Tell the encoder to capture 21-4+1=18 lines per field,
  362. * since we want lines 10 through 21.
  363. *
  364. * For 625/50 systems, according to the VIP 2 & BT.656 std:
  365. * The EAV RP code's Field bit toggles on line 1, a few lines
  366. * after the Vertcal Blank bit has already toggled.
  367. * (We've actually set the digitizer so that the Field bit
  368. * toggles on line 2.) Tell the encoder to capture 23-2+1=22
  369. * lines per field, since we want lines 6 through 23.
  370. */
  371. lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
  372. }
  373. data[0] = s->handle;
  374. /* Lines per field */
  375. data[1] = (lines / 2) | ((lines / 2) << 16);
  376. /* bytes per line */
  377. data[2] = (raw ? vbi_active_samples
  378. : (cx->is_60hz ? vbi_hblank_samples_60Hz
  379. : vbi_hblank_samples_50Hz));
  380. /* Every X number of frames a VBI interrupt arrives
  381. (frames as in 25 or 30 fps) */
  382. data[3] = 1;
  383. /*
  384. * Set the SAV/EAV RP codes to look for as start/stop points
  385. * when in VIP-1.1 mode
  386. */
  387. if (raw) {
  388. /*
  389. * Start codes for beginning of "active" line in vertical blank
  390. * 0x20 ( VerticalBlank )
  391. * 0x60 ( EvenField VerticalBlank )
  392. */
  393. data[4] = 0x20602060;
  394. /*
  395. * End codes for end of "active" raw lines and regular lines
  396. * 0x30 ( VerticalBlank HorizontalBlank)
  397. * 0x70 ( EvenField VerticalBlank HorizontalBlank)
  398. * 0x90 (Task HorizontalBlank)
  399. * 0xd0 (Task EvenField HorizontalBlank)
  400. */
  401. data[5] = 0x307090d0;
  402. } else {
  403. /*
  404. * End codes for active video, we want data in the hblank region
  405. * 0xb0 (Task 0 VerticalBlank HorizontalBlank)
  406. * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
  407. *
  408. * Since the V bit is only allowed to toggle in the EAV RP code,
  409. * just before the first active region line, these two
  410. * are problematic:
  411. * 0x90 (Task HorizontalBlank)
  412. * 0xd0 (Task EvenField HorizontalBlank)
  413. *
  414. * We have set the digitzer such that we don't have to worry
  415. * about these problem codes.
  416. */
  417. data[4] = 0xB0F0B0F0;
  418. /*
  419. * Start codes for beginning of active line in vertical blank
  420. * 0xa0 (Task VerticalBlank )
  421. * 0xe0 (Task EvenField VerticalBlank )
  422. */
  423. data[5] = 0xA0E0A0E0;
  424. }
  425. CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
  426. data[0], data[1], data[2], data[3], data[4], data[5]);
  427. cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
  428. }
  429. void cx18_stream_rotate_idx_mdls(struct cx18 *cx)
  430. {
  431. struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
  432. struct cx18_mdl *mdl;
  433. if (!cx18_stream_enabled(s))
  434. return;
  435. /* Return if the firmware is not running low on MDLs */
  436. if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >=
  437. CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN)
  438. return;
  439. /* Return if there are no MDLs to rotate back to the firmware */
  440. if (atomic_read(&s->q_full.depth) < 2)
  441. return;
  442. /*
  443. * Take the oldest IDX MDL still holding data, and discard its index
  444. * entries by scheduling the MDL to go back to the firmware
  445. */
  446. mdl = cx18_dequeue(s, &s->q_full);
  447. if (mdl != NULL)
  448. cx18_enqueue(s, mdl, &s->q_free);
  449. }
  450. static
  451. struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s,
  452. struct cx18_mdl *mdl)
  453. {
  454. struct cx18 *cx = s->cx;
  455. struct cx18_queue *q;
  456. /* Don't give it to the firmware, if we're not running a capture */
  457. if (s->handle == CX18_INVALID_TASK_HANDLE ||
  458. test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
  459. !test_bit(CX18_F_S_STREAMING, &s->s_flags))
  460. return cx18_enqueue(s, mdl, &s->q_free);
  461. q = cx18_enqueue(s, mdl, &s->q_busy);
  462. if (q != &s->q_busy)
  463. return q; /* The firmware has the max MDLs it can handle */
  464. cx18_mdl_sync_for_device(s, mdl);
  465. cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
  466. (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem,
  467. s->bufs_per_mdl, mdl->id, s->mdl_size);
  468. return q;
  469. }
  470. static
  471. void _cx18_stream_load_fw_queue(struct cx18_stream *s)
  472. {
  473. struct cx18_queue *q;
  474. struct cx18_mdl *mdl;
  475. if (atomic_read(&s->q_free.depth) == 0 ||
  476. atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
  477. return;
  478. /* Move from q_free to q_busy notifying the firmware, until the limit */
  479. do {
  480. mdl = cx18_dequeue(s, &s->q_free);
  481. if (mdl == NULL)
  482. break;
  483. q = _cx18_stream_put_mdl_fw(s, mdl);
  484. } while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM
  485. && q == &s->q_busy);
  486. }
  487. void cx18_out_work_handler(struct work_struct *work)
  488. {
  489. struct cx18_stream *s =
  490. container_of(work, struct cx18_stream, out_work_order);
  491. _cx18_stream_load_fw_queue(s);
  492. }
  493. static void cx18_stream_configure_mdls(struct cx18_stream *s)
  494. {
  495. cx18_unload_queues(s);
  496. switch (s->type) {
  497. case CX18_ENC_STREAM_TYPE_YUV:
  498. /*
  499. * Height should be a multiple of 32 lines.
  500. * Set the MDL size to the exact size needed for one frame.
  501. * Use enough buffers per MDL to cover the MDL size
  502. */
  503. s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2;
  504. s->bufs_per_mdl = s->mdl_size / s->buf_size;
  505. if (s->mdl_size % s->buf_size)
  506. s->bufs_per_mdl++;
  507. break;
  508. case CX18_ENC_STREAM_TYPE_VBI:
  509. s->bufs_per_mdl = 1;
  510. if (cx18_raw_vbi(s->cx)) {
  511. s->mdl_size = (s->cx->is_60hz ? 12 : 18)
  512. * 2 * vbi_active_samples;
  513. } else {
  514. /*
  515. * See comment in cx18_vbi_setup() below about the
  516. * extra lines we capture in sliced VBI mode due to
  517. * the lines on which EAV RP codes toggle.
  518. */
  519. s->mdl_size = s->cx->is_60hz
  520. ? (21 - 4 + 1) * 2 * vbi_hblank_samples_60Hz
  521. : (23 - 2 + 1) * 2 * vbi_hblank_samples_50Hz;
  522. }
  523. break;
  524. default:
  525. s->bufs_per_mdl = 1;
  526. s->mdl_size = s->buf_size * s->bufs_per_mdl;
  527. break;
  528. }
  529. cx18_load_queues(s);
  530. }
  531. int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
  532. {
  533. u32 data[MAX_MB_ARGUMENTS];
  534. struct cx18 *cx = s->cx;
  535. int captype = 0;
  536. struct cx18_stream *s_idx;
  537. if (!cx18_stream_enabled(s))
  538. return -EINVAL;
  539. CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
  540. switch (s->type) {
  541. case CX18_ENC_STREAM_TYPE_MPG:
  542. captype = CAPTURE_CHANNEL_TYPE_MPEG;
  543. cx->mpg_data_received = cx->vbi_data_inserted = 0;
  544. cx->dualwatch_jiffies = jiffies;
  545. cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(cx->cxhdl.audio_mode);
  546. cx->search_pack_header = 0;
  547. break;
  548. case CX18_ENC_STREAM_TYPE_IDX:
  549. captype = CAPTURE_CHANNEL_TYPE_INDEX;
  550. break;
  551. case CX18_ENC_STREAM_TYPE_TS:
  552. captype = CAPTURE_CHANNEL_TYPE_TS;
  553. break;
  554. case CX18_ENC_STREAM_TYPE_YUV:
  555. captype = CAPTURE_CHANNEL_TYPE_YUV;
  556. break;
  557. case CX18_ENC_STREAM_TYPE_PCM:
  558. captype = CAPTURE_CHANNEL_TYPE_PCM;
  559. break;
  560. case CX18_ENC_STREAM_TYPE_VBI:
  561. #ifdef CX18_ENCODER_PARSES_SLICED
  562. captype = cx18_raw_vbi(cx) ?
  563. CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
  564. #else
  565. /*
  566. * Currently we set things up so that Sliced VBI from the
  567. * digitizer is handled as Raw VBI by the encoder
  568. */
  569. captype = CAPTURE_CHANNEL_TYPE_VBI;
  570. #endif
  571. cx->vbi.frame = 0;
  572. cx->vbi.inserted_frame = 0;
  573. memset(cx->vbi.sliced_mpeg_size,
  574. 0, sizeof(cx->vbi.sliced_mpeg_size));
  575. break;
  576. default:
  577. return -EINVAL;
  578. }
  579. /* Clear Streamoff flags in case left from last capture */
  580. clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
  581. cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
  582. s->handle = data[0];
  583. cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
  584. /*
  585. * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
  586. * set up all the parameters, as it is not obvious which parameters the
  587. * firmware shares across capture channel types and which it does not.
  588. *
  589. * Some of the cx18_vapi() calls below apply to only certain capture
  590. * channel types. We're hoping there's no harm in calling most of them
  591. * anyway, as long as the values are all consistent. Setting some
  592. * shared parameters will have no effect once an analog capture channel
  593. * has started streaming.
  594. */
  595. if (captype != CAPTURE_CHANNEL_TYPE_TS) {
  596. cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
  597. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
  598. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
  599. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
  600. /*
  601. * Audio related reset according to
  602. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  603. */
  604. if (atomic_read(&cx->ana_capturing) == 0)
  605. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
  606. s->handle, 12);
  607. /*
  608. * Number of lines for Field 1 & Field 2 according to
  609. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  610. * Field 1 is 312 for 625 line systems in BT.656
  611. * Field 2 is 313 for 625 line systems in BT.656
  612. */
  613. cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
  614. s->handle, 312, 313);
  615. if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
  616. cx18_vbi_setup(s);
  617. /*
  618. * Select to receive I, P, and B frame index entries, if the
  619. * index stream is enabled. Otherwise disable index entry
  620. * generation.
  621. */
  622. s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
  623. cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2,
  624. s->handle, cx18_stream_enabled(s_idx) ? 7 : 0);
  625. /* Call out to the common CX2341x API setup for user controls */
  626. cx->cxhdl.priv = s;
  627. cx2341x_handler_setup(&cx->cxhdl);
  628. /*
  629. * When starting a capture and we're set for radio,
  630. * ensure the video is muted, despite the user control.
  631. */
  632. if (!cx->cxhdl.video_mute &&
  633. test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
  634. cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
  635. (v4l2_ctrl_g_ctrl(cx->cxhdl.video_mute_yuv) << 8) | 1);
  636. }
  637. if (atomic_read(&cx->tot_capturing) == 0) {
  638. cx2341x_handler_set_busy(&cx->cxhdl, 1);
  639. clear_bit(CX18_F_I_EOS, &cx->i_flags);
  640. cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
  641. }
  642. cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
  643. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
  644. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
  645. /* Init all the cpu_mdls for this stream */
  646. cx18_stream_configure_mdls(s);
  647. _cx18_stream_load_fw_queue(s);
  648. /* begin_capture */
  649. if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
  650. CX18_DEBUG_WARN("Error starting capture!\n");
  651. /* Ensure we're really not capturing before releasing MDLs */
  652. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  653. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  654. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
  655. else
  656. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  657. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  658. /* FIXME - CX18_F_S_STREAMOFF as well? */
  659. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  660. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  661. s->handle = CX18_INVALID_TASK_HANDLE;
  662. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  663. if (atomic_read(&cx->tot_capturing) == 0) {
  664. set_bit(CX18_F_I_EOS, &cx->i_flags);
  665. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  666. }
  667. return -EINVAL;
  668. }
  669. /* you're live! sit back and await interrupts :) */
  670. if (captype != CAPTURE_CHANNEL_TYPE_TS)
  671. atomic_inc(&cx->ana_capturing);
  672. atomic_inc(&cx->tot_capturing);
  673. return 0;
  674. }
  675. EXPORT_SYMBOL(cx18_start_v4l2_encode_stream);
  676. void cx18_stop_all_captures(struct cx18 *cx)
  677. {
  678. int i;
  679. for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
  680. struct cx18_stream *s = &cx->streams[i];
  681. if (!cx18_stream_enabled(s))
  682. continue;
  683. if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
  684. cx18_stop_v4l2_encode_stream(s, 0);
  685. }
  686. }
  687. int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
  688. {
  689. struct cx18 *cx = s->cx;
  690. unsigned long then;
  691. if (!cx18_stream_enabled(s))
  692. return -EINVAL;
  693. /* This function assumes that you are allowed to stop the capture
  694. and that we are actually capturing */
  695. CX18_DEBUG_INFO("Stop Capture\n");
  696. if (atomic_read(&cx->tot_capturing) == 0)
  697. return 0;
  698. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  699. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  700. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
  701. else
  702. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  703. then = jiffies;
  704. if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
  705. CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
  706. }
  707. if (s->type != CX18_ENC_STREAM_TYPE_TS)
  708. atomic_dec(&cx->ana_capturing);
  709. atomic_dec(&cx->tot_capturing);
  710. /* Clear capture and no-read bits */
  711. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  712. /* Tell the CX23418 it can't use our buffers anymore */
  713. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  714. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  715. s->handle = CX18_INVALID_TASK_HANDLE;
  716. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  717. if (atomic_read(&cx->tot_capturing) > 0)
  718. return 0;
  719. cx2341x_handler_set_busy(&cx->cxhdl, 0);
  720. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  721. wake_up(&s->waitq);
  722. return 0;
  723. }
  724. EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream);
  725. u32 cx18_find_handle(struct cx18 *cx)
  726. {
  727. int i;
  728. /* find first available handle to be used for global settings */
  729. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  730. struct cx18_stream *s = &cx->streams[i];
  731. if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
  732. return s->handle;
  733. }
  734. return CX18_INVALID_TASK_HANDLE;
  735. }
  736. struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
  737. {
  738. int i;
  739. struct cx18_stream *s;
  740. if (handle == CX18_INVALID_TASK_HANDLE)
  741. return NULL;
  742. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  743. s = &cx->streams[i];
  744. if (s->handle != handle)
  745. continue;
  746. if (cx18_stream_enabled(s))
  747. return s;
  748. }
  749. return NULL;
  750. }