wm8523.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583
  1. /*
  2. * wm8523.c -- WM8523 ALSA SoC Audio driver
  3. *
  4. * Copyright 2009 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/pm.h>
  18. #include <linux/i2c.h>
  19. #include <linux/regulator/consumer.h>
  20. #include <linux/slab.h>
  21. #include <linux/of_device.h>
  22. #include <sound/core.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/soc.h>
  26. #include <sound/initval.h>
  27. #include <sound/tlv.h>
  28. #include "wm8523.h"
  29. #define WM8523_NUM_SUPPLIES 2
  30. static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
  31. "AVDD",
  32. "LINEVDD",
  33. };
  34. #define WM8523_NUM_RATES 7
  35. /* codec private data */
  36. struct wm8523_priv {
  37. enum snd_soc_control_type control_type;
  38. struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
  39. unsigned int sysclk;
  40. unsigned int rate_constraint_list[WM8523_NUM_RATES];
  41. struct snd_pcm_hw_constraint_list rate_constraint;
  42. };
  43. static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = {
  44. 0x8523, /* R0 - DEVICE_ID */
  45. 0x0001, /* R1 - REVISION */
  46. 0x0000, /* R2 - PSCTRL1 */
  47. 0x1812, /* R3 - AIF_CTRL1 */
  48. 0x0000, /* R4 - AIF_CTRL2 */
  49. 0x0001, /* R5 - DAC_CTRL3 */
  50. 0x0190, /* R6 - DAC_GAINL */
  51. 0x0190, /* R7 - DAC_GAINR */
  52. 0x0000, /* R8 - ZERO_DETECT */
  53. };
  54. static int wm8523_volatile_register(struct snd_soc_codec *codec, unsigned int reg)
  55. {
  56. switch (reg) {
  57. case WM8523_DEVICE_ID:
  58. case WM8523_REVISION:
  59. return 1;
  60. default:
  61. return 0;
  62. }
  63. }
  64. static int wm8523_reset(struct snd_soc_codec *codec)
  65. {
  66. return snd_soc_write(codec, WM8523_DEVICE_ID, 0);
  67. }
  68. static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
  69. static const char *wm8523_zd_count_text[] = {
  70. "1024",
  71. "2048",
  72. };
  73. static const struct soc_enum wm8523_zc_count =
  74. SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);
  75. static const struct snd_kcontrol_new wm8523_controls[] = {
  76. SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
  77. 0, 448, 0, dac_tlv),
  78. SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
  79. SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
  80. SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
  81. SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
  82. SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
  83. SOC_ENUM("Zero Detect Count", wm8523_zc_count),
  84. };
  85. static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
  86. SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
  87. SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
  88. SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
  89. };
  90. static const struct snd_soc_dapm_route wm8523_dapm_routes[] = {
  91. { "LINEVOUTL", NULL, "DAC" },
  92. { "LINEVOUTR", NULL, "DAC" },
  93. };
  94. static struct {
  95. int value;
  96. int ratio;
  97. } lrclk_ratios[WM8523_NUM_RATES] = {
  98. { 1, 128 },
  99. { 2, 192 },
  100. { 3, 256 },
  101. { 4, 384 },
  102. { 5, 512 },
  103. { 6, 768 },
  104. { 7, 1152 },
  105. };
  106. static int wm8523_startup(struct snd_pcm_substream *substream,
  107. struct snd_soc_dai *dai)
  108. {
  109. struct snd_soc_codec *codec = dai->codec;
  110. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  111. /* The set of sample rates that can be supported depends on the
  112. * MCLK supplied to the CODEC - enforce this.
  113. */
  114. if (!wm8523->sysclk) {
  115. dev_err(codec->dev,
  116. "No MCLK configured, call set_sysclk() on init\n");
  117. return -EINVAL;
  118. }
  119. snd_pcm_hw_constraint_list(substream->runtime, 0,
  120. SNDRV_PCM_HW_PARAM_RATE,
  121. &wm8523->rate_constraint);
  122. return 0;
  123. }
  124. static int wm8523_hw_params(struct snd_pcm_substream *substream,
  125. struct snd_pcm_hw_params *params,
  126. struct snd_soc_dai *dai)
  127. {
  128. struct snd_soc_codec *codec = dai->codec;
  129. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  130. int i;
  131. u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
  132. u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);
  133. /* Find a supported LRCLK ratio */
  134. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  135. if (wm8523->sysclk / params_rate(params) ==
  136. lrclk_ratios[i].ratio)
  137. break;
  138. }
  139. /* Should never happen, should be handled by constraints */
  140. if (i == ARRAY_SIZE(lrclk_ratios)) {
  141. dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
  142. wm8523->sysclk / params_rate(params));
  143. return -EINVAL;
  144. }
  145. aifctrl2 &= ~WM8523_SR_MASK;
  146. aifctrl2 |= lrclk_ratios[i].value;
  147. aifctrl1 &= ~WM8523_WL_MASK;
  148. switch (params_format(params)) {
  149. case SNDRV_PCM_FORMAT_S16_LE:
  150. break;
  151. case SNDRV_PCM_FORMAT_S20_3LE:
  152. aifctrl1 |= 0x8;
  153. break;
  154. case SNDRV_PCM_FORMAT_S24_LE:
  155. aifctrl1 |= 0x10;
  156. break;
  157. case SNDRV_PCM_FORMAT_S32_LE:
  158. aifctrl1 |= 0x18;
  159. break;
  160. }
  161. snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  162. snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);
  163. return 0;
  164. }
  165. static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  166. int clk_id, unsigned int freq, int dir)
  167. {
  168. struct snd_soc_codec *codec = codec_dai->codec;
  169. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  170. unsigned int val;
  171. int i;
  172. wm8523->sysclk = freq;
  173. wm8523->rate_constraint.count = 0;
  174. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  175. val = freq / lrclk_ratios[i].ratio;
  176. /* Check that it's a standard rate since core can't
  177. * cope with others and having the odd rates confuses
  178. * constraint matching.
  179. */
  180. switch (val) {
  181. case 8000:
  182. case 11025:
  183. case 16000:
  184. case 22050:
  185. case 32000:
  186. case 44100:
  187. case 48000:
  188. case 64000:
  189. case 88200:
  190. case 96000:
  191. case 176400:
  192. case 192000:
  193. dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
  194. val);
  195. wm8523->rate_constraint_list[i] = val;
  196. wm8523->rate_constraint.count++;
  197. break;
  198. default:
  199. dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
  200. val);
  201. }
  202. }
  203. /* Need at least one supported rate... */
  204. if (wm8523->rate_constraint.count == 0)
  205. return -EINVAL;
  206. return 0;
  207. }
  208. static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
  209. unsigned int fmt)
  210. {
  211. struct snd_soc_codec *codec = codec_dai->codec;
  212. u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
  213. aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
  214. WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);
  215. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  216. case SND_SOC_DAIFMT_CBM_CFM:
  217. aifctrl1 |= WM8523_AIF_MSTR;
  218. break;
  219. case SND_SOC_DAIFMT_CBS_CFS:
  220. break;
  221. default:
  222. return -EINVAL;
  223. }
  224. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  225. case SND_SOC_DAIFMT_I2S:
  226. aifctrl1 |= 0x0002;
  227. break;
  228. case SND_SOC_DAIFMT_RIGHT_J:
  229. break;
  230. case SND_SOC_DAIFMT_LEFT_J:
  231. aifctrl1 |= 0x0001;
  232. break;
  233. case SND_SOC_DAIFMT_DSP_A:
  234. aifctrl1 |= 0x0003;
  235. break;
  236. case SND_SOC_DAIFMT_DSP_B:
  237. aifctrl1 |= 0x0023;
  238. break;
  239. default:
  240. return -EINVAL;
  241. }
  242. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  243. case SND_SOC_DAIFMT_NB_NF:
  244. break;
  245. case SND_SOC_DAIFMT_IB_IF:
  246. aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
  247. break;
  248. case SND_SOC_DAIFMT_IB_NF:
  249. aifctrl1 |= WM8523_BCLK_INV;
  250. break;
  251. case SND_SOC_DAIFMT_NB_IF:
  252. aifctrl1 |= WM8523_LRCLK_INV;
  253. break;
  254. default:
  255. return -EINVAL;
  256. }
  257. snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  258. return 0;
  259. }
  260. static int wm8523_set_bias_level(struct snd_soc_codec *codec,
  261. enum snd_soc_bias_level level)
  262. {
  263. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  264. u16 *reg_cache = codec->reg_cache;
  265. int ret, i;
  266. switch (level) {
  267. case SND_SOC_BIAS_ON:
  268. break;
  269. case SND_SOC_BIAS_PREPARE:
  270. /* Full power on */
  271. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  272. WM8523_SYS_ENA_MASK, 3);
  273. break;
  274. case SND_SOC_BIAS_STANDBY:
  275. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
  276. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  277. wm8523->supplies);
  278. if (ret != 0) {
  279. dev_err(codec->dev,
  280. "Failed to enable supplies: %d\n",
  281. ret);
  282. return ret;
  283. }
  284. /* Initial power up */
  285. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  286. WM8523_SYS_ENA_MASK, 1);
  287. /* Sync back default/cached values */
  288. for (i = WM8523_AIF_CTRL1;
  289. i < WM8523_MAX_REGISTER; i++)
  290. snd_soc_write(codec, i, reg_cache[i]);
  291. msleep(100);
  292. }
  293. /* Power up to mute */
  294. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  295. WM8523_SYS_ENA_MASK, 2);
  296. break;
  297. case SND_SOC_BIAS_OFF:
  298. /* The chip runs through the power down sequence for us. */
  299. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  300. WM8523_SYS_ENA_MASK, 0);
  301. msleep(100);
  302. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
  303. wm8523->supplies);
  304. break;
  305. }
  306. codec->dapm.bias_level = level;
  307. return 0;
  308. }
  309. #define WM8523_RATES SNDRV_PCM_RATE_8000_192000
  310. #define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  311. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  312. static const struct snd_soc_dai_ops wm8523_dai_ops = {
  313. .startup = wm8523_startup,
  314. .hw_params = wm8523_hw_params,
  315. .set_sysclk = wm8523_set_dai_sysclk,
  316. .set_fmt = wm8523_set_dai_fmt,
  317. };
  318. static struct snd_soc_dai_driver wm8523_dai = {
  319. .name = "wm8523-hifi",
  320. .playback = {
  321. .stream_name = "Playback",
  322. .channels_min = 2, /* Mono modes not yet supported */
  323. .channels_max = 2,
  324. .rates = WM8523_RATES,
  325. .formats = WM8523_FORMATS,
  326. },
  327. .ops = &wm8523_dai_ops,
  328. };
  329. #ifdef CONFIG_PM
  330. static int wm8523_suspend(struct snd_soc_codec *codec)
  331. {
  332. wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
  333. return 0;
  334. }
  335. static int wm8523_resume(struct snd_soc_codec *codec)
  336. {
  337. wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  338. return 0;
  339. }
  340. #else
  341. #define wm8523_suspend NULL
  342. #define wm8523_resume NULL
  343. #endif
  344. static int wm8523_probe(struct snd_soc_codec *codec)
  345. {
  346. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  347. int ret, i;
  348. wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
  349. wm8523->rate_constraint.count =
  350. ARRAY_SIZE(wm8523->rate_constraint_list);
  351. ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8523->control_type);
  352. if (ret != 0) {
  353. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  354. return ret;
  355. }
  356. for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
  357. wm8523->supplies[i].supply = wm8523_supply_names[i];
  358. ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies),
  359. wm8523->supplies);
  360. if (ret != 0) {
  361. dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
  362. return ret;
  363. }
  364. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  365. wm8523->supplies);
  366. if (ret != 0) {
  367. dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
  368. goto err_get;
  369. }
  370. ret = snd_soc_read(codec, WM8523_DEVICE_ID);
  371. if (ret < 0) {
  372. dev_err(codec->dev, "Failed to read ID register\n");
  373. goto err_enable;
  374. }
  375. if (ret != wm8523_reg[WM8523_DEVICE_ID]) {
  376. dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
  377. ret = -EINVAL;
  378. goto err_enable;
  379. }
  380. ret = snd_soc_read(codec, WM8523_REVISION);
  381. if (ret < 0) {
  382. dev_err(codec->dev, "Failed to read revision register\n");
  383. goto err_enable;
  384. }
  385. dev_info(codec->dev, "revision %c\n",
  386. (ret & WM8523_CHIP_REV_MASK) + 'A');
  387. ret = wm8523_reset(codec);
  388. if (ret < 0) {
  389. dev_err(codec->dev, "Failed to issue reset\n");
  390. goto err_enable;
  391. }
  392. /* Change some default settings - latch VU and enable ZC */
  393. snd_soc_update_bits(codec, WM8523_DAC_GAINR,
  394. WM8523_DACR_VU, WM8523_DACR_VU);
  395. snd_soc_update_bits(codec, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC);
  396. wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  397. /* Bias level configuration will have done an extra enable */
  398. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  399. return 0;
  400. err_enable:
  401. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  402. err_get:
  403. regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  404. return ret;
  405. }
  406. static int wm8523_remove(struct snd_soc_codec *codec)
  407. {
  408. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  409. wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
  410. regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  411. return 0;
  412. }
  413. static struct snd_soc_codec_driver soc_codec_dev_wm8523 = {
  414. .probe = wm8523_probe,
  415. .remove = wm8523_remove,
  416. .suspend = wm8523_suspend,
  417. .resume = wm8523_resume,
  418. .set_bias_level = wm8523_set_bias_level,
  419. .reg_cache_size = WM8523_REGISTER_COUNT,
  420. .reg_word_size = sizeof(u16),
  421. .reg_cache_default = wm8523_reg,
  422. .volatile_register = wm8523_volatile_register,
  423. .controls = wm8523_controls,
  424. .num_controls = ARRAY_SIZE(wm8523_controls),
  425. .dapm_widgets = wm8523_dapm_widgets,
  426. .num_dapm_widgets = ARRAY_SIZE(wm8523_dapm_widgets),
  427. .dapm_routes = wm8523_dapm_routes,
  428. .num_dapm_routes = ARRAY_SIZE(wm8523_dapm_routes),
  429. };
  430. static const struct of_device_id wm8523_of_match[] = {
  431. { .compatible = "wlf,wm8523" },
  432. { },
  433. };
  434. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  435. static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
  436. const struct i2c_device_id *id)
  437. {
  438. struct wm8523_priv *wm8523;
  439. int ret;
  440. wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL);
  441. if (wm8523 == NULL)
  442. return -ENOMEM;
  443. i2c_set_clientdata(i2c, wm8523);
  444. wm8523->control_type = SND_SOC_I2C;
  445. ret = snd_soc_register_codec(&i2c->dev,
  446. &soc_codec_dev_wm8523, &wm8523_dai, 1);
  447. if (ret < 0)
  448. kfree(wm8523);
  449. return ret;
  450. }
  451. static __devexit int wm8523_i2c_remove(struct i2c_client *client)
  452. {
  453. snd_soc_unregister_codec(&client->dev);
  454. kfree(i2c_get_clientdata(client));
  455. return 0;
  456. }
  457. static const struct i2c_device_id wm8523_i2c_id[] = {
  458. { "wm8523", 0 },
  459. { }
  460. };
  461. MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
  462. static struct i2c_driver wm8523_i2c_driver = {
  463. .driver = {
  464. .name = "wm8523",
  465. .owner = THIS_MODULE,
  466. .of_match_table = wm8523_of_match,
  467. },
  468. .probe = wm8523_i2c_probe,
  469. .remove = __devexit_p(wm8523_i2c_remove),
  470. .id_table = wm8523_i2c_id,
  471. };
  472. #endif
  473. static int __init wm8523_modinit(void)
  474. {
  475. int ret;
  476. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  477. ret = i2c_add_driver(&wm8523_i2c_driver);
  478. if (ret != 0) {
  479. printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
  480. ret);
  481. }
  482. #endif
  483. return 0;
  484. }
  485. module_init(wm8523_modinit);
  486. static void __exit wm8523_exit(void)
  487. {
  488. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  489. i2c_del_driver(&wm8523_i2c_driver);
  490. #endif
  491. }
  492. module_exit(wm8523_exit);
  493. MODULE_DESCRIPTION("ASoC WM8523 driver");
  494. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  495. MODULE_LICENSE("GPL");