cs4270.c 22 KB

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  1. /*
  2. * CS4270 ALSA SoC (ASoC) codec driver
  3. *
  4. * Author: Timur Tabi <timur@freescale.com>
  5. *
  6. * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed
  7. * under the terms of the GNU General Public License version 2. This
  8. * program is licensed "as is" without any warranty of any kind, whether
  9. * express or implied.
  10. *
  11. * This is an ASoC device driver for the Cirrus Logic CS4270 codec.
  12. *
  13. * Current features/limitations:
  14. *
  15. * - Software mode is supported. Stand-alone mode is not supported.
  16. * - Only I2C is supported, not SPI
  17. * - Support for master and slave mode
  18. * - The machine driver's 'startup' function must call
  19. * cs4270_set_dai_sysclk() with the value of MCLK.
  20. * - Only I2S and left-justified modes are supported
  21. * - Power management is supported
  22. */
  23. #include <linux/module.h>
  24. #include <linux/slab.h>
  25. #include <sound/core.h>
  26. #include <sound/soc.h>
  27. #include <sound/initval.h>
  28. #include <linux/i2c.h>
  29. #include <linux/delay.h>
  30. #include <linux/regulator/consumer.h>
  31. /*
  32. * The codec isn't really big-endian or little-endian, since the I2S
  33. * interface requires data to be sent serially with the MSbit first.
  34. * However, to support BE and LE I2S devices, we specify both here. That
  35. * way, ALSA will always match the bit patterns.
  36. */
  37. #define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
  38. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
  39. SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
  40. SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
  41. SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
  42. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
  43. /* CS4270 registers addresses */
  44. #define CS4270_CHIPID 0x01 /* Chip ID */
  45. #define CS4270_PWRCTL 0x02 /* Power Control */
  46. #define CS4270_MODE 0x03 /* Mode Control */
  47. #define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */
  48. #define CS4270_TRANS 0x05 /* Transition Control */
  49. #define CS4270_MUTE 0x06 /* Mute Control */
  50. #define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */
  51. #define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */
  52. #define CS4270_FIRSTREG 0x01
  53. #define CS4270_LASTREG 0x08
  54. #define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1)
  55. #define CS4270_I2C_INCR 0x80
  56. /* Bit masks for the CS4270 registers */
  57. #define CS4270_CHIPID_ID 0xF0
  58. #define CS4270_CHIPID_REV 0x0F
  59. #define CS4270_PWRCTL_FREEZE 0x80
  60. #define CS4270_PWRCTL_PDN_ADC 0x20
  61. #define CS4270_PWRCTL_PDN_DAC 0x02
  62. #define CS4270_PWRCTL_PDN 0x01
  63. #define CS4270_PWRCTL_PDN_ALL \
  64. (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN)
  65. #define CS4270_MODE_SPEED_MASK 0x30
  66. #define CS4270_MODE_1X 0x00
  67. #define CS4270_MODE_2X 0x10
  68. #define CS4270_MODE_4X 0x20
  69. #define CS4270_MODE_SLAVE 0x30
  70. #define CS4270_MODE_DIV_MASK 0x0E
  71. #define CS4270_MODE_DIV1 0x00
  72. #define CS4270_MODE_DIV15 0x02
  73. #define CS4270_MODE_DIV2 0x04
  74. #define CS4270_MODE_DIV3 0x06
  75. #define CS4270_MODE_DIV4 0x08
  76. #define CS4270_MODE_POPGUARD 0x01
  77. #define CS4270_FORMAT_FREEZE_A 0x80
  78. #define CS4270_FORMAT_FREEZE_B 0x40
  79. #define CS4270_FORMAT_LOOPBACK 0x20
  80. #define CS4270_FORMAT_DAC_MASK 0x18
  81. #define CS4270_FORMAT_DAC_LJ 0x00
  82. #define CS4270_FORMAT_DAC_I2S 0x08
  83. #define CS4270_FORMAT_DAC_RJ16 0x18
  84. #define CS4270_FORMAT_DAC_RJ24 0x10
  85. #define CS4270_FORMAT_ADC_MASK 0x01
  86. #define CS4270_FORMAT_ADC_LJ 0x00
  87. #define CS4270_FORMAT_ADC_I2S 0x01
  88. #define CS4270_TRANS_ONE_VOL 0x80
  89. #define CS4270_TRANS_SOFT 0x40
  90. #define CS4270_TRANS_ZERO 0x20
  91. #define CS4270_TRANS_INV_ADC_A 0x08
  92. #define CS4270_TRANS_INV_ADC_B 0x10
  93. #define CS4270_TRANS_INV_DAC_A 0x02
  94. #define CS4270_TRANS_INV_DAC_B 0x04
  95. #define CS4270_TRANS_DEEMPH 0x01
  96. #define CS4270_MUTE_AUTO 0x20
  97. #define CS4270_MUTE_ADC_A 0x08
  98. #define CS4270_MUTE_ADC_B 0x10
  99. #define CS4270_MUTE_POLARITY 0x04
  100. #define CS4270_MUTE_DAC_A 0x01
  101. #define CS4270_MUTE_DAC_B 0x02
  102. /* Power-on default values for the registers
  103. *
  104. * This array contains the power-on default values of the registers, with the
  105. * exception of the "CHIPID" register (01h). The lower four bits of that
  106. * register contain the hardware revision, so it is treated as volatile.
  107. *
  108. * Also note that on the CS4270, the first readable register is 1, but ASoC
  109. * assumes the first register is 0. Therfore, the array must have an entry for
  110. * register 0, but we use cs4270_reg_is_readable() to tell ASoC that it can't
  111. * be read.
  112. */
  113. static const u8 cs4270_default_reg_cache[CS4270_LASTREG + 1] = {
  114. 0x00, 0x00, 0x00, 0x30, 0x00, 0x60, 0x20, 0x00, 0x00
  115. };
  116. static const char *supply_names[] = {
  117. "va", "vd", "vlc"
  118. };
  119. /* Private data for the CS4270 */
  120. struct cs4270_private {
  121. enum snd_soc_control_type control_type;
  122. unsigned int mclk; /* Input frequency of the MCLK pin */
  123. unsigned int mode; /* The mode (I2S or left-justified) */
  124. unsigned int slave_mode;
  125. unsigned int manual_mute;
  126. /* power domain regulators */
  127. struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
  128. };
  129. /**
  130. * struct cs4270_mode_ratios - clock ratio tables
  131. * @ratio: the ratio of MCLK to the sample rate
  132. * @speed_mode: the Speed Mode bits to set in the Mode Control register for
  133. * this ratio
  134. * @mclk: the Ratio Select bits to set in the Mode Control register for this
  135. * ratio
  136. *
  137. * The data for this chart is taken from Table 5 of the CS4270 reference
  138. * manual.
  139. *
  140. * This table is used to determine how to program the Mode Control register.
  141. * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling
  142. * rates the CS4270 currently supports.
  143. *
  144. * @speed_mode is the corresponding bit pattern to be written to the
  145. * MODE bits of the Mode Control Register
  146. *
  147. * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of
  148. * the Mode Control Register.
  149. *
  150. * In situations where a single ratio is represented by multiple speed
  151. * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick
  152. * double-speed instead of quad-speed. However, the CS4270 errata states
  153. * that divide-By-1.5 can cause failures, so we avoid that mode where
  154. * possible.
  155. *
  156. * Errata: There is an errata for the CS4270 where divide-by-1.5 does not
  157. * work if Vd is 3.3V. If this effects you, select the
  158. * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will
  159. * never select any sample rates that require divide-by-1.5.
  160. */
  161. struct cs4270_mode_ratios {
  162. unsigned int ratio;
  163. u8 speed_mode;
  164. u8 mclk;
  165. };
  166. static struct cs4270_mode_ratios cs4270_mode_ratios[] = {
  167. {64, CS4270_MODE_4X, CS4270_MODE_DIV1},
  168. #ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA
  169. {96, CS4270_MODE_4X, CS4270_MODE_DIV15},
  170. #endif
  171. {128, CS4270_MODE_2X, CS4270_MODE_DIV1},
  172. {192, CS4270_MODE_4X, CS4270_MODE_DIV3},
  173. {256, CS4270_MODE_1X, CS4270_MODE_DIV1},
  174. {384, CS4270_MODE_2X, CS4270_MODE_DIV3},
  175. {512, CS4270_MODE_1X, CS4270_MODE_DIV2},
  176. {768, CS4270_MODE_1X, CS4270_MODE_DIV3},
  177. {1024, CS4270_MODE_1X, CS4270_MODE_DIV4}
  178. };
  179. /* The number of MCLK/LRCK ratios supported by the CS4270 */
  180. #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)
  181. static int cs4270_reg_is_readable(struct snd_soc_codec *codec, unsigned int reg)
  182. {
  183. return (reg >= CS4270_FIRSTREG) && (reg <= CS4270_LASTREG);
  184. }
  185. static int cs4270_reg_is_volatile(struct snd_soc_codec *codec, unsigned int reg)
  186. {
  187. /* Unreadable registers are considered volatile */
  188. if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
  189. return 1;
  190. return reg == CS4270_CHIPID;
  191. }
  192. /**
  193. * cs4270_set_dai_sysclk - determine the CS4270 samples rates.
  194. * @codec_dai: the codec DAI
  195. * @clk_id: the clock ID (ignored)
  196. * @freq: the MCLK input frequency
  197. * @dir: the clock direction (ignored)
  198. *
  199. * This function is used to tell the codec driver what the input MCLK
  200. * frequency is.
  201. *
  202. * The value of MCLK is used to determine which sample rates are supported
  203. * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine
  204. * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024.
  205. *
  206. * This function calculates the nine ratios and determines which ones match
  207. * a standard sample rate. If there's a match, then it is added to the list
  208. * of supported sample rates.
  209. *
  210. * This function must be called by the machine driver's 'startup' function,
  211. * otherwise the list of supported sample rates will not be available in
  212. * time for ALSA.
  213. *
  214. * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause
  215. * theoretically possible sample rates to be enabled. Call it again with a
  216. * proper value set one the external clock is set (most probably you would do
  217. * that from a machine's driver 'hw_param' hook.
  218. */
  219. static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  220. int clk_id, unsigned int freq, int dir)
  221. {
  222. struct snd_soc_codec *codec = codec_dai->codec;
  223. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  224. cs4270->mclk = freq;
  225. return 0;
  226. }
  227. /**
  228. * cs4270_set_dai_fmt - configure the codec for the selected audio format
  229. * @codec_dai: the codec DAI
  230. * @format: a SND_SOC_DAIFMT_x value indicating the data format
  231. *
  232. * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
  233. * codec accordingly.
  234. *
  235. * Currently, this function only supports SND_SOC_DAIFMT_I2S and
  236. * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified
  237. * data for playback only, but ASoC currently does not support different
  238. * formats for playback vs. record.
  239. */
  240. static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai,
  241. unsigned int format)
  242. {
  243. struct snd_soc_codec *codec = codec_dai->codec;
  244. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  245. /* set DAI format */
  246. switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
  247. case SND_SOC_DAIFMT_I2S:
  248. case SND_SOC_DAIFMT_LEFT_J:
  249. cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
  250. break;
  251. default:
  252. dev_err(codec->dev, "invalid dai format\n");
  253. return -EINVAL;
  254. }
  255. /* set master/slave audio interface */
  256. switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
  257. case SND_SOC_DAIFMT_CBS_CFS:
  258. cs4270->slave_mode = 1;
  259. break;
  260. case SND_SOC_DAIFMT_CBM_CFM:
  261. cs4270->slave_mode = 0;
  262. break;
  263. default:
  264. /* all other modes are unsupported by the hardware */
  265. dev_err(codec->dev, "Unknown master/slave configuration\n");
  266. return -EINVAL;
  267. }
  268. return 0;
  269. }
  270. /**
  271. * cs4270_hw_params - program the CS4270 with the given hardware parameters.
  272. * @substream: the audio stream
  273. * @params: the hardware parameters to set
  274. * @dai: the SOC DAI (ignored)
  275. *
  276. * This function programs the hardware with the values provided.
  277. * Specifically, the sample rate and the data format.
  278. *
  279. * The .ops functions are used to provide board-specific data, like input
  280. * frequencies, to this driver. This function takes that information,
  281. * combines it with the hardware parameters provided, and programs the
  282. * hardware accordingly.
  283. */
  284. static int cs4270_hw_params(struct snd_pcm_substream *substream,
  285. struct snd_pcm_hw_params *params,
  286. struct snd_soc_dai *dai)
  287. {
  288. struct snd_soc_codec *codec = dai->codec;
  289. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  290. int ret;
  291. unsigned int i;
  292. unsigned int rate;
  293. unsigned int ratio;
  294. int reg;
  295. /* Figure out which MCLK/LRCK ratio to use */
  296. rate = params_rate(params); /* Sampling rate, in Hz */
  297. ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */
  298. for (i = 0; i < NUM_MCLK_RATIOS; i++) {
  299. if (cs4270_mode_ratios[i].ratio == ratio)
  300. break;
  301. }
  302. if (i == NUM_MCLK_RATIOS) {
  303. /* We did not find a matching ratio */
  304. dev_err(codec->dev, "could not find matching ratio\n");
  305. return -EINVAL;
  306. }
  307. /* Set the sample rate */
  308. reg = snd_soc_read(codec, CS4270_MODE);
  309. reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK);
  310. reg |= cs4270_mode_ratios[i].mclk;
  311. if (cs4270->slave_mode)
  312. reg |= CS4270_MODE_SLAVE;
  313. else
  314. reg |= cs4270_mode_ratios[i].speed_mode;
  315. ret = snd_soc_write(codec, CS4270_MODE, reg);
  316. if (ret < 0) {
  317. dev_err(codec->dev, "i2c write failed\n");
  318. return ret;
  319. }
  320. /* Set the DAI format */
  321. reg = snd_soc_read(codec, CS4270_FORMAT);
  322. reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK);
  323. switch (cs4270->mode) {
  324. case SND_SOC_DAIFMT_I2S:
  325. reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S;
  326. break;
  327. case SND_SOC_DAIFMT_LEFT_J:
  328. reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ;
  329. break;
  330. default:
  331. dev_err(codec->dev, "unknown dai format\n");
  332. return -EINVAL;
  333. }
  334. ret = snd_soc_write(codec, CS4270_FORMAT, reg);
  335. if (ret < 0) {
  336. dev_err(codec->dev, "i2c write failed\n");
  337. return ret;
  338. }
  339. return ret;
  340. }
  341. /**
  342. * cs4270_dai_mute - enable/disable the CS4270 external mute
  343. * @dai: the SOC DAI
  344. * @mute: 0 = disable mute, 1 = enable mute
  345. *
  346. * This function toggles the mute bits in the MUTE register. The CS4270's
  347. * mute capability is intended for external muting circuitry, so if the
  348. * board does not have the MUTEA or MUTEB pins connected to such circuitry,
  349. * then this function will do nothing.
  350. */
  351. static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute)
  352. {
  353. struct snd_soc_codec *codec = dai->codec;
  354. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  355. int reg6;
  356. reg6 = snd_soc_read(codec, CS4270_MUTE);
  357. if (mute)
  358. reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B;
  359. else {
  360. reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B);
  361. reg6 |= cs4270->manual_mute;
  362. }
  363. return snd_soc_write(codec, CS4270_MUTE, reg6);
  364. }
  365. /**
  366. * cs4270_soc_put_mute - put callback for the 'Master Playback switch'
  367. * alsa control.
  368. * @kcontrol: mixer control
  369. * @ucontrol: control element information
  370. *
  371. * This function basically passes the arguments on to the generic
  372. * snd_soc_put_volsw() function and saves the mute information in
  373. * our private data structure. This is because we want to prevent
  374. * cs4270_dai_mute() neglecting the user's decision to manually
  375. * mute the codec's output.
  376. *
  377. * Returns 0 for success.
  378. */
  379. static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol,
  380. struct snd_ctl_elem_value *ucontrol)
  381. {
  382. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  383. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  384. int left = !ucontrol->value.integer.value[0];
  385. int right = !ucontrol->value.integer.value[1];
  386. cs4270->manual_mute = (left ? CS4270_MUTE_DAC_A : 0) |
  387. (right ? CS4270_MUTE_DAC_B : 0);
  388. return snd_soc_put_volsw(kcontrol, ucontrol);
  389. }
  390. /* A list of non-DAPM controls that the CS4270 supports */
  391. static const struct snd_kcontrol_new cs4270_snd_controls[] = {
  392. SOC_DOUBLE_R("Master Playback Volume",
  393. CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1),
  394. SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT, 5, 1, 0),
  395. SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS, 6, 1, 0),
  396. SOC_SINGLE("Zero Cross Switch", CS4270_TRANS, 5, 1, 0),
  397. SOC_SINGLE("De-emphasis filter", CS4270_TRANS, 0, 1, 0),
  398. SOC_SINGLE("Popguard Switch", CS4270_MODE, 0, 1, 1),
  399. SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE, 5, 1, 0),
  400. SOC_DOUBLE("Master Capture Switch", CS4270_MUTE, 3, 4, 1, 1),
  401. SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE, 0, 1, 1, 1,
  402. snd_soc_get_volsw, cs4270_soc_put_mute),
  403. };
  404. static const struct snd_soc_dai_ops cs4270_dai_ops = {
  405. .hw_params = cs4270_hw_params,
  406. .set_sysclk = cs4270_set_dai_sysclk,
  407. .set_fmt = cs4270_set_dai_fmt,
  408. .digital_mute = cs4270_dai_mute,
  409. };
  410. static struct snd_soc_dai_driver cs4270_dai = {
  411. .name = "cs4270-hifi",
  412. .playback = {
  413. .stream_name = "Playback",
  414. .channels_min = 1,
  415. .channels_max = 2,
  416. .rates = SNDRV_PCM_RATE_CONTINUOUS,
  417. .rate_min = 4000,
  418. .rate_max = 216000,
  419. .formats = CS4270_FORMATS,
  420. },
  421. .capture = {
  422. .stream_name = "Capture",
  423. .channels_min = 1,
  424. .channels_max = 2,
  425. .rates = SNDRV_PCM_RATE_CONTINUOUS,
  426. .rate_min = 4000,
  427. .rate_max = 216000,
  428. .formats = CS4270_FORMATS,
  429. },
  430. .ops = &cs4270_dai_ops,
  431. };
  432. /**
  433. * cs4270_probe - ASoC probe function
  434. * @pdev: platform device
  435. *
  436. * This function is called when ASoC has all the pieces it needs to
  437. * instantiate a sound driver.
  438. */
  439. static int cs4270_probe(struct snd_soc_codec *codec)
  440. {
  441. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  442. int i, ret;
  443. /* Tell ASoC what kind of I/O to use to read the registers. ASoC will
  444. * then do the I2C transactions itself.
  445. */
  446. ret = snd_soc_codec_set_cache_io(codec, 8, 8, cs4270->control_type);
  447. if (ret < 0) {
  448. dev_err(codec->dev, "failed to set cache I/O (ret=%i)\n", ret);
  449. return ret;
  450. }
  451. /* Disable auto-mute. This feature appears to be buggy. In some
  452. * situations, auto-mute will not deactivate when it should, so we want
  453. * this feature disabled by default. An application (e.g. alsactl) can
  454. * re-enabled it by using the controls.
  455. */
  456. ret = snd_soc_update_bits(codec, CS4270_MUTE, CS4270_MUTE_AUTO, 0);
  457. if (ret < 0) {
  458. dev_err(codec->dev, "i2c write failed\n");
  459. return ret;
  460. }
  461. /* Disable automatic volume control. The hardware enables, and it
  462. * causes volume change commands to be delayed, sometimes until after
  463. * playback has started. An application (e.g. alsactl) can
  464. * re-enabled it by using the controls.
  465. */
  466. ret = snd_soc_update_bits(codec, CS4270_TRANS,
  467. CS4270_TRANS_SOFT | CS4270_TRANS_ZERO, 0);
  468. if (ret < 0) {
  469. dev_err(codec->dev, "i2c write failed\n");
  470. return ret;
  471. }
  472. /* Add the non-DAPM controls */
  473. ret = snd_soc_add_codec_controls(codec, cs4270_snd_controls,
  474. ARRAY_SIZE(cs4270_snd_controls));
  475. if (ret < 0) {
  476. dev_err(codec->dev, "failed to add controls\n");
  477. return ret;
  478. }
  479. /* get the power supply regulators */
  480. for (i = 0; i < ARRAY_SIZE(supply_names); i++)
  481. cs4270->supplies[i].supply = supply_names[i];
  482. ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(cs4270->supplies),
  483. cs4270->supplies);
  484. if (ret < 0)
  485. return ret;
  486. ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
  487. cs4270->supplies);
  488. if (ret < 0)
  489. goto error_free_regulators;
  490. return 0;
  491. error_free_regulators:
  492. regulator_bulk_free(ARRAY_SIZE(cs4270->supplies),
  493. cs4270->supplies);
  494. return ret;
  495. }
  496. /**
  497. * cs4270_remove - ASoC remove function
  498. * @pdev: platform device
  499. *
  500. * This function is the counterpart to cs4270_probe().
  501. */
  502. static int cs4270_remove(struct snd_soc_codec *codec)
  503. {
  504. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  505. regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
  506. regulator_bulk_free(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
  507. return 0;
  508. };
  509. #ifdef CONFIG_PM
  510. /* This suspend/resume implementation can handle both - a simple standby
  511. * where the codec remains powered, and a full suspend, where the voltage
  512. * domain the codec is connected to is teared down and/or any other hardware
  513. * reset condition is asserted.
  514. *
  515. * The codec's own power saving features are enabled in the suspend callback,
  516. * and all registers are written back to the hardware when resuming.
  517. */
  518. static int cs4270_soc_suspend(struct snd_soc_codec *codec)
  519. {
  520. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  521. int reg, ret;
  522. reg = snd_soc_read(codec, CS4270_PWRCTL) | CS4270_PWRCTL_PDN_ALL;
  523. if (reg < 0)
  524. return reg;
  525. ret = snd_soc_write(codec, CS4270_PWRCTL, reg);
  526. if (ret < 0)
  527. return ret;
  528. regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies),
  529. cs4270->supplies);
  530. return 0;
  531. }
  532. static int cs4270_soc_resume(struct snd_soc_codec *codec)
  533. {
  534. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  535. int reg, ret;
  536. ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
  537. cs4270->supplies);
  538. if (ret != 0)
  539. return ret;
  540. /* In case the device was put to hard reset during sleep, we need to
  541. * wait 500ns here before any I2C communication. */
  542. ndelay(500);
  543. /* first restore the entire register cache ... */
  544. snd_soc_cache_sync(codec);
  545. /* ... then disable the power-down bits */
  546. reg = snd_soc_read(codec, CS4270_PWRCTL);
  547. reg &= ~CS4270_PWRCTL_PDN_ALL;
  548. return snd_soc_write(codec, CS4270_PWRCTL, reg);
  549. }
  550. #else
  551. #define cs4270_soc_suspend NULL
  552. #define cs4270_soc_resume NULL
  553. #endif /* CONFIG_PM */
  554. /*
  555. * ASoC codec driver structure
  556. */
  557. static const struct snd_soc_codec_driver soc_codec_device_cs4270 = {
  558. .probe = cs4270_probe,
  559. .remove = cs4270_remove,
  560. .suspend = cs4270_soc_suspend,
  561. .resume = cs4270_soc_resume,
  562. .volatile_register = cs4270_reg_is_volatile,
  563. .readable_register = cs4270_reg_is_readable,
  564. .reg_cache_size = CS4270_LASTREG + 1,
  565. .reg_word_size = sizeof(u8),
  566. .reg_cache_default = cs4270_default_reg_cache,
  567. };
  568. /**
  569. * cs4270_i2c_probe - initialize the I2C interface of the CS4270
  570. * @i2c_client: the I2C client object
  571. * @id: the I2C device ID (ignored)
  572. *
  573. * This function is called whenever the I2C subsystem finds a device that
  574. * matches the device ID given via a prior call to i2c_add_driver().
  575. */
  576. static int cs4270_i2c_probe(struct i2c_client *i2c_client,
  577. const struct i2c_device_id *id)
  578. {
  579. struct cs4270_private *cs4270;
  580. int ret;
  581. /* Verify that we have a CS4270 */
  582. ret = i2c_smbus_read_byte_data(i2c_client, CS4270_CHIPID);
  583. if (ret < 0) {
  584. dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n",
  585. i2c_client->addr);
  586. return ret;
  587. }
  588. /* The top four bits of the chip ID should be 1100. */
  589. if ((ret & 0xF0) != 0xC0) {
  590. dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n",
  591. i2c_client->addr);
  592. return -ENODEV;
  593. }
  594. dev_info(&i2c_client->dev, "found device at i2c address %X\n",
  595. i2c_client->addr);
  596. dev_info(&i2c_client->dev, "hardware revision %X\n", ret & 0xF);
  597. cs4270 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs4270_private),
  598. GFP_KERNEL);
  599. if (!cs4270) {
  600. dev_err(&i2c_client->dev, "could not allocate codec\n");
  601. return -ENOMEM;
  602. }
  603. i2c_set_clientdata(i2c_client, cs4270);
  604. cs4270->control_type = SND_SOC_I2C;
  605. ret = snd_soc_register_codec(&i2c_client->dev,
  606. &soc_codec_device_cs4270, &cs4270_dai, 1);
  607. return ret;
  608. }
  609. /**
  610. * cs4270_i2c_remove - remove an I2C device
  611. * @i2c_client: the I2C client object
  612. *
  613. * This function is the counterpart to cs4270_i2c_probe().
  614. */
  615. static int cs4270_i2c_remove(struct i2c_client *i2c_client)
  616. {
  617. snd_soc_unregister_codec(&i2c_client->dev);
  618. return 0;
  619. }
  620. /*
  621. * cs4270_id - I2C device IDs supported by this driver
  622. */
  623. static const struct i2c_device_id cs4270_id[] = {
  624. {"cs4270", 0},
  625. {}
  626. };
  627. MODULE_DEVICE_TABLE(i2c, cs4270_id);
  628. /*
  629. * cs4270_i2c_driver - I2C device identification
  630. *
  631. * This structure tells the I2C subsystem how to identify and support a
  632. * given I2C device type.
  633. */
  634. static struct i2c_driver cs4270_i2c_driver = {
  635. .driver = {
  636. .name = "cs4270",
  637. .owner = THIS_MODULE,
  638. },
  639. .id_table = cs4270_id,
  640. .probe = cs4270_i2c_probe,
  641. .remove = cs4270_i2c_remove,
  642. };
  643. static int __init cs4270_init(void)
  644. {
  645. return i2c_add_driver(&cs4270_i2c_driver);
  646. }
  647. module_init(cs4270_init);
  648. static void __exit cs4270_exit(void)
  649. {
  650. i2c_del_driver(&cs4270_i2c_driver);
  651. }
  652. module_exit(cs4270_exit);
  653. MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
  654. MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver");
  655. MODULE_LICENSE("GPL");