ohci-omap.c 13 KB

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  1. /*
  2. * OHCI HCD (Host Controller Driver) for USB.
  3. *
  4. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  5. * (C) Copyright 2000-2005 David Brownell
  6. * (C) Copyright 2002 Hewlett-Packard Company
  7. *
  8. * OMAP Bus Glue
  9. *
  10. * Modified for OMAP by Tony Lindgren <tony@atomide.com>
  11. * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc.
  12. * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com>
  13. *
  14. * This file is licenced under the GPL.
  15. */
  16. #include <linux/signal.h>
  17. #include <linux/jiffies.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/clk.h>
  20. #include <linux/err.h>
  21. #include <linux/gpio.h>
  22. #include <asm/io.h>
  23. #include <asm/mach-types.h>
  24. #include <plat/mux.h>
  25. #include <plat/fpga.h>
  26. #include <mach/hardware.h>
  27. #include <mach/irqs.h>
  28. #include <mach/usb.h>
  29. /* OMAP-1510 OHCI has its own MMU for DMA */
  30. #define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */
  31. #define OMAP1510_LB_CLOCK_DIV 0xfffec10c
  32. #define OMAP1510_LB_MMU_CTL 0xfffec208
  33. #define OMAP1510_LB_MMU_LCK 0xfffec224
  34. #define OMAP1510_LB_MMU_LD_TLB 0xfffec228
  35. #define OMAP1510_LB_MMU_CAM_H 0xfffec22c
  36. #define OMAP1510_LB_MMU_CAM_L 0xfffec230
  37. #define OMAP1510_LB_MMU_RAM_H 0xfffec234
  38. #define OMAP1510_LB_MMU_RAM_L 0xfffec238
  39. #ifndef CONFIG_ARCH_OMAP
  40. #error "This file is OMAP bus glue. CONFIG_OMAP must be defined."
  41. #endif
  42. #ifdef CONFIG_TPS65010
  43. #include <linux/i2c/tps65010.h>
  44. #else
  45. #define LOW 0
  46. #define HIGH 1
  47. #define GPIO1 1
  48. static inline int tps65010_set_gpio_out_value(unsigned gpio, unsigned value)
  49. {
  50. return 0;
  51. }
  52. #endif
  53. extern int usb_disabled(void);
  54. extern int ocpi_enable(void);
  55. static struct clk *usb_host_ck;
  56. static struct clk *usb_dc_ck;
  57. static int host_enabled;
  58. static int host_initialized;
  59. static void omap_ohci_clock_power(int on)
  60. {
  61. if (on) {
  62. clk_enable(usb_dc_ck);
  63. clk_enable(usb_host_ck);
  64. /* guesstimate for T5 == 1x 32K clock + APLL lock time */
  65. udelay(100);
  66. } else {
  67. clk_disable(usb_host_ck);
  68. clk_disable(usb_dc_ck);
  69. }
  70. }
  71. /*
  72. * Board specific gang-switched transceiver power on/off.
  73. * NOTE: OSK supplies power from DC, not battery.
  74. */
  75. static int omap_ohci_transceiver_power(int on)
  76. {
  77. if (on) {
  78. if (machine_is_omap_innovator() && cpu_is_omap1510())
  79. fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
  80. | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
  81. INNOVATOR_FPGA_CAM_USB_CONTROL);
  82. else if (machine_is_omap_osk())
  83. tps65010_set_gpio_out_value(GPIO1, LOW);
  84. } else {
  85. if (machine_is_omap_innovator() && cpu_is_omap1510())
  86. fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
  87. & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
  88. INNOVATOR_FPGA_CAM_USB_CONTROL);
  89. else if (machine_is_omap_osk())
  90. tps65010_set_gpio_out_value(GPIO1, HIGH);
  91. }
  92. return 0;
  93. }
  94. #ifdef CONFIG_ARCH_OMAP15XX
  95. /*
  96. * OMAP-1510 specific Local Bus clock on/off
  97. */
  98. static int omap_1510_local_bus_power(int on)
  99. {
  100. if (on) {
  101. omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL);
  102. udelay(200);
  103. } else {
  104. omap_writel(0, OMAP1510_LB_MMU_CTL);
  105. }
  106. return 0;
  107. }
  108. /*
  109. * OMAP-1510 specific Local Bus initialization
  110. * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE.
  111. * See also arch/mach-omap/memory.h for __virt_to_dma() and
  112. * __dma_to_virt() which need to match with the physical
  113. * Local Bus address below.
  114. */
  115. static int omap_1510_local_bus_init(void)
  116. {
  117. unsigned int tlb;
  118. unsigned long lbaddr, physaddr;
  119. omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4,
  120. OMAP1510_LB_CLOCK_DIV);
  121. /* Configure the Local Bus MMU table */
  122. for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) {
  123. lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET;
  124. physaddr = tlb * 0x00100000 + PHYS_OFFSET;
  125. omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H);
  126. omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc,
  127. OMAP1510_LB_MMU_CAM_L);
  128. omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H);
  129. omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L);
  130. omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK);
  131. omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB);
  132. }
  133. /* Enable the walking table */
  134. omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL);
  135. udelay(200);
  136. return 0;
  137. }
  138. #else
  139. #define omap_1510_local_bus_power(x) {}
  140. #define omap_1510_local_bus_init() {}
  141. #endif
  142. #ifdef CONFIG_USB_OTG
  143. static void start_hnp(struct ohci_hcd *ohci)
  144. {
  145. struct usb_hcd *hcd = ohci_to_hcd(ohci);
  146. const unsigned port = hcd->self.otg_port - 1;
  147. unsigned long flags;
  148. u32 l;
  149. otg_start_hnp(hcd->phy->otg);
  150. local_irq_save(flags);
  151. hcd->phy->state = OTG_STATE_A_SUSPEND;
  152. writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]);
  153. l = omap_readl(OTG_CTRL);
  154. l &= ~OTG_A_BUSREQ;
  155. omap_writel(l, OTG_CTRL);
  156. local_irq_restore(flags);
  157. }
  158. #endif
  159. /*-------------------------------------------------------------------------*/
  160. static int ohci_omap_init(struct usb_hcd *hcd)
  161. {
  162. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  163. struct omap_usb_config *config = hcd->self.controller->platform_data;
  164. int need_transceiver = (config->otg != 0);
  165. int ret;
  166. dev_dbg(hcd->self.controller, "starting USB Controller\n");
  167. if (config->otg) {
  168. ohci_to_hcd(ohci)->self.otg_port = config->otg;
  169. /* default/minimum OTG power budget: 8 mA */
  170. ohci_to_hcd(ohci)->power_budget = 8;
  171. }
  172. /* boards can use OTG transceivers in non-OTG modes */
  173. need_transceiver = need_transceiver
  174. || machine_is_omap_h2() || machine_is_omap_h3();
  175. /* XXX OMAP16xx only */
  176. if (config->ocpi_enable)
  177. config->ocpi_enable();
  178. #ifdef CONFIG_USB_OTG
  179. if (need_transceiver) {
  180. hcd->phy = usb_get_phy(USB_PHY_TYPE_USB2);
  181. if (!IS_ERR_OR_NULL(hcd->phy)) {
  182. int status = otg_set_host(hcd->phy->otg,
  183. &ohci_to_hcd(ohci)->self);
  184. dev_dbg(hcd->self.controller, "init %s phy, status %d\n",
  185. hcd->phy->label, status);
  186. if (status) {
  187. usb_put_phy(hcd->phy);
  188. return status;
  189. }
  190. } else {
  191. dev_err(hcd->self.controller, "can't find phy\n");
  192. return -ENODEV;
  193. }
  194. ohci->start_hnp = start_hnp;
  195. }
  196. #endif
  197. omap_ohci_clock_power(1);
  198. if (cpu_is_omap15xx()) {
  199. omap_1510_local_bus_power(1);
  200. omap_1510_local_bus_init();
  201. }
  202. if ((ret = ohci_init(ohci)) < 0)
  203. return ret;
  204. /* board-specific power switching and overcurrent support */
  205. if (machine_is_omap_osk() || machine_is_omap_innovator()) {
  206. u32 rh = roothub_a (ohci);
  207. /* power switching (ganged by default) */
  208. rh &= ~RH_A_NPS;
  209. /* TPS2045 switch for internal transceiver (port 1) */
  210. if (machine_is_omap_osk()) {
  211. ohci_to_hcd(ohci)->power_budget = 250;
  212. rh &= ~RH_A_NOCP;
  213. /* gpio9 for overcurrent detction */
  214. omap_cfg_reg(W8_1610_GPIO9);
  215. gpio_request(9, "OHCI overcurrent");
  216. gpio_direction_input(9);
  217. /* for paranoia's sake: disable USB.PUEN */
  218. omap_cfg_reg(W4_USB_HIGHZ);
  219. }
  220. ohci_writel(ohci, rh, &ohci->regs->roothub.a);
  221. ohci->flags &= ~OHCI_QUIRK_HUB_POWER;
  222. } else if (machine_is_nokia770()) {
  223. /* We require a self-powered hub, which should have
  224. * plenty of power. */
  225. ohci_to_hcd(ohci)->power_budget = 0;
  226. }
  227. /* FIXME khubd hub requests should manage power switching */
  228. omap_ohci_transceiver_power(1);
  229. /* board init will have already handled HMC and mux setup.
  230. * any external transceiver should already be initialized
  231. * too, so all configured ports use the right signaling now.
  232. */
  233. return 0;
  234. }
  235. static void ohci_omap_stop(struct usb_hcd *hcd)
  236. {
  237. dev_dbg(hcd->self.controller, "stopping USB Controller\n");
  238. ohci_stop(hcd);
  239. omap_ohci_clock_power(0);
  240. }
  241. /*-------------------------------------------------------------------------*/
  242. /**
  243. * usb_hcd_omap_probe - initialize OMAP-based HCDs
  244. * Context: !in_interrupt()
  245. *
  246. * Allocates basic resources for this USB host controller, and
  247. * then invokes the start() method for the HCD associated with it
  248. * through the hotplug entry's driver_data.
  249. */
  250. static int usb_hcd_omap_probe (const struct hc_driver *driver,
  251. struct platform_device *pdev)
  252. {
  253. int retval, irq;
  254. struct usb_hcd *hcd = 0;
  255. struct ohci_hcd *ohci;
  256. if (pdev->num_resources != 2) {
  257. printk(KERN_ERR "hcd probe: invalid num_resources: %i\n",
  258. pdev->num_resources);
  259. return -ENODEV;
  260. }
  261. if (pdev->resource[0].flags != IORESOURCE_MEM
  262. || pdev->resource[1].flags != IORESOURCE_IRQ) {
  263. printk(KERN_ERR "hcd probe: invalid resource type\n");
  264. return -ENODEV;
  265. }
  266. usb_host_ck = clk_get(&pdev->dev, "usb_hhc_ck");
  267. if (IS_ERR(usb_host_ck))
  268. return PTR_ERR(usb_host_ck);
  269. if (!cpu_is_omap15xx())
  270. usb_dc_ck = clk_get(&pdev->dev, "usb_dc_ck");
  271. else
  272. usb_dc_ck = clk_get(&pdev->dev, "lb_ck");
  273. if (IS_ERR(usb_dc_ck)) {
  274. clk_put(usb_host_ck);
  275. return PTR_ERR(usb_dc_ck);
  276. }
  277. hcd = usb_create_hcd (driver, &pdev->dev, dev_name(&pdev->dev));
  278. if (!hcd) {
  279. retval = -ENOMEM;
  280. goto err0;
  281. }
  282. hcd->rsrc_start = pdev->resource[0].start;
  283. hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1;
  284. if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
  285. dev_dbg(&pdev->dev, "request_mem_region failed\n");
  286. retval = -EBUSY;
  287. goto err1;
  288. }
  289. hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
  290. if (!hcd->regs) {
  291. dev_err(&pdev->dev, "can't ioremap OHCI HCD\n");
  292. retval = -ENOMEM;
  293. goto err2;
  294. }
  295. ohci = hcd_to_ohci(hcd);
  296. ohci_hcd_init(ohci);
  297. host_initialized = 0;
  298. host_enabled = 1;
  299. irq = platform_get_irq(pdev, 0);
  300. if (irq < 0) {
  301. retval = -ENXIO;
  302. goto err3;
  303. }
  304. retval = usb_add_hcd(hcd, irq, 0);
  305. if (retval)
  306. goto err3;
  307. host_initialized = 1;
  308. if (!host_enabled)
  309. omap_ohci_clock_power(0);
  310. return 0;
  311. err3:
  312. iounmap(hcd->regs);
  313. err2:
  314. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  315. err1:
  316. usb_put_hcd(hcd);
  317. err0:
  318. clk_put(usb_dc_ck);
  319. clk_put(usb_host_ck);
  320. return retval;
  321. }
  322. /* may be called with controller, bus, and devices active */
  323. /**
  324. * usb_hcd_omap_remove - shutdown processing for OMAP-based HCDs
  325. * @dev: USB Host Controller being removed
  326. * Context: !in_interrupt()
  327. *
  328. * Reverses the effect of usb_hcd_omap_probe(), first invoking
  329. * the HCD's stop() method. It is always called from a thread
  330. * context, normally "rmmod", "apmd", or something similar.
  331. */
  332. static inline void
  333. usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev)
  334. {
  335. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  336. usb_remove_hcd(hcd);
  337. if (!IS_ERR_OR_NULL(hcd->phy)) {
  338. (void) otg_set_host(hcd->phy->otg, 0);
  339. usb_put_phy(hcd->phy);
  340. }
  341. if (machine_is_omap_osk())
  342. gpio_free(9);
  343. iounmap(hcd->regs);
  344. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  345. usb_put_hcd(hcd);
  346. clk_put(usb_dc_ck);
  347. clk_put(usb_host_ck);
  348. }
  349. /*-------------------------------------------------------------------------*/
  350. static int
  351. ohci_omap_start (struct usb_hcd *hcd)
  352. {
  353. struct omap_usb_config *config;
  354. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  355. int ret;
  356. if (!host_enabled)
  357. return 0;
  358. config = hcd->self.controller->platform_data;
  359. if (config->otg || config->rwc) {
  360. ohci->hc_control = OHCI_CTRL_RWC;
  361. writel(OHCI_CTRL_RWC, &ohci->regs->control);
  362. }
  363. if ((ret = ohci_run (ohci)) < 0) {
  364. dev_err(hcd->self.controller, "can't start\n");
  365. ohci_stop (hcd);
  366. return ret;
  367. }
  368. return 0;
  369. }
  370. /*-------------------------------------------------------------------------*/
  371. static const struct hc_driver ohci_omap_hc_driver = {
  372. .description = hcd_name,
  373. .product_desc = "OMAP OHCI",
  374. .hcd_priv_size = sizeof(struct ohci_hcd),
  375. /*
  376. * generic hardware linkage
  377. */
  378. .irq = ohci_irq,
  379. .flags = HCD_USB11 | HCD_MEMORY,
  380. /*
  381. * basic lifecycle operations
  382. */
  383. .reset = ohci_omap_init,
  384. .start = ohci_omap_start,
  385. .stop = ohci_omap_stop,
  386. .shutdown = ohci_shutdown,
  387. /*
  388. * managing i/o requests and associated device resources
  389. */
  390. .urb_enqueue = ohci_urb_enqueue,
  391. .urb_dequeue = ohci_urb_dequeue,
  392. .endpoint_disable = ohci_endpoint_disable,
  393. /*
  394. * scheduling support
  395. */
  396. .get_frame_number = ohci_get_frame,
  397. /*
  398. * root hub support
  399. */
  400. .hub_status_data = ohci_hub_status_data,
  401. .hub_control = ohci_hub_control,
  402. #ifdef CONFIG_PM
  403. .bus_suspend = ohci_bus_suspend,
  404. .bus_resume = ohci_bus_resume,
  405. #endif
  406. .start_port_reset = ohci_start_port_reset,
  407. };
  408. /*-------------------------------------------------------------------------*/
  409. static int ohci_hcd_omap_drv_probe(struct platform_device *dev)
  410. {
  411. return usb_hcd_omap_probe(&ohci_omap_hc_driver, dev);
  412. }
  413. static int ohci_hcd_omap_drv_remove(struct platform_device *dev)
  414. {
  415. struct usb_hcd *hcd = platform_get_drvdata(dev);
  416. usb_hcd_omap_remove(hcd, dev);
  417. platform_set_drvdata(dev, NULL);
  418. return 0;
  419. }
  420. /*-------------------------------------------------------------------------*/
  421. #ifdef CONFIG_PM
  422. static int ohci_omap_suspend(struct platform_device *dev, pm_message_t message)
  423. {
  424. struct ohci_hcd *ohci = hcd_to_ohci(platform_get_drvdata(dev));
  425. if (time_before(jiffies, ohci->next_statechange))
  426. msleep(5);
  427. ohci->next_statechange = jiffies;
  428. omap_ohci_clock_power(0);
  429. return 0;
  430. }
  431. static int ohci_omap_resume(struct platform_device *dev)
  432. {
  433. struct usb_hcd *hcd = platform_get_drvdata(dev);
  434. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  435. if (time_before(jiffies, ohci->next_statechange))
  436. msleep(5);
  437. ohci->next_statechange = jiffies;
  438. omap_ohci_clock_power(1);
  439. ohci_finish_controller_resume(hcd);
  440. return 0;
  441. }
  442. #endif
  443. /*-------------------------------------------------------------------------*/
  444. /*
  445. * Driver definition to register with the OMAP bus
  446. */
  447. static struct platform_driver ohci_hcd_omap_driver = {
  448. .probe = ohci_hcd_omap_drv_probe,
  449. .remove = ohci_hcd_omap_drv_remove,
  450. .shutdown = usb_hcd_platform_shutdown,
  451. #ifdef CONFIG_PM
  452. .suspend = ohci_omap_suspend,
  453. .resume = ohci_omap_resume,
  454. #endif
  455. .driver = {
  456. .owner = THIS_MODULE,
  457. .name = "ohci",
  458. },
  459. };
  460. MODULE_ALIAS("platform:ohci");