ehci-dbg.c 29 KB

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  1. /*
  2. * Copyright (c) 2001-2002 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. #define ehci_dbg(ehci, fmt, args...) \
  20. dev_dbg (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
  21. #define ehci_err(ehci, fmt, args...) \
  22. dev_err (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
  23. #define ehci_info(ehci, fmt, args...) \
  24. dev_info (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
  25. #define ehci_warn(ehci, fmt, args...) \
  26. dev_warn (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
  27. #ifdef VERBOSE_DEBUG
  28. # define ehci_vdbg ehci_dbg
  29. #else
  30. static inline void ehci_vdbg(struct ehci_hcd *ehci, ...) {}
  31. #endif
  32. #ifdef DEBUG
  33. /* check the values in the HCSPARAMS register
  34. * (host controller _Structural_ parameters)
  35. * see EHCI spec, Table 2-4 for each value
  36. */
  37. static void dbg_hcs_params (struct ehci_hcd *ehci, char *label)
  38. {
  39. u32 params = ehci_readl(ehci, &ehci->caps->hcs_params);
  40. ehci_dbg (ehci,
  41. "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
  42. label, params,
  43. HCS_DEBUG_PORT (params),
  44. HCS_INDICATOR (params) ? " ind" : "",
  45. HCS_N_CC (params),
  46. HCS_N_PCC (params),
  47. HCS_PORTROUTED (params) ? "" : " ordered",
  48. HCS_PPC (params) ? "" : " !ppc",
  49. HCS_N_PORTS (params)
  50. );
  51. /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
  52. if (HCS_PORTROUTED (params)) {
  53. int i;
  54. char buf [46], tmp [7], byte;
  55. buf[0] = 0;
  56. for (i = 0; i < HCS_N_PORTS (params); i++) {
  57. // FIXME MIPS won't readb() ...
  58. byte = readb (&ehci->caps->portroute[(i>>1)]);
  59. sprintf(tmp, "%d ",
  60. ((i & 0x1) ? ((byte)&0xf) : ((byte>>4)&0xf)));
  61. strcat(buf, tmp);
  62. }
  63. ehci_dbg (ehci, "%s portroute %s\n",
  64. label, buf);
  65. }
  66. }
  67. #else
  68. static inline void dbg_hcs_params (struct ehci_hcd *ehci, char *label) {}
  69. #endif
  70. #ifdef DEBUG
  71. /* check the values in the HCCPARAMS register
  72. * (host controller _Capability_ parameters)
  73. * see EHCI Spec, Table 2-5 for each value
  74. * */
  75. static void dbg_hcc_params (struct ehci_hcd *ehci, char *label)
  76. {
  77. u32 params = ehci_readl(ehci, &ehci->caps->hcc_params);
  78. if (HCC_ISOC_CACHE (params)) {
  79. ehci_dbg (ehci,
  80. "%s hcc_params %04x caching frame %s%s%s\n",
  81. label, params,
  82. HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
  83. HCC_CANPARK(params) ? " park" : "",
  84. HCC_64BIT_ADDR(params) ? " 64 bit addr" : "");
  85. } else {
  86. ehci_dbg (ehci,
  87. "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n",
  88. label,
  89. params,
  90. HCC_ISOC_THRES(params),
  91. HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
  92. HCC_CANPARK(params) ? " park" : "",
  93. HCC_64BIT_ADDR(params) ? " 64 bit addr" : "",
  94. HCC_LPM(params) ? " LPM" : "",
  95. HCC_PER_PORT_CHANGE_EVENT(params) ? " ppce" : "",
  96. HCC_HW_PREFETCH(params) ? " hw prefetch" : "",
  97. HCC_32FRAME_PERIODIC_LIST(params) ?
  98. " 32 periodic list" : "");
  99. }
  100. }
  101. #else
  102. static inline void dbg_hcc_params (struct ehci_hcd *ehci, char *label) {}
  103. #endif
  104. #ifdef DEBUG
  105. static void __maybe_unused
  106. dbg_qtd (const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
  107. {
  108. ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
  109. hc32_to_cpup(ehci, &qtd->hw_next),
  110. hc32_to_cpup(ehci, &qtd->hw_alt_next),
  111. hc32_to_cpup(ehci, &qtd->hw_token),
  112. hc32_to_cpup(ehci, &qtd->hw_buf [0]));
  113. if (qtd->hw_buf [1])
  114. ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
  115. hc32_to_cpup(ehci, &qtd->hw_buf[1]),
  116. hc32_to_cpup(ehci, &qtd->hw_buf[2]),
  117. hc32_to_cpup(ehci, &qtd->hw_buf[3]),
  118. hc32_to_cpup(ehci, &qtd->hw_buf[4]));
  119. }
  120. static void __maybe_unused
  121. dbg_qh (const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
  122. {
  123. struct ehci_qh_hw *hw = qh->hw;
  124. ehci_dbg (ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
  125. qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current);
  126. dbg_qtd("overlay", ehci, (struct ehci_qtd *) &hw->hw_qtd_next);
  127. }
  128. static void __maybe_unused
  129. dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
  130. {
  131. ehci_dbg (ehci, "%s [%d] itd %p, next %08x, urb %p\n",
  132. label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next),
  133. itd->urb);
  134. ehci_dbg (ehci,
  135. " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
  136. hc32_to_cpu(ehci, itd->hw_transaction[0]),
  137. hc32_to_cpu(ehci, itd->hw_transaction[1]),
  138. hc32_to_cpu(ehci, itd->hw_transaction[2]),
  139. hc32_to_cpu(ehci, itd->hw_transaction[3]),
  140. hc32_to_cpu(ehci, itd->hw_transaction[4]),
  141. hc32_to_cpu(ehci, itd->hw_transaction[5]),
  142. hc32_to_cpu(ehci, itd->hw_transaction[6]),
  143. hc32_to_cpu(ehci, itd->hw_transaction[7]));
  144. ehci_dbg (ehci,
  145. " buf: %08x %08x %08x %08x %08x %08x %08x\n",
  146. hc32_to_cpu(ehci, itd->hw_bufp[0]),
  147. hc32_to_cpu(ehci, itd->hw_bufp[1]),
  148. hc32_to_cpu(ehci, itd->hw_bufp[2]),
  149. hc32_to_cpu(ehci, itd->hw_bufp[3]),
  150. hc32_to_cpu(ehci, itd->hw_bufp[4]),
  151. hc32_to_cpu(ehci, itd->hw_bufp[5]),
  152. hc32_to_cpu(ehci, itd->hw_bufp[6]));
  153. ehci_dbg (ehci, " index: %d %d %d %d %d %d %d %d\n",
  154. itd->index[0], itd->index[1], itd->index[2],
  155. itd->index[3], itd->index[4], itd->index[5],
  156. itd->index[6], itd->index[7]);
  157. }
  158. static void __maybe_unused
  159. dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
  160. {
  161. ehci_dbg (ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
  162. label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next),
  163. sitd->urb);
  164. ehci_dbg (ehci,
  165. " addr %08x sched %04x result %08x buf %08x %08x\n",
  166. hc32_to_cpu(ehci, sitd->hw_fullspeed_ep),
  167. hc32_to_cpu(ehci, sitd->hw_uframe),
  168. hc32_to_cpu(ehci, sitd->hw_results),
  169. hc32_to_cpu(ehci, sitd->hw_buf[0]),
  170. hc32_to_cpu(ehci, sitd->hw_buf[1]));
  171. }
  172. static int __maybe_unused
  173. dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
  174. {
  175. return scnprintf (buf, len,
  176. "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s",
  177. label, label [0] ? " " : "", status,
  178. (status & STS_PPCE_MASK) ? " PPCE" : "",
  179. (status & STS_ASS) ? " Async" : "",
  180. (status & STS_PSS) ? " Periodic" : "",
  181. (status & STS_RECL) ? " Recl" : "",
  182. (status & STS_HALT) ? " Halt" : "",
  183. (status & STS_IAA) ? " IAA" : "",
  184. (status & STS_FATAL) ? " FATAL" : "",
  185. (status & STS_FLR) ? " FLR" : "",
  186. (status & STS_PCD) ? " PCD" : "",
  187. (status & STS_ERR) ? " ERR" : "",
  188. (status & STS_INT) ? " INT" : ""
  189. );
  190. }
  191. static int __maybe_unused
  192. dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
  193. {
  194. return scnprintf (buf, len,
  195. "%s%sintrenable %02x%s%s%s%s%s%s%s",
  196. label, label [0] ? " " : "", enable,
  197. (enable & STS_PPCE_MASK) ? " PPCE" : "",
  198. (enable & STS_IAA) ? " IAA" : "",
  199. (enable & STS_FATAL) ? " FATAL" : "",
  200. (enable & STS_FLR) ? " FLR" : "",
  201. (enable & STS_PCD) ? " PCD" : "",
  202. (enable & STS_ERR) ? " ERR" : "",
  203. (enable & STS_INT) ? " INT" : ""
  204. );
  205. }
  206. static const char *const fls_strings [] =
  207. { "1024", "512", "256", "??" };
  208. static int
  209. dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
  210. {
  211. return scnprintf (buf, len,
  212. "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s "
  213. "period=%s%s %s",
  214. label, label [0] ? " " : "", command,
  215. (command & CMD_HIRD) ? " HIRD" : "",
  216. (command & CMD_PPCEE) ? " PPCEE" : "",
  217. (command & CMD_FSP) ? " FSP" : "",
  218. (command & CMD_ASPE) ? " ASPE" : "",
  219. (command & CMD_PSPE) ? " PSPE" : "",
  220. (command & CMD_PARK) ? " park" : "(park)",
  221. CMD_PARK_CNT (command),
  222. (command >> 16) & 0x3f,
  223. (command & CMD_LRESET) ? " LReset" : "",
  224. (command & CMD_IAAD) ? " IAAD" : "",
  225. (command & CMD_ASE) ? " Async" : "",
  226. (command & CMD_PSE) ? " Periodic" : "",
  227. fls_strings [(command >> 2) & 0x3],
  228. (command & CMD_RESET) ? " Reset" : "",
  229. (command & CMD_RUN) ? "RUN" : "HALT"
  230. );
  231. }
  232. static int
  233. dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
  234. {
  235. char *sig;
  236. /* signaling state */
  237. switch (status & (3 << 10)) {
  238. case 0 << 10: sig = "se0"; break;
  239. case 1 << 10: sig = "k"; break; /* low speed */
  240. case 2 << 10: sig = "j"; break;
  241. default: sig = "?"; break;
  242. }
  243. return scnprintf (buf, len,
  244. "%s%sport:%d status %06x %d %s%s%s%s%s%s "
  245. "sig=%s%s%s%s%s%s%s%s%s%s%s",
  246. label, label [0] ? " " : "", port, status,
  247. status>>25,/*device address */
  248. (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_ACK ?
  249. " ACK" : "",
  250. (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_NYET ?
  251. " NYET" : "",
  252. (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_STALL ?
  253. " STALL" : "",
  254. (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_ERR ?
  255. " ERR" : "",
  256. (status & PORT_POWER) ? " POWER" : "",
  257. (status & PORT_OWNER) ? " OWNER" : "",
  258. sig,
  259. (status & PORT_LPM) ? " LPM" : "",
  260. (status & PORT_RESET) ? " RESET" : "",
  261. (status & PORT_SUSPEND) ? " SUSPEND" : "",
  262. (status & PORT_RESUME) ? " RESUME" : "",
  263. (status & PORT_OCC) ? " OCC" : "",
  264. (status & PORT_OC) ? " OC" : "",
  265. (status & PORT_PEC) ? " PEC" : "",
  266. (status & PORT_PE) ? " PE" : "",
  267. (status & PORT_CSC) ? " CSC" : "",
  268. (status & PORT_CONNECT) ? " CONNECT" : "");
  269. }
  270. #else
  271. static inline void __maybe_unused
  272. dbg_qh (char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
  273. {}
  274. static inline int __maybe_unused
  275. dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
  276. { return 0; }
  277. static inline int __maybe_unused
  278. dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
  279. { return 0; }
  280. static inline int __maybe_unused
  281. dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
  282. { return 0; }
  283. static inline int __maybe_unused
  284. dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
  285. { return 0; }
  286. #endif /* DEBUG */
  287. /* functions have the "wrong" filename when they're output... */
  288. #define dbg_status(ehci, label, status) { \
  289. char _buf [80]; \
  290. dbg_status_buf (_buf, sizeof _buf, label, status); \
  291. ehci_dbg (ehci, "%s\n", _buf); \
  292. }
  293. #define dbg_cmd(ehci, label, command) { \
  294. char _buf [80]; \
  295. dbg_command_buf (_buf, sizeof _buf, label, command); \
  296. ehci_dbg (ehci, "%s\n", _buf); \
  297. }
  298. #define dbg_port(ehci, label, port, status) { \
  299. char _buf [80]; \
  300. dbg_port_buf (_buf, sizeof _buf, label, port, status); \
  301. ehci_dbg (ehci, "%s\n", _buf); \
  302. }
  303. /*-------------------------------------------------------------------------*/
  304. #ifdef STUB_DEBUG_FILES
  305. static inline void create_debug_files (struct ehci_hcd *bus) { }
  306. static inline void remove_debug_files (struct ehci_hcd *bus) { }
  307. #else
  308. /* troubleshooting help: expose state in debugfs */
  309. static int debug_async_open(struct inode *, struct file *);
  310. static int debug_periodic_open(struct inode *, struct file *);
  311. static int debug_registers_open(struct inode *, struct file *);
  312. static int debug_async_open(struct inode *, struct file *);
  313. static ssize_t debug_lpm_read(struct file *file, char __user *user_buf,
  314. size_t count, loff_t *ppos);
  315. static ssize_t debug_lpm_write(struct file *file, const char __user *buffer,
  316. size_t count, loff_t *ppos);
  317. static int debug_lpm_close(struct inode *inode, struct file *file);
  318. static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
  319. static int debug_close(struct inode *, struct file *);
  320. static const struct file_operations debug_async_fops = {
  321. .owner = THIS_MODULE,
  322. .open = debug_async_open,
  323. .read = debug_output,
  324. .release = debug_close,
  325. .llseek = default_llseek,
  326. };
  327. static const struct file_operations debug_periodic_fops = {
  328. .owner = THIS_MODULE,
  329. .open = debug_periodic_open,
  330. .read = debug_output,
  331. .release = debug_close,
  332. .llseek = default_llseek,
  333. };
  334. static const struct file_operations debug_registers_fops = {
  335. .owner = THIS_MODULE,
  336. .open = debug_registers_open,
  337. .read = debug_output,
  338. .release = debug_close,
  339. .llseek = default_llseek,
  340. };
  341. static const struct file_operations debug_lpm_fops = {
  342. .owner = THIS_MODULE,
  343. .open = simple_open,
  344. .read = debug_lpm_read,
  345. .write = debug_lpm_write,
  346. .release = debug_lpm_close,
  347. .llseek = noop_llseek,
  348. };
  349. static struct dentry *ehci_debug_root;
  350. struct debug_buffer {
  351. ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
  352. struct usb_bus *bus;
  353. struct mutex mutex; /* protect filling of buffer */
  354. size_t count; /* number of characters filled into buffer */
  355. char *output_buf;
  356. size_t alloc_size;
  357. };
  358. #define speed_char(info1) ({ char tmp; \
  359. switch (info1 & (3 << 12)) { \
  360. case QH_FULL_SPEED: tmp = 'f'; break; \
  361. case QH_LOW_SPEED: tmp = 'l'; break; \
  362. case QH_HIGH_SPEED: tmp = 'h'; break; \
  363. default: tmp = '?'; break; \
  364. }; tmp; })
  365. static inline char token_mark(struct ehci_hcd *ehci, __hc32 token)
  366. {
  367. __u32 v = hc32_to_cpu(ehci, token);
  368. if (v & QTD_STS_ACTIVE)
  369. return '*';
  370. if (v & QTD_STS_HALT)
  371. return '-';
  372. if (!IS_SHORT_READ (v))
  373. return ' ';
  374. /* tries to advance through hw_alt_next */
  375. return '/';
  376. }
  377. static void qh_lines (
  378. struct ehci_hcd *ehci,
  379. struct ehci_qh *qh,
  380. char **nextp,
  381. unsigned *sizep
  382. )
  383. {
  384. u32 scratch;
  385. u32 hw_curr;
  386. struct list_head *entry;
  387. struct ehci_qtd *td;
  388. unsigned temp;
  389. unsigned size = *sizep;
  390. char *next = *nextp;
  391. char mark;
  392. __le32 list_end = EHCI_LIST_END(ehci);
  393. struct ehci_qh_hw *hw = qh->hw;
  394. if (hw->hw_qtd_next == list_end) /* NEC does this */
  395. mark = '@';
  396. else
  397. mark = token_mark(ehci, hw->hw_token);
  398. if (mark == '/') { /* qh_alt_next controls qh advance? */
  399. if ((hw->hw_alt_next & QTD_MASK(ehci))
  400. == ehci->async->hw->hw_alt_next)
  401. mark = '#'; /* blocked */
  402. else if (hw->hw_alt_next == list_end)
  403. mark = '.'; /* use hw_qtd_next */
  404. /* else alt_next points to some other qtd */
  405. }
  406. scratch = hc32_to_cpup(ehci, &hw->hw_info1);
  407. hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &hw->hw_current) : 0;
  408. temp = scnprintf (next, size,
  409. "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)",
  410. qh, scratch & 0x007f,
  411. speed_char (scratch),
  412. (scratch >> 8) & 0x000f,
  413. scratch, hc32_to_cpup(ehci, &hw->hw_info2),
  414. hc32_to_cpup(ehci, &hw->hw_token), mark,
  415. (cpu_to_hc32(ehci, QTD_TOGGLE) & hw->hw_token)
  416. ? "data1" : "data0",
  417. (hc32_to_cpup(ehci, &hw->hw_alt_next) >> 1) & 0x0f);
  418. size -= temp;
  419. next += temp;
  420. /* hc may be modifying the list as we read it ... */
  421. list_for_each (entry, &qh->qtd_list) {
  422. td = list_entry (entry, struct ehci_qtd, qtd_list);
  423. scratch = hc32_to_cpup(ehci, &td->hw_token);
  424. mark = ' ';
  425. if (hw_curr == td->qtd_dma)
  426. mark = '*';
  427. else if (hw->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma))
  428. mark = '+';
  429. else if (QTD_LENGTH (scratch)) {
  430. if (td->hw_alt_next == ehci->async->hw->hw_alt_next)
  431. mark = '#';
  432. else if (td->hw_alt_next != list_end)
  433. mark = '/';
  434. }
  435. temp = snprintf (next, size,
  436. "\n\t%p%c%s len=%d %08x urb %p",
  437. td, mark, ({ char *tmp;
  438. switch ((scratch>>8)&0x03) {
  439. case 0: tmp = "out"; break;
  440. case 1: tmp = "in"; break;
  441. case 2: tmp = "setup"; break;
  442. default: tmp = "?"; break;
  443. } tmp;}),
  444. (scratch >> 16) & 0x7fff,
  445. scratch,
  446. td->urb);
  447. if (size < temp)
  448. temp = size;
  449. size -= temp;
  450. next += temp;
  451. if (temp == size)
  452. goto done;
  453. }
  454. temp = snprintf (next, size, "\n");
  455. if (size < temp)
  456. temp = size;
  457. size -= temp;
  458. next += temp;
  459. done:
  460. *sizep = size;
  461. *nextp = next;
  462. }
  463. static ssize_t fill_async_buffer(struct debug_buffer *buf)
  464. {
  465. struct usb_hcd *hcd;
  466. struct ehci_hcd *ehci;
  467. unsigned long flags;
  468. unsigned temp, size;
  469. char *next;
  470. struct ehci_qh *qh;
  471. hcd = bus_to_hcd(buf->bus);
  472. ehci = hcd_to_ehci (hcd);
  473. next = buf->output_buf;
  474. size = buf->alloc_size;
  475. *next = 0;
  476. /* dumps a snapshot of the async schedule.
  477. * usually empty except for long-term bulk reads, or head.
  478. * one QH per line, and TDs we know about
  479. */
  480. spin_lock_irqsave (&ehci->lock, flags);
  481. for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
  482. qh_lines (ehci, qh, &next, &size);
  483. if (ehci->async_unlink && size > 0) {
  484. temp = scnprintf(next, size, "\nunlink =\n");
  485. size -= temp;
  486. next += temp;
  487. for (qh = ehci->async_unlink; size > 0 && qh;
  488. qh = qh->unlink_next)
  489. qh_lines (ehci, qh, &next, &size);
  490. }
  491. spin_unlock_irqrestore (&ehci->lock, flags);
  492. return strlen(buf->output_buf);
  493. }
  494. #define DBG_SCHED_LIMIT 64
  495. static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
  496. {
  497. struct usb_hcd *hcd;
  498. struct ehci_hcd *ehci;
  499. unsigned long flags;
  500. union ehci_shadow p, *seen;
  501. unsigned temp, size, seen_count;
  502. char *next;
  503. unsigned i;
  504. __hc32 tag;
  505. if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC)))
  506. return 0;
  507. seen_count = 0;
  508. hcd = bus_to_hcd(buf->bus);
  509. ehci = hcd_to_ehci (hcd);
  510. next = buf->output_buf;
  511. size = buf->alloc_size;
  512. temp = scnprintf (next, size, "size = %d\n", ehci->periodic_size);
  513. size -= temp;
  514. next += temp;
  515. /* dump a snapshot of the periodic schedule.
  516. * iso changes, interrupt usually doesn't.
  517. */
  518. spin_lock_irqsave (&ehci->lock, flags);
  519. for (i = 0; i < ehci->periodic_size; i++) {
  520. p = ehci->pshadow [i];
  521. if (likely (!p.ptr))
  522. continue;
  523. tag = Q_NEXT_TYPE(ehci, ehci->periodic [i]);
  524. temp = scnprintf (next, size, "%4d: ", i);
  525. size -= temp;
  526. next += temp;
  527. do {
  528. struct ehci_qh_hw *hw;
  529. switch (hc32_to_cpu(ehci, tag)) {
  530. case Q_TYPE_QH:
  531. hw = p.qh->hw;
  532. temp = scnprintf (next, size, " qh%d-%04x/%p",
  533. p.qh->period,
  534. hc32_to_cpup(ehci,
  535. &hw->hw_info2)
  536. /* uframe masks */
  537. & (QH_CMASK | QH_SMASK),
  538. p.qh);
  539. size -= temp;
  540. next += temp;
  541. /* don't repeat what follows this qh */
  542. for (temp = 0; temp < seen_count; temp++) {
  543. if (seen [temp].ptr != p.ptr)
  544. continue;
  545. if (p.qh->qh_next.ptr) {
  546. temp = scnprintf (next, size,
  547. " ...");
  548. size -= temp;
  549. next += temp;
  550. }
  551. break;
  552. }
  553. /* show more info the first time around */
  554. if (temp == seen_count) {
  555. u32 scratch = hc32_to_cpup(ehci,
  556. &hw->hw_info1);
  557. struct ehci_qtd *qtd;
  558. char *type = "";
  559. /* count tds, get ep direction */
  560. temp = 0;
  561. list_for_each_entry (qtd,
  562. &p.qh->qtd_list,
  563. qtd_list) {
  564. temp++;
  565. switch (0x03 & (hc32_to_cpu(
  566. ehci,
  567. qtd->hw_token) >> 8)) {
  568. case 0: type = "out"; continue;
  569. case 1: type = "in"; continue;
  570. }
  571. }
  572. temp = scnprintf (next, size,
  573. " (%c%d ep%d%s "
  574. "[%d/%d] q%d p%d)",
  575. speed_char (scratch),
  576. scratch & 0x007f,
  577. (scratch >> 8) & 0x000f, type,
  578. p.qh->usecs, p.qh->c_usecs,
  579. temp,
  580. 0x7ff & (scratch >> 16));
  581. if (seen_count < DBG_SCHED_LIMIT)
  582. seen [seen_count++].qh = p.qh;
  583. } else
  584. temp = 0;
  585. if (p.qh) {
  586. tag = Q_NEXT_TYPE(ehci, hw->hw_next);
  587. p = p.qh->qh_next;
  588. }
  589. break;
  590. case Q_TYPE_FSTN:
  591. temp = scnprintf (next, size,
  592. " fstn-%8x/%p", p.fstn->hw_prev,
  593. p.fstn);
  594. tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next);
  595. p = p.fstn->fstn_next;
  596. break;
  597. case Q_TYPE_ITD:
  598. temp = scnprintf (next, size,
  599. " itd/%p", p.itd);
  600. tag = Q_NEXT_TYPE(ehci, p.itd->hw_next);
  601. p = p.itd->itd_next;
  602. break;
  603. case Q_TYPE_SITD:
  604. temp = scnprintf (next, size,
  605. " sitd%d-%04x/%p",
  606. p.sitd->stream->interval,
  607. hc32_to_cpup(ehci, &p.sitd->hw_uframe)
  608. & 0x0000ffff,
  609. p.sitd);
  610. tag = Q_NEXT_TYPE(ehci, p.sitd->hw_next);
  611. p = p.sitd->sitd_next;
  612. break;
  613. }
  614. size -= temp;
  615. next += temp;
  616. } while (p.ptr);
  617. temp = scnprintf (next, size, "\n");
  618. size -= temp;
  619. next += temp;
  620. }
  621. spin_unlock_irqrestore (&ehci->lock, flags);
  622. kfree (seen);
  623. return buf->alloc_size - size;
  624. }
  625. #undef DBG_SCHED_LIMIT
  626. static const char *rh_state_string(struct ehci_hcd *ehci)
  627. {
  628. switch (ehci->rh_state) {
  629. case EHCI_RH_HALTED:
  630. return "halted";
  631. case EHCI_RH_SUSPENDED:
  632. return "suspended";
  633. case EHCI_RH_RUNNING:
  634. return "running";
  635. case EHCI_RH_STOPPING:
  636. return "stopping";
  637. }
  638. return "?";
  639. }
  640. static ssize_t fill_registers_buffer(struct debug_buffer *buf)
  641. {
  642. struct usb_hcd *hcd;
  643. struct ehci_hcd *ehci;
  644. unsigned long flags;
  645. unsigned temp, size, i;
  646. char *next, scratch [80];
  647. static char fmt [] = "%*s\n";
  648. static char label [] = "";
  649. hcd = bus_to_hcd(buf->bus);
  650. ehci = hcd_to_ehci (hcd);
  651. next = buf->output_buf;
  652. size = buf->alloc_size;
  653. spin_lock_irqsave (&ehci->lock, flags);
  654. if (!HCD_HW_ACCESSIBLE(hcd)) {
  655. size = scnprintf (next, size,
  656. "bus %s, device %s\n"
  657. "%s\n"
  658. "SUSPENDED (no register access)\n",
  659. hcd->self.controller->bus->name,
  660. dev_name(hcd->self.controller),
  661. hcd->product_desc);
  662. goto done;
  663. }
  664. /* Capability Registers */
  665. i = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
  666. temp = scnprintf (next, size,
  667. "bus %s, device %s\n"
  668. "%s\n"
  669. "EHCI %x.%02x, rh state %s\n",
  670. hcd->self.controller->bus->name,
  671. dev_name(hcd->self.controller),
  672. hcd->product_desc,
  673. i >> 8, i & 0x0ff, rh_state_string(ehci));
  674. size -= temp;
  675. next += temp;
  676. #ifdef CONFIG_PCI
  677. /* EHCI 0.96 and later may have "extended capabilities" */
  678. if (hcd->self.controller->bus == &pci_bus_type) {
  679. struct pci_dev *pdev;
  680. u32 offset, cap, cap2;
  681. unsigned count = 256/4;
  682. pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
  683. offset = HCC_EXT_CAPS(ehci_readl(ehci,
  684. &ehci->caps->hcc_params));
  685. while (offset && count--) {
  686. pci_read_config_dword (pdev, offset, &cap);
  687. switch (cap & 0xff) {
  688. case 1:
  689. temp = scnprintf (next, size,
  690. "ownership %08x%s%s\n", cap,
  691. (cap & (1 << 24)) ? " linux" : "",
  692. (cap & (1 << 16)) ? " firmware" : "");
  693. size -= temp;
  694. next += temp;
  695. offset += 4;
  696. pci_read_config_dword (pdev, offset, &cap2);
  697. temp = scnprintf (next, size,
  698. "SMI sts/enable 0x%08x\n", cap2);
  699. size -= temp;
  700. next += temp;
  701. break;
  702. case 0: /* illegal reserved capability */
  703. cap = 0;
  704. /* FALLTHROUGH */
  705. default: /* unknown */
  706. break;
  707. }
  708. temp = (cap >> 8) & 0xff;
  709. }
  710. }
  711. #endif
  712. // FIXME interpret both types of params
  713. i = ehci_readl(ehci, &ehci->caps->hcs_params);
  714. temp = scnprintf (next, size, "structural params 0x%08x\n", i);
  715. size -= temp;
  716. next += temp;
  717. i = ehci_readl(ehci, &ehci->caps->hcc_params);
  718. temp = scnprintf (next, size, "capability params 0x%08x\n", i);
  719. size -= temp;
  720. next += temp;
  721. /* Operational Registers */
  722. temp = dbg_status_buf (scratch, sizeof scratch, label,
  723. ehci_readl(ehci, &ehci->regs->status));
  724. temp = scnprintf (next, size, fmt, temp, scratch);
  725. size -= temp;
  726. next += temp;
  727. temp = dbg_command_buf (scratch, sizeof scratch, label,
  728. ehci_readl(ehci, &ehci->regs->command));
  729. temp = scnprintf (next, size, fmt, temp, scratch);
  730. size -= temp;
  731. next += temp;
  732. temp = dbg_intr_buf (scratch, sizeof scratch, label,
  733. ehci_readl(ehci, &ehci->regs->intr_enable));
  734. temp = scnprintf (next, size, fmt, temp, scratch);
  735. size -= temp;
  736. next += temp;
  737. temp = scnprintf (next, size, "uframe %04x\n",
  738. ehci_read_frame_index(ehci));
  739. size -= temp;
  740. next += temp;
  741. for (i = 1; i <= HCS_N_PORTS (ehci->hcs_params); i++) {
  742. temp = dbg_port_buf (scratch, sizeof scratch, label, i,
  743. ehci_readl(ehci,
  744. &ehci->regs->port_status[i - 1]));
  745. temp = scnprintf (next, size, fmt, temp, scratch);
  746. size -= temp;
  747. next += temp;
  748. if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
  749. temp = scnprintf (next, size,
  750. " debug control %08x\n",
  751. ehci_readl(ehci,
  752. &ehci->debug->control));
  753. size -= temp;
  754. next += temp;
  755. }
  756. }
  757. if (ehci->async_unlink) {
  758. temp = scnprintf(next, size, "async unlink qh %p\n",
  759. ehci->async_unlink);
  760. size -= temp;
  761. next += temp;
  762. }
  763. #ifdef EHCI_STATS
  764. temp = scnprintf (next, size,
  765. "irq normal %ld err %ld iaa %ld (lost %ld)\n",
  766. ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
  767. ehci->stats.lost_iaa);
  768. size -= temp;
  769. next += temp;
  770. temp = scnprintf (next, size, "complete %ld unlink %ld\n",
  771. ehci->stats.complete, ehci->stats.unlink);
  772. size -= temp;
  773. next += temp;
  774. #endif
  775. done:
  776. spin_unlock_irqrestore (&ehci->lock, flags);
  777. return buf->alloc_size - size;
  778. }
  779. static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
  780. ssize_t (*fill_func)(struct debug_buffer *))
  781. {
  782. struct debug_buffer *buf;
  783. buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL);
  784. if (buf) {
  785. buf->bus = bus;
  786. buf->fill_func = fill_func;
  787. mutex_init(&buf->mutex);
  788. buf->alloc_size = PAGE_SIZE;
  789. }
  790. return buf;
  791. }
  792. static int fill_buffer(struct debug_buffer *buf)
  793. {
  794. int ret = 0;
  795. if (!buf->output_buf)
  796. buf->output_buf = vmalloc(buf->alloc_size);
  797. if (!buf->output_buf) {
  798. ret = -ENOMEM;
  799. goto out;
  800. }
  801. ret = buf->fill_func(buf);
  802. if (ret >= 0) {
  803. buf->count = ret;
  804. ret = 0;
  805. }
  806. out:
  807. return ret;
  808. }
  809. static ssize_t debug_output(struct file *file, char __user *user_buf,
  810. size_t len, loff_t *offset)
  811. {
  812. struct debug_buffer *buf = file->private_data;
  813. int ret = 0;
  814. mutex_lock(&buf->mutex);
  815. if (buf->count == 0) {
  816. ret = fill_buffer(buf);
  817. if (ret != 0) {
  818. mutex_unlock(&buf->mutex);
  819. goto out;
  820. }
  821. }
  822. mutex_unlock(&buf->mutex);
  823. ret = simple_read_from_buffer(user_buf, len, offset,
  824. buf->output_buf, buf->count);
  825. out:
  826. return ret;
  827. }
  828. static int debug_close(struct inode *inode, struct file *file)
  829. {
  830. struct debug_buffer *buf = file->private_data;
  831. if (buf) {
  832. vfree(buf->output_buf);
  833. kfree(buf);
  834. }
  835. return 0;
  836. }
  837. static int debug_async_open(struct inode *inode, struct file *file)
  838. {
  839. file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
  840. return file->private_data ? 0 : -ENOMEM;
  841. }
  842. static int debug_periodic_open(struct inode *inode, struct file *file)
  843. {
  844. struct debug_buffer *buf;
  845. buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
  846. if (!buf)
  847. return -ENOMEM;
  848. buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8)*PAGE_SIZE;
  849. file->private_data = buf;
  850. return 0;
  851. }
  852. static int debug_registers_open(struct inode *inode, struct file *file)
  853. {
  854. file->private_data = alloc_buffer(inode->i_private,
  855. fill_registers_buffer);
  856. return file->private_data ? 0 : -ENOMEM;
  857. }
  858. static int debug_lpm_close(struct inode *inode, struct file *file)
  859. {
  860. return 0;
  861. }
  862. static ssize_t debug_lpm_read(struct file *file, char __user *user_buf,
  863. size_t count, loff_t *ppos)
  864. {
  865. /* TODO: show lpm stats */
  866. return 0;
  867. }
  868. static ssize_t debug_lpm_write(struct file *file, const char __user *user_buf,
  869. size_t count, loff_t *ppos)
  870. {
  871. struct usb_hcd *hcd;
  872. struct ehci_hcd *ehci;
  873. char buf[50];
  874. size_t len;
  875. u32 temp;
  876. unsigned long port;
  877. u32 __iomem *portsc ;
  878. u32 params;
  879. hcd = bus_to_hcd(file->private_data);
  880. ehci = hcd_to_ehci(hcd);
  881. len = min(count, sizeof(buf) - 1);
  882. if (copy_from_user(buf, user_buf, len))
  883. return -EFAULT;
  884. buf[len] = '\0';
  885. if (len > 0 && buf[len - 1] == '\n')
  886. buf[len - 1] = '\0';
  887. if (strncmp(buf, "enable", 5) == 0) {
  888. if (strict_strtoul(buf + 7, 10, &port))
  889. return -EINVAL;
  890. params = ehci_readl(ehci, &ehci->caps->hcs_params);
  891. if (port > HCS_N_PORTS(params)) {
  892. ehci_dbg(ehci, "ERR: LPM on bad port %lu\n", port);
  893. return -ENODEV;
  894. }
  895. portsc = &ehci->regs->port_status[port-1];
  896. temp = ehci_readl(ehci, portsc);
  897. if (!(temp & PORT_DEV_ADDR)) {
  898. ehci_dbg(ehci, "LPM: no device attached\n");
  899. return -ENODEV;
  900. }
  901. temp |= PORT_LPM;
  902. ehci_writel(ehci, temp, portsc);
  903. printk(KERN_INFO "force enable LPM for port %lu\n", port);
  904. } else if (strncmp(buf, "hird=", 5) == 0) {
  905. unsigned long hird;
  906. if (strict_strtoul(buf + 5, 16, &hird))
  907. return -EINVAL;
  908. printk(KERN_INFO "setting hird %s %lu\n", buf + 6, hird);
  909. ehci->command = (ehci->command & ~CMD_HIRD) | (hird << 24);
  910. ehci_writel(ehci, ehci->command, &ehci->regs->command);
  911. } else if (strncmp(buf, "disable", 7) == 0) {
  912. if (strict_strtoul(buf + 8, 10, &port))
  913. return -EINVAL;
  914. params = ehci_readl(ehci, &ehci->caps->hcs_params);
  915. if (port > HCS_N_PORTS(params)) {
  916. ehci_dbg(ehci, "ERR: LPM off bad port %lu\n", port);
  917. return -ENODEV;
  918. }
  919. portsc = &ehci->regs->port_status[port-1];
  920. temp = ehci_readl(ehci, portsc);
  921. if (!(temp & PORT_DEV_ADDR)) {
  922. ehci_dbg(ehci, "ERR: no device attached\n");
  923. return -ENODEV;
  924. }
  925. temp &= ~PORT_LPM;
  926. ehci_writel(ehci, temp, portsc);
  927. printk(KERN_INFO "disabled LPM for port %lu\n", port);
  928. } else
  929. return -EOPNOTSUPP;
  930. return count;
  931. }
  932. static inline void create_debug_files (struct ehci_hcd *ehci)
  933. {
  934. struct usb_bus *bus = &ehci_to_hcd(ehci)->self;
  935. ehci->debug_dir = debugfs_create_dir(bus->bus_name, ehci_debug_root);
  936. if (!ehci->debug_dir)
  937. return;
  938. if (!debugfs_create_file("async", S_IRUGO, ehci->debug_dir, bus,
  939. &debug_async_fops))
  940. goto file_error;
  941. if (!debugfs_create_file("periodic", S_IRUGO, ehci->debug_dir, bus,
  942. &debug_periodic_fops))
  943. goto file_error;
  944. if (!debugfs_create_file("registers", S_IRUGO, ehci->debug_dir, bus,
  945. &debug_registers_fops))
  946. goto file_error;
  947. if (!debugfs_create_file("lpm", S_IRUGO|S_IWUSR, ehci->debug_dir, bus,
  948. &debug_lpm_fops))
  949. goto file_error;
  950. return;
  951. file_error:
  952. debugfs_remove_recursive(ehci->debug_dir);
  953. }
  954. static inline void remove_debug_files (struct ehci_hcd *ehci)
  955. {
  956. debugfs_remove_recursive(ehci->debug_dir);
  957. }
  958. #endif /* STUB_DEBUG_FILES */