sunsu.c 38 KB

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  1. /*
  2. * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
  3. *
  4. * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
  5. * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
  6. *
  7. * This is mainly a variation of 8250.c, credits go to authors mentioned
  8. * therein. In fact this driver should be merged into the generic 8250.c
  9. * infrastructure perhaps using a 8250_sparc.c module.
  10. *
  11. * Fixed to use tty_get_baud_rate().
  12. * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
  13. *
  14. * Converted to new 2.5.x UART layer.
  15. * David S. Miller (davem@davemloft.net), 2002-Jul-29
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/errno.h>
  21. #include <linux/tty.h>
  22. #include <linux/tty_flip.h>
  23. #include <linux/major.h>
  24. #include <linux/string.h>
  25. #include <linux/ptrace.h>
  26. #include <linux/ioport.h>
  27. #include <linux/circ_buf.h>
  28. #include <linux/serial.h>
  29. #include <linux/sysrq.h>
  30. #include <linux/console.h>
  31. #include <linux/slab.h>
  32. #ifdef CONFIG_SERIO
  33. #include <linux/serio.h>
  34. #endif
  35. #include <linux/serial_reg.h>
  36. #include <linux/init.h>
  37. #include <linux/delay.h>
  38. #include <linux/of_device.h>
  39. #include <asm/io.h>
  40. #include <asm/irq.h>
  41. #include <asm/prom.h>
  42. #include <asm/setup.h>
  43. #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  44. #define SUPPORT_SYSRQ
  45. #endif
  46. #include <linux/serial_core.h>
  47. #include <linux/sunserialcore.h>
  48. /* We are on a NS PC87303 clocked with 24.0 MHz, which results
  49. * in a UART clock of 1.8462 MHz.
  50. */
  51. #define SU_BASE_BAUD (1846200 / 16)
  52. enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
  53. static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
  54. /*
  55. * Here we define the default xmit fifo size used for each type of UART.
  56. */
  57. static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
  58. { "unknown", 1, 0 },
  59. { "8250", 1, 0 },
  60. { "16450", 1, 0 },
  61. { "16550", 1, 0 },
  62. { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
  63. { "Cirrus", 1, 0 },
  64. { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
  65. { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  66. { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
  67. { "Startech", 1, 0 },
  68. { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
  69. { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  70. { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  71. { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
  72. };
  73. struct uart_sunsu_port {
  74. struct uart_port port;
  75. unsigned char acr;
  76. unsigned char ier;
  77. unsigned short rev;
  78. unsigned char lcr;
  79. unsigned int lsr_break_flag;
  80. unsigned int cflag;
  81. /* Probing information. */
  82. enum su_type su_type;
  83. unsigned int type_probed; /* XXX Stupid */
  84. unsigned long reg_size;
  85. #ifdef CONFIG_SERIO
  86. struct serio serio;
  87. int serio_open;
  88. #endif
  89. };
  90. static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
  91. {
  92. offset <<= up->port.regshift;
  93. switch (up->port.iotype) {
  94. case UPIO_HUB6:
  95. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  96. return inb(up->port.iobase + 1);
  97. case UPIO_MEM:
  98. return readb(up->port.membase + offset);
  99. default:
  100. return inb(up->port.iobase + offset);
  101. }
  102. }
  103. static void serial_out(struct uart_sunsu_port *up, int offset, int value)
  104. {
  105. #ifndef CONFIG_SPARC64
  106. /*
  107. * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
  108. * connected with a gate then go to SlavIO. When IRQ4 goes tristated
  109. * gate outputs a logical one. Since we use level triggered interrupts
  110. * we have lockup and watchdog reset. We cannot mask IRQ because
  111. * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
  112. * This problem is similar to what Alpha people suffer, see serial.c.
  113. */
  114. if (offset == UART_MCR)
  115. value |= UART_MCR_OUT2;
  116. #endif
  117. offset <<= up->port.regshift;
  118. switch (up->port.iotype) {
  119. case UPIO_HUB6:
  120. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  121. outb(value, up->port.iobase + 1);
  122. break;
  123. case UPIO_MEM:
  124. writeb(value, up->port.membase + offset);
  125. break;
  126. default:
  127. outb(value, up->port.iobase + offset);
  128. }
  129. }
  130. /*
  131. * We used to support using pause I/O for certain machines. We
  132. * haven't supported this for a while, but just in case it's badly
  133. * needed for certain old 386 machines, I've left these #define's
  134. * in....
  135. */
  136. #define serial_inp(up, offset) serial_in(up, offset)
  137. #define serial_outp(up, offset, value) serial_out(up, offset, value)
  138. /*
  139. * For the 16C950
  140. */
  141. static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
  142. {
  143. serial_out(up, UART_SCR, offset);
  144. serial_out(up, UART_ICR, value);
  145. }
  146. #if 0 /* Unused currently */
  147. static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
  148. {
  149. unsigned int value;
  150. serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
  151. serial_out(up, UART_SCR, offset);
  152. value = serial_in(up, UART_ICR);
  153. serial_icr_write(up, UART_ACR, up->acr);
  154. return value;
  155. }
  156. #endif
  157. #ifdef CONFIG_SERIAL_8250_RSA
  158. /*
  159. * Attempts to turn on the RSA FIFO. Returns zero on failure.
  160. * We set the port uart clock rate if we succeed.
  161. */
  162. static int __enable_rsa(struct uart_sunsu_port *up)
  163. {
  164. unsigned char mode;
  165. int result;
  166. mode = serial_inp(up, UART_RSA_MSR);
  167. result = mode & UART_RSA_MSR_FIFO;
  168. if (!result) {
  169. serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
  170. mode = serial_inp(up, UART_RSA_MSR);
  171. result = mode & UART_RSA_MSR_FIFO;
  172. }
  173. if (result)
  174. up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
  175. return result;
  176. }
  177. static void enable_rsa(struct uart_sunsu_port *up)
  178. {
  179. if (up->port.type == PORT_RSA) {
  180. if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
  181. spin_lock_irq(&up->port.lock);
  182. __enable_rsa(up);
  183. spin_unlock_irq(&up->port.lock);
  184. }
  185. if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
  186. serial_outp(up, UART_RSA_FRR, 0);
  187. }
  188. }
  189. /*
  190. * Attempts to turn off the RSA FIFO. Returns zero on failure.
  191. * It is unknown why interrupts were disabled in here. However,
  192. * the caller is expected to preserve this behaviour by grabbing
  193. * the spinlock before calling this function.
  194. */
  195. static void disable_rsa(struct uart_sunsu_port *up)
  196. {
  197. unsigned char mode;
  198. int result;
  199. if (up->port.type == PORT_RSA &&
  200. up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
  201. spin_lock_irq(&up->port.lock);
  202. mode = serial_inp(up, UART_RSA_MSR);
  203. result = !(mode & UART_RSA_MSR_FIFO);
  204. if (!result) {
  205. serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
  206. mode = serial_inp(up, UART_RSA_MSR);
  207. result = !(mode & UART_RSA_MSR_FIFO);
  208. }
  209. if (result)
  210. up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
  211. spin_unlock_irq(&up->port.lock);
  212. }
  213. }
  214. #endif /* CONFIG_SERIAL_8250_RSA */
  215. static inline void __stop_tx(struct uart_sunsu_port *p)
  216. {
  217. if (p->ier & UART_IER_THRI) {
  218. p->ier &= ~UART_IER_THRI;
  219. serial_out(p, UART_IER, p->ier);
  220. }
  221. }
  222. static void sunsu_stop_tx(struct uart_port *port)
  223. {
  224. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  225. __stop_tx(up);
  226. /*
  227. * We really want to stop the transmitter from sending.
  228. */
  229. if (up->port.type == PORT_16C950) {
  230. up->acr |= UART_ACR_TXDIS;
  231. serial_icr_write(up, UART_ACR, up->acr);
  232. }
  233. }
  234. static void sunsu_start_tx(struct uart_port *port)
  235. {
  236. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  237. if (!(up->ier & UART_IER_THRI)) {
  238. up->ier |= UART_IER_THRI;
  239. serial_out(up, UART_IER, up->ier);
  240. }
  241. /*
  242. * Re-enable the transmitter if we disabled it.
  243. */
  244. if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
  245. up->acr &= ~UART_ACR_TXDIS;
  246. serial_icr_write(up, UART_ACR, up->acr);
  247. }
  248. }
  249. static void sunsu_stop_rx(struct uart_port *port)
  250. {
  251. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  252. up->ier &= ~UART_IER_RLSI;
  253. up->port.read_status_mask &= ~UART_LSR_DR;
  254. serial_out(up, UART_IER, up->ier);
  255. }
  256. static void sunsu_enable_ms(struct uart_port *port)
  257. {
  258. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  259. unsigned long flags;
  260. spin_lock_irqsave(&up->port.lock, flags);
  261. up->ier |= UART_IER_MSI;
  262. serial_out(up, UART_IER, up->ier);
  263. spin_unlock_irqrestore(&up->port.lock, flags);
  264. }
  265. static struct tty_struct *
  266. receive_chars(struct uart_sunsu_port *up, unsigned char *status)
  267. {
  268. struct tty_struct *tty = up->port.state->port.tty;
  269. unsigned char ch, flag;
  270. int max_count = 256;
  271. int saw_console_brk = 0;
  272. do {
  273. ch = serial_inp(up, UART_RX);
  274. flag = TTY_NORMAL;
  275. up->port.icount.rx++;
  276. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  277. UART_LSR_FE | UART_LSR_OE))) {
  278. /*
  279. * For statistics only
  280. */
  281. if (*status & UART_LSR_BI) {
  282. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  283. up->port.icount.brk++;
  284. if (up->port.cons != NULL &&
  285. up->port.line == up->port.cons->index)
  286. saw_console_brk = 1;
  287. /*
  288. * We do the SysRQ and SAK checking
  289. * here because otherwise the break
  290. * may get masked by ignore_status_mask
  291. * or read_status_mask.
  292. */
  293. if (uart_handle_break(&up->port))
  294. goto ignore_char;
  295. } else if (*status & UART_LSR_PE)
  296. up->port.icount.parity++;
  297. else if (*status & UART_LSR_FE)
  298. up->port.icount.frame++;
  299. if (*status & UART_LSR_OE)
  300. up->port.icount.overrun++;
  301. /*
  302. * Mask off conditions which should be ingored.
  303. */
  304. *status &= up->port.read_status_mask;
  305. if (up->port.cons != NULL &&
  306. up->port.line == up->port.cons->index) {
  307. /* Recover the break flag from console xmit */
  308. *status |= up->lsr_break_flag;
  309. up->lsr_break_flag = 0;
  310. }
  311. if (*status & UART_LSR_BI) {
  312. flag = TTY_BREAK;
  313. } else if (*status & UART_LSR_PE)
  314. flag = TTY_PARITY;
  315. else if (*status & UART_LSR_FE)
  316. flag = TTY_FRAME;
  317. }
  318. if (uart_handle_sysrq_char(&up->port, ch))
  319. goto ignore_char;
  320. if ((*status & up->port.ignore_status_mask) == 0)
  321. tty_insert_flip_char(tty, ch, flag);
  322. if (*status & UART_LSR_OE)
  323. /*
  324. * Overrun is special, since it's reported
  325. * immediately, and doesn't affect the current
  326. * character.
  327. */
  328. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  329. ignore_char:
  330. *status = serial_inp(up, UART_LSR);
  331. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  332. if (saw_console_brk)
  333. sun_do_break();
  334. return tty;
  335. }
  336. static void transmit_chars(struct uart_sunsu_port *up)
  337. {
  338. struct circ_buf *xmit = &up->port.state->xmit;
  339. int count;
  340. if (up->port.x_char) {
  341. serial_outp(up, UART_TX, up->port.x_char);
  342. up->port.icount.tx++;
  343. up->port.x_char = 0;
  344. return;
  345. }
  346. if (uart_tx_stopped(&up->port)) {
  347. sunsu_stop_tx(&up->port);
  348. return;
  349. }
  350. if (uart_circ_empty(xmit)) {
  351. __stop_tx(up);
  352. return;
  353. }
  354. count = up->port.fifosize;
  355. do {
  356. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  357. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  358. up->port.icount.tx++;
  359. if (uart_circ_empty(xmit))
  360. break;
  361. } while (--count > 0);
  362. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  363. uart_write_wakeup(&up->port);
  364. if (uart_circ_empty(xmit))
  365. __stop_tx(up);
  366. }
  367. static void check_modem_status(struct uart_sunsu_port *up)
  368. {
  369. int status;
  370. status = serial_in(up, UART_MSR);
  371. if ((status & UART_MSR_ANY_DELTA) == 0)
  372. return;
  373. if (status & UART_MSR_TERI)
  374. up->port.icount.rng++;
  375. if (status & UART_MSR_DDSR)
  376. up->port.icount.dsr++;
  377. if (status & UART_MSR_DDCD)
  378. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  379. if (status & UART_MSR_DCTS)
  380. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  381. wake_up_interruptible(&up->port.state->port.delta_msr_wait);
  382. }
  383. static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
  384. {
  385. struct uart_sunsu_port *up = dev_id;
  386. unsigned long flags;
  387. unsigned char status;
  388. spin_lock_irqsave(&up->port.lock, flags);
  389. do {
  390. struct tty_struct *tty;
  391. status = serial_inp(up, UART_LSR);
  392. tty = NULL;
  393. if (status & UART_LSR_DR)
  394. tty = receive_chars(up, &status);
  395. check_modem_status(up);
  396. if (status & UART_LSR_THRE)
  397. transmit_chars(up);
  398. spin_unlock_irqrestore(&up->port.lock, flags);
  399. if (tty)
  400. tty_flip_buffer_push(tty);
  401. spin_lock_irqsave(&up->port.lock, flags);
  402. } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
  403. spin_unlock_irqrestore(&up->port.lock, flags);
  404. return IRQ_HANDLED;
  405. }
  406. /* Separate interrupt handling path for keyboard/mouse ports. */
  407. static void
  408. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  409. unsigned int iflag, unsigned int quot);
  410. static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
  411. {
  412. unsigned int cur_cflag = up->cflag;
  413. int quot, new_baud;
  414. up->cflag &= ~CBAUD;
  415. up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
  416. quot = up->port.uartclk / (16 * new_baud);
  417. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  418. }
  419. static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
  420. {
  421. do {
  422. unsigned char ch = serial_inp(up, UART_RX);
  423. /* Stop-A is handled by drivers/char/keyboard.c now. */
  424. if (up->su_type == SU_PORT_KBD) {
  425. #ifdef CONFIG_SERIO
  426. serio_interrupt(&up->serio, ch, 0);
  427. #endif
  428. } else if (up->su_type == SU_PORT_MS) {
  429. int ret = suncore_mouse_baud_detection(ch, is_break);
  430. switch (ret) {
  431. case 2:
  432. sunsu_change_mouse_baud(up);
  433. /* fallthru */
  434. case 1:
  435. break;
  436. case 0:
  437. #ifdef CONFIG_SERIO
  438. serio_interrupt(&up->serio, ch, 0);
  439. #endif
  440. break;
  441. };
  442. }
  443. } while (serial_in(up, UART_LSR) & UART_LSR_DR);
  444. }
  445. static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
  446. {
  447. struct uart_sunsu_port *up = dev_id;
  448. if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
  449. unsigned char status = serial_inp(up, UART_LSR);
  450. if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
  451. receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
  452. }
  453. return IRQ_HANDLED;
  454. }
  455. static unsigned int sunsu_tx_empty(struct uart_port *port)
  456. {
  457. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  458. unsigned long flags;
  459. unsigned int ret;
  460. spin_lock_irqsave(&up->port.lock, flags);
  461. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  462. spin_unlock_irqrestore(&up->port.lock, flags);
  463. return ret;
  464. }
  465. static unsigned int sunsu_get_mctrl(struct uart_port *port)
  466. {
  467. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  468. unsigned char status;
  469. unsigned int ret;
  470. status = serial_in(up, UART_MSR);
  471. ret = 0;
  472. if (status & UART_MSR_DCD)
  473. ret |= TIOCM_CAR;
  474. if (status & UART_MSR_RI)
  475. ret |= TIOCM_RNG;
  476. if (status & UART_MSR_DSR)
  477. ret |= TIOCM_DSR;
  478. if (status & UART_MSR_CTS)
  479. ret |= TIOCM_CTS;
  480. return ret;
  481. }
  482. static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
  483. {
  484. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  485. unsigned char mcr = 0;
  486. if (mctrl & TIOCM_RTS)
  487. mcr |= UART_MCR_RTS;
  488. if (mctrl & TIOCM_DTR)
  489. mcr |= UART_MCR_DTR;
  490. if (mctrl & TIOCM_OUT1)
  491. mcr |= UART_MCR_OUT1;
  492. if (mctrl & TIOCM_OUT2)
  493. mcr |= UART_MCR_OUT2;
  494. if (mctrl & TIOCM_LOOP)
  495. mcr |= UART_MCR_LOOP;
  496. serial_out(up, UART_MCR, mcr);
  497. }
  498. static void sunsu_break_ctl(struct uart_port *port, int break_state)
  499. {
  500. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  501. unsigned long flags;
  502. spin_lock_irqsave(&up->port.lock, flags);
  503. if (break_state == -1)
  504. up->lcr |= UART_LCR_SBC;
  505. else
  506. up->lcr &= ~UART_LCR_SBC;
  507. serial_out(up, UART_LCR, up->lcr);
  508. spin_unlock_irqrestore(&up->port.lock, flags);
  509. }
  510. static int sunsu_startup(struct uart_port *port)
  511. {
  512. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  513. unsigned long flags;
  514. int retval;
  515. if (up->port.type == PORT_16C950) {
  516. /* Wake up and initialize UART */
  517. up->acr = 0;
  518. serial_outp(up, UART_LCR, 0xBF);
  519. serial_outp(up, UART_EFR, UART_EFR_ECB);
  520. serial_outp(up, UART_IER, 0);
  521. serial_outp(up, UART_LCR, 0);
  522. serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
  523. serial_outp(up, UART_LCR, 0xBF);
  524. serial_outp(up, UART_EFR, UART_EFR_ECB);
  525. serial_outp(up, UART_LCR, 0);
  526. }
  527. #ifdef CONFIG_SERIAL_8250_RSA
  528. /*
  529. * If this is an RSA port, see if we can kick it up to the
  530. * higher speed clock.
  531. */
  532. enable_rsa(up);
  533. #endif
  534. /*
  535. * Clear the FIFO buffers and disable them.
  536. * (they will be reenabled in set_termios())
  537. */
  538. if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
  539. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  540. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  541. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  542. serial_outp(up, UART_FCR, 0);
  543. }
  544. /*
  545. * Clear the interrupt registers.
  546. */
  547. (void) serial_inp(up, UART_LSR);
  548. (void) serial_inp(up, UART_RX);
  549. (void) serial_inp(up, UART_IIR);
  550. (void) serial_inp(up, UART_MSR);
  551. /*
  552. * At this point, there's no way the LSR could still be 0xff;
  553. * if it is, then bail out, because there's likely no UART
  554. * here.
  555. */
  556. if (!(up->port.flags & UPF_BUGGY_UART) &&
  557. (serial_inp(up, UART_LSR) == 0xff)) {
  558. printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
  559. return -ENODEV;
  560. }
  561. if (up->su_type != SU_PORT_PORT) {
  562. retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
  563. IRQF_SHARED, su_typev[up->su_type], up);
  564. } else {
  565. retval = request_irq(up->port.irq, sunsu_serial_interrupt,
  566. IRQF_SHARED, su_typev[up->su_type], up);
  567. }
  568. if (retval) {
  569. printk("su: Cannot register IRQ %d\n", up->port.irq);
  570. return retval;
  571. }
  572. /*
  573. * Now, initialize the UART
  574. */
  575. serial_outp(up, UART_LCR, UART_LCR_WLEN8);
  576. spin_lock_irqsave(&up->port.lock, flags);
  577. up->port.mctrl |= TIOCM_OUT2;
  578. sunsu_set_mctrl(&up->port, up->port.mctrl);
  579. spin_unlock_irqrestore(&up->port.lock, flags);
  580. /*
  581. * Finally, enable interrupts. Note: Modem status interrupts
  582. * are set via set_termios(), which will be occurring imminently
  583. * anyway, so we don't enable them here.
  584. */
  585. up->ier = UART_IER_RLSI | UART_IER_RDI;
  586. serial_outp(up, UART_IER, up->ier);
  587. if (up->port.flags & UPF_FOURPORT) {
  588. unsigned int icp;
  589. /*
  590. * Enable interrupts on the AST Fourport board
  591. */
  592. icp = (up->port.iobase & 0xfe0) | 0x01f;
  593. outb_p(0x80, icp);
  594. (void) inb_p(icp);
  595. }
  596. /*
  597. * And clear the interrupt registers again for luck.
  598. */
  599. (void) serial_inp(up, UART_LSR);
  600. (void) serial_inp(up, UART_RX);
  601. (void) serial_inp(up, UART_IIR);
  602. (void) serial_inp(up, UART_MSR);
  603. return 0;
  604. }
  605. static void sunsu_shutdown(struct uart_port *port)
  606. {
  607. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  608. unsigned long flags;
  609. /*
  610. * Disable interrupts from this port
  611. */
  612. up->ier = 0;
  613. serial_outp(up, UART_IER, 0);
  614. spin_lock_irqsave(&up->port.lock, flags);
  615. if (up->port.flags & UPF_FOURPORT) {
  616. /* reset interrupts on the AST Fourport board */
  617. inb((up->port.iobase & 0xfe0) | 0x1f);
  618. up->port.mctrl |= TIOCM_OUT1;
  619. } else
  620. up->port.mctrl &= ~TIOCM_OUT2;
  621. sunsu_set_mctrl(&up->port, up->port.mctrl);
  622. spin_unlock_irqrestore(&up->port.lock, flags);
  623. /*
  624. * Disable break condition and FIFOs
  625. */
  626. serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
  627. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  628. UART_FCR_CLEAR_RCVR |
  629. UART_FCR_CLEAR_XMIT);
  630. serial_outp(up, UART_FCR, 0);
  631. #ifdef CONFIG_SERIAL_8250_RSA
  632. /*
  633. * Reset the RSA board back to 115kbps compat mode.
  634. */
  635. disable_rsa(up);
  636. #endif
  637. /*
  638. * Read data port to reset things.
  639. */
  640. (void) serial_in(up, UART_RX);
  641. free_irq(up->port.irq, up);
  642. }
  643. static void
  644. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  645. unsigned int iflag, unsigned int quot)
  646. {
  647. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  648. unsigned char cval, fcr = 0;
  649. unsigned long flags;
  650. switch (cflag & CSIZE) {
  651. case CS5:
  652. cval = 0x00;
  653. break;
  654. case CS6:
  655. cval = 0x01;
  656. break;
  657. case CS7:
  658. cval = 0x02;
  659. break;
  660. default:
  661. case CS8:
  662. cval = 0x03;
  663. break;
  664. }
  665. if (cflag & CSTOPB)
  666. cval |= 0x04;
  667. if (cflag & PARENB)
  668. cval |= UART_LCR_PARITY;
  669. if (!(cflag & PARODD))
  670. cval |= UART_LCR_EPAR;
  671. #ifdef CMSPAR
  672. if (cflag & CMSPAR)
  673. cval |= UART_LCR_SPAR;
  674. #endif
  675. /*
  676. * Work around a bug in the Oxford Semiconductor 952 rev B
  677. * chip which causes it to seriously miscalculate baud rates
  678. * when DLL is 0.
  679. */
  680. if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
  681. up->rev == 0x5201)
  682. quot ++;
  683. if (uart_config[up->port.type].flags & UART_USE_FIFO) {
  684. if ((up->port.uartclk / quot) < (2400 * 16))
  685. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
  686. #ifdef CONFIG_SERIAL_8250_RSA
  687. else if (up->port.type == PORT_RSA)
  688. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
  689. #endif
  690. else
  691. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
  692. }
  693. if (up->port.type == PORT_16750)
  694. fcr |= UART_FCR7_64BYTE;
  695. /*
  696. * Ok, we're now changing the port state. Do it with
  697. * interrupts disabled.
  698. */
  699. spin_lock_irqsave(&up->port.lock, flags);
  700. /*
  701. * Update the per-port timeout.
  702. */
  703. uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
  704. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  705. if (iflag & INPCK)
  706. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  707. if (iflag & (BRKINT | PARMRK))
  708. up->port.read_status_mask |= UART_LSR_BI;
  709. /*
  710. * Characteres to ignore
  711. */
  712. up->port.ignore_status_mask = 0;
  713. if (iflag & IGNPAR)
  714. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  715. if (iflag & IGNBRK) {
  716. up->port.ignore_status_mask |= UART_LSR_BI;
  717. /*
  718. * If we're ignoring parity and break indicators,
  719. * ignore overruns too (for real raw support).
  720. */
  721. if (iflag & IGNPAR)
  722. up->port.ignore_status_mask |= UART_LSR_OE;
  723. }
  724. /*
  725. * ignore all characters if CREAD is not set
  726. */
  727. if ((cflag & CREAD) == 0)
  728. up->port.ignore_status_mask |= UART_LSR_DR;
  729. /*
  730. * CTS flow control flag and modem status interrupts
  731. */
  732. up->ier &= ~UART_IER_MSI;
  733. if (UART_ENABLE_MS(&up->port, cflag))
  734. up->ier |= UART_IER_MSI;
  735. serial_out(up, UART_IER, up->ier);
  736. if (uart_config[up->port.type].flags & UART_STARTECH) {
  737. serial_outp(up, UART_LCR, 0xBF);
  738. serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
  739. }
  740. serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  741. serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
  742. serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
  743. if (up->port.type == PORT_16750)
  744. serial_outp(up, UART_FCR, fcr); /* set fcr */
  745. serial_outp(up, UART_LCR, cval); /* reset DLAB */
  746. up->lcr = cval; /* Save LCR */
  747. if (up->port.type != PORT_16750) {
  748. if (fcr & UART_FCR_ENABLE_FIFO) {
  749. /* emulated UARTs (Lucent Venus 167x) need two steps */
  750. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  751. }
  752. serial_outp(up, UART_FCR, fcr); /* set fcr */
  753. }
  754. up->cflag = cflag;
  755. spin_unlock_irqrestore(&up->port.lock, flags);
  756. }
  757. static void
  758. sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
  759. struct ktermios *old)
  760. {
  761. unsigned int baud, quot;
  762. /*
  763. * Ask the core to calculate the divisor for us.
  764. */
  765. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  766. quot = uart_get_divisor(port, baud);
  767. sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
  768. }
  769. static void sunsu_release_port(struct uart_port *port)
  770. {
  771. }
  772. static int sunsu_request_port(struct uart_port *port)
  773. {
  774. return 0;
  775. }
  776. static void sunsu_config_port(struct uart_port *port, int flags)
  777. {
  778. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  779. if (flags & UART_CONFIG_TYPE) {
  780. /*
  781. * We are supposed to call autoconfig here, but this requires
  782. * splitting all the OBP probing crap from the UART probing.
  783. * We'll do it when we kill sunsu.c altogether.
  784. */
  785. port->type = up->type_probed; /* XXX */
  786. }
  787. }
  788. static int
  789. sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
  790. {
  791. return -EINVAL;
  792. }
  793. static const char *
  794. sunsu_type(struct uart_port *port)
  795. {
  796. int type = port->type;
  797. if (type >= ARRAY_SIZE(uart_config))
  798. type = 0;
  799. return uart_config[type].name;
  800. }
  801. static struct uart_ops sunsu_pops = {
  802. .tx_empty = sunsu_tx_empty,
  803. .set_mctrl = sunsu_set_mctrl,
  804. .get_mctrl = sunsu_get_mctrl,
  805. .stop_tx = sunsu_stop_tx,
  806. .start_tx = sunsu_start_tx,
  807. .stop_rx = sunsu_stop_rx,
  808. .enable_ms = sunsu_enable_ms,
  809. .break_ctl = sunsu_break_ctl,
  810. .startup = sunsu_startup,
  811. .shutdown = sunsu_shutdown,
  812. .set_termios = sunsu_set_termios,
  813. .type = sunsu_type,
  814. .release_port = sunsu_release_port,
  815. .request_port = sunsu_request_port,
  816. .config_port = sunsu_config_port,
  817. .verify_port = sunsu_verify_port,
  818. };
  819. #define UART_NR 4
  820. static struct uart_sunsu_port sunsu_ports[UART_NR];
  821. #ifdef CONFIG_SERIO
  822. static DEFINE_SPINLOCK(sunsu_serio_lock);
  823. static int sunsu_serio_write(struct serio *serio, unsigned char ch)
  824. {
  825. struct uart_sunsu_port *up = serio->port_data;
  826. unsigned long flags;
  827. int lsr;
  828. spin_lock_irqsave(&sunsu_serio_lock, flags);
  829. do {
  830. lsr = serial_in(up, UART_LSR);
  831. } while (!(lsr & UART_LSR_THRE));
  832. /* Send the character out. */
  833. serial_out(up, UART_TX, ch);
  834. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  835. return 0;
  836. }
  837. static int sunsu_serio_open(struct serio *serio)
  838. {
  839. struct uart_sunsu_port *up = serio->port_data;
  840. unsigned long flags;
  841. int ret;
  842. spin_lock_irqsave(&sunsu_serio_lock, flags);
  843. if (!up->serio_open) {
  844. up->serio_open = 1;
  845. ret = 0;
  846. } else
  847. ret = -EBUSY;
  848. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  849. return ret;
  850. }
  851. static void sunsu_serio_close(struct serio *serio)
  852. {
  853. struct uart_sunsu_port *up = serio->port_data;
  854. unsigned long flags;
  855. spin_lock_irqsave(&sunsu_serio_lock, flags);
  856. up->serio_open = 0;
  857. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  858. }
  859. #endif /* CONFIG_SERIO */
  860. static void sunsu_autoconfig(struct uart_sunsu_port *up)
  861. {
  862. unsigned char status1, status2, scratch, scratch2, scratch3;
  863. unsigned char save_lcr, save_mcr;
  864. unsigned long flags;
  865. if (up->su_type == SU_PORT_NONE)
  866. return;
  867. up->type_probed = PORT_UNKNOWN;
  868. up->port.iotype = UPIO_MEM;
  869. spin_lock_irqsave(&up->port.lock, flags);
  870. if (!(up->port.flags & UPF_BUGGY_UART)) {
  871. /*
  872. * Do a simple existence test first; if we fail this, there's
  873. * no point trying anything else.
  874. *
  875. * 0x80 is used as a nonsense port to prevent against false
  876. * positives due to ISA bus float. The assumption is that
  877. * 0x80 is a non-existent port; which should be safe since
  878. * include/asm/io.h also makes this assumption.
  879. */
  880. scratch = serial_inp(up, UART_IER);
  881. serial_outp(up, UART_IER, 0);
  882. #ifdef __i386__
  883. outb(0xff, 0x080);
  884. #endif
  885. scratch2 = serial_inp(up, UART_IER);
  886. serial_outp(up, UART_IER, 0x0f);
  887. #ifdef __i386__
  888. outb(0, 0x080);
  889. #endif
  890. scratch3 = serial_inp(up, UART_IER);
  891. serial_outp(up, UART_IER, scratch);
  892. if (scratch2 != 0 || scratch3 != 0x0F)
  893. goto out; /* We failed; there's nothing here */
  894. }
  895. save_mcr = serial_in(up, UART_MCR);
  896. save_lcr = serial_in(up, UART_LCR);
  897. /*
  898. * Check to see if a UART is really there. Certain broken
  899. * internal modems based on the Rockwell chipset fail this
  900. * test, because they apparently don't implement the loopback
  901. * test mode. So this test is skipped on the COM 1 through
  902. * COM 4 ports. This *should* be safe, since no board
  903. * manufacturer would be stupid enough to design a board
  904. * that conflicts with COM 1-4 --- we hope!
  905. */
  906. if (!(up->port.flags & UPF_SKIP_TEST)) {
  907. serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
  908. status1 = serial_inp(up, UART_MSR) & 0xF0;
  909. serial_outp(up, UART_MCR, save_mcr);
  910. if (status1 != 0x90)
  911. goto out; /* We failed loopback test */
  912. }
  913. serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
  914. serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
  915. serial_outp(up, UART_LCR, 0);
  916. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  917. scratch = serial_in(up, UART_IIR) >> 6;
  918. switch (scratch) {
  919. case 0:
  920. up->port.type = PORT_16450;
  921. break;
  922. case 1:
  923. up->port.type = PORT_UNKNOWN;
  924. break;
  925. case 2:
  926. up->port.type = PORT_16550;
  927. break;
  928. case 3:
  929. up->port.type = PORT_16550A;
  930. break;
  931. }
  932. if (up->port.type == PORT_16550A) {
  933. /* Check for Startech UART's */
  934. serial_outp(up, UART_LCR, UART_LCR_DLAB);
  935. if (serial_in(up, UART_EFR) == 0) {
  936. up->port.type = PORT_16650;
  937. } else {
  938. serial_outp(up, UART_LCR, 0xBF);
  939. if (serial_in(up, UART_EFR) == 0)
  940. up->port.type = PORT_16650V2;
  941. }
  942. }
  943. if (up->port.type == PORT_16550A) {
  944. /* Check for TI 16750 */
  945. serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
  946. serial_outp(up, UART_FCR,
  947. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  948. scratch = serial_in(up, UART_IIR) >> 5;
  949. if (scratch == 7) {
  950. /*
  951. * If this is a 16750, and not a cheap UART
  952. * clone, then it should only go into 64 byte
  953. * mode if the UART_FCR7_64BYTE bit was set
  954. * while UART_LCR_DLAB was latched.
  955. */
  956. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  957. serial_outp(up, UART_LCR, 0);
  958. serial_outp(up, UART_FCR,
  959. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  960. scratch = serial_in(up, UART_IIR) >> 5;
  961. if (scratch == 6)
  962. up->port.type = PORT_16750;
  963. }
  964. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  965. }
  966. serial_outp(up, UART_LCR, save_lcr);
  967. if (up->port.type == PORT_16450) {
  968. scratch = serial_in(up, UART_SCR);
  969. serial_outp(up, UART_SCR, 0xa5);
  970. status1 = serial_in(up, UART_SCR);
  971. serial_outp(up, UART_SCR, 0x5a);
  972. status2 = serial_in(up, UART_SCR);
  973. serial_outp(up, UART_SCR, scratch);
  974. if ((status1 != 0xa5) || (status2 != 0x5a))
  975. up->port.type = PORT_8250;
  976. }
  977. up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
  978. if (up->port.type == PORT_UNKNOWN)
  979. goto out;
  980. up->type_probed = up->port.type; /* XXX */
  981. /*
  982. * Reset the UART.
  983. */
  984. #ifdef CONFIG_SERIAL_8250_RSA
  985. if (up->port.type == PORT_RSA)
  986. serial_outp(up, UART_RSA_FRR, 0);
  987. #endif
  988. serial_outp(up, UART_MCR, save_mcr);
  989. serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
  990. UART_FCR_CLEAR_RCVR |
  991. UART_FCR_CLEAR_XMIT));
  992. serial_outp(up, UART_FCR, 0);
  993. (void)serial_in(up, UART_RX);
  994. serial_outp(up, UART_IER, 0);
  995. out:
  996. spin_unlock_irqrestore(&up->port.lock, flags);
  997. }
  998. static struct uart_driver sunsu_reg = {
  999. .owner = THIS_MODULE,
  1000. .driver_name = "sunsu",
  1001. .dev_name = "ttyS",
  1002. .major = TTY_MAJOR,
  1003. };
  1004. static int __devinit sunsu_kbd_ms_init(struct uart_sunsu_port *up)
  1005. {
  1006. int quot, baud;
  1007. #ifdef CONFIG_SERIO
  1008. struct serio *serio;
  1009. #endif
  1010. if (up->su_type == SU_PORT_KBD) {
  1011. up->cflag = B1200 | CS8 | CLOCAL | CREAD;
  1012. baud = 1200;
  1013. } else {
  1014. up->cflag = B4800 | CS8 | CLOCAL | CREAD;
  1015. baud = 4800;
  1016. }
  1017. quot = up->port.uartclk / (16 * baud);
  1018. sunsu_autoconfig(up);
  1019. if (up->port.type == PORT_UNKNOWN)
  1020. return -ENODEV;
  1021. printk("%s: %s port at %llx, irq %u\n",
  1022. up->port.dev->of_node->full_name,
  1023. (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
  1024. (unsigned long long) up->port.mapbase,
  1025. up->port.irq);
  1026. #ifdef CONFIG_SERIO
  1027. serio = &up->serio;
  1028. serio->port_data = up;
  1029. serio->id.type = SERIO_RS232;
  1030. if (up->su_type == SU_PORT_KBD) {
  1031. serio->id.proto = SERIO_SUNKBD;
  1032. strlcpy(serio->name, "sukbd", sizeof(serio->name));
  1033. } else {
  1034. serio->id.proto = SERIO_SUN;
  1035. serio->id.extra = 1;
  1036. strlcpy(serio->name, "sums", sizeof(serio->name));
  1037. }
  1038. strlcpy(serio->phys,
  1039. (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
  1040. sizeof(serio->phys));
  1041. serio->write = sunsu_serio_write;
  1042. serio->open = sunsu_serio_open;
  1043. serio->close = sunsu_serio_close;
  1044. serio->dev.parent = up->port.dev;
  1045. serio_register_port(serio);
  1046. #endif
  1047. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  1048. sunsu_startup(&up->port);
  1049. return 0;
  1050. }
  1051. /*
  1052. * ------------------------------------------------------------
  1053. * Serial console driver
  1054. * ------------------------------------------------------------
  1055. */
  1056. #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
  1057. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  1058. /*
  1059. * Wait for transmitter & holding register to empty
  1060. */
  1061. static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
  1062. {
  1063. unsigned int status, tmout = 10000;
  1064. /* Wait up to 10ms for the character(s) to be sent. */
  1065. do {
  1066. status = serial_in(up, UART_LSR);
  1067. if (status & UART_LSR_BI)
  1068. up->lsr_break_flag = UART_LSR_BI;
  1069. if (--tmout == 0)
  1070. break;
  1071. udelay(1);
  1072. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  1073. /* Wait up to 1s for flow control if necessary */
  1074. if (up->port.flags & UPF_CONS_FLOW) {
  1075. tmout = 1000000;
  1076. while (--tmout &&
  1077. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  1078. udelay(1);
  1079. }
  1080. }
  1081. static void sunsu_console_putchar(struct uart_port *port, int ch)
  1082. {
  1083. struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;
  1084. wait_for_xmitr(up);
  1085. serial_out(up, UART_TX, ch);
  1086. }
  1087. /*
  1088. * Print a string to the serial port trying not to disturb
  1089. * any possible real use of the port...
  1090. */
  1091. static void sunsu_console_write(struct console *co, const char *s,
  1092. unsigned int count)
  1093. {
  1094. struct uart_sunsu_port *up = &sunsu_ports[co->index];
  1095. unsigned long flags;
  1096. unsigned int ier;
  1097. int locked = 1;
  1098. local_irq_save(flags);
  1099. if (up->port.sysrq) {
  1100. locked = 0;
  1101. } else if (oops_in_progress) {
  1102. locked = spin_trylock(&up->port.lock);
  1103. } else
  1104. spin_lock(&up->port.lock);
  1105. /*
  1106. * First save the UER then disable the interrupts
  1107. */
  1108. ier = serial_in(up, UART_IER);
  1109. serial_out(up, UART_IER, 0);
  1110. uart_console_write(&up->port, s, count, sunsu_console_putchar);
  1111. /*
  1112. * Finally, wait for transmitter to become empty
  1113. * and restore the IER
  1114. */
  1115. wait_for_xmitr(up);
  1116. serial_out(up, UART_IER, ier);
  1117. if (locked)
  1118. spin_unlock(&up->port.lock);
  1119. local_irq_restore(flags);
  1120. }
  1121. /*
  1122. * Setup initial baud/bits/parity. We do two things here:
  1123. * - construct a cflag setting for the first su_open()
  1124. * - initialize the serial port
  1125. * Return non-zero if we didn't find a serial port.
  1126. */
  1127. static int __init sunsu_console_setup(struct console *co, char *options)
  1128. {
  1129. static struct ktermios dummy;
  1130. struct ktermios termios;
  1131. struct uart_port *port;
  1132. printk("Console: ttyS%d (SU)\n",
  1133. (sunsu_reg.minor - 64) + co->index);
  1134. /*
  1135. * Check whether an invalid uart number has been specified, and
  1136. * if so, search for the first available port that does have
  1137. * console support.
  1138. */
  1139. if (co->index >= UART_NR)
  1140. co->index = 0;
  1141. port = &sunsu_ports[co->index].port;
  1142. /*
  1143. * Temporary fix.
  1144. */
  1145. spin_lock_init(&port->lock);
  1146. /* Get firmware console settings. */
  1147. sunserial_console_termios(co, port->dev->of_node);
  1148. memset(&termios, 0, sizeof(struct ktermios));
  1149. termios.c_cflag = co->cflag;
  1150. port->mctrl |= TIOCM_DTR;
  1151. port->ops->set_termios(port, &termios, &dummy);
  1152. return 0;
  1153. }
  1154. static struct console sunsu_console = {
  1155. .name = "ttyS",
  1156. .write = sunsu_console_write,
  1157. .device = uart_console_device,
  1158. .setup = sunsu_console_setup,
  1159. .flags = CON_PRINTBUFFER,
  1160. .index = -1,
  1161. .data = &sunsu_reg,
  1162. };
  1163. /*
  1164. * Register console.
  1165. */
  1166. static inline struct console *SUNSU_CONSOLE(void)
  1167. {
  1168. return &sunsu_console;
  1169. }
  1170. #else
  1171. #define SUNSU_CONSOLE() (NULL)
  1172. #define sunsu_serial_console_init() do { } while (0)
  1173. #endif
  1174. static enum su_type __devinit su_get_type(struct device_node *dp)
  1175. {
  1176. struct device_node *ap = of_find_node_by_path("/aliases");
  1177. if (ap) {
  1178. const char *keyb = of_get_property(ap, "keyboard", NULL);
  1179. const char *ms = of_get_property(ap, "mouse", NULL);
  1180. if (keyb) {
  1181. if (dp == of_find_node_by_path(keyb))
  1182. return SU_PORT_KBD;
  1183. }
  1184. if (ms) {
  1185. if (dp == of_find_node_by_path(ms))
  1186. return SU_PORT_MS;
  1187. }
  1188. }
  1189. return SU_PORT_PORT;
  1190. }
  1191. static int __devinit su_probe(struct platform_device *op)
  1192. {
  1193. static int inst;
  1194. struct device_node *dp = op->dev.of_node;
  1195. struct uart_sunsu_port *up;
  1196. struct resource *rp;
  1197. enum su_type type;
  1198. bool ignore_line;
  1199. int err;
  1200. type = su_get_type(dp);
  1201. if (type == SU_PORT_PORT) {
  1202. if (inst >= UART_NR)
  1203. return -EINVAL;
  1204. up = &sunsu_ports[inst];
  1205. } else {
  1206. up = kzalloc(sizeof(*up), GFP_KERNEL);
  1207. if (!up)
  1208. return -ENOMEM;
  1209. }
  1210. up->port.line = inst;
  1211. spin_lock_init(&up->port.lock);
  1212. up->su_type = type;
  1213. rp = &op->resource[0];
  1214. up->port.mapbase = rp->start;
  1215. up->reg_size = resource_size(rp);
  1216. up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
  1217. if (!up->port.membase) {
  1218. if (type != SU_PORT_PORT)
  1219. kfree(up);
  1220. return -ENOMEM;
  1221. }
  1222. up->port.irq = op->archdata.irqs[0];
  1223. up->port.dev = &op->dev;
  1224. up->port.type = PORT_UNKNOWN;
  1225. up->port.uartclk = (SU_BASE_BAUD * 16);
  1226. err = 0;
  1227. if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
  1228. err = sunsu_kbd_ms_init(up);
  1229. if (err) {
  1230. of_iounmap(&op->resource[0],
  1231. up->port.membase, up->reg_size);
  1232. kfree(up);
  1233. return err;
  1234. }
  1235. dev_set_drvdata(&op->dev, up);
  1236. return 0;
  1237. }
  1238. up->port.flags |= UPF_BOOT_AUTOCONF;
  1239. sunsu_autoconfig(up);
  1240. err = -ENODEV;
  1241. if (up->port.type == PORT_UNKNOWN)
  1242. goto out_unmap;
  1243. up->port.ops = &sunsu_pops;
  1244. ignore_line = false;
  1245. if (!strcmp(dp->name, "rsc-console") ||
  1246. !strcmp(dp->name, "lom-console"))
  1247. ignore_line = true;
  1248. sunserial_console_match(SUNSU_CONSOLE(), dp,
  1249. &sunsu_reg, up->port.line,
  1250. ignore_line);
  1251. err = uart_add_one_port(&sunsu_reg, &up->port);
  1252. if (err)
  1253. goto out_unmap;
  1254. dev_set_drvdata(&op->dev, up);
  1255. inst++;
  1256. return 0;
  1257. out_unmap:
  1258. of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
  1259. return err;
  1260. }
  1261. static int __devexit su_remove(struct platform_device *op)
  1262. {
  1263. struct uart_sunsu_port *up = dev_get_drvdata(&op->dev);
  1264. bool kbdms = false;
  1265. if (up->su_type == SU_PORT_MS ||
  1266. up->su_type == SU_PORT_KBD)
  1267. kbdms = true;
  1268. if (kbdms) {
  1269. #ifdef CONFIG_SERIO
  1270. serio_unregister_port(&up->serio);
  1271. #endif
  1272. } else if (up->port.type != PORT_UNKNOWN)
  1273. uart_remove_one_port(&sunsu_reg, &up->port);
  1274. if (up->port.membase)
  1275. of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
  1276. if (kbdms)
  1277. kfree(up);
  1278. dev_set_drvdata(&op->dev, NULL);
  1279. return 0;
  1280. }
  1281. static const struct of_device_id su_match[] = {
  1282. {
  1283. .name = "su",
  1284. },
  1285. {
  1286. .name = "su_pnp",
  1287. },
  1288. {
  1289. .name = "serial",
  1290. .compatible = "su",
  1291. },
  1292. {
  1293. .type = "serial",
  1294. .compatible = "su",
  1295. },
  1296. {},
  1297. };
  1298. MODULE_DEVICE_TABLE(of, su_match);
  1299. static struct platform_driver su_driver = {
  1300. .driver = {
  1301. .name = "su",
  1302. .owner = THIS_MODULE,
  1303. .of_match_table = su_match,
  1304. },
  1305. .probe = su_probe,
  1306. .remove = __devexit_p(su_remove),
  1307. };
  1308. static int __init sunsu_init(void)
  1309. {
  1310. struct device_node *dp;
  1311. int err;
  1312. int num_uart = 0;
  1313. for_each_node_by_name(dp, "su") {
  1314. if (su_get_type(dp) == SU_PORT_PORT)
  1315. num_uart++;
  1316. }
  1317. for_each_node_by_name(dp, "su_pnp") {
  1318. if (su_get_type(dp) == SU_PORT_PORT)
  1319. num_uart++;
  1320. }
  1321. for_each_node_by_name(dp, "serial") {
  1322. if (of_device_is_compatible(dp, "su")) {
  1323. if (su_get_type(dp) == SU_PORT_PORT)
  1324. num_uart++;
  1325. }
  1326. }
  1327. for_each_node_by_type(dp, "serial") {
  1328. if (of_device_is_compatible(dp, "su")) {
  1329. if (su_get_type(dp) == SU_PORT_PORT)
  1330. num_uart++;
  1331. }
  1332. }
  1333. if (num_uart) {
  1334. err = sunserial_register_minors(&sunsu_reg, num_uart);
  1335. if (err)
  1336. return err;
  1337. }
  1338. err = platform_driver_register(&su_driver);
  1339. if (err && num_uart)
  1340. sunserial_unregister_minors(&sunsu_reg, num_uart);
  1341. return err;
  1342. }
  1343. static void __exit sunsu_exit(void)
  1344. {
  1345. if (sunsu_reg.nr)
  1346. sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
  1347. }
  1348. module_init(sunsu_init);
  1349. module_exit(sunsu_exit);
  1350. MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
  1351. MODULE_DESCRIPTION("Sun SU serial port driver");
  1352. MODULE_VERSION("2.0");
  1353. MODULE_LICENSE("GPL");